Commit Graph

20400 Commits

Author SHA1 Message Date
Chen-Yu Tsai
2c24794064
ARM: dts: sun7i: Add CSI1 controller and pinmux options
The CSI controller driver now supports the second CSI controller, CSI1.

Add a device node for it. Pinmuxing options for the MCLK output, the
standard 8-bit interface, and a secondary 24-bit interface are included.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06 09:51:01 +01:00
Chen-Yu Tsai
7faf7fbf25
ARM: dts: sun4i: Add CSI1 controller and pinmux options
The CSI controller driver now supports the second CSI controller, CSI1.

Add a device node for it. Pinmuxing options for the MCLK output, the
standard 8-bit interface, and a secondary 24-bit interface are included.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06 09:50:51 +01:00
Maxime Ripard
06dfaf1dc2
ARM: dts: sunxi: Add missing LVDS resets and clocks
Some old SoCs, while supporting LVDS, don't list the LVDS clocks and reset
lines. Let's add them when relevant.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-04 10:51:21 +01:00
Jagan Teki
0a934343a4
ARM: dts: sun8i: r40: Use tcon top clock index macros
tcon_tv0, tcon_tv1 nodes have a clock names of tcon-ch0,
tcon-ch1 which are referring tcon_top clocks via index
numbers like 0, 1 with CLK_TCON_TV0 and CLK_TCON_TV1
respectively.

Use the macro in place of index numbers, for more code
readability.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-03 10:39:27 +01:00
Andre Przywara
396c95e8b1
ARM: dts: sun8i: R40: Add PMU node
The ARM Cortex-A7 cores used in the Allwinner R40 SoC have their usual
Performance Monitoring Unit (PMU), which allows perf to use hardware
events.
The SoC integrator just needs to connect each per-core interrupt line
to the GIC. The R40 manual does not really mention those IRQ lines, but
experimentation in U-Boot shows that interrupts 152-155 are connected to
the four cores (similar to the A20).

Tested on a Bananapi M2 Berry, with perf and taskset to confirm the
association between cores and interrupts.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-03 10:39:27 +01:00
Andre Przywara
7569ac4475
ARM: dts: sun8i: R40: Upgrade GICC reg size to 8K
The GIC used in the R40 SoC is an ARM GIC-400 with virtualization support,
so let's advertise the full 8K region of the GICC MMIO frame to enable
KVM's usage of the GIC (as we do already for all other SoCs).

Tested by running KVM on a Bananapi M2 Berry.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-03 10:39:27 +01:00
Geert Uytterhoeven
fe4a76fafd ARM: dts: sh73a0: Add missing clock-frequency for fixed clocks
"clock-frequency" is a required property for devices nodes compatible
with "fixed-clock", leading to warnings when running

    $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/clock/fixed-clock.yaml
    arch/arm/boot/dts/sh73a0-kzm9g.dt.yaml: extcki: 'clock-frequency' is a required property

Fix this by adding the missing "clock-frequency" properties to the various
clocks, to be overridden by the board DTS files when populated.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162736.2160-1-geert+renesas@glider.be
2019-12-31 10:33:41 +01:00
Geert Uytterhoeven
0aed218f79 ARM: dts: r8a7778: Add missing clock-frequency for fixed clocks
"clock-frequency" is a required property for devices nodes compatible
with "fixed-clock", leading to warnings when running

    $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/clock/fixed-clock.yaml
    arch/arm/boot/dts/r8a7778-bockw.dt.yaml: audio_clk_a: 'clock-frequency' is a required property
    arch/arm/boot/dts/r8a7778-bockw.dt.yaml: audio_clk_b: 'clock-frequency' is a required property
    arch/arm/boot/dts/r8a7778-bockw.dt.yaml: audio_clk_c: 'clock-frequency' is a required property

Fix this by adding the missing "clock-frequency" properties to the audio
clocks, to be overridden by board DTS files when populated.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162712.2056-1-geert+renesas@glider.be
2019-12-31 10:33:41 +01:00
Geert Uytterhoeven
3bb426d042 ARM: dts: rcar-gen2: Add missing mmio-sram bus properties
"#address-cells", "#size-cells", and "ranges" are required properties
for devices nodes compatible with "mmio-sram", leading to warnings when
running "make dtbs_check":

    $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#address-cells' is a required property
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#size-cells' is a required property
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: 'ranges' is a required property
    ...

Fix this by adding the missing properties to the mmio-sram device nodes
in the DTS files for all affected R-Car Gen2 and RZ/G1 SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162604.1890-1-geert+renesas@glider.be
2019-12-31 10:33:41 +01:00
Geert Uytterhoeven
505128865a ARM: dts: rcar-gen2: Fix PCI high address in interrupt-map-mask
"make dtbs_check" emits warnings like:

    pci@ee090000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488
    pci@ee0b0000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488
    pci@ee0d0000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488

According to dt-schemas/schemas/pci/pci-bus.yaml, the PCI high address
cell value in the "interrupt-map-mask" property must lie in the range
0..0xf800.

Fix this by correcting the values from 0xff00 to 0xf800 in all affected
R-Car Gen2 and RZ/G1 DTS files.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162459.1731-1-geert+renesas@glider.be
2019-12-31 10:33:41 +01:00
Marek Szyprowski
c2f59e8180 ARM: dts: qcom: Correct USB3503 GPIOs polarity
Current USB3503 driver ignores GPIO polarity and always operates as if the
GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing
USB3503 chip applications to match the chip specification and common
convention for naming the pins. The only pin, which has to be ACTIVE_LOW
is the reset pin. The remaining are ACTIVE_HIGH. This change allows later
to fix the USB3503 driver to properly use generic GPIO bindings and read
polarity from DT.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191211145208.24976-1-m.szyprowski@samsung.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-12-30 20:40:19 +01:00
Tony Lindgren
9fc85a7124 Merge branch 'omap-for-v5.6/sdma' into omap-for-v5.6/ti-sysc-drop-pdata 2019-12-30 10:17:51 -08:00
Tony Lindgren
d71b48236c Merge tag 'sdma-dts' into omap-for-v5.6/ti-sysc-dt 2019-12-30 10:01:16 -08:00
Tony Lindgren
37b156ecf7 ARM: OMAP2+: Drop legacy platform data for sdma
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Vinod Koul <vkoul@kernel.org>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-30 09:47:21 -08:00
Damir Franusic
5e45489220 ARM: dts: qcom: Add nodes for SMP boot in IPQ40xx
Add missing nodes and properties to enable SMP
support on IPQ40xx devices.

Booting without "saw_l2" node:

[    0.001400] CPU: Testing write buffer coherency: ok
[    0.001856] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.060163] Setting up static identity map for 0x80300000 - 0x80300060
[    0.080140] rcu: Hierarchical SRCU implementation.
[    0.120258] smp: Bringing up secondary CPUs ...
[    0.200540] CPU1: failed to boot: -19
[    0.280689] CPU2: failed to boot: -19
[    0.360874] CPU3: failed to boot: -19
[    0.360966] smp: Brought up 1 node, 1 CPU
[    0.360979] SMP: Total of 1 processors activated (96.00 BogoMIPS).
[    0.360988] CPU: All CPU(s) started in SVC mode.

Then, booting with "saw_l2" node present (this patch applied):

[    0.001450] CPU: Testing write buffer coherency: ok
[    0.001904] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.060161] Setting up static identity map for 0x80300000 - 0x80300060
[    0.080137] rcu: Hierarchical SRCU implementation.
[    0.120252] smp: Bringing up secondary CPUs ...
[    0.200958] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.281091] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[    0.361264] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[    0.361430] smp: Brought up 1 node, 4 CPUs
[    0.361460] SMP: Total of 4 processors activated (384.00 BogoMIPS).
[    0.361469] CPU: All CPU(s) started in SVC mode.

Signed-off-by: Damir Franusic <damir.franusic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Robert Marko <robert.marko@sartura.hr>
Cc: Andy Gross <agross@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org
Link: https://lore.kernel.org/r/20191121152902.21394-1-damir.franusic@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-28 22:21:24 -08:00
Victhor Foster
ced44b9da5 ARM: dts: qcom: apq8084: Remove all instances of IRQ_TYPE_NONE
This patch removes all instances of IRQ_TYPE_NONE, which fixes warning
messages during boot. It also changes interrupt types to their
corresponding macros, as defined in arm-gic.h.

Signed-off by: Victhor Foster <victhor.foster@ufpe.br>
Link: https://lore.kernel.org/r/1238987932.9511963.1577060836760.JavaMail.zimbra@ufpe.br
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-28 18:50:42 -08:00
Victhor Foster
d5897d602b ARM: dts: qcom: apq8084: Change tsens definition to new style
This patch changes the tsens peripheral definition to the new style,
which fixes a kernel panic caused by a change in the tsens driver,
introduced by commit 37624b5854.  There
was a patch submitted recently to this list that should fix this problem
with old device trees and the new driver, so it may be redundant at this
point, in terms of fixing the kernel panic, but this should align the
APQ8084 device tree with the others.

Signed-off by: Victhor Foster <victhor.foster@ufpe.br>
Link: https://lore.kernel.org/r/108381142.9510389.1577057823350.JavaMail.zimbra@ufpe.br
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-28 18:50:38 -08:00
Chen-Yu Tsai
1b27080ab2
ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 board
The Libre Computer ALL-H3-IT board is a small single board computer that
is roughly the same size as the Raspberry Pi Zero, or around 20% smaller
than a credit card.

The board features:

  - H2, H3, or H5 SoC from Allwinner
  - 2 DDR3 DRAM chips
  - Realtek RTL8821CU based WiFi module
  - 128 Mbit SPI-NOR flash
  - micro-SD card slot
  - micro HDMI video output
  - FPC connector for camera sensor module
  - generic Raspberri-Pi style 40 pin GPIO header
  - additional pin headers for extra USB host ports, ananlog audio and
    IR receiver

Only H5 variant test samples were made available, but the vendor does
have plans to include at least an H3 variant. Thus the device tree is
split much like the ALL-H3-CC, with a common dtsi file for the board
design, and separate dts files including the common board file and the
SoC dtsi file. The other variants will be added as they are made
available.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-26 10:54:53 +01:00
Ondrej Jirman
b37da9c8e6
ARM: dts: sun8i-h3: Add thermal sensor and thermal zones
There is just one sensor for the CPU.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-26 10:27:01 +01:00
Ondrej Jirman
1b084d2e4e
ARM: dts: sun8i-a83t: Add thermal sensor and thermal zones
There are three sensors, two for each CPU cluster, one for GPU.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-26 10:26:58 +01:00
Stephan Gerhold
224bf0fe72 ARM: dts: ux500: samsung-golden: Add Bluetooth
samsung-golden uses a BCM4334 WiFi+BT combo chip.
The BT part is connected via UART and supported by the hci_bcm
driver in mainline.
Add the necessary device tree changes to make it load correctly.

It requires (seemingly) device-specific firmware that can be
extracted from the stock Android system used on samsung-golden:
  - /system/bin/bcm4334.hcd -> /lib/firmware/brcm/BCM4334B0.hcd

On my device, scanning for other Bluetooth devices works just fine,
but for some reason it keeps disconnecting immediately
when attempting to connect to an other device.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-9-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-26 00:12:25 +01:00
Stephan Gerhold
fbb7c4a13c ARM: dts: ux500: samsung-golden: Add WiFi
samsung-golden uses a BCM4334 WiFi+BT combo chip, connected to SDIO.
It is supported by the brcmfmac driver in mainline,
so we only need to set up the device tree to make it work correctly.

Note: brcmfmac requires (proprietary) firmware + a device-specific
NVRAM file. Both can be extracted from the stock Android system
used on samsung-golden:
  - /system/etc/wifi/bcmdhd_sta.bin_b2   -> /lib/firmware/brcm/brcmfmac4334-sdio.bin
  - /system/etc/wifi/nvram_net.txt_GPIO4 -> /lib/firmware/brcm/brcmfmac4334-sdio.samsung,golden.txt

brcmfmac4334-sdio.bin from linux-firmware also seems to work,
but results in occasional errors for some reason.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-8-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-26 00:11:59 +01:00
Stephan Gerhold
234a0387f7 ARM: dts: ux500: samsung-golden: Add touch screen
samsung-golden has an Atmel mXT224S touch controller connected to I2C.
It is supported by the existing driver for atmel,maxtouch, so all we
need to do to make it work is to define the necessary device tree nodes.

The atmel_mxt_ts driver does not support controlling regulators yet,
so add regulator-always-on for now to turn on the necessary regulators.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-7-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-26 00:11:35 +01:00
Stephan Gerhold
032c18c566 ARM: dts: ux500: samsung-golden: Add IMU (accelerometer + gyroscope)
samsung-golden has a InvenSense MPU-6051M IMU that provides an
accelerometer and gyroscope. It seems to be functionally compatible
with MPU-6050 so we can easily enable it by adding the necessary
device tree nodes.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-6-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-26 00:11:09 +01:00
Stephan Gerhold
b952efeb7a ARM: dts: ux500: Add device tree for Samsung Galaxy S III mini (GT-I8190)
The Samsung Galaxy S III mini (GT-I8190) is a smartphone with Ux500 SoC
released in 2012. Thanks to the great mainline support for Ux500,
it can actually run mainline Linux quite well.

Add a new device tree for it with support for:
  - Internal Storage (eMMC)
  - External Storage (Micro SD card)
  - UART
  - GPIO Buttons
  - Vibrator

Note that the device tree cannot be booted directly with
the original (Samsung) bootloader. It keeps the L2 cache turned on,
which causes the kernel to hang shortly after decompression.

As a workaround I have created a port of (mainline) U-Boot,
which locks the L2 cache before booting Linux. At the moment it does not
replace the Samsung bootloader, instead we let the original bootloader
load U-Boot as an another (intermediate) bootloader.

Another advantage of this is that U-Boot has proper device tree support,
so we do not need to hardcode the kernel command line in the device tree.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-5-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-26 00:10:43 +01:00
Stephan Gerhold
6299f3002b ARM: dts: ux500: Add device tree include for AB8505
AB8505 is a slightly newer version of AB8500.
Overall it is quite similar, but there are some differences like
the number of GPIOs and regulators. Therefore we need a separate
device tree definition for devices making use of AB8505.

The AB8500-specific nodes were moved out of ste-dbx5x0.dtsi in
commit a46f7c6762 ("ARM: dts: ux500: Move ab8500 nodes to ste-ab8500.dtsi").
Add a new "ste-ab8505.dtsi" device tree include in a similar way.

Keep the battery/charging related sub-devices disabled by default
since they require additional configuration to work correctly.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-3-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-26 00:09:49 +01:00
Stephan Gerhold
9956b94eea ARM: dts: ux500: Remove unused ste-href-ab8505.dtsi
The pin configuration for HREF boards with AB8505 was added in
commit 77ad9dfc2c ("ARM: ux500: move last AB8505 set-up to DT").
As the commit message notes, it was unused back then and it has
remained so even today, especially considering AB8505 did not have
proper device tree support until recently.

We are now preparing to add support for some Samsung smartphones
that are using AB8505. However, they use different pin configs
because using ste-href-ab8505.dtsi is known to break UART.
There were not many HREFs with AB8505, so at this point it seems
unlikely that we will ever make use of this include. Remove it.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-2-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-26 00:09:23 +01:00
Marek Vasut
fe6a6689d1 ARM: dts: imx6q-dhcom: Fix SGTL5000 VDDIO regulator connection
The SGTL5000 VDDIO is connected to the PMIC SW2 output, not to
a fixed 3V3 rail. Describe this correctly in the DT.

Fixes: 52c7a088ba ("ARM: dts: imx6q: Add support for the DHCOM iMX6 SoM and PDK2")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 16:51:29 +08:00
Peng Fan
b8ab62ff71 ARM: dts: imx7ulp: fix reg of cpu node
According to arm cpus binding doc,
"
      On 32-bit ARM v7 or later systems this property is
        required and matches the CPU MPIDR[23:0] register
        bits.

        Bits [23:0] in the reg cell must be set to
        bits [23:0] in MPIDR.

        All other bits in the reg cell must be set to 0.
"

In i.MX7ULP, the MPIDR[23:0] is 0xf00, not 0, so fix it.
Otherwise there will be warning:
"DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map"

Fixes: 20434dc92c ("ARM: dts: imx: add common imx7ulp dtsi support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 15:42:00 +08:00
Fabio Estevam
ec1c36382b ARM: dts: imx51-babbage: Fix the DVI output description
imx51-babbage has a TFP410 chip that receives 24-bit RGB parallel
input and convert it to DVI.

Fix the device tree description to reflect the real hardware.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 15:00:50 +08:00
Stefan Agner
e1af00487d ARM: dts: imx6qdl-apalis: mux HDMI CEC pin
Mux the HDMI CEC pin to make HDMI CEC working. With this change HDMI CEC
seems to work fine on a Apalis iMX6 on Ixora using cec-ctl.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 14:58:20 +08:00
Alexandre Belloni
7d7778b139 ARM: dts: imx6q-dhcom: fix rtc compatible
The only correct and documented compatible string for the rv3029 is
microcrystal,rv3029. Fix it up.

Fixes: 52c7a088ba ("ARM: dts: imx6q: Add support for the DHCOM iMX6 SoM and PDK2")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 14:34:22 +08:00
Andreas Kemnade
75d91c0dcd ARM: dts: imx6sll: add PXP module
While the EPDC is optional, both consumer and industrial editions
have the PXP module, so adding it to the corresponding .dtsi
Information taken from freescale kernel, compared with the
reference manual and tested by a separate program.

Since it does not depend on external wiring, the
status = "disabled" is left out here.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 09:23:51 +08:00
Jagan Teki
b97965803d ARM: dts: rockchip: Add Radxa Dalang Carrier board
Carrier board often referred as baseboard. For making
complete SBC or any other industrial boards, these
carrier boards will be used with associated SOMs.

Radxa has Dalang carrier board which supports on-board
peripherals, ports like USB-2.0, USB-3.0, HDMI, MIPI DSI/CSI,
eDP, Ethernet, WiFi, PCIe, USB-C, 40-Pin GPIO header and etc.

Right now Dalang carrier board is used with two SBC-variants:
Rock Pi N10 => VMARC RK3399Por SOM + Dalang carrier board
Rock Pi N8  => VMARC RK3288 SOM + Dalang carrier board(+codec)

So add this carrier board dtsi as a separate file in
ARM directory, so-that the same can reuse it in both
rk3288, rk3399pro variants of Rockchip SOMs.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20191216174711.17856-4-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-21 13:14:38 +01:00
Kamel Bouhara
414002bc32 ARM: dts: at91: add smartkiz support and a common kizboxmini dtsi file
Split the existing Kizbox Mini boards into three board configuration,
the base board, the mother board and the RailDIN board.
Add a new dts file for the SmartKiz board support.

Signed-off-by: Kévin RAYMOND <k.raymond@overkiz.com>
Signed-off-by: Mickael GARDET <m.gardet@overkiz.com>
Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com>
Link: https://lore.kernel.org/r/20191220103835.160154-2-kamel.bouhara@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-20 17:46:49 +01:00
Geert Uytterhoeven
f54e670dee ARM: dts: renesas: Group tuples in pci ranges and dma-ranges properties
To improve human readability and enable automatic validation, the tuples
in the "ranges" and "dma-ranges" properties of PCI devices nodes should
be grouped.  Not doing so causes "make dtbs_check" to emit warnings
like:

    pcie@fe000000: dma-ranges: [[1107296256, 0, 1073741824, 0, 1073741824, 0, 2147483648, 1124073472, 2, 0, 2, 0, 1, 0]] is not valid under any of the given schemas (Possible causes of the failure):
    pcie@fe000000: dma-ranges: [[1107296256, 0, 1073741824, 0, 1073741824, 0, 2147483648, 1124073472, 2, 0, 2, 0, 1, 0]] is not of type 'boolean'
    pcie@fe000000: dma-ranges:0: [1107296256, 0, 1073741824, 0, 1073741824, 0, 2147483648, 1124073472, 2, 0, 2, 0, 1, 0] is too long

Fix this by grouping the tuples of the "ranges" and "dma-ranges"
properties using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-5-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20 16:37:01 +01:00
Geert Uytterhoeven
c2e952ef5a ARM: dts: renesas: Group tuples in interrupt properties
To improve human readability and enable automatic validation, the tuples
in the various properties containing interrupt specifiers should be
grouped.  While "make dtbs_check" does not impose this yet for the
"interrupts" property, it does for the "interrupt-map" property, leading
to warnings like:

    pci@ee090000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 108, 4, 2048, 0, 0, 1, 5, 0, 108, 4, 4096, 0, 0, 2, 5, 0, 108, 4] is too long
    pci@ee0d0000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 113, 4, 2048, 0, 0, 1, 5, 0, 113, 4, 4096, 0, 0, 2, 5, 0, 113, 4] is too long

Fix this by grouping the tuples of the "interrupts" and "interrupt-map"
properties using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-4-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20 16:36:59 +01:00
Geert Uytterhoeven
8a481af10e ARM: dts: renesas: Group tuples in regulator-gpio states properties
To improve human readability and enable automatic validation, the tuples
in the "states" properties of device nodes compatible with
"regulator-gpio" should be grouped, as reported by "make dtbs_check":

    $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/regulator/gpio-regulator.yaml
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi0: states:0: Additional items are not allowed (1800000, 0 were unexpected)
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi0: states:0: [3300000, 1, 1800000, 0] is too long
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi1: states:0: Additional items are not allowed (1800000, 0 were unexpected)
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi1: states:0: [3300000, 1, 1800000, 0] is too long
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi2: states:0: Additional items are not allowed (1800000, 0 were unexpected)
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi2: states:0: [3300000, 1, 1800000, 0] is too long
    ...

Fix this by grouping the tuples using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-2-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20 16:36:47 +01:00
Geert Uytterhoeven
8443ffd1bb ARM: dts: r8a7779: Add device node for ARM global timer
Add a device node for the global timer, which is part of the Cortex-A9
MPCore.

The global timer can serve as an accurate (4 ns) clock source for
scheduling and delay loops.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191211135222.26770-4-geert+renesas@glider.be
2019-12-20 16:33:19 +01:00
Geert Uytterhoeven
df1a0aac0a ARM: dts: sh73a0: Add device node for ARM global timer
Add a device node for the global timer, which is part of the Cortex-A9
MPCore.

The global timer can serve as an accurate (3 ns) clock source for
scheduling and delay loops.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191211135222.26770-3-geert+renesas@glider.be
2019-12-20 16:33:19 +01:00
Geert Uytterhoeven
61b58e3f6e ARM: dts: sh73a0: Rename twd clock to periph clock
The "TWD" clock is actually the Cortex-A9 MPCore "PERIPHCLK" clock,
which not only clocks the private timers and watchdogs (TWD), but also
the interrupt controller and global timer.

Hence rename it from "twd" to "periph".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191211135222.26770-2-geert+renesas@glider.be
2019-12-20 16:33:19 +01:00
Maxime Ripard
b39f712dbe
ARM: dts: sun9i: Remove useless reset and clock names
The MMC configuration clock controller in the A80 definition has a
clock-names and reset-names property, even though the binding for that
controller doesn't declare it.

Remove it.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-20 08:57:31 +01:00
Maxime Ripard
7309386df5
ARM: dts: sun8i: nanopi-duo2: Fix GPIO regulator state array
Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each voltage state,
which in turns create a validation warning.

Let's fix this.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-20 08:57:27 +01:00
Maxime Ripard
ef4afc620f
ARM: dts: sunxi: Add missing dmas properties to TCON
The TCON binding mandates a dmas phandle to the DMAengine channel used for
that controller. However, since it's not used in the driver, some device
trees have been missing it. Let's add it.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-20 08:57:24 +01:00
Maxime Ripard
c36ffe4db6
ARM: dts: sun8i: v3s: Remove redundant assigned-clocks
The V3s mixer node has an assigned clocks property, while the driver also
enforces it.

Since assigned-clocks is pretty fragile anyway, let's just remove it.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-20 08:57:22 +01:00
Maxime Ripard
96940819e5
ARM: dts: sun9i: Make sure the USB PHY resources are in the same order
While this is functional, it's a best practice to always have the clocks
and reset lines in order, in case we ever need to have compatibility code.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-20 08:57:17 +01:00
Marek Szyprowski
1019fe2c72 ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids
Hardkernel's Odroid XU3/XU4/HC1 boards use bootloader, which configures
top PLLs to the following values: MPLL: 532MHz, CPLL: 666MHz and DPLL:
600MHz.

Adjust all bus related OPPs to the values that are possible to derive
from the top PLL configured by the bootloader. Also add a comment for
each bus describing which PLL is used for it.

The most significant change is the highest rate for wcore bus. It has
been increased to 532MHz as this is the value configured initially by
the bootloader. Also the voltage for this OPP is changed to match the
value set by the bootloader.

This patch finally allows the buses to operate on the rates matching the
values set for each OPP and fixes the following warnings observed on
boot:

exynos-bus: new bus device registered: soc:bus_wcore ( 84000 KHz ~ 400000 KHz)
exynos-bus: new bus device registered: soc:bus_noc ( 67000 KHz ~ 100000 KHz)
exynos-bus: new bus device registered: soc:bus_fsys_apb (100000 KHz ~ 200000 KHz)
...
exynos-bus soc:bus_wcore: dev_pm_opp_set_rate: failed to find current OPP for freq 532000000 (-34)
exynos-bus soc:bus_noc: dev_pm_opp_set_rate: failed to find current OPP for freq 111000000 (-34)
exynos-bus soc:bus_fsys_apb: dev_pm_opp_set_rate: failed to find current OPP for freq 222000000 (-34)

The problem with setting incorrect (in some cases much lower) clock rate
for the defined OPP were there from the beginning, but went unnoticed
because the only way to observe it was to manually check the rate of the
respective clocks. The commit 4294a779bd ("PM / devfreq: exynos-bus:
Convert to use dev_pm_opp_set_rate()") finally revealed it, because it
enabled use of the generic code from the OPP framework, which issues the
above mentioned warnings.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-12-19 21:12:15 +01:00
Marek Szyprowski
c6d0192afa ARM: dts: exynos: Move Exynos5420 bus related OPPs to the Odroid boards DTS
Currently the only Exynos5422-based boards that support bus frequency
scaling are Hardkernel's Odroid XU3/XU4/HC1. Move the bus related OPPs
to the boards DTS, because those OPPs heavily depend on the clock
topology and top PLL rates, which are being configured by the board's
bootloader.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-12-19 21:12:15 +01:00
Zumeng Chen
02a93929e3 ARM: dts: zynq: enablement of coresight topology
This patch is to build the coresight topology structure of zynq-7000
series according to the docs of coresight and userguide of zynq-7000.

Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com>
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-12-18 15:31:21 +01:00
Kishon Vijay Abraham I
e17e7c498d ARM: dts: beagle-x15-common: Model 5V0 regulator
On am57xx-beagle-x15, 5V0 is connected to P16, P17, P18 and P19
connectors. On am57xx-evm, 5V0 regulator is used to get 3V6 regulator
which is connected to the COMQ port. Model 5V0 regulator here in order
for it to be used in am57xx-evm to model 3V6 regulator.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 15:18:34 -08:00
Kishon Vijay Abraham I
0c4eb2a6b3 ARM: dts: am571x-idk: Fix gpios property to have the correct gpio number
commit d23f3839fe ("ARM: dts: DRA7: Add pcie1 dt node for
EP mode") while adding the dt node for EP mode for DRA7 platform,
added rc node for am571x-idk and populated gpios property with
"gpio3 23". However the GPIO_PCIE_SWRST line is actually connected
to "gpio5 18". Fix it here. (The patch adding "gpio3 23" was tested
with another am57x board in EP mode which doesn't rely on reset from
host).

Cc: stable <stable@vger.kernel.org> # 4.14+
Fixes: d23f3839fe ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 10:21:56 -08:00
Kishon Vijay Abraham I
81cc087784 ARM: dts: am57xx-beagle-x15/am57xx-idk: Remove "gpios" for endpoint dt nodes
PERST# line in the PCIE connector is driven by the host mode and not
EP mode. The gpios property here is used for driving the PERST# line.
Remove gpios property from all endpoint device tree nodes.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 10:21:40 -08:00
Olof Johansson
c3d68019fc First set of Ux500 DTS changes for the v5.6 kernel:
- Add the GPADC IIO channels
 - Factor out generic pin configuration
 - Add the gpio_in_nopull configuration
 - Tighten up I2C and SPI buses
 - Clean up some compatibles
 - Extract a generic DB8500 DTSI
 - Add HREF520 DTS and the associated DB8520 DTSI
 - Split TVK R2 and R3 to separate DTSI files
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Merge tag 'ux500-armsoc-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt

First set of Ux500 DTS changes for the v5.6 kernel:

- Add the GPADC IIO channels
- Factor out generic pin configuration
- Add the gpio_in_nopull configuration
- Tighten up I2C and SPI buses
- Clean up some compatibles
- Extract a generic DB8500 DTSI
- Add HREF520 DTS and the associated DB8520 DTSI
- Split TVK R2 and R3 to separate DTSI files

* tag 'ux500-armsoc-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: dts: ux500: Add devicetree for HREF520
  ARM: dts: ux500: Split TVK DTSI files in two
  ARM: dts: ux500: Break out DB8500 DTSI
  ARM: dts: ux500: Drop pulls on I2C buses
  ARM: dts: ux500: Use "arm,pl031" compatible for PL031
  ARM: dts: ux500: Add "simple-bus" compatible to soc node
  ARM: dts: ux500: Remove ux500_ prefix from ux500_serial* labels
  ARM: dts: ux500: Move serial aliases to ste-dbx5x0.dtsi
  ARM: dts: ux500: Add aliases for I2C and SPI buses
  ARM: dts: ux500: Disable I2C/SPI buses by default
  ARM: dts: ux500: nomadik-pinctrl: Add &gpio_in_nopull
  ARM: dts: ux500: Add pin configs for UART1 CTS/RTS pins
  ARM: dts: ux500: Add alternative SDI pin configs
  ARM: dts: ux500: Rename generic pin configs according to pin group
  ARM: dts: ux500: Move generic pin configs out of ste-href-family-pinctrl.dtsi
  dt-bindings: arm: Document compatibles for Ux500 boards
  ARM: dts: ux500: snowball: Remove unused PRCMU cpufreq node
  ARM: dts: ux500: declare GPADC IIO ADC channels

Link: https://lore.kernel.org/r/CACRpkdYfqJ=VXkP3Qm5Lw63AuR=1ChxbUW+Y-nhw5gCX6sYfDw@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-17 10:03:57 -08:00
Tony Lindgren
54a751f623 Merge branch 'omap-for-v5.6/ti-sysc-dt' into omap-for-v5.6/ti-sysc-drop-pdata 2019-12-17 09:34:14 -08:00
Tero Kristo
a6c8056d2f ARM: dts: omap5: convert IOMMUs to use ti-sysc
Convert omap5 IOMMUs to use ti-sysc instead of legacy omap-hwmod based
implementation. Enable the IOMMUs also while doing this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 09:27:29 -08:00
Tero Kristo
22f8d6649d ARM: dts: omap4: convert IOMMUs to use ti-sysc
Convert omap4 IOMMUs to use ti-sysc instead of legacy omap-hwmod based
implementation. Enable the IOMMUs also while doing this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 09:27:23 -08:00
Tero Kristo
3e4120b9c0 ARM: dts: dra74x: convert IOMMUs to use ti-sysc
Convert dra74x IOMMUs to use ti-sysc instead of legacy omap-hwmod based
implementation. Enable the IOMMUs also while doing this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 09:27:16 -08:00
Tero Kristo
dbd2d6f9be ARM: dts: dra7: convert IOMMUs to use ti-sysc
Convert dra7 IOMMUs to use ti-sysc instead of legacy omap-hwmod based
implementation. Enable the IOMMUs also while doing this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 09:26:49 -08:00
Tony Lindgren
d864dbdfa6 ARM: OMAP2+: Drop legacy platform data for omap4 fdif
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:59 -08:00
Tony Lindgren
5725e6c169 ARM: OMAP2+: Drop legacy platform data for omap4 slimbus
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:59 -08:00
Tony Lindgren
8c77b65635 ARM: OMAP2+: Drop legacy platform data for omap5 kbd
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:59 -08:00
Tony Lindgren
a9e2d3c61d ARM: OMAP2+: Drop legacy platform data for omap4 kbd
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:58 -08:00
Tony Lindgren
e54740b4af ARM: OMAP2+: Drop legacy platform data for dra7 smartreflex
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:58 -08:00
Tony Lindgren
a6b1e717e9 ARM: OMAP2+: Drop legacy platform data for omap4 smartreflex
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:58 -08:00
Tony Lindgren
72b48b999c ARM: OMAP2+: Drop legacy platform data for omap4 hsi
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Sebastian Reichel <sre@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:58 -08:00
Tony Lindgren
027678deae ARM: OMAP2+: Drop legacy platform data for am4 vpfe
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Benoit Parrot <bparrot@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:57 -08:00
Tony Lindgren
adb47d9d14 ARM: OMAP2+: Drop legacy platform data for dra7 ocp2scp
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:57 -08:00
Tony Lindgren
08f721e833 ARM: OMAP2+: Drop legacy platform data for omap5 ocp2scp
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:57 -08:00
Tony Lindgren
813b09b05d ARM: OMAP2+: Drop legacy platform data for omap4 ocp2scp
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Bin Liu <b-liu@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:56 -08:00
Tony Lindgren
269e6ec23a ARM: OMAP2+: Drop legacy platform data for am4 ocp2scp
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:56 -08:00
Tony Lindgren
adb72394e2 ARM: OMAP2+: Drop legacy platform data for am3 lcdc
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Jyri Sarha <jsarha@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:56 -08:00
Tony Lindgren
a9f31495c6 ARM: OMAP2+: Drop legacy platform data for dra7 elm
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Franklin S Cooper Jr <fcooper@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:56 -08:00
Tony Lindgren
fccccdcd85 ARM: OMAP2+: Drop legacy platform data for omap4 elm
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Franklin S Cooper Jr <fcooper@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:55 -08:00
Tony Lindgren
ff594e2296 ARM: OMAP2+: Drop legacy platform data for am3 and am4 elm
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Franklin S Cooper Jr <fcooper@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:55 -08:00
Tony Lindgren
97752cc26e ARM: OMAP2+: Drop legacy platform data for am4 adc_tsc
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Andrew F. Davis <afd@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Vignesh R <vigneshr@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:55 -08:00
Tony Lindgren
958036e212 ARM: OMAP2+: Drop legacy platform data for am3 adc_tsc
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Andrew F. Davis <afd@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Vignesh R <vigneshr@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:54 -08:00
Tony Lindgren
17b6e0280f ARM: OMAP2+: Drop legacy platform data for am3 and am4 dcan
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:54 -08:00
Tony Lindgren
78e2d1f4b7 ARM: OMAP2+: Drop legacy platform data for am3 and am4 spi
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Vignesh R <vigneshr@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:53 -08:00
Tony Lindgren
4554f0a1cb ARM: OMAP2+: Drop legacy platform data for dra7 spinlock
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Suman Anna <s-anna@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:53 -08:00
Tony Lindgren
995c1535da ARM: OMAP2+: Drop legacy platform data for omap5 spinlock
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Suman Anna <s-anna@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:53 -08:00
Tony Lindgren
d169232953 ARM: OMAP2+: Drop legacy platform data for omap4 spinlock
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Suman Anna <s-anna@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:52 -08:00
Tony Lindgren
c62201a356 ARM: OMAP2+: Drop legacy platform data for am3 and am4 spinlock
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Suman Anna <s-anna@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:52 -08:00
Tony Lindgren
846a1b675c ARM: OMAP2+: Drop legacy platform data for dra7 epwmss
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Franklin S Cooper Jr <fcooper@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Vignesh R <vigneshr@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:52 -08:00
Tony Lindgren
cfbeeedaa5 ARM: OMAP2+: Drop legacy platform data for am3 and am4 epwmss
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Franklin S Cooper Jr <fcooper@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Vignesh R <vigneshr@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:52 -08:00
Tony Lindgren
3d1d10be06 ARM: OMAP2+: Drop legacy platform data for dra7 timers except timer1 to 4
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:51 -08:00
Tony Lindgren
aec5180205 ARM: OMAP2+: Drop legacy platform data for am3 and am4 timers except timer1 and 2
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:51 -08:00
Tony Lindgren
1b44c550a4 ARM: OMAP2+: Drop legacy platform data for omap5 timers except timer1
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:51 -08:00
Tony Lindgren
bfdfd5636a ARM: OMAP2+: Drop legacy platform data for omap4 timers except timer1
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:51 -08:00
Tony Lindgren
11b27908a3 ARM: OMAP2+: Drop legacy platform data for dra7 des
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:50 -08:00
Tony Lindgren
69471c654a ARM: OMAP2+: Drop legacy platform data for am4 des
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:50 -08:00
Tony Lindgren
1633d8d372 ARM: OMAP2+: Drop legacy platform data for dra7 aes
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:50 -08:00
Tony Lindgren
c31502179d ARM: OMAP2+: Drop legacy platform data for am3 and am4 aes
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:49 -08:00
Tony Lindgren
68e3b63e75 ARM: OMAP2+: Drop legacy platform data for dra7 sham
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:49 -08:00
Tony Lindgren
6899cf7388 ARM: OMAP2+: Drop legacy platform data for am3 and am4 sham
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:49 -08:00
Tony Lindgren
4150fe384e ARM: OMAP2+: Drop legacy platform data for omap5 mcpdm
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:49 -08:00
Tony Lindgren
1d2a38d42b ARM: OMAP2+: Drop legacy platform data for omap5 dmic
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:48 -08:00
Tony Lindgren
6974285ed5 ARM: OMAP2+: Drop legacy platform data for omap4 mcpdm
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:48 -08:00
Tony Lindgren
a0fc37ff28 ARM: OMAP2+: Drop legacy platform data for omap4 dmic
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:48 -08:00
Tony Lindgren
19c8915ca3 ARM: OMAP2+: Drop legacy platform data for omap4 aess
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:47 -08:00
Tony Lindgren
0cd62d5e74 ARM: OMAP2+: Drop legacy platform data for am4 qspi
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Jean Pihet <jean.pihet@newoldbits.com>
Acked-by: Jean Pihet <jean.pihet@newoldbits.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:17:47 -08:00
Tony Lindgren
eabb3f5a1b ARM: dts: Configure interconnect target module for dra7 des
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:11:01 -08:00
Tony Lindgren
f6d9eb0c25 ARM: dts: Configure interconnect target module for am4 des
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:11:01 -08:00
Tony Lindgren
2ea3ce2cf6 ARM: dts: Configure interconnect target module for dra7 aes
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:11:01 -08:00
Tony Lindgren
e9225f22c7 ARM: dts: Configure interconnect target module for am4 aes
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:11:01 -08:00
Tony Lindgren
b4679c0544 ARM: dts: Configure interconnect target module for am3 aes
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:11:00 -08:00
Tony Lindgren
e132681cef ARM: dts: Configure interconnect target module for dra7 sham
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Similar to am3, I could not find any documentation for the sysc
register on this one, but it seems to work just fine based on
"ti,sysc-omap3-sham" compatible style configuration.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:11:00 -08:00
Tony Lindgren
ed8e44dfa7 ARM: dts: Configure interconnect target module for am4 sham
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Similar to am3, I could not find any documentation for the sysc
register on this one, but it seems to work just fine based on
"ti,sysc-omap3-sham" compatible style configuration.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:11:00 -08:00
Tony Lindgren
e36afc29ea ARM: dts: Configure interconnect target module for am3 sham
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

I could not find any documentation for the sysc register on this one,
but it seems to work just fine with "ti,sysc-omap3-sham" compatible
style configuration.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:10:59 -08:00
Tony Lindgren
f60c41257f ARM: dts: Configure interconnect target module for am4 qspi
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Jean Pihet <jean.pihet@newoldbits.com>
Acked-by: Jean Pihet <jean.pihet@newoldbits.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:10:53 -08:00
Tony Lindgren
bfab07ee52 ARM: dts: Configure interconnect target module for omap3 sdma
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Note that we want to use separate compatible for omap34xx and
omap36xx so let's do that here too while at it.

Cc: devicetree@vger.kernel.org
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Vinod Koul <vkoul@kernel.org>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:06:09 -08:00
Tony Lindgren
eb6b38b26e ARM: dts: Configure interconnect target module for omap2 sdma
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Note that we want to use separate compatible for omap2420 and
omap2430 so let's do that here too while at it.

Cc: devicetree@vger.kernel.org
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Vinod Koul <vkoul@kernel.org>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-17 08:05:58 -08:00
Marek Szyprowski
1c226017d3
ARM: dts: sun8i: a83t: Correct USB3503 GPIOs polarity
Current USB3503 driver ignores GPIO polarity and always operates as if the
GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing
USB3503 chip applications to match the chip specification and common
convention for naming the pins. The only pin, which has to be ACTIVE_LOW
is the reset pin. The remaining are ACTIVE_HIGH. This change allows later
to fix the USB3503 driver to properly use generic GPIO bindings and read
polarity from DT.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-17 09:37:14 +01:00
Ivan Mikhaylov
e4aab38ed5 ARM: dts: aspeed: Add SD card for Vesnin
Presence signal is inverted for vesnin boards, 'cd-inverted' added
for invertion signal enablement. Vesnin BMC uses microSD, there is
no WP switch, 'disable-wp' is used for this purpose.

Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:35 +11:00
Tao Ren
78b08af0dd ARM: dts: aspeed: yamp: Delete no-hw-checksum
Ftgmac100's checksum issue has been fixed by commit 88824e3bf2 ("net:
ethernet: ftgmac100: Fix DMA coherency issue with SW checksum") so this
property is no longer required.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:29 +11:00
Tao Ren
4ba33177c6 ARM: dts: aspeed: netbmc: Delete no-hw-checksum
The ftgmac100's checksum issue has been fixed by commit 88824e3bf2
("net: ethernet: ftgmac100: Fix DMA coherency issue with SW checksum")
so this property is no longer required

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:28 +11:00
Joel Stanley
d4d171bd3e ARM: dts: aspeed: AST2400 disables hw checksum
There is no need to specify this property in the device tree as the
AST2400 does not have working hardware checksum and disables it in the
driver.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Alexander Filippov <a.filippov@yadro.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:26 +11:00
Andrew Jeffery
dafa8fe276 ARM: dts: ibm-power9-dual: Add a unit address for OCC nodes
These temporarily have a unit address until userspace is fixed up as
noted in comments elsewhere in the dtsi.

Fixes the following warning:

    arch/arm/boot/dts/ibm-power9-dual.dtsi:89.18-91.6: Warning (unit_address_vs_reg): /gpio-fsi/cfam@0,0/sbefifo@2400/occ: node has a reg or ranges property, but no unit name
    arch/arm/boot/dts/ibm-power9-dual.dtsi:190.18-192.6: Warning (unit_address_vs_reg): /gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/sbefifo@2400/occ: node has a reg or ranges property, but no unit name

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:25 +11:00
Andrew Jeffery
56d71b5501 ARM: dts: aspeed-g6: Cleanup watchdog unit address
arch/arm/boot/dts/aspeed-g6.dtsi:204.28-208.6: Warning (simple_bus_reg): /ahb/apb/watchdog@1e7850C0: simple-bus unit address format error, expected "1e7850c0"

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:23 +11:00
Andrew Jeffery
cf4aae1a05 ARM: dts: aspeed-g5: Sort LPC child nodes by unit address
Lets try to maintain some sort of sanity.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:22 +11:00
Andrew Jeffery
e3f0cf4fb8 ARM: dts: aspeed: Add reg hints to syscon children
Fixes the following warnings:

    arch/arm/boot/dts/aspeed-g5.dtsi:209.28-226.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/syscon@1e6e2000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    arch/arm/boot/dts/aspeed-g4.dtsi:156.28-172.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/syscon@1e6e2000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:20 +11:00
Andrew Jeffery
2de782b769 ARM: dts: aspeed: Cleanup lpc-ctrl and snoop regs
Fix the following warning:

    arch/arm/boot/dts/aspeed-g5.dtsi:409.27-414.8: Warning (unique_unit_address): /ahb/apb/lpc@1e789000/lpc-host@80/lpc-ctrl@0: duplicate unit-address (also used in node /ahb/apb/lpc@1e789000/lpc-host@80/lpc-snoop@0)

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:19 +11:00
Andrew Jeffery
1d6d2e0d46 ARM: dts: witherspoon: Cleanup gpio-keys-polled properties
dtbs_check gave the following warning:

    Warning (avoid_unnecessary_addr_size): /gpio-keys-polled: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Cc: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:18 +11:00
Andrew Jeffery
53820e00aa ARM: dts: swift: Cleanup gpio-keys-polled properties
dtbs_check gave the following warning:

    Warning (avoid_unnecessary_addr_size): /gpio-keys-polled: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Cc: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Adriana Kobylak <anoo@us.ibm.com>
Tested-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:18 +11:00
Andrew Jeffery
5da9a58963 ARM: dts: fp5280g2: Cleanup gpio-keys-polled properties
dtbs_check gave the following warning:

    Warning (avoid_unnecessary_addr_size): /gpio-keys-polled: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Cc: John Wang <wangzqbj@inspur.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Adriana Kobylak <anoo@us.ibm.com>
Tested-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:16 +11:00
Andrew Jeffery
95d519ceb8 ARM: dts: vesnin: Add unit address for memory node
Fixes the following warnings:

    arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dt.yaml: /: memory: False schema does not allow {'reg': [[1073741824, 536870912]]}
    arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dt.yaml: memory: 'device_type' is a required property

Cc: Alexander Filippov <a.filippov@yadro.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Tested-by: Alexander Filippov <a.filippov@yadro.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:07 +11:00
Andrew Jeffery
1f3051142b ARM: dts: aspeed-g5: Use recommended generic node name for SDMC
The EDAC is a sub-function of the SDRAM Memory Controller. Rename the
node to the appropriate generic node name.

Cc: Stefan M Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Stefan Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:05 +11:00
Andrew Jeffery
b41c03c1cf ARM: dts: aspeed-g5: Move EDAC node to APB
Previously the register interface was not attached to any internal bus,
which is not correct - it lives on the APB.

Cc: Stefan M Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Stefan Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:03 +11:00
Florian Fainelli
030cc6cb1b ARM: dts: NSP: Use hardware I2C for BCM958625HR
Now that the i2c-bcm-iproc driver has been fixed to permit reading more
than 63 bytes in a single transaction with commit fd01eecdf9 ("i2c:
iproc: Fix i2c master read more than 63 bytes") we no longer need to
bitbang i2c over GPIOs which was necessary before to allow the
PHYLINK/SFP subsystems to read SFP modules.

Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-12-16 16:15:52 -08:00
Tony Lindgren
65b5969e58 ARM: dts: Add generic compatible for omap sdma instances
We need this to pass auxdata to all the sdma instances.

Cc: devicetree@vger.kernel.org
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Vinod Koul <vkoul@kernel.org>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-16 15:49:06 -08:00
Chen-Yu Tsai
0738badd9d
ARM: dts: sun8i: r40: Add I2C pinmux options
The R40 has five I2C controllers. Currently only I2C0 has its pinmux
option defined.

Add the options for the remaining four, and set them as the default,
since each controller has only one possible pinmux configuration.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-16 11:29:10 +01:00
Masahiro Yamada
38dbf2de46 ARM: dts: uniphier: add pinmux nodes for I2C ch5, ch6
The next generation SoC can connect on-board slave devices via
I2C ch5 and ch6.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-12-16 07:23:21 +09:00
Olof Johansson
9a4b814856 Fixes for omap variants for v5.5-rc1 cycle
This series of changes contains fixes for issues recently noticed:
 
 - The ti-sysc interconnect target module driver needs fixes for
   mstandby quirk handling and reset delay
 
 - We need to configure am335x-sancloud-bbe to use rgmii-id mode because of
   the phy changes done earlier
 
 - NET_SWITCHDEV is no longer selected in Kconfig but a dependency and we
   must enable CONFIG_NET_SWITCHDEV to have TI_CPSW_SWITCHDEV
 
 - We are still relying on DEBUG_FS at least for PM configuration, let's
   add it back
 
 - We need to update compatible for am437x-gp/epos-evm because of the
   recent changes to use generic panels
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Merge tag 'omap-for-v5.5/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omap variants for v5.5-rc1 cycle

This series of changes contains fixes for issues recently noticed:

- The ti-sysc interconnect target module driver needs fixes for
  mstandby quirk handling and reset delay

- We need to configure am335x-sancloud-bbe to use rgmii-id mode because of
  the phy changes done earlier

- NET_SWITCHDEV is no longer selected in Kconfig but a dependency and we
  must enable CONFIG_NET_SWITCHDEV to have TI_CPSW_SWITCHDEV

- We are still relying on DEBUG_FS at least for PM configuration, let's
  add it back

- We need to update compatible for am437x-gp/epos-evm because of the
  recent changes to use generic panels

* tag 'omap-for-v5.5/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  bus: ti-sysc: Fix missing reset delay handling
  ARM: dts: am437x-gp/epos-evm: fix panel compatible
  ARM: omap2plus_defconfig: Add back DEBUG_FS
  ARM: omap2plus_defconfig: enable NET_SWITCHDEV
  ARM: dts: am335x-sancloud-bbe: fix phy mode
  bus: ti-sysc: Fix missing force mstandby quirk handling

Link: https://lore.kernel.org/r/pull-1576254925-709310@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-13 12:43:34 -08:00
Jack Chen
e964d46339 ARM: dts: rockchip: Add missing cpu operating points for rk3288-tinker
The Tinker Board / S devices use a special chip variant called rk3288-c
and use different operating points with a higher max frequency.

So add the missing operating points for Tinker Board / S devices, also
increase the vdd_cpu regulator-max-microvolt to 1400000 uV so that the
cpu can operate at 1.8 GHz.

Signed-off-by: Jack Chen <redchenjs@live.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Link: https://lore.kernel.org/r/20191202153540.26143-1-redchenjs@foxmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-13 10:46:08 +01:00
Bjorn Andersson
b1ca5b49f1 ARM: dts: msm8974: Move ADSP smd edge to ADSP PIL
With the introduction of SSR support in the ADSP PIL we should describe
the SMD edge inside the ADSP PIL node.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
[luca@z3ntu.xyz: Add label for the smd edge]
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20191114175348.288976-2-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 17:18:53 -08:00
Bjorn Andersson
13f3b8e3dc ARM: dts: msm8974: Add modem remoteproc node
Add the remoteproc node for the modem on msm8974.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
[luca@z3ntu.xyz: cleanups, add label to smd-edge node]
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20191114175348.288976-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 17:18:51 -08:00
Marek Szyprowski
5206265f78 ARM: dts: exynos: Correct USB3503 GPIOs polarity
Current USB3503 driver ignores GPIO polarity and always operates as if the
GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing
USB3503 chip applications to match the chip specification and common
convention for naming the pins. The only pin, which has to be ACTIVE_LOW
is the reset pin. The remaining are ACTIVE_HIGH. This change allows later
to fix the USB3503 driver to properly use generic GPIO bindings and read
polarity from DT.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-12-12 21:18:36 +01:00
Olof Johansson
89f33b984a i.MX fixes for 5.5:
- Add missing jedec,spi-nor compatible for imx6ul-14x14-evk board,
    so that SPI NOR device can be probed.
  - Fix power button of E60K02 board by removing LDORTC2 regulator.
  - A couple of fixes on serial number support of i.MX6ULL/ULZ SoCs to
    remove the boot regression caused by 8267ff89b7 ("ARM: imx: Add
    serial number support for i.MX6/7 SoCs").
  - A couple of fixes on LS1028A SoC TMU regarding to calibration data
    and reboot register configuration.
  - Fix a regression seen on imx6ul-evk board by marking always-on for
    the regulator that is shared by many peripherals.
  - Explicitly restore CONFIG_DEBUG_FS in imx_v6_v7_defconfig.
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Merge tag 'imx-fixes-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.5:
 - Add missing jedec,spi-nor compatible for imx6ul-14x14-evk board,
   so that SPI NOR device can be probed.
 - Fix power button of E60K02 board by removing LDORTC2 regulator.
 - A couple of fixes on serial number support of i.MX6ULL/ULZ SoCs to
   remove the boot regression caused by 8267ff89b7 ("ARM: imx: Add
   serial number support for i.MX6/7 SoCs").
 - A couple of fixes on LS1028A SoC TMU regarding to calibration data
   and reboot register configuration.
 - Fix a regression seen on imx6ul-evk board by marking always-on for
   the regulator that is shared by many peripherals.
 - Explicitly restore CONFIG_DEBUG_FS in imx_v6_v7_defconfig.

* tag 'imx-fixes-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: Fix boot crash if ocotp is not found
  ARM: imx_v6_v7_defconfig: Explicitly restore CONFIG_DEBUG_FS
  ARM: dts: imx6ul-evk: Fix peripheral regulator
  arm64: dts: ls1028a: fix reboot node
  arm64: dts: ls1028a: fix typo in TMU calibration data
  ARM: imx: Correct ocotp id for serial number support of i.MX6ULL/ULZ SoCs
  ARM: dts: e60k02: fix power button
  ARM: dts: imx6ul: imx6ul-14x14-evk.dtsi: Fix SPI NOR probing

Link: https://lore.kernel.org/r/20191212122427.GK15858@dragon
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-12 09:38:23 -08:00
Jyri Sarha
bfe0237dd6 ARM: dts: am335x-icev2: Add support for OSD9616P0899-10 at i2c0
Add support for OSD9616P0899-10 96x16 passive matrix display. The
pre-charge period parameters are taken form a OSD9616P0899-10
document, but the display works fine with the default values too.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12 09:35:02 -08:00
Jyri Sarha
32ee9fdf66 ARM: dts: am335x-evmsk: Use drm simple-panel instead of tilcdc-panel
Move to use the new drm panel support in tilcdc together with added
"newhaven,nhd-4.3-480272ef-atxl"-panel support in drm panel-simple.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12 09:34:00 -08:00
Jyri Sarha
c8d37f625f ARM: dts: am335x-evm: Use drm simple-panel instead of tilcdc-panel
Move to use the new drm panel support in tilcdc together with added
"tfc,s9700rtwv43tr-01b"-panel support in drm panel-simple.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12 09:32:38 -08:00
Grygorii Strashko
65d26052d5 ARM: dts: omap3: name mdio node properly
Rename davinci_mdio DT node "ethernet"->"mdio"
This fixes the following DT schemas check errors:
am3517-craneboard.dt.yaml: ethernet@5c030000: $nodename:0: 'ethernet@5c030000' does not match '^mdio(@.*)?'

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12 09:31:34 -08:00
Tomi Valkeinen
edb71d34de ARM: dts: am57xx-idk-common: add HDMI to the common dtsi
AM571x/AM572x/AM574x IDK base boards have HDMI output. Add DT nodes to
am57xx-idk-common.dtsi to enable HDMI.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12 09:22:26 -08:00
Tomi Valkeinen
bf21e6e1b0 ARM: dts: dra76-evm: add HDMI output
Add DRA76 EVM HDMI output for the base board.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12 09:22:20 -08:00
Philippe Schenker
3ee959b19c ARM: dts: colibri-imx6ull: correct wrong pinmuxing and add comments
Some pinmuxings are obviously wrong, originating from a copy/paste
error. This patch corrects that with the following strategy:

- Set all reserved bits to zero
- Leave drive strength and slew rate as is
- Add sensible pull and hysteresis depending on the function of the pin
- Not used pins are muxed to their reset-value defined by the SoC

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 19:38:55 +08:00
Andrey Smirnov
b5f02bc353 ARM: dts: vf610-zii-scu4-aib: Add node for switch watchdog
Add I2C child node for switch watchdog present on SCU4.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 10:27:33 +08:00
Andrey Smirnov
444d18a7dd ARM: dts: vf610-zii-scu4-aib: Use generic names for DT nodes
The devicetree specification recommends using generic node names.

Some ZII dts files already follow such recommendation, but some don't,
so use generic node names for consistency among the ZII dts files.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Cory Tusar <cory.tusar@zii.aero>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 10:27:24 +08:00
Andrey Smirnov
e5380cd85b ARM: dts: vf610-zii-dev-rev-b: Drop redundant I2C properties
ZII VF610 Board Rev. B is supposed to have exactly the same I2C config
as Rev. C, including I2C bus recovery settings. Drop redundant I2C
properties that are already specified in vf610-zii-dev.dtsi

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 10:25:47 +08:00
Leonard Crestez
62cfe242db ARM: dts: imx6ul-evk: Fix peripheral regulator
Many peripherals are affected by gpio5/2, not just sensors. One of those
is ethernet phy so network boot is current broken.

Fix by renaming reg_sensors and marking it as "always on". Also add a
comment asking for careful testing if this is to be made dynamic in the
future.

The "peri_3v3" naming is similar to imx6sx-sdb and regulator-name is
same string as in schematics (VPERI_3V3).

Fixes: 09e2b10489 ("ARM: dts: imx6ul-14x14-evk: Add sensors' GPIO regulator")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 10:04:55 +08:00
Christoph Fritz
d9267ca195 ARM: dts: phycore-imx6: set buck regulator modes explicitly
This patch sets initial buck regulator modes explicitly to a state this
hardware needs. So a wrong initial mode set by bootloader or pmic itself
does not interfere anymore.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 09:41:01 +08:00
Andrey Smirnov
6bb1e09c4c ARM: dts: imx6: rdu2: Limit USBH1 to Full Speed
Cabling used to connect devices to USBH1 on RDU2 does not meet USB
spec cable quality and cable length requirements to operate at High
Speed, so limit the port to Full Speed only.

Reported-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 09:31:32 +08:00
Andrey Smirnov
cd58a174e5 ARM: dts: imx6: rdu2: Disable WP for USDHC2 and USDHC3
RDU2 production units come with resistor connecting WP pin to
correpsonding GPIO DNPed for both SD card slots. Drop any WP related
configuration and mark both slots with "disable-wp".

Reported-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 09:31:32 +08:00
Andrey Smirnov
f3042a8655 ARM: dts: imx6: rdu2: Add node for UCS1002 USB charger chip
Add node for UCS1002 USB charger chip connected to front panel USB and
replace "regulator-fixed" previously used to control VBUS.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 09:31:32 +08:00
Peter Chen
02f8eb40ef ARM: dts: imx7s: Add power domain for imx7d HSIC
Otherwise, the system will hang if USB driver try to access
portsc register.

Cc: André Draszik <git@andred.net>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 09:31:31 +08:00
Martin Blumenstingl
6d549ff55c ARM: dts: meson8b: add the DDR clock controller
Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main
(HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the
inputs for the audio clock muxes.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-11 11:26:27 -08:00
Martin Blumenstingl
c4ac5c37a4 ARM: dts: meson8: add the DDR clock controller
Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main
(HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the
inputs for the audio clock muxes.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-11 11:26:26 -08:00
Martin Blumenstingl
630ea3108a ARM: dts: meson: provide the XTAL clock using a fixed-clock
The clock controller driver has provided the XTAL clock so far. This
does not match how the hardware actually works because the XTAL clock is
an actual crystal which is mounted on the PCB.

Add the "xtal" clock to meson.dtsi and replace all references to the
clock controller's CLKID_XTAL with the new xtal clock node.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-11 11:26:26 -08:00
Bartlomiej Zolnierkiewicz
eaffc4de16 ARM: dts: exynos: Add missing CPU frequencies for Exynos5422/5800
Add missing 2.0GHz, 1.9GHz & 1.8GHz OPPs (for A15 cores) and 1.4GHz
OPP (for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4
thermal cooling maps to account for new OPPs.

Since some new OPPs are not available on all Exynos5422/5800 boards
modify dts files for Odroid XU3 Lite (limited to 1.8 GHz / 1.3 GHz) &
Peach Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.

This patch uses maximum voltages for new OPPs. This is a temporary
solution till proper Exynos ASV support is added.

Also while at it fix the number of cooling down steps for big cores
(should be 11 instead of 12 on Odroid XU3 Lite and 14 on XU3/XU4).

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
[mszyprow: rebased onto v5.5-rc1 and adapted to recent dts changes,
 fixed removal of the 1.4GHz OPP for A7s on Peach-Pi]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-12-11 19:18:03 +01:00
Marek Szyprowski
6c43b5d396 ARM: dts: exynos: Add initial data for coupled regulators for Exynos5422/5800
Declare Exynos5422/5800 voltage ranges for OPPs for big CPUs
(Cortex-A15) and wcore bus.  Couple their voltage supplies as vdd_arm
and vdd_int should be in 300 mV range.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[k.konieczny: add missing patch description]
Signed-off-by: Kamil Konieczny <k.konieczny@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-12-11 19:13:33 +01:00
Sylwester Nawrocki
e90cb36c77 ARM: dts: exynos: Remove syscon compatible from chipid node on Exynos5
The "syscon" compatible string was introduced in commit ("cdcce1ee977b
ARM: dts: exynos: Add "syscon" compatible string to chipid node on Exynos5")
to allow sharing of the CHIPID IO region between multiple drivers.
However, such sharing can be also done without an additional compatible
so remove the syscon entry.

Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-12-11 19:12:00 +01:00
Tomi Valkeinen
c6b16761c6 ARM: dts: am437x-gp/epos-evm: fix panel compatible
The LCD panel on AM4 GP EVMs and ePOS boards seems to be
osd070t1718-19ts. The current dts files say osd057T0559-34ts. Possibly
the panel has changed since the early EVMs, or there has been a mistake
with the panel type.

Update the DT files accordingly.

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-11 08:51:03 -08:00
Fabio Estevam
7d00c4fb4f ARM: dts: imx7ulp-com: Add initial support for i.MX7UP COM board
The Embedded Artists COM board is based on NXP i.MX7ULP.

It has a BD70528 PMIC from Rohm with discrete DCDC powering option and
improved current observability (compared to the existing NXP i.MX7ULP EVK).

Add the initial support for the board.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 10:28:03 +08:00
Abhishek Pandit-Subedi
8784692d28 ARM: dts: rockchip: Add brcm bluetooth for rk3288-veyron
This enables the Broadcom uart bluetooth driver on uart0 and gives it
ownership of its gpios. In order to use this, you must enable the
following kconfig options:
- CONFIG_BT_HCIUART_BCM
- CONFIG_SERIAL_DEV

This is applicable to rk3288-veyron series boards that use the bcm43540
wifi+bt chips.

As part of this change, also refactor the pinctrl across the various
boards. All the boards using broadcom bluetooth shouldn't touch the
bt_dev_wake pin.

Signed-off-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20191127223909.253873-2-abhishekpandit@chromium.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-10 23:31:48 +01:00
Stefan Wahren
30e647a764 ARM: dts: bcm283x: Fix critical trip point
During definition of the CPU thermal zone of BCM283x SoC family there
was a misunderstanding of the meaning "criticial trip point" and the
thermal throttling range of the VideoCore firmware. The latter one takes
effect when the core temperature is at least 85 degree celsius or higher

So the current critical trip point doesn't make sense, because the
thermal shutdown appears before the firmware has a chance to throttle
the ARM core(s).

Fix these unwanted shutdowns by increasing the critical trip point
to a value which shouldn't be reached with working thermal throttling.

Fixes: 0fe4d2181c ("ARM: dts: bcm283x: Add CPU thermal zone with 1 trip point")
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-12-10 12:37:09 -08:00
Luca Weiss
6aa71bb876 ARM: dts: msm8974-FP2: Introduce the wcnss remoteproc node
Enable the remoteproc node and add the necessary pinctrl states.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20191104212302.105469-2-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:43:18 -08:00
Bjorn Andersson
c7c0edecfb ARM: dts: msm8974: Introduce the wcnss remoteproc node
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20191104212302.105469-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:43:17 -08:00
Brian Masney
98073faf9f ARM: dts: qcom: msm8974: add interconnect nodes
Add interconnect nodes that's needed to support bus scaling.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20191024103140.10077-5-masneyb@onstation.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:43:17 -08:00
Brian Masney
a2cc991ed6 ARM: dts: qcom: msm8974: add ocmem node
Add ocmem node that is needed in order to support the GPU upstream.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20191024103140.10077-4-masneyb@onstation.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:43:17 -08:00
Mans Rullgard
c842b8c4ff ARM: dts: am335x-sancloud-bbe: fix phy mode
The phy mode should be rgmii-id.  For some reason, it used to work with
rgmii-txid but doesn't any more.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-10 07:18:21 -08:00
Kamel Bouhara
2bb040225d ARM: dts: at91: rearrange kizbox dts using aliases nodes
Use aliases nodes to easy kizbox dts readability.

Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com>
Link: https://lore.kernel.org/r/20191205223021.1370083-1-kamel.bouhara@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10 11:59:57 +01:00
Nicolas Ferre
eb41690c92 ARM: dts: at91: sama5d27_som1_ek: add the microchip,sdcal-inverted on sdmmc0
Specify the SoC SDCAL pin connection that is used in the
sama5d27c 128MiB SiP on the SAMA5D27 SOM1.
This will put in place a software workaround that would reduce power
consumption on all boards using this SoM, including the SAMA5D27 SOM1 EK.

Uses property introduced in 5cd41fe897 ("dt-bindings: sdhci-of-at91:
add the microchip,sdcal-inverted property")

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20191205113604.9000-1-nicolas.ferre@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10 11:58:10 +01:00
Ingo van Lil
9d39d86cd4 ARM: dts: at91: Reenable UART TX pull-ups
Pull-ups for SAM9 UART/USART TX lines were disabled in a previous
commit. However, several chips in the SAM9 family require pull-ups to
prevent the TX lines from falling (and causing an endless break
condition) when the transceiver is disabled.

From the SAM9G20 datasheet, 32.5.1: "To prevent the TXD line from
falling when the USART is disabled, the use of an internal pull up
is mandatory.". This commit reenables the pull-ups for all chips having
that sentence in their datasheets.

Fixes: 5e04822f7d ("ARM: dts: at91: fixes uart pinctrl, set pullup on rx, clear pullup on tx")
Signed-off-by: Ingo van Lil <inguin@gmx.de>
Cc: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/20191203142147.875227-1-inguin@gmx.de
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10 11:57:08 +01:00
Andre Przywara
0388a11074
arm: dts: allwinner: H3: Add PMU node
Add the Performance Monitoring Unit (PMU) device tree node to the H3
.dtsi, which tells DT users which interrupts are triggered by PMU
overflow events on each core. The numbers come from the manual and have
been checked in U-Boot and with perf in Linux.

Tested with perf record and taskset on an OrangePi Zero.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10 10:43:35 +01:00
Jernej Skrabec
fe67dfcb44
ARM: dts: sun8i: h3: Add rc map for Beelink X2
Beelink X2 box comes with a remote. Add a mapping for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10 10:43:34 +01:00
Georgii Staroselskii
66e3bc4a85
ARM: dts: sunxi: Add Neutis N5H3 support
Emlid Neutis N5H3 is a version of Emlid Neutis SoM with H3 instead of H5
inside.

6eeb4180d4 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device")
was used as reference.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10 10:43:34 +01:00
Georgii Staroselskii
e69f2736cf
ARM: dts: allwinner: Split out non-SoC specific parts of Neutis N5
A new variant of Emlid Neutis has been inroduced. This one uses H3
instead of H5. The boards are essentially the same. This commit moves
non-SoC-specific parts out so that the common parts could be reused with
ease.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10 10:43:33 +01:00
Ludovic Desroches
bbd73c02e7 ARM: dts: at91: sama5d2: set the sdmmc gclk frequency
Set the frequency of the generated clock used by sdmmc devices in order
to not rely on the configuration done by previous components.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Link: https://lore.kernel.org/r/20191128074522.69706-3-ludovic.desroches@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10 00:42:24 +01:00
Martin Blumenstingl
46c9585ed4 ARM: dts: meson8: fix the size of the PMU registers
The PMU registers are at least 0x18 bytes wide. Meson8b already uses a
size of 0x18. The structure of the PMU registers on Meson8 and Meson8b
is similar but not identical.

Meson8 and Meson8b have the following registers in common (starting at
AOBUS + 0xe0):
  #define AO_RTI_PWR_A9_CNTL0 0xe0 (0x38 << 2)
  #define AO_RTI_PWR_A9_CNTL1 0xe4 (0x39 << 2)
  #define AO_RTI_GEN_PWR_SLEEP0 0xe8 (0x3a << 2)
  #define AO_RTI_GEN_PWR_ISO0 0x4c (0x3b << 2)

Meson8b additionally has these three registers:
  #define AO_RTI_GEN_PWR_ACK0 0xf0 (0x3c << 2)
  #define AO_RTI_PWR_A9_MEM_PD0 0xf4 (0x3d << 2)
  #define AO_RTI_PWR_A9_MEM_PD1 0xf8 (0x3e << 2)

Thus we can assume that the register size of the PMU IP blocks is
identical on both SoCs (and Meson8 just contains some reserved registers
in that area) because the CEC registers start right after the PMU
(AO_RTI_*) registers at AOBUS + 0x100 (0x40 << 2).

The upcoming power domain driver will need to read and write the
AO_RTI_GEN_PWR_SLEEP0 and AO_RTI_GEN_PWR_ISO0 registers, so the updated
size is needed for that driver to work.

Fixes: 4a5a27116b ("ARM: dts: meson8: add support for booting the secondary CPU cores")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-09 13:38:55 -08:00
Eugen Hristev
e52a033610 ARM: dts: at91: sama5d27_som1_ek: add i2c filters properties
Add properties for i2c filters for i2c0 and i2c1 on sama5d27_som1_ek.
Noise is affecting communication on i2c for example when connecting i2c
camera sensors.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lore.kernel.org/r/1575531818-21332-1-git-send-email-eugen.hristev@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-09 20:23:43 +01:00
Eugen Hristev
5d4c3cfb63 ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek
This is the addition of a new Evaluation Kit the SAMA5D27-WLSOM1-EK.
It's based on the Microchip WireLess SoM which contains the
SAMA5D27 LPDDR2 2Gbits SiP.

[nicolas.ferre@microchip.com]: initial implementation
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: ported to new kernel version,
[eugen.hristev@microchip.com]: addition of peripherals (adc, pmic, qspi, uart)
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lore.kernel.org/r/1573543139-8533-4-git-send-email-eugen.hristev@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-09 20:23:43 +01:00
Andrei Stefanescu
4514a7c812 ARM: dts: at91: sama5d2: mark secumod as a GPIO controller
The Security Module exposes the PIOBU pins which an be used
as regular GPIOs. The PIOBU pins are special because they do
not lose their voltage during suspend-to-mem.

This patch marks the secumod as a GPIO controller.

Signed-off-by: Andrei Stefanescu <andrei.stefanescu@microchip.com>
[razvan.stefanescu@microchip.com Updated title]
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
Link: https://lore.kernel.org/r/1573543139-8533-2-git-send-email-eugen.hristev@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-09 20:23:43 +01:00
Razvan Stefanescu
d8beb54edb ARM: dts: at91: sama5d2: disable pwm0 by default
It will be enabled as needed by each board.

Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
Link: https://lore.kernel.org/r/1573543139-8533-1-git-send-email-eugen.hristev@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-09 20:23:43 +01:00
Florian Fainelli
fac2c2da35 ARM: dts: Cygnus: Fix MDIO node address/size cells
The MDIO node on Cygnus had an reversed #address-cells and
 #size-cells properties, correct those.

Fixes: 40c26d3af6 ("ARM: dts: Cygnus: Add the ethernet switch and ethernet PHY")
Reported-by: Simon Horman <simon.horman@netronome.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-12-09 10:15:08 -08:00
Nicolas Saenz Julienne
0634a2dc95 ARM: dts: bcm2711: fix soc's node dma-ranges
Raspberry Pi's firmware has a feature to select how much memory to
reserve for its GPU called 'gpu_mem'. The possible values go from 16MB
to 944MB, with a default of 64MB. This memory resides in the topmost
part of the lower 1GB memory area and grows bigger expanding towards the
begging of memory.

It turns out that with low 'gpu_mem' values (16MB and 32MB) the size of
the memory available to the system in the lower 1GB area can outgrow the
interconnect's dma-range as its size was selected based on the maximum
system memory available given the default gpu_mem configuration. This
makes that memory slice unavailable for DMA. And may cause nasty kernel
warnings if CMA happens to include it.

Change soc's dma-ranges to really reflect it's HW limitation, which is
being able to only DMA to the lower 1GB area.

Fixes: 7dbe8c62ce ("ARM: dts: Add minimal Raspberry Pi 4 support")
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Phil Elwell <phil@raspberrypi.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-12-09 10:14:43 -08:00
Florian Fainelli
093c3f94e9 ARM: dts: BCM5301X: Fix MDIO node address/size cells
The MDIO node on BCM5301X had an reversed #address-cells and
 #size-cells properties, correct those, silencing checker warnings:

.../linux/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml: mdio@18003000: #address-cells:0:0: 1 was expected

Reported-by: Simon Horman <simon.horman@netronome.com>
Fixes: 23f1eca6d5 ("ARM: dts: BCM5301X: Specify MDIO bus in the DT")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-12-09 09:46:12 -08:00
Olof Johansson
5a7df4476f Samsung DTS ARM changes for v5.5, part 2
1. Cleanup by adjusting DTS to bindings,
 2. Add touch-sensitive buttons to Midas (Galaxy S III family phones),
 3. Add GPU/Mali to Exynos542x and Odroid XU3/XU4 family.
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Merge tag 'samsung-dt-5.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.5, part 2

1. Cleanup by adjusting DTS to bindings,
2. Add touch-sensitive buttons to Midas (Galaxy S III family phones),
3. Add GPU/Mali to Exynos542x and Odroid XU3/XU4 family.

* tag 'samsung-dt-5.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: Add Mali/GPU node on Exynos5420 and enable it on Odroid XU3/4
  ARM: dts: exynos: Add support for the touch-sensitive buttons on Midas family
  ARM: dts: exynos: Rename children of SysRAM node to "sram"

Link: https://lore.kernel.org/r/20191119142026.7190-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-09 09:21:45 -08:00
Benjamin Gaignard
117e5dd21c ARM: dts: stm32: remove useless clock-names from RTC node on stm32f746
On stm32f7 family RTC node doesn't need clock-names property.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09 15:06:33 +01:00
Benjamin Gaignard
ad8e5610da ARM: dts: stm32: remove useless clock-names from RTC node on stm32f429
On stm32f4 family RTC node doesn't need clock-names property.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09 15:06:33 +01:00
Christophe Roullier
bf848759fb ARM: dts: stm32: Enable MAC TX clock gating during TX low-power mode on stm32mp15
When there is no activity on ethernet phy link, the ETH_GTX_CLK is cut.

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09 14:58:24 +01:00
Christophe Roullier
46ccf1cecb ARM: dts: stm32: adjust slew rate for Ethernet on stm32mp15
ETH_MDIO slew-rate should be set to "0" instead of "2".

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09 14:55:27 +01:00
Linus Walleij
42a1e9450c ARM: dts: ux500: Add devicetree for HREF520
This reference design is very similar to the others just that
it has a different display mounted on the user interface
board, and some GPIOs where shuffled around.

As this is the first board that uses DB8520 we create the
DB8520-specific DTSI file here.

Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191126124738.77690-3-linus.walleij@linaro.org
2019-12-09 14:45:02 +01:00
Linus Walleij
8668223a1e ARM: dts: ux500: Split TVK DTSI files in two
The TVK1281618 was made in R1, R2 and R3 variants. The most
commonly used variants are R2 and R3 so split out these to
their own files.

The R3 version has a totally different display than R1 and
R2 and a different set of sensors.

Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191126124738.77690-2-linus.walleij@linaro.org
2019-12-09 14:45:02 +01:00
Linus Walleij
f6a76d4256 ARM: dts: ux500: Break out DB8500 DTSI
The DB8500 exists in an enhanced variant named DB8520
for some machines. To clearly distinguish between the
different machines, create an explicit db8500.dtsi
and move the operating points (only known difference so
far) to that file, so we can add an explicit db8520.dtsi
after this.

Cc: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191126124738.77690-1-linus.walleij@linaro.org
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:02 +01:00
Linus Walleij
27e7c033d3 ARM: dts: ux500: Drop pulls on I2C buses
The I2C block in the Ux500 uses internal pull-ups on the
SoC, in fact it has to: in HS mode, the I2C block will need
to autonomously take control over the pull-up line to do
its job. This can be clearly seen from the SoC manual which
states that the silicon has a line named "en_cspu_hs" which
enables current source pull-up for high speed mode. Another
hint is that the vendor code tree never enabled the pull
up on these lines, despite being deployed on boards that
lack external pull-up resistors.

Tested on the Ux500 reference designs without any problems.

Cc: Stephan Gerhold <stephan@gerhold.net>
Reported-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191126123116.56244-1-linus.walleij@linaro.org
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold
b2ee587750 ARM: dts: ux500: Use "arm,pl031" compatible for PL031
The Ux500 device tree uses "arm,rtc-pl031" as compatible for PL031.
All other boards in Linux describe it using "arm,pl031" instead.
This works because the compatible is not actually used in Linux:
AMBA devices get probed based on "arm,primecell" and their peripheral ID.

Nevertheless, some other projects (e.g. U-Boot) rely on the compatible
to probe the device with the correct driver. Those will look for
"arm,pl031" instead of "arm,rtc-pl031", preventing the RTC from being
probed.

Change it to "arm,pl031" to match all other boards.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191124205110.48031-1-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold
02234ee9e4 ARM: dts: ux500: Add "simple-bus" compatible to soc node
The "soc" node in the Ux500 device tree does not need any special
handling - it is just a simple I/O bus that can be accessed without
additional configuration.

Therefore we can additionally describe it as compatible with "simple-bus".
This can be used by platforms to probe devices under the soc node without
special handling for our custom "stericsson,db8500" compatible
(e.g. in U-Boot).

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191124195728.32226-1-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold
bef475b03d ARM: dts: ux500: Remove ux500_ prefix from ux500_serial* labels
ux500_serial{0,1,2} are the only labels with ux500_ prefix in
ste-dbx5x0.dtsi, the other labels (gpio0, msp, ...) do not use
any prefix. Remove it for consistency.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125170428.76069-4-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold
5195887a6f ARM: dts: ux500: Move serial aliases to ste-dbx5x0.dtsi
Now that we have aliases for I2C and SPI in ste-dbx5x0.dtsi,
it does not make much sense to keep only the aliases for UART
separately in each board device tree.

Considering that all boards set the same aliases for the serial
ports there is no reason to keep them separated either.

Move them to ste-dbx5x0.dtsi and remove the aliases from the
board-specific device tree parts.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125170428.76069-3-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold
6b69c7296a ARM: dts: ux500: Add aliases for I2C and SPI buses
Now that we disable the I2C/SPI buses by default, is is even more
important to assign aliases to the I2C/SPI device nodes.
Otherwise, enabling/disabling one of them will potentially change
all device IDs, e.g. i2c2 will be named i2c-0 if it is the only
enabled I2C bus.

Add aliases for the I2C and SPI buses to avoid this.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125170428.76069-2-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold
fae284f1bc ARM: dts: ux500: Disable I2C/SPI buses by default
At the moment, all 5 I2C and 6 SPI buses are probed and exposed
to user-space by default - even if they are not muxed to any pins
on the board. This means that user-space sees an I2C/SPI bus that
cannot be actually used properly.

In some cases this was used to put the corresponding pins into
a low power sleep mode - but even then the pins first need to be
configured by the board-specific device tree part.

Avoid exposing unconfigured devices to user-space by disabling
the I2C/SPI buses by default. Enable them in the board device trees
when needed.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125170428.76069-1-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold
96b619e3c1 ARM: dts: ux500: nomadik-pinctrl: Add &gpio_in_nopull
ste-nomadik-pinctrl.dtsi already defines in_nopull and gpio_in_pu/pd,
but there is no node to configure a pin as GPIO without pull up/down.
Add a new &gpio_in_nopull node for this.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125122256.53482-5-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00