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ARM: dts: ux500: Add aliases for I2C and SPI buses
Now that we disable the I2C/SPI buses by default, is is even more important to assign aliases to the I2C/SPI device nodes. Otherwise, enabling/disabling one of them will potentially change all device IDs, e.g. i2c2 will be named i2c-0 if it is the only enabled I2C bus. Add aliases for the I2C and SPI buses to avoid this. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20191125170428.76069-2-stephan@gerhold.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -14,6 +14,19 @@ / {
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#address-cells = <1>;
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#size-cells = <1>;
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/* This stablilizes the device enumeration */
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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spi0 = &spi0;
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spi1 = &spi1;
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spi2 = &spi2;
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spi3 = &spi3;
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};
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chosen {
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};
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@ -638,7 +651,7 @@ db8500_esram34_ret_reg: db8500_esram34_ret {
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};
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};
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i2c@80004000 {
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i2c0: i2c@80004000 {
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compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
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reg = <0x80004000 0x1000>;
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interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
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@ -655,7 +668,7 @@ i2c@80004000 {
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status = "disabled";
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};
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i2c@80122000 {
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i2c1: i2c@80122000 {
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compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
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reg = <0x80122000 0x1000>;
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interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
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@ -673,7 +686,7 @@ i2c@80122000 {
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status = "disabled";
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};
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i2c@80128000 {
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i2c2: i2c@80128000 {
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compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
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reg = <0x80128000 0x1000>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
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@ -691,7 +704,7 @@ i2c@80128000 {
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status = "disabled";
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};
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i2c@80110000 {
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i2c3: i2c@80110000 {
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compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
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reg = <0x80110000 0x1000>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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@ -709,7 +722,7 @@ i2c@80110000 {
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status = "disabled";
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};
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i2c@8012a000 {
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i2c4: i2c@8012a000 {
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compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
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reg = <0x8012a000 0x1000>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
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@ -727,7 +740,7 @@ i2c@8012a000 {
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status = "disabled";
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};
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spi@80002000 {
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ssp0: spi@80002000 {
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x80002000 0x1000>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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@ -743,7 +756,7 @@ spi@80002000 {
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status = "disabled";
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};
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spi@80003000 {
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ssp1: spi@80003000 {
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x80003000 0x1000>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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@ -759,7 +772,7 @@ spi@80003000 {
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status = "disabled";
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};
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spi@8011a000 {
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spi0: spi@8011a000 {
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x8011a000 0x1000>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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@ -776,7 +789,7 @@ spi@8011a000 {
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status = "disabled";
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};
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spi@80112000 {
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spi1: spi@80112000 {
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x80112000 0x1000>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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@ -793,7 +806,7 @@ spi@80112000 {
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status = "disabled";
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};
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spi@80111000 {
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spi2: spi@80111000 {
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x80111000 0x1000>;
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interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
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@ -810,7 +823,7 @@ spi@80111000 {
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status = "disabled";
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};
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spi@80129000 {
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spi3: spi@80129000 {
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x80129000 0x1000>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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