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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ARM: OMAP2+: Drop legacy platform data for omap4 timers except timer1
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Cc: Keerthy <j-keerthy@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
parent
11b27908a3
commit
bfdfd5636a
@ -312,7 +312,6 @@ mcpdm: mcpdm@0 {
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target-module@38000 { /* 0x40138000, ap 18 12.0 */
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compatible = "ti,sysc-omap4-timer", "ti,sysc";
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ti,hwmods = "timer5";
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reg = <0x38000 0x4>,
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<0x38010 0x4>;
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reg-names = "rev", "sysc";
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@ -343,7 +342,6 @@ timer5: timer@0 {
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target-module@3a000 { /* 0x4013a000, ap 20 14.0 */
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compatible = "ti,sysc-omap4-timer", "ti,sysc";
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ti,hwmods = "timer6";
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reg = <0x3a000 0x4>,
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<0x3a010 0x4>;
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reg-names = "rev", "sysc";
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@ -374,7 +372,6 @@ timer6: timer@0 {
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target-module@3c000 { /* 0x4013c000, ap 22 16.0 */
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compatible = "ti,sysc-omap4-timer", "ti,sysc";
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ti,hwmods = "timer7";
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reg = <0x3c000 0x4>,
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<0x3c010 0x4>;
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reg-names = "rev", "sysc";
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@ -405,7 +402,6 @@ timer7: timer@0 {
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target-module@3e000 { /* 0x4013e000, ap 24 18.0 */
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compatible = "ti,sysc-omap4-timer", "ti,sysc";
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ti,hwmods = "timer8";
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reg = <0x3e000 0x4>,
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<0x3e010 0x4>;
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reg-names = "rev", "sysc";
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@ -1422,7 +1422,6 @@ uart3: serial@0 {
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target-module@32000 { /* 0x48032000, ap 5 02.0 */
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compatible = "ti,sysc-omap2-timer", "ti,sysc";
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ti,hwmods = "timer2";
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reg = <0x32000 0x4>,
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<0x32010 0x4>,
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<0x32014 0x4>;
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@ -1454,7 +1453,6 @@ timer2: timer@0 {
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target-module@34000 { /* 0x48034000, ap 7 04.0 */
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compatible = "ti,sysc-omap4-timer", "ti,sysc";
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ti,hwmods = "timer3";
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reg = <0x34000 0x4>,
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<0x34010 0x4>;
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reg-names = "rev", "sysc";
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@ -1482,7 +1480,6 @@ timer3: timer@0 {
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target-module@36000 { /* 0x48036000, ap 9 0e.0 */
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compatible = "ti,sysc-omap4-timer", "ti,sysc";
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ti,hwmods = "timer4";
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reg = <0x36000 0x4>,
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<0x36010 0x4>;
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reg-names = "rev", "sysc";
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@ -1510,7 +1507,6 @@ timer4: timer@0 {
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target-module@3e000 { /* 0x4803e000, ap 11 08.0 */
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compatible = "ti,sysc-omap4-timer", "ti,sysc";
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ti,hwmods = "timer9";
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reg = <0x3e000 0x4>,
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<0x3e010 0x4>;
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reg-names = "rev", "sysc";
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@ -1942,7 +1938,6 @@ elm: elm@0 {
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target-module@86000 { /* 0x48086000, ap 43 24.0 */
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compatible = "ti,sysc-omap2-timer", "ti,sysc";
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ti,hwmods = "timer10";
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reg = <0x86000 0x4>,
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<0x86010 0x4>,
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<0x86014 0x4>;
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@ -1975,7 +1970,6 @@ timer10: timer@0 {
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target-module@88000 { /* 0x48088000, ap 45 2e.0 */
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compatible = "ti,sysc-omap4-timer", "ti,sysc";
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ti,hwmods = "timer11";
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reg = <0x88000 0x4>,
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<0x88010 0x4>;
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reg-names = "rev", "sysc";
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@ -1671,21 +1671,6 @@ static struct omap_hwmod_class omap44xx_timer_1ms_hwmod_class = {
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.sysc = &omap44xx_timer_1ms_sysc,
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};
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static struct omap_hwmod_class_sysconfig omap44xx_timer_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS |
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SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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SIDLE_SMART_WKUP),
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.sysc_fields = &omap_hwmod_sysc_type2,
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};
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static struct omap_hwmod_class omap44xx_timer_hwmod_class = {
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.name = "timer",
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.sysc = &omap44xx_timer_sysc,
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};
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/* timer1 */
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static struct omap_hwmod omap44xx_timer1_hwmod = {
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.name = "timer1",
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@ -1702,158 +1687,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
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},
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};
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/* timer2 */
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static struct omap_hwmod omap44xx_timer2_hwmod = {
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.name = "timer2",
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.class = &omap44xx_timer_1ms_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.flags = HWMOD_SET_DEFAULT_CLOCKACT,
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.main_clk = "cm2_dm2_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* timer3 */
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static struct omap_hwmod omap44xx_timer3_hwmod = {
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.name = "timer3",
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.class = &omap44xx_timer_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.main_clk = "cm2_dm3_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* timer4 */
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static struct omap_hwmod omap44xx_timer4_hwmod = {
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.name = "timer4",
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.class = &omap44xx_timer_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.main_clk = "cm2_dm4_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* timer5 */
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static struct omap_hwmod omap44xx_timer5_hwmod = {
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.name = "timer5",
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.class = &omap44xx_timer_hwmod_class,
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.clkdm_name = "abe_clkdm",
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.main_clk = "timer5_sync_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* timer6 */
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static struct omap_hwmod omap44xx_timer6_hwmod = {
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.name = "timer6",
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.class = &omap44xx_timer_hwmod_class,
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.clkdm_name = "abe_clkdm",
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.main_clk = "timer6_sync_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* timer7 */
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static struct omap_hwmod omap44xx_timer7_hwmod = {
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.name = "timer7",
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.class = &omap44xx_timer_hwmod_class,
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.clkdm_name = "abe_clkdm",
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.main_clk = "timer7_sync_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* timer8 */
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static struct omap_hwmod omap44xx_timer8_hwmod = {
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.name = "timer8",
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.class = &omap44xx_timer_hwmod_class,
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.clkdm_name = "abe_clkdm",
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.main_clk = "timer8_sync_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* timer9 */
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static struct omap_hwmod omap44xx_timer9_hwmod = {
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.name = "timer9",
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.class = &omap44xx_timer_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.main_clk = "cm2_dm9_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* timer10 */
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static struct omap_hwmod omap44xx_timer10_hwmod = {
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.name = "timer10",
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.class = &omap44xx_timer_1ms_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.flags = HWMOD_SET_DEFAULT_CLOCKACT,
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.main_clk = "cm2_dm10_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* timer11 */
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static struct omap_hwmod omap44xx_timer11_hwmod = {
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.name = "timer11",
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.class = &omap44xx_timer_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.main_clk = "cm2_dm11_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/*
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* 'usb_host_fs' class
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* full-speed usb host controller
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@ -2662,86 +2495,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> timer2 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_timer2_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> timer3 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_timer3_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> timer4 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_timer4_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_abe -> timer5 */
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = {
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.master = &omap44xx_l4_abe_hwmod,
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.slave = &omap44xx_timer5_hwmod,
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.clk = "ocp_abe_iclk",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_abe -> timer6 */
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = {
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.master = &omap44xx_l4_abe_hwmod,
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.slave = &omap44xx_timer6_hwmod,
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.clk = "ocp_abe_iclk",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_abe -> timer7 */
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = {
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.master = &omap44xx_l4_abe_hwmod,
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.slave = &omap44xx_timer7_hwmod,
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.clk = "ocp_abe_iclk",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_abe -> timer8 */
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = {
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.master = &omap44xx_l4_abe_hwmod,
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.slave = &omap44xx_timer8_hwmod,
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.clk = "ocp_abe_iclk",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> timer9 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_timer9_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> timer10 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_timer10_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> timer11 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_timer11_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> usb_host_fs */
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static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = {
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.master = &omap44xx_l4_cfg_hwmod,
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@ -2866,16 +2619,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l4_cfg__smartreflex_mpu,
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&omap44xx_l4_cfg__spinlock,
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&omap44xx_l4_wkup__timer1,
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&omap44xx_l4_per__timer2,
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&omap44xx_l4_per__timer3,
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&omap44xx_l4_per__timer4,
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&omap44xx_l4_abe__timer5,
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&omap44xx_l4_abe__timer6,
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&omap44xx_l4_abe__timer7,
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&omap44xx_l4_abe__timer8,
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&omap44xx_l4_per__timer9,
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&omap44xx_l4_per__timer10,
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&omap44xx_l4_per__timer11,
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/* &omap44xx_l4_cfg__usb_host_fs, */
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&omap44xx_l4_cfg__usb_host_hs,
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&omap44xx_l4_cfg__usb_tll_hs,
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