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ARM: OMAP2+: Drop legacy platform data for am3 and am4 spi
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Cc: Keerthy <j-keerthy@ti.com> Cc: Vignesh R <vigneshr@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -1009,7 +1009,6 @@ i2c1: i2c@0 {
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target-module@30000 { /* 0x48030000, ap 77 08.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "spi0";
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reg = <0x30000 0x4>,
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<0x30110 0x4>,
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<0x30114 0x4>;
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@ -1527,7 +1526,6 @@ i2c2: i2c@0 {
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target-module@a0000 { /* 0x481a0000, ap 79 24.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "spi1";
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reg = <0xa0000 0x4>,
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<0xa0110 0x4>,
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<0xa0114 0x4>;
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@ -763,7 +763,6 @@ i2c1: i2c@0 {
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target-module@30000 { /* 0x48030000, ap 65 08.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "spi0";
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reg = <0x30000 0x4>,
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<0x30110 0x4>,
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<0x30114 0x4>;
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@ -1276,7 +1275,6 @@ i2c2: i2c@0 {
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target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "spi1";
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reg = <0xa0000 0x4>,
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<0xa0110 0x4>,
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<0xa0114 0x4>;
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@ -1307,7 +1305,6 @@ spi1: spi@0 {
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target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "spi2";
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reg = <0xa2000 0x4>,
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<0xa2110 0x4>,
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<0xa2114 0x4>;
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@ -1338,7 +1335,6 @@ spi2: spi@0 {
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target-module@a4000 { /* 0x481a4000, ap 92 62.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "spi3";
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reg = <0xa4000 0x4>,
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<0xa4110 0x4>,
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<0xa4114 0x4>;
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@ -2227,7 +2223,6 @@ timer11: timer@0 {
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target-module@45000 { /* 0x48345000, ap 108 6a.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "spi4";
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reg = <0x45000 0x4>,
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<0x45110 0x4>,
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<0x45114 0x4>;
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@ -32,8 +32,6 @@ extern struct omap_hwmod_ocp_if am33xx_l4_per__dcan0;
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extern struct omap_hwmod_ocp_if am33xx_l4_per__dcan1;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__elm;
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extern struct omap_hwmod_ocp_if am33xx_l3_s__gpmc;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi0;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi1;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__timer2;
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extern struct omap_hwmod_ocp_if am33xx_l3_main__tpcc;
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extern struct omap_hwmod_ocp_if am33xx_l3_main__tptc0;
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@ -58,8 +56,6 @@ extern struct omap_hwmod am33xx_dcan1_hwmod;
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extern struct omap_hwmod am33xx_elm_hwmod;
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extern struct omap_hwmod am33xx_gpmc_hwmod;
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extern struct omap_hwmod am33xx_rtc_hwmod;
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extern struct omap_hwmod am33xx_spi0_hwmod;
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extern struct omap_hwmod am33xx_spi1_hwmod;
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extern struct omap_hwmod am33xx_timer1_hwmod;
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extern struct omap_hwmod am33xx_timer2_hwmod;
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extern struct omap_hwmod am33xx_tpcc_hwmod;
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@ -137,22 +137,6 @@ struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = {
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.user = OCP_USER_MPU,
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};
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/* l4 ls -> mcspi0 */
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struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi0 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am33xx_spi0_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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/* l4 ls -> mcspi1 */
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struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi1 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am33xx_spi1_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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/* l4 per -> timer2 */
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struct omap_hwmod_ocp_if am33xx_l4_ls__timer2 = {
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.master = &am33xx_l4_ls_hwmod,
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@ -396,50 +396,6 @@ struct omap_hwmod am33xx_rtc_hwmod = {
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},
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};
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/* 'spi' class */
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static struct omap_hwmod_class_sysconfig am33xx_mcspi_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0110,
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.syss_offs = 0x0114,
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.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
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SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class am33xx_spi_hwmod_class = {
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.name = "mcspi",
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.sysc = &am33xx_mcspi_sysc,
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};
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/* spi0 */
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struct omap_hwmod am33xx_spi0_hwmod = {
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.name = "spi0",
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.class = &am33xx_spi_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "dpll_per_m2_div4_ck",
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.prcm = {
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.omap4 = {
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* spi1 */
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struct omap_hwmod am33xx_spi1_hwmod = {
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.name = "spi1",
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.class = &am33xx_spi_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "dpll_per_m2_div4_ck",
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.prcm = {
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.omap4 = {
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* 'timer 2-7' class */
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static struct omap_hwmod_class_sysconfig am33xx_timer_sysc = {
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.rev_offs = 0x0000,
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@ -577,8 +533,6 @@ static void omap_hwmod_am33xx_clkctrl(void)
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CLKCTRL(am33xx_dcan0_hwmod, AM33XX_CM_PER_DCAN0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_dcan1_hwmod, AM33XX_CM_PER_DCAN1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_elm_hwmod, AM33XX_CM_PER_ELM_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_spi0_hwmod, AM33XX_CM_PER_SPI0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_spi1_hwmod, AM33XX_CM_PER_SPI1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_timer2_hwmod, AM33XX_CM_PER_TIMER2_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_smartreflex0_hwmod,
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AM33XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET);
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@ -620,8 +574,6 @@ static void omap_hwmod_am43xx_clkctrl(void)
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CLKCTRL(am33xx_dcan0_hwmod, AM43XX_CM_PER_DCAN0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_dcan1_hwmod, AM43XX_CM_PER_DCAN1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_elm_hwmod, AM43XX_CM_PER_ELM_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_spi0_hwmod, AM43XX_CM_PER_SPI0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_spi1_hwmod, AM43XX_CM_PER_SPI1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_timer2_hwmod, AM43XX_CM_PER_TIMER2_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_smartreflex0_hwmod,
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AM43XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET);
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@ -384,8 +384,6 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l4_ls__elm,
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&am33xx_l3_s__gpmc,
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&am33xx_l3_main__lcdc,
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&am33xx_l4_ls__mcspi0,
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&am33xx_l4_ls__mcspi1,
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&am33xx_l3_main__tptc0,
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&am33xx_l3_main__tptc1,
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&am33xx_l3_main__tptc2,
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@ -112,45 +112,6 @@ static struct omap_hwmod am43xx_synctimer_hwmod = {
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},
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};
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static struct omap_hwmod am43xx_spi2_hwmod = {
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.name = "spi2",
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.class = &am33xx_spi_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "dpll_per_m2_div4_ck",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = AM43XX_CM_PER_SPI2_CLKCTRL_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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static struct omap_hwmod am43xx_spi3_hwmod = {
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.name = "spi3",
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.class = &am33xx_spi_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "dpll_per_m2_div4_ck",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = AM43XX_CM_PER_SPI3_CLKCTRL_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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static struct omap_hwmod am43xx_spi4_hwmod = {
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.name = "spi4",
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.class = &am33xx_spi_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.main_clk = "dpll_per_m2_div4_ck",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = AM43XX_CM_PER_SPI4_CLKCTRL_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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static struct omap_hwmod_class am43xx_ocp2scp_hwmod_class = {
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.name = "ocp2scp",
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};
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@ -441,27 +402,6 @@ static struct omap_hwmod_ocp_if am33xx_l4_wkup__synctimer = {
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_l4_ls__mcspi2 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am43xx_spi2_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_l4_ls__mcspi3 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am43xx_spi3_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_l4_ls__mcspi4 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am43xx_spi4_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_l4_ls__ocp2scp0 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am43xx_ocp2scp0_hwmod,
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@ -548,9 +488,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__vpfe1 = {
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static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l4_wkup__synctimer,
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&am43xx_l4_ls__mcspi2,
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&am43xx_l4_ls__mcspi3,
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&am43xx_l4_ls__mcspi4,
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&am43xx_l3_main__pruss,
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&am33xx_mpu__l3_main,
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&am33xx_mpu__prcm,
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@ -577,8 +514,6 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l3_main__tpcc,
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&am33xx_l4_ls__elm,
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&am33xx_l3_s__gpmc,
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&am33xx_l4_ls__mcspi0,
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&am33xx_l4_ls__mcspi1,
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&am33xx_l3_main__tptc0,
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&am33xx_l3_main__tptc1,
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&am33xx_l3_main__tptc2,
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