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ARM: OMAP2+: Drop legacy platform data for omap4 ocp2scp
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Cc: Bin Liu <b-liu@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Roger Quadros <rogerq@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -420,7 +420,6 @@ usb_otg_hs: usb_otg_hs@0 {
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target-module@2d000 { /* 0x4a0ad000, ap 88 0c.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "ocp2scp_usb_phy";
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reg = <0x2d000 0x4>,
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<0x2d010 0x4>,
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<0x2d014 0x4>;
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@ -1282,51 +1282,6 @@ static struct omap_hwmod omap44xx_ocmc_ram_hwmod = {
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},
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};
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/*
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* 'ocp2scp' class
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* bridge to transform ocp interface protocol to scp (serial control port)
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* protocol
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*/
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static struct omap_hwmod_class_sysconfig omap44xx_ocp2scp_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = {
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.name = "ocp2scp",
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.sysc = &omap44xx_ocp2scp_sysc,
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};
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/* ocp2scp_usb_phy */
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static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
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.name = "ocp2scp_usb_phy",
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.class = &omap44xx_ocp2scp_hwmod_class,
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.clkdm_name = "l3_init_clkdm",
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/*
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* ocp2scp_usb_phy_phy_48m is provided by the OMAP4 PRCM IP
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* block as an "optional clock," and normally should never be
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* specified as the main_clk for an OMAP IP block. However it
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* turns out that this clock is actually the main clock for
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* the ocp2scp_usb_phy IP block:
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* http://lists.infradead.org/pipermail/linux-arm-kernel/2012-September/119943.html
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* So listing ocp2scp_usb_phy_phy_48m as a main_clk here seems
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* to be the best workaround.
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*/
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.main_clk = "ocp2scp_usb_phy_phy_48m",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L3INIT_USBPHYOCP2SCP_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_HWCTRL,
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},
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},
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};
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/*
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* 'prcm' class
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@ -2300,14 +2255,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> ocp2scp_usb_phy */
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp2scp_usb_phy = {
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.master = &omap44xx_l4_cfg_hwmod,
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.slave = &omap44xx_ocp2scp_usb_phy_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* mpu_private -> prcm_mpu */
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static struct omap_hwmod_ocp_if omap44xx_mpu_private__prcm_mpu = {
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.master = &omap44xx_mpu_private_hwmod,
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@ -2520,7 +2467,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l3_main_2__mmu_ipu,
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&omap44xx_l4_cfg__mmu_dsp,
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&omap44xx_l3_main_2__ocmc_ram,
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&omap44xx_l4_cfg__ocp2scp_usb_phy,
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&omap44xx_mpu_private__prcm_mpu,
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&omap44xx_l4_wkup__cm_core_aon,
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&omap44xx_l4_cfg__cm_core,
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