Martin Blumenstingl 6d549ff55c ARM: dts: meson8b: add the DDR clock controller ... Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>		2019-12-11 11:26:27 -08:00
..
bootp	ARM: 8933/1: replace Sun/Solaris style flag on section directive	2019-11-15 22:21:19 +00:00
compressed	Devicetree updates for v5.5:	2019-12-02 11:41:35 -08:00
dts	ARM: dts: meson8b: add the DDR clock controller	2019-12-11 11:26:27 -08:00
.gitignore
deflate_xip_data.sh
install.sh
Makefile