If clock-frequency property is given, then it substitutes calculation
of supplying clock frequency from parent clock, this may break UART,
if parent clock is given and managed by common clock framework.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change adds device node of LPC32xx USB clock controller and adds
clock properties to USB OHCI, USB device and I2C controller to USB phy
device nodes.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change adds clock properties to all described peripheral devices,
clock ids are taken from dt-bindings/clock/lpc32xx-clock.h
Some existing drivers expect to get clock names, in those cases
clock-names are added as well.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
NXP LPC32xx SoC has a clocking and power control unit (CPC) as a part
of system control block (SCB). CPC is supplied by two external
oscillators and it manages core and most of peripheral clocks, the
change adds SCB and CPC descriptions to shared LPC32xx dtsi file.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
NXP LPC32xx SoC has two external oscillators - one is mandatory and
always on 32768 Hz oscillator and one optional 10-20MHz oscillator,
which is practically always present on LPC32xx boards, because its
presence is needed to supply USB controller clock and by default it
supplies ARM and most of the peripheral clocks, LPC32xx User's Manual
references it as a main oscillator.
The change adds device nodes for both oscillators, frequency of
the main oscillator is selected to be 13MHz by default, this variant
is found on all LPC32xx reference boards.
The device nodes for external oscillators are needed to describe input
clocks of LPC32xx clock controller.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The LOCK key is at KSO9/KSI3 for Chromebook Flip and other devices
that use the Chrome OS EC keyboard matrix.
Signed-off-by: James Chao <james_chao@asus.com>
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Keyboard driver for GPIO buttons(gpio-keys) checks for the legacy
"gpio-key,wakeup" boolean property to enable gpio buttons as wakeup
source.
Few dts files assign value "1" to gpio-key,wakeup and in one instance a
value "0" is assigned probably assuming it won't be enabled as a wakeup
source. Since the presence of the boolean property indicates it is
enabled, value of "0" have no value.
This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property which inturn fixes the above mentioned issue.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates:
- SCIF:
- Supports now 50, 75, 110, 1152000, 1500000, 2000000, and
4000000 bps,
- Perfect match for standard 50-460800, and 9216000 bps.
- More accurate 576000 bps.
- HSCIF:
- Supports now 50, 75, 110, 134, 150, and 200 bps,
- Perfect match for standard 50-460800, and 9216000 bps.
- More accurate 576000, 1152000, 3000000, 3500000, and 4000000
bps.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.
This increases the range and accuracy of supported baud rates on
(H)SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.
This increases the range and accuracy of supported baud rates on
(H)SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.
This increases the range and accuracy of supported baud rates on
(H)SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.
This increases the range and accuracy of supported baud rates on
(H)SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (S1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF device nodes.
This increases the range and accuracy of supported baud rates on SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (S1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF device nodes.
This increases the range and accuracy of supported baud rates on SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use GIC_* defines for GIC interrupt cells in emev2 device tree.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use GIC_* defines for GIC interrupt cells in sh73a0 device tree.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use GIC_* defines for GIC interrupt cells in r7s72100 device tree.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Setup the USB controller and configure it to operate in host mode.
Additionally add the USB phy node for the ZYBO, including reset gpio
which is connected to a external MIO pin.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fix audio on kirkwood-openrd-client:
1) The audio-controller was left disabled.
2) The probe fails because cs42l51 is missing #sound-dai-cells.
/sound/simple-audio-card,codec: could not get #sound-dai-cells for /ocp@f1000000/i2c@11000/cs42l51@4a
asoc-simple-card sound: parse error -22
asoc-simple-card: probe of sound failed with error -22
3) The mapping is incorrect:
asoc-simple-card sound: cs42l51-hifi <-> spdif mapping ok
should be:
asoc-simple-card sound: cs42l51-hifi <-> i2s mapping ok
Reported-by: Rick Thomas <rbthomas@pobox.com>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Rick Thomas <rbthomas@pobox.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Some OpenRD boards have RS-232 and RS-486 connectors wired, but using them
needs a custom DTB as the current DTB configures SD card slot instead.
This patch adds documentation into the DTS on how to change
the configuration.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
LS-WVL/VL are both kirkwood-6282 based NAS devices, which share
many MPP pins. However they are slightly different:
- LS-WVL is 2-Bay NAS, and LS-VL is only 1-Bay.
- There're two red LED indicator on LS-WVL to show when HDD fails,
which is similar to LS-WXL, but there's no such on LS-VL.
So after the split, common part goes into .dtsi file:
- kirkwood-linkstation-6282.dtsi
while all rest part goes into device specific .dts file:
- kirkwood-linkstation-lsvl.dts
- kirkwood-linkstation-lswvl.dts
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
LS-WXL/WSXL are both kirkwood-6281 based 2-Bay NAS devices, which share
many MPP pins. However they are slightly different:
- There're two red LED indicator on LS-WXL to show when HDD fails,
but there's no such on LS-WSXL.
- There's 4-level speed adjustable FAN on LS-WXL, but not LS-WSXL.
So after the split, common part goes into .dtsi file:
- kirkwood-linkstation.dtsi
- kirkwood-linkstation-duo-6281.dtsi
while all rest part goes into device specific .dts file:
- kirkwood-linkstation-lswsxl.dts
- kirkwood-linkstation-lswxl.dts
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The SD card slot was enabled by default with legacy booting.
It does not work anymore with DT boot. Fix by providing GPIO configuration
that matches the old default.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The UART/SD pin names are swapped, fix that.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Since the commit a526973e02 ("pinctrl: mvebu: Fix mapping of pin
63 (gpo -> gpio)"), the mpp63 is no more declared as a GPO but is a
GPIO. Even if in the datasheet this pin is described as GPO, the
experience of the D-Link DNS-327L board shows that it can be used as a
GPIO.
This commits generated warnings for the board using this pin as gpo, with
this patch the dts are fixed by using the new function (gpio) instead of
the old one.
The binding documentation has also been updated accordingly.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Using the usb-nop-xceiv PHY for the xhci nodes allows a better
representation of the hardware but also a better handling of the
regulator. By linking the regulator to the PHY there is no more need to
use the regulator-always-on property, then it allows a better power
management.
The remaining usb node uses the ehci-orion driver which can't be used
with the usb-nop-xceiv PHY and must keeps the direct link to the
regulator with the regulator-always-on property.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Really, what we meant by regulator-always-on is that the regulators
are already turned on by the bootloader, for which regulator-boot-on
is a better description.
A net advantage of using regulator-boot-on is that the regulator is
not touched at boot time by the kernel, which avoids having the hard
drives spinning down and then up again, taking several (~5) seconds of
additional boot time.
In addition, there is no need to have such properties on the child
regulators used for SATA. Having it on the parent regulator that
really controls the GPIO is sufficient.
Without the patch:
[ 3.945866] ata2: SATA link down (SStatus 0 SControl 300)
[ 3.995862] ata3: SATA link down (SStatus 0 SControl 300)
[ 4.005863] ata4: SATA link down (SStatus 0 SControl 300)
[ 9.125861] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 9.144575] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[ 9.151471] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
(and you can hear the disk spinning down and up during this 5.1
seconds delay)
With the patch:
[ 3.945988] ata2: SATA link down (SStatus 0 SControl 300)
[ 4.005980] ata4: SATA link down (SStatus 0 SControl 300)
[ 4.011404] ata3: SATA link down (SStatus 0 SControl 300)
[ 4.145978] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 4.153701] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[ 4.160597] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
As the name of the Device Tree file name suggests, the Armada 388 GP
really contains an Armada 388 SoC, so this commit updates the board
name and compatible string in the Device Tree file.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Pl330 integrated in rk3036 platform that doesn't support
DMAFLUSHP function. So we add 'arm,pl330-broken-no-flushp' quirk
for rk3036.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Pl330 integrated in rk3xxx platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Pl330 integrated in rk3288 platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The DTSI file for the Nomadik does not properly specify how the
PL180 levelshifter is connected: the Nomadik actually needs all
the five st,sig-dir-* flags set to properly control all lines out.
Further this board supports full power cycling of the card, and
since this variant has no hardware clock gating, it needs a
ridiculously low frequency setting to keep up with the ever
overflowing FIFO.
The pin configuration set-up is a bit of a mystery, because of
course these pins are a mix of inputs and outputs. However the
reference implementation sets all pins to "output" with
unspecified initial value, so let's do that here as well.
Cc: stable@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This connects the USB driver to the USB power domain, so that USB can
actually be turned on at boot if the bootloader didn't do it for us.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
This one is essentially the same as revision 2 B board (with the I2S on
P5 header).
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
[anholt: Rebased on bcm2835.dtsi -> bcm283x.dtsi change]
Signed-off-by: Eric Anholt <eric@anholt.net>
This patch fixes the naming of the device tree node: uart@7e201000
to conform to the standard of: serial@7e201000
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
[anholt: Rebased on 2835.dtsi -> 283x.dtsi change]
Signed-off-by: Eric Anholt <eric@anholt.net>
This enables the use of the auxiliary spi1 and spi2 devices
on the bcm2835 SOC.
Note that this requires the use of the new clk-bcm2835-aux to work.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
[anholt: Rebased on 2835.dtsi -> 283x.dtsi change]
Signed-off-by: Eric Anholt <eric@anholt.net>
If we playback the 8KHz FS audio with the 256 mclk_fs, we need the
mclk = 256 * 8000 = 2.048MHz, the frac div is 594 / 2.048 = 290,
the frac div value 0x00809015 set to the CRU_CLKSEL7_CON will cause
to hang.
We increase the mclk_fs to 512, will get the mclk = 512 * 8000 =
4.096MHz, use 0x01009015 instead of 0x00809015 to work around this
issue. We will keep tracking it.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the needed spi node for rk3036 dts.
We have to use the 4 bus emmc to work if someone want to support
the spi devices, since the pins are re-used by emmc data[5-8] and spi.
In some caseswe need to support the spi devices, that will waste the
emmc performance.
Moment, the kylin/evb hasn't the spi devices to work, so maybe we need wait
the new required to enable in kylin/evb board.
Anyway, the spi should be needed land in rk3036 dts.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The I2S block that provide the output clock as the mclk for rt5616,
That will be the master clock input.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
assembly fixes, the other things are mostly board related:
- A series of omap assembly code fixes to fix issues with rodata with
ARM_KERNMEM_PERMS enabled. We had several places writing to rodata,
which is bad. The fix in most cases is to load the value from data
section using a pointer. Let's also enable ARM_KERNMEM_PERMS so
DEBUG_RODATA gets selected by default. And while testing things,
I also added few more loadable driver modules to the defconfig that
I seem to need quite often.
- Fix a long standing omap5 RTC mystery and enable RTC where we need
to ensure the SoC msecure pin is high so we can write to the RTC
registers.
- Fix irq types for am437x
- A series of minor dts fixes for sbc-am57x and cl-som-am57x
- Fixes for torpedo dts to make WLAN behave and to remove a duplicate
i2c rate entry
This series also includes few minor changes that are not stricly
fixes, but would be good to get in during the early -rc cycle:
- Remove legacy mailbox platform data that is no longer needed
- Add the pdata-quirks needed for the new pwm-omap-dmtimer so
people can use it
- Enable ti,mbox-send-noirq that's needed by wkup_m3 driver
- Enable SPLIT and DWARF4 in omap2plus_defconfig as it makes the
initramfs quite a bit smaller
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Merge tag 'omap-for-v4.5/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps with the most intrusive stuff being read-only data
assembly fixes, the other things are mostly board related:
- A series of omap assembly code fixes to fix issues with rodata with
ARM_KERNMEM_PERMS enabled. We had several places writing to rodata,
which is bad. The fix in most cases is to load the value from data
section using a pointer. Let's also enable ARM_KERNMEM_PERMS so
DEBUG_RODATA gets selected by default. And while testing things,
I also added few more loadable driver modules to the defconfig that
I seem to need quite often.
- Fix a long standing omap5 RTC mystery and enable RTC where we need
to ensure the SoC msecure pin is high so we can write to the RTC
registers.
- Fix irq types for am437x
- A series of minor dts fixes for sbc-am57x and cl-som-am57x
- Fixes for torpedo dts to make WLAN behave and to remove a duplicate
i2c rate entry
This series also includes few minor changes that are not stricly
fixes, but would be good to get in during the early -rc cycle:
- Remove legacy mailbox platform data that is no longer needed
- Add the pdata-quirks needed for the new pwm-omap-dmtimer so
people can use it
- Enable ti,mbox-send-noirq that's needed by wkup_m3 driver
- Enable SPLIT and DWARF4 in omap2plus_defconfig as it makes the
initramfs quite a bit smaller
* tag 'omap-for-v4.5/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (23 commits)
ARM: dts: am57xx: sbc-am57x: correct Eth PHY settings
ARM: dts: am57xx: cl-som-am57x: fix CPSW EMAC pinmux
ARM: dts: am57xx: sbc-am57x: fix UART3 pinmux
ARM: dts: am57xx: cl-som-am57x: update SPI Flash frequency
ARM: dts: am57xx: cl-som-am57x: set HOST mode for USB2
ARM: dts: am57xx: sbc-am57x: fix SB-SOM EEPROM I2C address
ARM: dts: LogicPD Torpedo: Revert Duplicative Entries
ARM: dts: am437x: pixcir_tangoc: use correct flags for irq types
ARM: dts: am4372: fix irq type for arm twd and global timer
ARM: dts: Fix wl12xx missing clocks that cause hangs
ARM: OMAP: Add PWM dmtimer platform data quirks
ARM: omap2plus_defconfig: Enable ARM_KERNMEM_PERMS and few loadable modules
ARM: OMAP2+: Fix ppa_zero_params and ppa_por_params for rodata
ARM: OMAP2+: Fix l2_inv_api_params for rodata
ARM: OMAP2+: Fix save_secure_ram_context for rodata
ARM: OMAP2+: Fix l2dis_3630 for rodata
ARM: OMAP2+: Fix wait_dll_lock_timed for rodata
ARM: OMAP2+: Remove legacy mailbox device instantiation
ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox
ARM: dts: AM33xx: Add ti,mbox-send-noirq to wkup_m3 mailbox
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- sama5d4: error in DBGU index
- addition of phy properties in several boards
- at91sam9n12ek fix a panel compatible string
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Merge tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
First fixes for 4.5. Only DT changes:
- sama5d4: error in DBGU index
- addition of phy properties in several boards
- at91sam9n12ek fix a panel compatible string
* tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d4 xplained: fix phy0 IRQ type
ARM: dts: at91: sama5d4 xplained: properly mux phy interrupt
ARM: dts: at91: sama5d4ek: add phy address and IRQ for macb0
ARM: dts: at91: sama5d2 xplained: add phy address and IRQ for macb0
ARM: dts: at91: at91sam9n12ek: fix panel compatible string
ARM: dts: at91: sama5d4: fix instance id of DBGU
Signed-off-by: Olof Johansson <olof@lixom.net>
As the kylin schematic drawing, add the needed work led for
kylin board.
Run:
echo 0 > /sys/class/leds/kylin:red:led/brightness
echo 1 > /sys/class/leds/kylin:red:led/brightness
The led can normal on/off on kylin board.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable audio DMAC (= rcar-dmac) in r8a7793 device tree.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v4
* Use GIC_SPI in interrupts properties
Enable DMA transfer using DVC in r8a7793/gose device tree.
DMA DMApp
[MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI]
Based on similar work for the r8a7791/koelsch by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable DMA transfer to/from SRC in r8a7793/gose device tree.
DMA DMApp
[MEM] -> [SRC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [SRC] <- [SSIU] <- [SSI]
Current sound driver is supporting
SSI/SRC random connection.
So, this patch is tring
SSI0 -> SRC2
SSI1 <- SRC3
Based on similar work for the r8a7791/koeslch by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable DMA transfer to/from SSIU in gose/r8a7791 device tree.
DMA
[MEM] -> [SSIU] -> [SSI]
DMA
[MEM] <- [SSIU] <- [SSI]
Based on similar work for the r8a7791/koelsch by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable DMA transfer to/from SSI in r8a7793/gose device tree.
DMA
[MEM] -> [SSI]
DMA
[MEM] <- [SSI]
Based on similar work for the r8a7791/koelsch by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable sound PIO support in the r8a7793/gose device tree.
Based on similar work for the r8a7791/koelsch by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Audio DMAC peri peri is no longer DMAEngine. it is supported by
sound driver. this patch enable it.
Base on work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate the two Audio DMA controllers in the r8a7791 device tree.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate Audio DMA clocks in the r8a7791 device tree.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DVC support to sound node in r8a7793 device tree.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate R-Car sound node in r8a7793 device tree.
This only supports PIO transfers.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Declare m2 clock in r8a7793 device tree.
Based on similar work for the r8a7791 by Laurent Pinchart.
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate audio clock in r8a7793 device tree.
audio_clk_a/b/c are required for R-Car sound.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate MSTP10 clocks in r8a7793 device tree.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use GIC_* defines for GIC interrupt cells in r8a7740 device tree.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use GIC_* defines for GIC interrupt cells in r8a73a4 device tree.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Define the Porter board dependent part of the R8A7791 sound device node.
Add device node for Asahi Kasei AK4642 stereo codec to the I2C2 bus.
Add the "simple-audio-card" device node to interconnect the SoC sound
device and the codec.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use GIC_* defines for GIC interrupt cells in r8a7779 device tree.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use GIC_* defines for GIC interrupt cells in r8a7778 device tree.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
This patch adds r8a7793 GOSE HDMI video out support.
The r8a7793 GOSE board is similar to r8a7791 Koelsch. For those
boards an on-board HDMI encoder chip provides HDMI video out
and also a LVDS port is available for external LCD panels.
Tested on r8a7793 Gose with HDMI hooked up to a Toshiba TV.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
[simon: rebased; reused existing i2c2 node]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use GIC_* defines for GIC interrupt cells in r8a7794 device tree.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Though the keyboard and other driver will continue to support the legacy
"gpio-key,wakeup", "linux-keypad,wakeup" boolean property to enable the
wakeup source, "wakeup-source" is the new standard binding.
This patch replaces all the legacy wakeup properties with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Add support for restoring GScaler parent clocks configuration when GSCL
power domain is turned on.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Fix CPU operating points for Exynos5800 (it use different
voltages than Exynos5420 and supports additional frequencies).
However don't use 2000MHz & 1900MHz OPPs (for A15 cores) and
1400MHz OPP (for A7 cores) for now as they are not available
on all boards.
Based on Hardkernel's kernel for ODROID-XU3 board.
Changes by Ben Gamari:
- Port to operating-points-v2
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Ben Gamari <ben@smart-cactus.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
For Exynos542x/5800 platforms, add CPU operating points
for migrating from Exynos specific cpufreq driver to using
generic cpufreq driver.
Changes by Bartlomiej:
- split Exynos5420 support from the original patch
- merged Exynos5422 fixes from Ben
Changes by Ben Gamari:
- Port to operating-points-v2
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Ben Gamari <ben@smart-cactus.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Add cluster regulator supply properties as a preparation to
adding generic cpufreq-dt driver support for Exynos542x and
Exynos5800 based boards.
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Exynos5420 and Exynos5800 boards boot from big core (A15) but
Exynos5422 boards choose otherwise: LITTLE core (A7) (on Exynos5422 this
is property of the board - configurable by pulling up/down gpg2-1).
To make user-visible CPU ordering more consistent the 'cpus' node was
overridden by exynos5422-cpus.dtsi.
However this is a little bit ugly and error-prone. Overriding the CPU
child nodes requires to basically reverse what was done initially in
exynos5420.dtsi.
Instead, split CPU configuration entirely to separate files which should
be included by board DTS.
Suggested-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Chanho Park <parkch98@gmail.com>
Though the keyboard and other driver will continue to support the legacy
"gpio-key,wakeup", "linux,input-wakeup" boolean property to enable the
wakeup source, "wakeup-source" is the new standard binding.
This patch replaces all the legacy wakeup properties with the unified
"wakeup-source" property in order to avoid any futher copy-paste
duplication.
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Add support for the wl1271 wlan chip. As far as I can see N9 uses the
same chip with the same enable and irq gpio, but they use the mmc
interface instead of the spi interface.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Device tree modifications:
- Pinmux for SPI0 and WiFi GPIOs.
- SPI0 node with wlcore as a child node.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The TLV320AIC23B codec is connected to the CPU by McASP controller 1 for
data and I2C0 for control.
Modifications:
- Enable and configure McASP controller 1.
- Add TLV320AIC23B codec pinmux.
- Add TLV320AIC23B codec configurations.
- Use simple-audio-card as CPU to codec glue.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Touchscreen and analog digital converter configurations.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add CAN bus pinmux.
Enable D_CAN bus controllers 0 and 1
The pinmux of uart1 node contradicts the pinmux of dcan0 and dcan1 nodes.
U-Boot should delete the uart1 or dcan0/1 nodes.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Driver for omap3 with documentation is there since v4.4-rc1.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Tested-by: Pavel Machek <pavel@ucw.cz>
[tony@atomide.com: added thermal-sensor-cells as suggested by Roger]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Update Eth PHY settings to make it possible to run both phys at 1Gbps.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On-board SPI flash cat act at 48Mhz SPI bus frequency.
Update the DT frequency property.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Revert commit 7cd6ca770d ("ARM: dts: Change I2C2 and I2C3 to 400KHz
for LogicPD Torpedo DM3730 devkit") It was already done and it is
just a duplicate.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now IRQs for Pixcir Tangoc touchscreen are defined using
IRQ_TYPE_NONE in am437x-gp-evm.dts and am43x-epos-evm.dts wich
do not correspond HW.
Hence, update am437x-gp-evm.dts and am43x-epos-evm.dts files
and use correct flag IRQ_TYPE_EDGE_FALLING for irq types.
While here, remove duplicated irq declaration for pixcir_ts@5c node
in am437x-gp-evm.dts.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per ARM documentation
PPI(0) ID27 - global timer interrupt is rising-edge sensitive.
PPI(2) ID29 - twd interrupt is rising-edge sensitive.
and the same is proved by GIC distributor register value
GIC_DIST_CONFIG(0xC04) = 0x7DC00000.
Hence, set IRQ triggering type to IRQ_TYPE_EDGE_RISING
for ARM TWD and Global timers.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds adp1653 device into n900 DT structure. DT support in
adp1653 driver is there since v4.2-rc1 version.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
For phy0 KSZ8081, the type of GPIO IRQ should be "level low" instead of
"edge falling".
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Fixes: 38153a0178 ("ARM: at91/dt: sama5d4: add dts for sama5d4 xplained board")
Cc: <stable@vger.kernel.org> # 4.1+
No interrupt were received from the phy because PIOE 1 may not be properly
muxed. It prevented proper link detection, especially since commit
321beec504 ("net: phy: Use interrupts when available in NOLINK state")
disables polling.
Cc: <stable@vger.kernel.org> # 4.4
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
On SAMA5D4EK board, the Ethernet doesn't work after resuming from the suspend
state.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
[nicolas.ferre@atmel.com: adapt to newer kernel]
Fixes: 38153a0178 ("ARM: at91/dt: sama5d4: add dts for sama5d4 xplained board")
Cc: <stable@vger.kernel.org> # 4.1+
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
After 57a38effa5 (net: phy: micrel: disable broadcast for KSZ8081/KSZ8091)
the macb0 interface has difficulties to come back from power saving mode if
address not explicitly set up.
As the micrel phy on the board is actually configured to show up at address 1
we use this explicitly.
Adding the phy node and its real address fixes the issue.
The phy IRQ and associated pinmux node is also added.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: stable@vger.kernel.org # 4.4+ // manual merge needed
Properly use qiaodian as the vendor prefix for the panel.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Building with CONFIG_CC_STACKPROTECTOR_STRONG triggers protection code
generation under CONFIG_ARM_ATAG_DTB_COMPAT but this is too early for
being able to use any of the stack_chk code. Explicitly disable it for
only the atags_to_fdt bits.
Suggested-by: zhxihu <zhxihu@marvell.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It's device based on BCM47094 which is quite similar to BCM4709 except
for higher CPU frequency. This device has 2 flash memories, it boots
from serial one and stores firmware on NAND. Other than that we define
standard stuff like LEDs, buttons and UART.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the device node for the TSADC found on rk3066.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The tcxo-clock-frequency binding is listed as optional,
but without it the wl12xx used on the torpedo + wireless
may hang. Scanning also appears broken without this patch.
Signed-off-by: Adam Ford <aford173@gmail.com>
Fixes: 687c276761 ("ARM: dts: Add minimal support for LogicPD
Torpedo DM3730 devkit")
Cc: stable@vger.kernel.org # v4.2+
Signed-off-by: Tony Lindgren <tony@atomide.com>
Here're a few gpio pin related fixes:
- remove pinctrl-0 definition from pinctrl, since those pins are used
in other places such as gpio-fan and regulators.
- keep initial state of power led
- fix for alarm pin of gpio-fan.
Fixes: dc57844a73 ("ARM: dts: orion5x: add buffalo linkstation ls-wtgl")
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add the #clock-cells properties for the usbphy nodes as they
provide the pll-clocks now.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
For kirkwood, gpio pins starts from 32 are in the 2nd bank, so it should be
converted to "gpio1 <pin minus 32>" in dts file.
e.g. gpio 40 should be "gpio1 8"
The pin/bank issue was found when discussing Debian Bug #810894
[https://bugs.debian.org/810894#47]
Fixes: c43379e150 ("ARM: dts: add buffalo linkstation ls-wvl/vl")
Reported-by: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
For kirkwood, gpio pins starts from 32 are in the 2nd bank, so it should be
converted to "gpio1 <pin minus 32>" in dts file.
e.g. gpio 40 should be "gpio1 8"
Besides, a few other pin fixes for ls-wxl/wsxl, to match with mpp pin
definition:
- gpio-leds: "lswxl:blue:power" pin
- gpio-leds: "lswxl:red:func" pin
- gpio-leds: "lswxl:red:hdderr0" pin
- gpio-leds: "lswxl:red:hdderr1" pin
- gpio-fan: low/high/alarm pin
The pin/bank issue was found when discussing Debian Bug #810894
[https://bugs.debian.org/810894#47]
Fixes: e54e4b1b62 ("ARM: dts: add buffalo linkstation ls-wxl/wsxl")
Reported-by: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The EDP 24M clock can be fed either by an SoC internal fixed clock or
from an external IC. Change the default parent to the internal clock in
the main rk3288 dtsi, to ensure (by default) it gets setup with a
non-orphaned clock (hardware defaults to the externa clock).
This prevents potential issues when the clock framework get support for
deferring on orphaned clocks, while specific boards can always change
the parent clock if an external input is preferred.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
As of commit e488ca9f8d ("doc: dt: mtd: partitions: add compatible
property to "partitions" node"), the "partitions" subnode of an SPI
FLASH device node must have a compatible property. The partitions are no
longer detected if it is not present.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
As of commit e488ca9f8d ("doc: dt: mtd: partitions: add compatible
property to "partitions" node"), the "partitions" subnode of an SPI
FLASH device node must have a compatible property. The partitions are no
longer detected if it is not present.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
While drivers will bind to the generic compatible values, this enables
the use of more specialized drivers in the future, if the need arises.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
It seems some firefly boards need 12mA drive strength for sdmmc.
Using 4mA/8mA drive strength will cause the kernel to fail to recognize
the sd card correctly.
Increased the sdmmc lines drive strength from 4mA to 12mA.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable the sdio0 slot on the Rock2 square which has a broadcom wifi chip
attached and add a power sequence to enable the wifi chip and turn on
the required 32k clock.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The s5p-sss crypto HW acceleration driver supports only AES algorithms
thus it accesses only registers from feeder (offset 0x0, length 0x100)
and AES (offset 0x200, length 0x100) blocks of Security SubSystem (SSS).
The exynos-rng Pseudo Random Number Generator driver accesses only PRNG
block at offset 0x400 (length 0x100).
Narrow the size of memory mapped by s5p-sss driver so both drivers can
be loaded at the same time.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
The chip is smsc9115, connected via SROMc bank 3. Additionally, some GPIO
initialization is required.
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
driver. The driver saves and restores SROM registers during suspend to RAM.
DT changes should go in before removal of SROM support from mach-exynos.
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Merge tag 'samsung-dt-srom-4.6' into next/dt
Device Tree changes for v4.6 adding the nodes for Exynos SROM controller
driver. The driver saves and restores SROM registers during suspend to RAM.
DT changes should go in before removal of SROM support from mach-exynos.
This machine uses own SoC device tree file, add missing part.
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Add device node of SROM controller for exynos4.
CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
[k.kozlowski: fixed size of mapped SROMC memory region]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Add the required pin configuration support to Exynos5410 using pinctrl
interface.
Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com>
[AF: Rebased, style changes]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Pavel Fedin <p.fedin@samsung.com>
[k.kozlowski: Move pinctrl nodes into soc node]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Use GIC_* defines for GIC interrupt cells in r8a7793 device tree.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Define the SILK board dependent part of the DU device node.
Add the device nodes for the Analog Devices ADV7511W HDMI transmitter
(connected to DU0) and ADV7123 video DAC (connected to DU1). Add the
necessary subnodes to interconnect DU, HDMI/VDAC devices, and HDMI/VGA
connectors.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use GIC_* defines for GIC interrupt cells in r8a7791 device tree.
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use GIC_* defines for GIC interrupt cells in r8a7791 device tree.
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Activate i2c2 bus in r8a7793/gose device tree.
Based on similar work for the r8a7791/koelsch by Wolfram Sang.
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
