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ARM: dts: rockchip: add clock-cells for usb phy nodes
Add the #clock-cells properties for the usbphy nodes as they provide the pll-clocks now. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -202,6 +202,7 @@ usbphy0: usb-phy0 {
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reg = <0x17c>;
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clocks = <&cru SCLK_OTGPHY0>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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};
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usbphy1: usb-phy1 {
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@ -209,6 +210,7 @@ usbphy1: usb-phy1 {
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reg = <0x188>;
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clocks = <&cru SCLK_OTGPHY1>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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};
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};
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@ -171,6 +171,7 @@ usbphy0: usb-phy0 {
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reg = <0x10c>;
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clocks = <&cru SCLK_OTGPHY0>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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};
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usbphy1: usb-phy1 {
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@ -178,6 +179,7 @@ usbphy1: usb-phy1 {
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reg = <0x11c>;
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clocks = <&cru SCLK_OTGPHY1>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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};
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};
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@ -968,6 +968,7 @@ usbphy0: usb-phy0 {
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reg = <0x320>;
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clocks = <&cru SCLK_OTGPHY0>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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};
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usbphy1: usb-phy1 {
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@ -975,6 +976,7 @@ usbphy1: usb-phy1 {
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reg = <0x334>;
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clocks = <&cru SCLK_OTGPHY1>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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};
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usbphy2: usb-phy2 {
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@ -982,6 +984,7 @@ usbphy2: usb-phy2 {
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reg = <0x348>;
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clocks = <&cru SCLK_OTGPHY2>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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};
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};
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