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ARM: dts: r8a7778: Add SCIF fallback compatibility strings

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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2016-01-29 10:32:02 +01:00 committed by Simon Horman
parent b14ce2321b
commit 720e9096e3
1 changed files with 12 additions and 6 deletions
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18
arch/arm/boot/dts/r8a7778.dtsi
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@ -297,7 +297,8 @@ rcar_sound,ssi {
};
scif0: serial@ffe40000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
"renesas,scif";
reg = <0xffe40000 0x100>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7778_CLK_SCIF0>;
@ -307,7 +308,8 @@ scif0: serial@ffe40000 {
};
scif1: serial@ffe41000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
"renesas,scif";
reg = <0xffe41000 0x100>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7778_CLK_SCIF1>;
@ -317,7 +319,8 @@ scif1: serial@ffe41000 {
};
scif2: serial@ffe42000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
"renesas,scif";
reg = <0xffe42000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7778_CLK_SCIF2>;
@ -327,7 +330,8 @@ scif2: serial@ffe42000 {
};
scif3: serial@ffe43000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
"renesas,scif";
reg = <0xffe43000 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7778_CLK_SCIF3>;
@ -337,7 +341,8 @@ scif3: serial@ffe43000 {
};
scif4: serial@ffe44000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
"renesas,scif";
reg = <0xffe44000 0x100>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7778_CLK_SCIF4>;
@ -347,7 +352,8 @@ scif4: serial@ffe44000 {
};
scif5: serial@ffe45000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
"renesas,scif";
reg = <0xffe45000 0x100>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7778_CLK_SCIF5>;