Commit Graph

61368 Commits

Author SHA1 Message Date
Lubomir Rintel
f2023d9d10 ARM: dts: mmp2: Add Audio SRAM
This memory is region is where the two-channel audio DMA can pump sound
samples into the SSPA's internal FIFO.

Link: https://lore.kernel.org/r/20200718205019.184927-6-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:04 +02:00
Lubomir Rintel
f45a04a5ec ARM: dts: mmp2: Extend the MPMU reg range
The ACGR register is at the offset of 0x1024, beyond the 4k originally
assigned to the MPMU range.

Link: https://lore.kernel.org/r/20200718205019.184927-5-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:02 +02:00
Lubomir Rintel
1267340fe5 ARM: dts: mmp2: Add #power-domain-cells to /clocks
The power management unit, described by the soc_clocks node, controls the
power to the peripherals by the means of power domains with a single
cell -- the domain number.

Link: https://lore.kernel.org/r/20200718205019.184927-4-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:04:59 +02:00
Lubomir Rintel
f45200b67e ARM: dts: mmp2-olpc-xo-1-75: Delete #address-cells from ssp3
On the XO-1.75, this node represents a bus interface that operates in slave
mode and thus is only able to accommodate a single subnode; no address
cells are necessary.

The Documentation/devicetree/bindings/spi/spi-controller.yaml binding
prefers that we drop the property instead of setting it to zero.

This fixes a DT validation error:

  arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@d4037000:
      { ... } is valid under each of {'required': ['spi-slave']},
                                     {'required': ['#address-cells']}

We also need to drop #size-cells:

  arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@d4037000:
      '#address-cells' is a dependency of '#size-cells'

Link: https://lore.kernel.org/r/20200718205019.184927-3-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:04:57 +02:00
Lubomir Rintel
9dbf272cf4 ARM: dts: mmp2-olpc-xo-1-75: Fix camera I2C node validation
mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: $nodename:0:
      'camera_i2c' does not match '^i2c(@.*)?'
  mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'sda-gpios' is a required property
  mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'scl-gpios' is a required property

The "gpios" property actually was documented as deprecated, but got dropped
in commit 0175ce4a58 ("dt-bindings: i2c: Convert i2c-gpio binding to
json-schema"). It's probably best kept forgotten though.

Link: https://lore.kernel.org/r/20200718205019.184927-2-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:04:54 +02:00
Arnd Bergmann
6b848e263a Ux500 DTS changes for the v5.9 kernel series:
- Add touchkey to the Samsung Golden.
 - Fix up the supply nodes for the AB8500 PWM devices.
 - Fix up the cache controller node names.
 - Fix the Samsing Skomer accelerometer mounting matrix.
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Merge tag 'ux500-dts-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt

Ux500 DTS changes for the v5.9 kernel series:

- Add touchkey to the Samsung Golden.
- Fix up the supply nodes for the AB8500 PWM devices.
- Fix up the cache controller node names.
- Fix the Samsing Skomer accelerometer mounting matrix.

* tag 'ux500-dts-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: dts: ux500-skomer: Correct accel mounting matrix
  ARM: dts: ste: Align L2 cache-controller nodename with dtschema
  ARM: dts: ux500: Supply nodes for the other 2 AB8500 PWM devices
  ARM: dts: ux500: samsung-golden: Add touchkey

Link: https://lore.kernel.org/r/CACRpkdZZgZ1LeOK5zFj5Z6Mh=RVz37hZ-7Z4DQNGC1uaiEVTeA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:03:24 +02:00
Arnd Bergmann
b61010a1ec STM32 DT updates for v5.9, round 1
Highlights:
 ----------
 
 MCU part:
  -Enable stmpe811 on stm32f429
  -Enable l3gd20-gyro on stm32f429
  -Enable panel-ilitek-9341 on stm32f429
  -Fixes for yaml validation (leds, nodes names,
   remove useless bindings ...)
  -Add stm32xxx compatibles for syscon nodes
 
 MPU part:
  -Add support for usb role switch to dwc2
  -Add stm32xxx compatibles for syscon nodes
  -Update uart4 pin configuration for low power mode
   used by dkx and ed1 ST boards
  -Fix uart nodes ordering and uart7_pins_a comments
  -Add the support of uart instances available on STM32MP157 boards:
   - usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
   - uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
   - usart2 on stm32mp157c-dk2
  -Configure I2C5 on stm32mp15 DK boards
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Merge tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.9, round 1

Highlights:
----------

MCU part:
 -Enable stmpe811 on stm32f429
 -Enable l3gd20-gyro on stm32f429
 -Enable panel-ilitek-9341 on stm32f429
 -Fixes for yaml validation (leds, nodes names,
  remove useless bindings ...)
 -Add stm32xxx compatibles for syscon nodes

MPU part:
 -Add support for usb role switch to dwc2
 -Add stm32xxx compatibles for syscon nodes
 -Update uart4 pin configuration for low power mode
  used by dkx and ed1 ST boards
 -Fix uart nodes ordering and uart7_pins_a comments
 -Add the support of uart instances available on STM32MP157 boards:
  - usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
  - uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
  - usart2 on stm32mp157c-dk2
 -Configure I2C5 on stm32mp15 DK boards

* tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (38 commits)
  ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkx
  ARM: dts: stm32: Add compatibles for syscon for stm32mp151
  ARM: dts: stm32: Add compatibles for syscon for stm32h743
  ARM: dts: stm32: Add compatibles for syscon for stm32f746
  ARM: dts: stm32: Add compatibles for syscon for stm32f426
  dt-bindings: arm: stm32: Add compatibles for syscon nodes
  ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl
  ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkx
  ARM: dts: stm32: add usart2 node to stm32mp157c-dk2
  ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boards
  ARM: dts: stm32: add usart3 node to stm32mp157c-ev1
  ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boards
  ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl
  ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrl
  ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl
  ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl
  ARM: dts: stm32: Update UART4 pin states on stm32mp15xx-dkx
  ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
  ARM: dts: stm32: update uart4 pin configuration for low power on stm32mp157
  dt-bindings: usb: dwc2: Fix issues for stm32mp15x SoC
  ...

Link: https://lore.kernel.org/r/8a9bb27b-fc08-126a-11f7-01354e8577e1@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:02:00 +02:00
Arnd Bergmann
3236013b70 Samsung DTS ARM changes for v5.9
1. Enable Bluetooth on Artik5 (Exynos3250).
 2. Enable accelerometer on Aries boards (Samsung Galaxy S family,
    S5Pv210); multiple fixes.
 3. Fix highest frequencies on Exynos5800.
 4. Fix rare USB instability on Odroid XU3 family (Exynos5422).
 5. Minor DTS fixes and adjustments with dtschema.
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Merge tag 'samsung-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.9

1. Enable Bluetooth on Artik5 (Exynos3250).
2. Enable accelerometer on Aries boards (Samsung Galaxy S family,
   S5Pv210); multiple fixes.
3. Fix highest frequencies on Exynos5800.
4. Fix rare USB instability on Odroid XU3 family (Exynos5422).
5. Minor DTS fixes and adjustments with dtschema.

* tag 'samsung-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: Replace HTTP links with HTTPS ones
  ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 family
  ARM: dts: exynos: Define fixed regulators in root node for consistency in SMDK5420
  ARM: dts: exynos: Define fixed regulators in root node for consistency in Arndale
  ARM: dts: exynos: Define fixed regulators in root node for consistency in Origen
  ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings
  ARM: dts: exynos: Fix missing empty reg/ranges property regulators on Trats
  ARM: dts: exynos: Align L2 cache-controller nodename with dtschema
  ARM: dts: s5pv210: Correct BCM4329 bluetooth node
  ARM: dts: s5pv210: Add BMA023 accelerometer support to Aries
  ARM: dts: s5pv210: Add support for GP2A light sensor on Aries
  ARM: dts: s5pv210: Correct fuelgauge definition on Aries
  ARM: dts: s5pv210: Add interrupt-controller property to gph3
  ARM: dts: exynos: Enable Bluetooth support for Artik5 board
  ARM: dts: exynos: Extend all Exynos5800 A15's OPPs with max voltage data

Link: https://lore.kernel.org/r/20200721180900.13844-2-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:58:57 +02:00
Arnd Bergmann
42f8362abd Qualcomm ARM dts updates for v5.9
Add QFPROM and ethernet for ipq8064 and a new DTS for the MikroTik
 RB3011 using the same platform.
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Merge tag 'qcom-dts-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM dts updates for v5.9

Add QFPROM and ethernet for ipq8064 and a new DTS for the MikroTik
RB3011 using the same platform.

* tag 'qcom-dts-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: add qfprom definition to ipq806x
  ARM: dts: qcom: Add MikroTik RB3011
  ARM: dts: qcom: add ethernet definitions to ipq8064

Link: https://lore.kernel.org/r/20200721045032.3430395-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:58:17 +02:00
Arnd Bergmann
6ce448eeef ARM: DT: Hisilicon ARM32 SoCs updates for v5.9
- Update L2 cache controller nodes to fix dtschema validator warnings
   for hi3620 and hix5hd2
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Merge tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM: DT: Hisilicon ARM32 SoCs updates for v5.9

- Update L2 cache controller nodes to fix dtschema validator warnings
  for hi3620 and hix5hd2

* tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi:
  ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/5F165FA1.2030301@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:51:57 +02:00
Arnd Bergmann
4828f45708 Our usual number of patches to improve the Allwinner Device Tree
support, including:
   - CPUFreq / Thermal throttling support for the H5
   - Touchscreen support for the Pinephone
   - New boards: PinePhone v1.2
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Merge tag 'sunxi-dt-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

Our usual number of patches to improve the Allwinner Device Tree
support, including:
  - CPUFreq / Thermal throttling support for the H5
  - Touchscreen support for the Pinephone
  - New boards: PinePhone v1.2

* tag 'sunxi-dt-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: h5: bananapi-m2-plus-v1.2: Tie in CPU OPPs
  arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs
  arm64: dts: allwinner: h5: Add CPU Operating Performance Points table
  arm64: dts: allwinner: h5: Add trip and cooling maps to CPU thermal zones
  arm64: dts: allwinner: h5: Add clock to CPU cores
  ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages
  ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores
  ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores
  arm64: dts: sun50i-pinephone: dldo4 must not be >= 1.8V
  arm64: dts: allwinner: Add support for PinePhone revision 1.2
  dt-bindings: arm: sunxi: Add PinePhone 1.2 bindings
  arm64: dts: sun50i-a64-pinephone: Add touchscreen support
  arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone
  ARM: dts: orange-pi-zero-plus2: add leds configuration
  ARM: dts: orange-pi-zero-plus2: enable USB OTG port

Link: https://lore.kernel.org/r/fa48ffcb-3404-41bb-b065-a16717cf5688.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:50:35 +02:00
Arnd Bergmann
262fc784d8 Versatile DTS changes for the v5.9 kernel cycle, essentially
just a single patch fixing up the node names for schema.
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Merge tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt

Versatile DTS changes for the v5.9 kernel cycle, essentially
just a single patch fixing up the node names for schema.

* tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: dts: arm-realview: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/CACRpkdbkM9ZmuG2FnBmO7upcJfnqq2oSLDCFDXC5b3K+dtps9Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:49:58 +02:00
Arnd Bergmann
d27895a122 i.MX device tree update for 5.9:
- New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC.
 - Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings.
 - Make tempmon node as child of anatop node according to hardware
   architecture.
 - The vf610-zii device update: configure fiber port to 1000BaseX, add
   switch watchdog, MDIO speed and preamble.
 - A series from Fabio Estevam to update imx6qdl-sabresd and
   imx6q-tbs2910 for using MDIO node and reset-assert-us.
 - Align L2 cache-controller device node name with .yaml schema.
 - Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board.
 - A series of patches from Shengjiu Wang to enable various audio
   support on i.MX6 devices.
 - Add Gateworks System Controller support for imx6qdl-gw devices.
 - Change default #pwm-cells setting to <3> in the SoC dtsi files.
 - Other small random changes.
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Merge tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX device tree update for 5.9:

- New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC.
- Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings.
- Make tempmon node as child of anatop node according to hardware
  architecture.
- The vf610-zii device update: configure fiber port to 1000BaseX, add
  switch watchdog, MDIO speed and preamble.
- A series from Fabio Estevam to update imx6qdl-sabresd and
  imx6q-tbs2910 for using MDIO node and reset-assert-us.
- Align L2 cache-controller device node name with .yaml schema.
- Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board.
- A series of patches from Shengjiu Wang to enable various audio
  support on i.MX6 devices.
- Add Gateworks System Controller support for imx6qdl-gw devices.
- Change default #pwm-cells setting to <3> in the SoC dtsi files.
- Other small random changes.

* tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (43 commits)
  ARM: dts: vf610-zii-ssmb-spu3: Add node for switch watchdog
  ARM: dts: vf610-zii-ssmb-dtu: Add no-sdio/no-sd properties
  ARM: dts: imx6q-tbs2910: Pass reset-assert-us
  ARM: dts: imx6q-tbs2910: Add an mdio node
  ARM: dts: imx6qdl-sabresd: Pass reset-assert-us
  ARM: dts: imx6qdl-sabresd: Add an mdio node
  ARM: dts: imx6qdl-gw: add Gateworks System Controller support
  ARM: dts: imx6ull: add MYiR MYS-6ULX SBC
  ARM: dts: vf610-zii-spb4: Add node for switch watchdog
  ARM: dts: colibri-imx6: remove pinctrl-names orphan
  ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files
  ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseX
  ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseX
  ARM: dts: ZII: update MDIO speed and preamble
  ARM: dts: vfxxx: Add node for CAAM
  ARM: dts: imx6qp-sabresd: enable sata
  ARM: dts: imx6qp-sabreauto: enable sata
  ARM: dts: add Protonic RVT board
  ARM: dts: add Protonic VT7 board
  ARM: dts: add Protonic WD2 board
  ...

Link: https://lore.kernel.org/r/20200720085536.24138-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:46:22 +02:00
Arnd Bergmann
36e163eda1 SoCFPGA DTS updates for v5.9
- Populate clock entries for Agilex platform
 - Add "reset-names" to SPI entries
 - Add Maxim max1619 temperature sensor to Arria10 devkit
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Merge tag 'socfpga_dts_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA DTS updates for v5.9
- Populate clock entries for Agilex platform
- Add "reset-names" to SPI entries
- Add Maxim max1619 temperature sensor to Arria10 devkit

* tag 'socfpga_dts_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit
  arm: dts: socfpga: add reset-names to spi node
  arm64: dts: agilex: add nand clocks
  arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex

Link: https://lore.kernel.org/r/20200719011804.15599-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:43:24 +02:00
Arnd Bergmann
7c8c70ba5c i.MX fixes for 5.8, round 3:
- A couple of FEC2 phy-mode fixes on imx6sx-sabreauto and imx6sx-sdb
   board.
 - One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card
   detect work correctly.
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Merge tag 'imx-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.8, round 3:

- A couple of FEC2 phy-mode fixes on imx6sx-sabreauto and imx6sx-sdb
  board.
- One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card
  detect work correctly.

* tag 'imx-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx6qdl-icore: Fix OTG_ID pin and sdcard detect
  ARM: dts: imx6sx-sabreauto: Fix the phy-mode on fec2
  ARM: dts: imx6sx-sdb: Fix the phy-mode on fec2

Link: https://lore.kernel.org/r/20200720040148.GA20462@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:41:36 +02:00
Arnd Bergmann
21a59e0bf5 Two fixes for the Allwinner SoCs, one to relax the CMA allocation ranges that
were failing on older SoCs and one to fix Cedrus on the H6.
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Merge tag 'sunxi-fixes-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes

Two fixes for the Allwinner SoCs, one to relax the CMA allocation ranges that
were failing on older SoCs and one to fix Cedrus on the H6.

* tag 'sunxi-fixes-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: h6: Fix Cedrus IOMMU usage
  ARM: dts sunxi: Relax a bit the CMA pool allocation range

Link: https://lore.kernel.org/r/e24f0608-6a4f-4163-b99e-a5f48e796184.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:40:40 +02:00
Arnd Bergmann
a1224fdc5c i.MX defconfig update for 5.9:
- Enable PCA9450 regulator driver in arm64 defconfig.
 - Enable RV8803 RTC and FSL_SAI audio support in arm64 defconfig to make
   it useful for Kontron sl28 boards.
 - Enable i.MX8MM clock and pinctrl driver in imx_v6_v7_defconfig to get
   AARCH32 mode kernel work on AARCH64 hardware.
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Merge tag 'imx-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig

i.MX defconfig update for 5.9:

- Enable PCA9450 regulator driver in arm64 defconfig.
- Enable RV8803 RTC and FSL_SAI audio support in arm64 defconfig to make
  it useful for Kontron sl28 boards.
- Enable i.MX8MM clock and pinctrl driver in imx_v6_v7_defconfig to get
  AARCH32 mode kernel work on AARCH64 hardware.

* tag 'imx-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx_v6_v7_defconfig: Support i.MX8MM
  arm64: defconfig: enable RTC and audio support on Kontron sl28 boards
  arm64: defconfig: add pca9450 pmic driver

Link: https://lore.kernel.org/r/20200720085536.24138-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:39:30 +02:00
Jagan Teki
d0cb2f30e7 ARM: dts: rockchip: Add HDMI out for RockPI N8/N10
This patch adds support to enable HDMI out for
N10 and N8 combinations SBCs.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200720110230.367985-2-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22 21:19:06 +02:00
Jagan Teki
417b188a98 ARM: dts: rockchip: Add USB for RockPI N8/N10
Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0
ports.

This patch adds support to enable all these USB ports for
N10 and N8 combinations SBCs.

Note that the USB 3.0 port on RockPI N8 combination works
as USB 2.0 OTG since it is driven from RK3288.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200720110230.367985-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22 21:19:06 +02:00
Jagan Teki
82540defdd ARM: dts: rockchip: Add usb host0 ohci node for rk3288
rk3288 and rk3288w have a usb host0 ohci controller.

Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.

So add usb host0 ohci node in rk3288 dtsi and boards
can then enable it if supported.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: William Wu <william.wu@rock-chips.com>
Link: https://lore.kernel.org/r/20200720105846.367776-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22 21:08:29 +02:00
Russell King
2350ebe2c4 ARM: uaccess: add further explanation of __range_ok()
Detail the success return condition, and that we rely on KERNEL_DS
being zero for this to operate correctly.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-22 09:50:55 +01:00
Valentin Schneider
e17ae7fea8 arm, arm64: Select CONFIG_SCHED_THERMAL_PRESSURE
This option now correctly depends on CPU_FREQ_THERMAL, so select it on the
architectures that implement the required functions,
arch_set_thermal_pressure() and arch_get_thermal_pressure().

Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lkml.kernel.org/r/20200712165917.9168-4-valentin.schneider@arm.com
2020-07-22 10:22:06 +02:00
Valentin Schneider
25980c7a79 arch_topology, sched/core: Cleanup thermal pressure definition
The following commit:

  14533a16c4 ("thermal/cpu-cooling, sched/core: Move the arch_set_thermal_pressure() API to generic scheduler code")

moved the definition of arch_set_thermal_pressure() to sched/core.c, but
kept its declaration in linux/arch_topology.h. When building e.g. an x86
kernel with CONFIG_SCHED_THERMAL_PRESSURE=y, cpufreq_cooling.c ends up
getting the declaration of arch_set_thermal_pressure() from
include/linux/arch_topology.h, which is somewhat awkward.

On top of this, sched/core.c unconditionally defines
o The thermal_pressure percpu variable
o arch_set_thermal_pressure()

while arch_scale_thermal_pressure() does nothing unless redefined by the
architecture.

arch_*() functions are meant to be defined by architectures, so revert the
aforementioned commit and re-implement it in a way that keeps
arch_set_thermal_pressure() architecture-definable, and doesn't define the
thermal pressure percpu variable for kernels that don't need
it (CONFIG_SCHED_THERMAL_PRESSURE=n).

Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200712165917.9168-2-valentin.schneider@arm.com
2020-07-22 10:22:05 +02:00
Christophe JAILLET
951e395686 ARM: davinci: dm646x-evm: Simplify error handling in 'evm_sw_setup()'
There is no need to call 'gpio_free(evm_sw_gpio[i])' for these error
handling cases, it is already done in the error handling path at label
'out_free'.

Simplify the code and axe a few LoC.

While at it, also explicitly return 0 in the normal path.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2020-07-22 00:34:21 +05:30
Kieran Bingham
66ed86d637 ARM: davinci: Fix trivial spelling
The word 'descriptor' is misspelled throughout the tree.

Fix it up accordingly:
    decriptors -> descriptors

Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
[nsekhar@ti.com: fixed up subject prefix]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2020-07-21 23:35:09 +05:30
Mike Rapoport
6da5238fa3 ARM: 8993/1: remove it8152 PCI controller driver
The it8152 PCI host controller was only used by cm-x2xx platforms.
Since these platforms were removed, there is no point to keep it8152
driver.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21 16:33:41 +01:00
Nathan Huckleberry
b4d5ec9b39 ARM: 8992/1: Fix unwind_frame for clang-built kernels
Since clang does not push pc and sp in function prologues, the current
implementation of unwind_frame does not work. By using the previous
frame's lr/fp instead of saved pc/sp we get valid unwinds on clang-built
kernels.

The bounds check on next frame pointer must be changed as well since
there are 8 less bytes between frames.

This fixes /proc/<pid>/stack.

Link: https://github.com/ClangBuiltLinux/linux/issues/912

Reported-by: Miles Chen <miles.chen@mediatek.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Cc: stable@vger.kernel.org
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21 16:33:40 +01:00
Stefan Agner
2cbd1cc3dc ARM: 8991/1: use VFP assembler mnemonics if available
The integrated assembler of Clang 10 and earlier do not allow to access
the VFP registers through the coprocessor load/store instructions:
arch/arm/vfp/vfpmodule.c:342:2: error: invalid operand for instruction
        fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK));
        ^
arch/arm/vfp/vfpinstr.h:79:6: note: expanded from macro 'fmxr'
        asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr   " #_vfp_ ", %0"
            ^
<inline asm>:1:6: note: instantiated into assembly here
        mcr p10, 7, r0, cr8, cr0, 0 @ fmxr      FPEXC, r0
            ^

This has been addressed with Clang 11 [0]. However, to support earlier
versions of Clang and for better readability use of VFP assembler
mnemonics still is preferred.

Ideally we would replace this code with the unified assembler language
mnemonics vmrs/vmsr on call sites along with .fpu assembler directives.
The GNU assembler supports the .fpu directive at least since 2.17 (when
documentation has been added). Since Linux requires binutils 2.21 it is
safe to use .fpu directive. However, binutils does not allow to use
FPINST or FPINST2 as an argument to vmrs/vmsr instructions up to
binutils 2.24 (see binutils commit 16d02dc907c5):
arch/arm/vfp/vfphw.S: Assembler messages:
arch/arm/vfp/vfphw.S:162: Error: operand 0 must be FPSID or FPSCR pr FPEXC -- `vmsr FPINST,r6'
arch/arm/vfp/vfphw.S:165: Error: operand 0 must be FPSID or FPSCR pr FPEXC -- `vmsr FPINST2,r8'
arch/arm/vfp/vfphw.S:235: Error: operand 1 must be a VFP extension System Register -- `vmrs r3,FPINST'
arch/arm/vfp/vfphw.S:238: Error: operand 1 must be a VFP extension System Register -- `vmrs r12,FPINST2'

Use as-instr in Kconfig to check if FPINST/FPINST2 can be used. If they
can be used make use of .fpu directives and UAL VFP mnemonics for
register access.

This allows to build vfpmodule.c with Clang and its integrated assembler.

[0] https://reviews.llvm.org/D59733

Link: https://github.com/ClangBuiltLinux/linux/issues/905

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21 16:33:39 +01:00
Stefan Agner
ee440336e5 ARM: 8990/1: use VFP assembler mnemonics in register load/store macros
The integrated assembler of Clang 10 and earlier do not allow to access
the VFP registers through the coprocessor load/store instructions:
<instantiation>:4:6: error: invalid operand for instruction
 LDC p11, cr0, [r10],#32*4 @ FLDMIAD r10!, {d0-d15}
     ^

This has been addressed with Clang 11 [0]. However, to support earlier
versions of Clang and for better readability use of VFP assembler
mnemonics still is preferred.

Replace the coprocessor load/store instructions with explicit assembler
mnemonics to accessing the floating point coprocessor registers. Use
assembler directives to select the appropriate FPU version.

This allows to build these macros with GNU assembler as well as with
Clang's built-in assembler.

[0] https://reviews.llvm.org/D59733

Link: https://github.com/ClangBuiltLinux/linux/issues/905

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21 16:33:38 +01:00
Stefan Agner
a6c30873ee ARM: 8989/1: use .fpu assembler directives instead of assembler arguments
Explicit FPU selection has been introduced in commit 1a6be26d5b
("[ARM] Enable VFP to be built when non-VFP capable CPUs are selected")
to make use of assembler mnemonics for VFP instructions.

However, clang currently does not support passing assembler flags
like this and errors out with:
clang-10: error: the clang compiler does not support '-Wa,-mfpu=softvfp+vfp'

Make use of the .fpu assembler directives to select the floating point
hardware selectively. Also use the new unified assembler language
mnemonics. This allows to build these procedures with Clang.

Link: https://github.com/ClangBuiltLinux/linux/issues/762

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21 16:33:37 +01:00
Linus Walleij
2631781213 ARM: 8982/1: mm: Simplify act_mm macro
The act_mm assembly macro is actually partly reimplementing
get_thread_info so let's just use that.

Suggested-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21 16:33:36 +01:00
Masahiro Yamada
846484ea73 ARM: 8981/1: add arch/arm/Kbuild
Use the standard obj-y form to specify the sub-directories under
arch/arm/. No functional change intended.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21 16:33:35 +01:00
Ard Biesheuvel
5c6360ee4a ARM: 8988/1: mmu: fix crash in EFI calls due to p4d typo in create_mapping_late()
Commit

  84e6ffb2c4 ("arm: add support for folded p4d page tables")

updated create_mapping_late() to take folded P4Ds into account when
creating mappings, but inverted the p4d_alloc() failure test, resulting
in no mapping to be created at all.

When the EFI rtc driver subsequently tries to invoke the EFI GetTime()
service, the memory regions covering the EFI data structures are missing
from the page tables, resulting in a crash like

  Unable to handle kernel paging request at virtual address 5ae0cf28
  pgd = (ptrval)
  [5ae0cf28] *pgd=80000040205003, *pmd=00000000
  Internal error: Oops: 207 [#1] SMP THUMB2
  Modules linked in:
  CPU: 0 PID: 7 Comm: kworker/u32:0 Not tainted 5.7.0+ #92
  Hardware name: QEMU KVM Virtual Machine, BIOS 0.0.0 02/06/2015
  Workqueue: efi_rts_wq efi_call_rts
  PC is at efi_call_rts+0x94/0x294
  LR is at efi_call_rts+0x83/0x294
  pc : [<c0b4f098>]    lr : [<c0b4f087>]    psr: 30000033
  sp : e6219ef0  ip : 00000000  fp : ffffe000
  r10: 00000000  r9 : 00000000  r8 : 30000013
  r7 : e6201dd0  r6 : e6201ddc  r5 : 00000000  r4 : c181f264
  r3 : 5ae0cf10  r2 : 00000001  r1 : e6201dd0  r0 : e6201ddc
  Flags: nzCV  IRQs on  FIQs on  Mode SVC_32  ISA Thumb  Segment none
  Control: 70c5383d  Table: 661cc840  DAC: 00000001
  Process kworker/u32:0 (pid: 7, stack limit = 0x(ptrval))
  ...
  [<c0b4f098>] (efi_call_rts) from [<c0448219>] (process_one_work+0x16d/0x3d8)
  [<c0448219>] (process_one_work) from [<c0448581>] (worker_thread+0xfd/0x408)
  [<c0448581>] (worker_thread) from [<c044ca7b>] (kthread+0x103/0x104)
  ...

Fixes: 84e6ffb2c4 ("arm: add support for folded p4d page tables")
Reviewed-by: Mike Rapoport <rppt@linux.ibm.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21 16:32:56 +01:00
Jaedon Shin
4405bdf3c5 ARM: 8987/1: VDSO: Fix incorrect clock_gettime64
__vdso_*() should be removed and fallback used if CNTCVT is not
available by cntvct_functional(). __vdso_clock_gettime64 when added
previous commit is using the incorrect CNTCVT value in that state.
__vdso_clock_gettime64 is also added to remove it's symbol.

Cc: stable@vger.kernel.org
Fixes: 74d06efb9c ("ARM: 8932/1: Add clock_gettime64 entry point")
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Robin Murphy <robin.mruphy@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21 16:32:55 +01:00
Will Deacon
eec13b42d4 ARM: 8986/1: hw_breakpoint: Don't invoke overflow handler on uaccess watchpoints
Unprivileged memory accesses generated by the so-called "translated"
instructions (e.g. LDRT) in kernel mode can cause user watchpoints to fire
unexpectedly. In such cases, the hw_breakpoint logic will invoke the user
overflow handler which will typically raise a SIGTRAP back to the current
task. This is futile when returning back to the kernel because (a) the
signal won't have been delivered and (b) userspace can't handle the thing
anyway.

Avoid invoking the user overflow handler for watchpoints triggered by
kernel uaccess routines, and instead single-step over the faulting
instruction as we would if no overflow handler had been installed.

Cc: <stable@vger.kernel.org>
Fixes: f81ef4a920 ("ARM: 6356/1: hw-breakpoint: add ARM backend for the hw-breakpoint framework")
Reported-by: Luis Machado <luis.machado@linaro.org>
Tested-by: Luis Machado <luis.machado@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21 16:32:54 +01:00
Alexander A. Klimov
fb01eb3651 ARM: davinci: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
[nsekhar@ti.com: drop obsolete hawkboard.org URL completeley
		 fixup subject line prefix]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2020-07-21 20:21:33 +05:30
Linus Walleij
15d157e874 usb: ohci-omap: Convert to use GPIO descriptors
The OMAP1 OHCI driver is using the legacy GPIO API to grab some
random GPIO lines. One is from the TPS65010 chip and used for
power, another one is for overcurrent and while the driver picks
this line it doesn't watch it at all.

Convert the driver and the OMAP1 OSK board file to pass these
two GPIOs as machine described GPIO descriptors.

I noticed the overcurrent GPIO line is not really used in the
code so dropped in a little comment for other developers.

Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200720135524.100374-2-linus.walleij@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-21 13:42:37 +02:00
Will Deacon
002dff36ac asm/rwonce: Don't pull <asm/barrier.h> into 'asm-generic/rwonce.h'
Now that 'smp_read_barrier_depends()' has gone the way of the Norwegian
Blue, drop the inclusion of <asm/barrier.h> in 'asm-generic/rwonce.h'.

This requires fixups to some architecture vdso headers which were
previously relying on 'asm/barrier.h' coming in via 'linux/compiler.h'.

Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Will Deacon <will@kernel.org>
2020-07-21 10:50:36 +01:00
Amelie Delaunay
d9b6b5150f ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkx
Now that USB OTG driver supports usb role switch by overriding PHY input
signals (A-Valid, B-Valid and Vbus-Valid), enable it on stm32mp15xx-dkx.
dr_mode needn't to be forced to Peripheral anymore, it is set to OTG in
SoC device tree.
USB role (USB_ROLE_NONE, USB_ROLE_DEVICE, USB_ROLE_HOST) will be provided
by STUSB1600 Type-C controller driver.

This patch depends on "Add STUSB160x Type-C port controller support"
series, which is under review.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 10:53:17 +02:00
Benjamin Gaignard
a656ae15e9 ARM: dts: stm32: Add compatibles for syscon for stm32mp151
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 10:39:11 +02:00
Benjamin Gaignard
1f96adbb72 ARM: dts: stm32: Add compatibles for syscon for stm32h743
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 10:39:11 +02:00
Benjamin Gaignard
ae2268696f ARM: dts: stm32: Add compatibles for syscon for stm32f746
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 10:39:11 +02:00
Benjamin Gaignard
133e6acfae ARM: dts: stm32: Add compatibles for syscon for stm32f426
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 10:39:11 +02:00
Patrick Delaunay
4fe663890a ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl
Move spi4_pins_a nodes from pinctrl_z to pinctrl as the associated pins
are not in BANK Z.

Fixes: 498a701498 ("ARM: dts: stm32: Add missing pinctrl entries for STM32MP15")

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 10:31:07 +02:00
Fabrice Gasnier
164c10aed9 ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkx
Configure I2C5 on stm32mp15 DK boards. It's available and can be used on:
- Arduino connector
- GPIO expansion connector
Keep it disabled by default, so the pins are kept in their initial state to
lower power consumption. This way they can also be used as GPIO.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 10:11:48 +02:00
Erwan Le Ray
c622308f8a ARM: dts: stm32: add usart2 node to stm32mp157c-dk2
Adds the usart2 node to stm32mp157c-dk2 board. usart2 pins are connected
to Bluetooth component. usart2 is disabled by default.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 09:54:19 +02:00
Erwan Le Ray
f74c7be7ce ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boards
Adds uart7 node to stm32mp15xx-dkx and uart7 alias to stm32mp157a-dk1 and
stm32mp157c-dk2 boards. uart7 pins are connected to Arduino connector.
uart7 is disabled by default.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 09:54:19 +02:00
Erwan Le Ray
afc0666d03 ARM: dts: stm32: add usart3 node to stm32mp157c-ev1
Adds the usart3 node to stm32mp157c-ev1 board. usart3 pins are connected to
GPIO Expansion connector. usart3 is disabled by default.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 09:54:19 +02:00
Erwan Le Ray
ec84790896 ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boards
Adds usart3 node to stm32mp15xx-dkx and usart3 alias to stm32mp157a-dk1
and stm32mp157c-dk2 boards. usart3 pins are connected to GPIO Expansion
connector. usart3 is disabled by default.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 09:54:19 +02:00
Erwan Le Ray
842ed898a7 ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl
Adds usart2_pins_c, usart3_pins_b, usart3_pins_c and uart7_pins_c pins
configurations in stm32mp15-pinctrl.
- usart2_pins_c pins are connected to Bluetooth chip on dk2 board.
- usart3_pins_b pins are connected to GPIO expansion connector on evx board.
- usart3_pins_c pins are connected to GPIO expansion connector on dkx board.
- uart7_pins_c pins are connected to Arduino Uno connector on dkx board.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 09:54:19 +02:00
Patrick Delaunay
a6d1a6328b ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrl
Use tabs where possible and remove multiple blanks lines.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 09:13:24 +02:00
Arnd Bergmann
85bd5af6cb A bunch of patches to generally make sunxi_defconfig more helpful and
add all the new drivers merged recently.
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Merge tag 'sunxi-config-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfig

A bunch of patches to generally make sunxi_defconfig more helpful and
add all the new drivers merged recently.

* tag 'sunxi-config-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: configs: sunxi: Enable crypto related options
  ARM: sunxi: configs: Enable the Mailbox driver
  ARM: configs: sunxi: Enable the PS/2 controller
  ARM: configs: sunxi: Enable Lima
  ARM: configs: sunxi: Add DRM output-related options
  ARM: configs: sunxi: Enable ASoC options
  ARM: configs: sunxi: Enable Cedrus
  ARM: configs: sunxi: Enable the deinterlace and rotation engines
  ARM: configs: sunxi: Enable the CSI drivers
  ARM: configs: sunxi: Run savedefconfig

Link: https://lore.kernel.org/r/c74e64c9-f1f2-40ee-b4cd-c1430d32cf8d.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-20 17:21:59 +02:00
Arnd Bergmann
5aa988ae21 ARM: tegra: Default configuration changes for v5.9-rc1
Enables a few new configuration options that are useful on the new Nexus
 7 and Acer A500 devices, as well as the userspace CPU frequency governor
 that's mainly used for testing.
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Merge tag 'tegra-for-5.9-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig

ARM: tegra: Default configuration changes for v5.9-rc1

Enables a few new configuration options that are useful on the new Nexus
7 and Acer A500 devices, as well as the userspace CPU frequency governor
that's mainly used for testing.

* tag 'tegra-for-5.9-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500
  ARM: tegra: Enable CPUFREQ userspace governor

Link: https://lore.kernel.org/r/20200717161300.1661002-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-20 17:16:51 +02:00
Alexander A. Klimov
f37b5d3aef ARM: dts: exynos: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-20 16:43:28 +02:00
Alexander A. Klimov
3ecdf2a5d2 ARM: s3c24xx: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-20 16:42:28 +02:00
Chen-Yu Tsai
e4dae01bf0
ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages
The Bananapi M2+ uses a GPIO line to change the effective resistance of
the CPU supply regulator's feedback resistor network. The voltages
described in the device tree were given directly by the vendor. This
turns out to be slightly off compared to the real values.

The updated voltages are based on calculations of the feedback resistor
network, and verified down to three decimal places with a multi-meter.

Fixes: 6eeb4180d4 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-4-wens@kernel.org
2020-07-20 15:29:38 +02:00
Chen-Yu Tsai
55b271af76
ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores
The device tree currently only assigns the a supply for the first CPU
core, when in reality the regulator supply is shared by all four cores.
This might cause an issue if the implementation does not realize the
sharing of the supply.

Assign the same regulator supply to the remaining CPU cores to address
this.

Fixes: 6eeb4180d4 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-3-wens@kernel.org
2020-07-20 15:28:51 +02:00
Chen-Yu Tsai
82e935721f
ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores
The device tree currently only assigns the a supply for the first CPU
core, when in reality the regulator supply is shared by all four cores.
This might cause an issue if the implementation does not realize the
sharing of the supply.

Assign the same regulator supply to the remaining CPU cores to address
this.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-2-wens@kernel.org
2020-07-20 15:28:31 +02:00
Alexandre Belloni
7dbf4bbf1c ARM: dts: at91: sama5d3_xplained: change phy-mode
Since commit bcf3440c6d ("net: phy: micrel: add phy-mode support for the
KSZ9031 PHY"), networking is broken on sama5d3 xplained.

The device tree has phy-mode = "rgmii" and this worked before, because
KSZ9031 PHY started with default RGMII internal delays configuration (TX
off, RX on 1.2 ns) and MAC provided TX delay. After above commit, the
KSZ9031 PHY starts handling phy mode properly and disables RX delay, as
result networking is become broken.

Fix it by switching to phy-mode = "rgmii-rxid" to reflect previous
behavior.

Fixes: bcf3440c6d ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200717233644.841080-1-alexandre.belloni@bootlin.com
2020-07-20 11:15:35 +02:00
Linus Walleij
537b91180d ARM: dts: ux500-skomer: Correct accel mounting matrix
This corrects the mounting matrix for the BMA254
accelerometer to what makes PostmarketOS actually
orient the screen the right way on this device.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200719201603.3610389-1-linus.walleij@linaro.org
2020-07-20 10:47:27 +02:00
Marek Szyprowski
9ff416cf45 ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 family
Commit 1019fe2c72 ("ARM: dts: exynos: Adjust bus related OPPs to the
values correct for Exynos5422 Odroids") changed the parameters of the
OPPs for the FSYS bus. Besides the frequency adjustments, it also removed
the 'shared-opp' property from the OPP table used for FSYS_APB and FSYS
busses.

This revealed that in fact the FSYS bus frequency scaling never worked.
When one OPP table is marked as 'opp-shared', only the first bus which
selects the OPP sets the rate of its clock. Then OPP core assumes that
the other busses have been changed to that OPP and no change to their
clock rates are needed. Thus when FSYS_APB bus, which was registered
first, set the rate for its clock, the OPP core did not change the FSYS
bus clock later.

The mentioned commit removed that behavior, what introduced a regression
on some Odroid XU3 boards. Frequency scaling of the FSYS bus causes
instability of the USB host operation, what can be observed as network
hangs. To restore old behavior, simply disable frequency scaling for the
FSYS bus.

Reported-by: Willy Wolff <willy.mh.wolff.ml@gmail.com>
Fixes: 1019fe2c72 ("ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-20 09:59:04 +02:00
Joel Stanley
0ce0581e6d ARM: dts: aspeed: tacoma: Fix gpio-key definitions
This patch was applied twice.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20 14:28:21 +09:30
Andrew Jeffery
1daa0147f1 ARM: dts: rainier: Configure ball Y23 as GPIOP7 for MCLR_VPP
GPIOP7 is used in the Rainier design to manage the state of a
microcontroller elsewhere in the system but its ball, Y23, is the
driver of the heartbeat LED on the ast2600-evb and the SoC defaults Y23
at power-on to the pulse-train behaviour used to drive the LED. This
causes much confusion for the micro in the Rainier system, so hog the
line as early as possible.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20 14:28:19 +09:30
Eddie James
1b36c0d0eb ARM: dts: aspeed: rainier: Add second cfam on the hub
The hub FSI master can access the cfams on two other processors. Reflect
this by adding a second cfam to the first hub description.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Tested-by: Andrew Geissler  <geissonator@yahoo.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20 14:28:16 +09:30
Ben Tyner
080f88e840 ARM: dts: aspeed: rainier: Add line-name checkstop
Rainier uses GPIO B6 as the checkstop GPIO. Define the line-name
so that this GPIO can be found by name.

Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20 14:28:14 +09:30
Ben Tyner
fafc991c88 ARM: dts: aspeed: tacoma: Remove checkstop gpio-key
The attention handler will monitor the checkstop gpio via the character
device interface so it needs to not be defined.

Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20 14:28:12 +09:30
Eddie James
965e0e26d6 ARM: dts: aspeed: tacoma: Enable XDMA engine
Add a reserved memory node for the VGA memory. Add the XDMA engine node,
enable it, and point it's memory region to the VGA memory.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20 14:28:10 +09:30
Eddie James
67268c28cc ARM: dts: aspeed: witherspoon: Enable XDMA engine
Add a reserved memory node for the VGA memory. Add the XDMA engine node,
enable it, and point it's memory region to the VGA memory.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20 14:28:08 +09:30
Eddie James
645afe73f9 ARM: dts: aspeed: ast2600: Update XDMA engine node
Add the PCI-E root complex reset, correct the pcie-device property, and
add the Aspeed SCU interrupt controller include.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20 14:28:06 +09:30
Eddie James
b3e10b5e40 ARM: dts: aspeed: ast2500: Update XDMA engine node
Correct the pcie-device property, and add the Aspeed SCU interrupt
controller include.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20 14:28:02 +09:30
Michael Trimarchi
4a601da92c ARM: dts: imx6qdl-icore: Fix OTG_ID pin and sdcard detect
The current pin muxing scheme muxes GPIO_1 pad for USB_OTG_ID
because of which when card is inserted, usb otg is enumerated
and the card is never detected.

[   64.492645] cfg80211: failed to load regulatory.db
[   64.492657] imx-sdma 20ec000.sdma: external firmware not found, using ROM firmware
[   76.343711] ci_hdrc ci_hdrc.0: EHCI Host Controller
[   76.349742] ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 2
[   76.388862] ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
[   76.396650] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.08
[   76.405412] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[   76.412763] usb usb2: Product: EHCI Host Controller
[   76.417666] usb usb2: Manufacturer: Linux 5.8.0-rc1-next-20200618 ehci_hcd
[   76.424623] usb usb2: SerialNumber: ci_hdrc.0
[   76.431755] hub 2-0:1.0: USB hub found
[   76.435862] hub 2-0:1.0: 1 port detected

The TRM mentions GPIO_1 pad should be muxed/assigned for card detect
and ENET_RX_ER pad for USB_OTG_ID for proper operation.

This patch fixes pin muxing as per TRM and is tested on a
i.Core 1.5 MX6 DL SOM.

[   22.449165] mmc0: host does not support reading read-only switch, assuming write-enable
[   22.459992] mmc0: new high speed SDHC card at address 0001
[   22.469725] mmcblk0: mmc0:0001 EB1QT 29.8 GiB
[   22.478856]  mmcblk0: p1 p2

Fixes: 6df11287f7 ("ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support")
Cc: stable@vger.kernel.org
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20 11:26:16 +08:00
Chris Healy
983467bef4 ARM: dts: vf610-zii-ssmb-spu3: Add node for switch watchdog
Add I2C child node for switch watchdog present on SPU3

Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20 11:21:05 +08:00
Chris Healy
2b4bd73493 ARM: dts: vf610-zii-ssmb-dtu: Add no-sdio/no-sd properties
esdhc0 is connected to an eMMC, so it is safe to pass the "no-sdio"/"no-sd"
properties.

esdhc1 is wired to a standard SD socket, so pass the "no-sdio" property.

Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20 11:17:23 +08:00
Fabio Estevam
d36f260718 ARM: dts: imx6sx-sabreauto: Fix the phy-mode on fec2
Commit 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode") fixed the
phy-mode for fec1, but missed to fix it for the fec2 node.

Fix fec2 to also use "rgmii-id" as the phy-mode.

Cc: <stable@vger.kernel.org>
Fixes: 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20 10:24:35 +08:00
Fabio Estevam
c696afd331 ARM: dts: imx6sx-sdb: Fix the phy-mode on fec2
Commit 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode") fixed the
phy-mode for fec1, but missed to fix it for the fec2 node.

Fix fec2 to also use "rgmii-id" as the phy-mode.

Cc: <stable@vger.kernel.org>
Fixes: 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20 10:24:22 +08:00
Fabio Estevam
198cf42cd8 ARM: dts: imx6q-tbs2910: Pass reset-assert-us
According to the AR8035 datasheet:

"When using crystal, the clock is generated internally after power is
stable. For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms
requirement is satisfied."

Pass the 'reset-assert-us' property to describe such requirement.

While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20 10:22:12 +08:00
Fabio Estevam
9c852ad98f ARM: dts: imx6q-tbs2910: Add an mdio node
imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4.

The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.

Improve the Ethernet representation by adding an mdio node with such
information.

This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now
expects the 'qca,clk-out-frequency' property to be passed via
device tree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Tested-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20 10:21:38 +08:00
Fabio Estevam
cfe7d1bd11 ARM: dts: imx6qdl-sabresd: Pass reset-assert-us
According to the AR8031 datasheet:

"When using crystal, clock is generated internally after the power is
stable. In order to get reliable power-on-reset, it is recommended to
keep asserting the reset low signal long enough (10 ms) to ensure the
clock is stable and clock-to-reset (1 ms) requirement is satisfied."

Pass the 'reset-assert-us' property to describe such requirement.

While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20 10:19:30 +08:00
Fabio Estevam
91ea910809 ARM: dts: imx6qdl-sabresd: Add an mdio node
imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.

The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.

Improve the Ethernet representation by adding an mdio node with such
information.

An advantage of adding the mdio node is that the AR8031 initialization
code in the mx6sabresd board file in U-Boot can totally be removed.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20 10:19:08 +08:00
Tim Harvey
64bf0a0af1 ARM: dts: imx6qdl-gw: add Gateworks System Controller support
Add Gateworks System Controller support to Gateworks Ventana boards:
- add dt bindings for GSC mfd driver and hwmon driver for ADC's and
  fan controllers.
- add dt bindings for gpio-keys driver for push-button and interrupt events

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20 09:47:29 +08:00
Christoph Hellwig
2f9237d4f6 dma-mapping: make support for dma ops optional
Avoid the overhead of the dma ops support for tiny builds that only
use the direct mapping.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2020-07-19 09:29:23 +02:00
Dinh Nguyen
812f550116 ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit
Add the Maxim max1619 temp sensor that is on the Arria10 devkit.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2020-07-18 20:12:07 -05:00
Dinh Nguyen
0ef91ccdbf arm: dts: socfpga: add reset-names to spi node
Add reset-names = "spi" to spi dts nodes.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2020-07-18 20:12:07 -05:00
Daniel González Cabanelas
43bf202545 ARM: dts: dlink-dns327l: fix reg-init PHY
The marvell PHY reg-init registers for the D-Link DNS-327L are wrong.
Currently the first field is used to set the page 2, but this is
pointless. The usage is not correct, and we are setting the wrong
registers.

Fix it.

Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-07-18 22:57:06 +02:00
Andy Shevchenko
01b5e34518 ARM: orion/gpio: Make use of for_each_requested_gpio()
Make use of for_each_requested_gpio() instead of home grown analogue.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Gregory Clement <gregory.clement@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-07-18 22:49:23 +02:00
Alexander A. Klimov
947c6ce5ea ARM: dts: kirkwood: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-07-18 22:39:13 +02:00
Michael Trimarchi
719646b76a ARM: dts: rockchip: Fix VBUS on rk3288-vyasa
Connect the voltage regulator of vbus to the otg connector.
Depending on the current mode this is enabled (in "host" mode")
or disabled (in "peripheral" mode). The regulator must be updated
if the controller is configured in "otg" mode and the status changes
between "host" and "peripheral".

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200707101214.2301768-1-michael@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-18 17:13:43 +02:00
Jagan Teki
afd9eb8804 ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.

VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.

So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-8-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-18 17:06:13 +02:00
Jagan Teki
b8c564d4fa ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.

Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet
- HDMI, MIPI-DSI/CSI, eDP

Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-7-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-18 17:06:13 +02:00
Jagan Teki
a66bd94d0e arm64: dts: rk3399pro: vmarc-som: Move common properties into Carrier
Some of gmac, sdmmc node properties are common across rk3288 and
rk3399pro SOM's so move them into Carrier dtsi.

Chosen node is specific to rk3399pro configure SBC, so move it into
RockPI N10 dts.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-5-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-18 17:06:13 +02:00
Jagan Teki
4a3ca113c0 arm64: dts: rk3399pro: vmarc-som: Move supply regulators into Carrier
Supply regulators are common across different variants of vmarc SOM's
since the Type C power controller IC is part of the carrier board.

So, move the supply regulators into carrier board dtsi.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-4-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-18 17:06:13 +02:00
Jagan Teki
c2f343510d ARM: dts: rockchip: dalang-carrier: Move i2c nodes into SOM
I2C nodes and associated slave devices defined in Carrier board
are specific to rk3399pro vmrac SOM.

So, move them into SOM dtsi.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-2-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-18 17:06:12 +02:00
Sugar Zhang
fb082df317 ARM: dts: rockchip: Add 'arm,pl330-periph-burst' for dmac
This patch Add the quirk to specify to use burst transfer
for better compatible and higher performance.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

Link: https://lore.kernel.org/r/1593439866-68459-1-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-18 16:38:25 +02:00
Alexander A. Klimov
f3a49f1784 ARM: at91: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200713065859.31770-1-grandmaster@al2klimov.de
2020-07-18 00:59:26 +02:00
yu kuai
f87a4f022c ARM: at91: pm: add missing put_device() call in at91_pm_sram_init()
if of_find_device_by_node() succeed, at91_pm_sram_init() doesn't have
a corresponding put_device(). Thus add a jump target to fix the exception
handling for this function implementation.

Fixes: d2e4679055 ("ARM: at91: pm: use the mmio-sram pool to access SRAM")
Signed-off-by: yu kuai <yukuai3@huawei.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200604123301.3905837-1-yukuai3@huawei.com
2020-07-18 00:58:07 +02:00
Linus Torvalds
630c183b2d ARM: SoC fixes for v5.8
This time there are a number of actual code fixes, plus
 a small set of device tree issues getting addressed:
 
   - Renesas:
     - one defconfig cleanup to allow a later Kconfig change
 
   - Intel socfpga:
     - enable QSPI devices on some machines
     - fix DTC validation warnings
 
   - TI OMAP:
     - Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
       driver
 
     - A regression fix for ti-sysc no-idle handling that caused issues
       compared to earlier platform data based booting
 
     - A fix for memory leak for omap_hwmod_allocate_module
 
     - Fix d_can driver probe for am437x
 
   - NXP i.MX
     - A couple of fixes on i.MX platform device registration code to stop
       the use of invalid IRQ 0.
     - Fix a regression seen on ls1021a platform, caused by commit
       52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
     - Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
 
   - Amlogic Meson
     - misc DT fixes
     - SoC ID fixes to detect all chips correctly
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into master

Pull ARM SoC fixes from Arnd Bergmann:
 "This time there are a number of actual code fixes, plus a small set of
  device tree issues getting addressed:

  Renesas:

    - one defconfig cleanup to allow a later Kconfig change

  Intel socfpga:

    - enable QSPI devices on some machines

    - fix DTC validation warnings

  TI OMAP:

    - Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target
      module driver

    - A regression fix for ti-sysc no-idle handling that caused issues
      compared to earlier platform data based booting

    - A fix for memory leak for omap_hwmod_allocate_module

    - Fix d_can driver probe for am437x

  NXP i.MX:

    - A couple of fixes on i.MX platform device registration code to
      stop the use of invalid IRQ 0.

    - Fix a regression seen on ls1021a platform, caused by commit
      52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").

    - Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.

  Amlogic Meson:

    - misc DT fixes

    - SoC ID fixes to detect all chips correctly"

* tag 'arm-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
  ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
  arm64: dts: stratix10: increase QSPI reg address in nand dts file
  arm64: dts: stratix10: add status to qspi dts node
  arm64: dts: agilex: add status to qspi dts node
  ARM: dts: Fix dcan driver probe failed on am437x platform
  ARM: OMAP2+: Fix possible memory leak in omap_hwmod_allocate_module
  arm64: defconfig: Enable CONFIG_PCIE_RCAR_HOST
  soc: imx: check ls1021a
  ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
  ARM: imx: Provide correct number of resources when registering gpio devices
  ARM: dts: imx6qdl-gw551x: fix audio SSI
  bus: ti-sysc: Do not disable on suspend for no-idle
  bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirk
  bus: ti-sysc: Fix wakeirq sleeping function called from invalid context
  ARM: dts: meson: Align L2 cache-controller nodename with dtschema
  arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
  arm64: dts: meson: add missing gxl rng clock
  soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's
2020-07-17 15:38:22 -07:00
Arnd Bergmann
3502e079c6 ARM: tegra: Device tree changes for v5.9-rc1
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
 A500. In addition there are a slew of fixes to existing device trees in
 preparation for validating the DTBs against json-schema.
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Merge tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

ARM: tegra: Device tree changes for v5.9-rc1

This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.

* tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (38 commits)
  ARM: tegra: Add device-tree for ASUS Google Nexus 7
  ARM: tegra: Add device-tree for Acer Iconia Tab A500
  ARM: tegra: Add HDMI supplies on Nyan boards
  ARM: tegra: Add missing DSI controller on Tegra30
  ARM: tegra: Add i2c-bus subnode for DPAUX controllers
  ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
  ARM: tegra: The Tegra30 DC is not backwards-compatible
  ARM: tegra: Remove spurious comma from node name
  ARM: tegra: Add parent clock to DSI output
  ARM: tegra: Use standard names for SRAM nodes
  ARM: tegra: seaboard: Use standard battery bindings
  ARM: tegra: Use standard names for LED nodes
  ARM: tegra: Use numeric unit-addresses
  ARM: tegra: medcom-wide: Remove extra panel power supply
  ARM: tegra: Use proper unit-addresses for OPPs
  ARM: tegra: Add missing clock-names for SDHCI controllers
  ARM: tegra: Fix order of XUSB controller clocks
  ARM: tegra: Add #reset-cells to Tegra124 memory controller
  ARM: tegra: Add missing panel power supplies
  ARM: tegra: Add micro-USB A/B port on Jetson TK1
  ...

Link: https://lore.kernel.org/r/20200717161300.1661002-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-17 20:03:49 +02:00
Arnd Bergmann
a0660529ac ARM: dts: amlogic updates for v5.9
- power-domain and MMC updates
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Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

ARM: dts: amlogic updates for v5.9
- power-domain and MMC updates

* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson8b: odroidc1: enable the SDHC controller
  ARM: dts: meson8b: ec100: enable the SDHC controller
  ARM: dts: meson: add the SDHC MMC controller
  ARM: dts: meson8b: add power domain controller
  ARM: dts: meson8m2: add resets for the power domain controller
  ARM: dts: meson8: add power domain controller

Link: https://lore.kernel.org/r/7hd04uf2o8.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-17 19:57:04 +02:00
Arnd Bergmann
2648298a06 arm/arm64: dts: socfpga: fixes for v5.8
- Add status = "okay" in QSPI
 - Increase QSPI size in reg property
 - Fix dtschema for SoCFPGA platforms
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Merge tag 'socfpga_fixes_for_v5.8_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes

arm/arm64: dts: socfpga: fixes for v5.8
- Add status = "okay" in QSPI
- Increase QSPI size in reg property
- Fix dtschema for SoCFPGA platforms

* tag 'socfpga_fixes_for_v5.8_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
  ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
  arm64: dts: stratix10: increase QSPI reg address in nand dts file
  arm64: dts: stratix10: add status to qspi dts node
  arm64: dts: agilex: add status to qspi dts node

Link: https://lore.kernel.org/r/20200717155758.18233-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-17 18:01:41 +02:00
Paul Schulz
62e7df65ca ARM: rpc: Change blacklist to quirklist in ecode.c file
This is a functionally trivial patch which removes the word
'blacklist' (and variations) from this code and replaces it
with 'quirklist'

It has no other effect.

Link: https://lore.kernel.org/r/20200715024755.967904-1-paul@mawsonlakes.org
Signed-off-by: Paul Schulz <paul@mawsonlakes.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-17 16:08:48 +02:00
Arnd Bergmann
2c2a5564d1 Renesas ARM DT updates for v5.9 (take two)
- SPI Multi I/O Bus Controller (RPC-IF) support for R-Car V3H and V3M,
     including QSPI support for the Condor, Eagle, V3HSK, and V3MSK
     boards,
   - Initial support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
     board,
   - Initial support for the Beacon EmbeddedWorks RZ/G2M board,
   - Minor fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.9-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.9 (take two)

  - SPI Multi I/O Bus Controller (RPC-IF) support for R-Car V3H and V3M,
    including QSPI support for the Condor, Eagle, V3HSK, and V3MSK
    boards,
  - Initial support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
    board,
  - Initial support for the Beacon EmbeddedWorks RZ/G2M board,
  - Minor fixes and improvements.

* tag 'renesas-arm-dt-for-v5.9-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
  ARM: dts: sh73a0: Add missing clocks to sound node
  arm64: dts: renesas: r8a774e1: Add CAN[FD] support
  arm64: dts: renesas: r8a774e1: Add RWDT node
  arm64: dts: renesas: r8a774e1: Add MSIOF nodes
  arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
  arm64: dts: renesas: r8a774e1: Add SDHI nodes
  arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
  arm64: dts: renesas: r8a774e1: Add TMU device nodes
  arm64: dts: renesas: r8a774e1: Add CMT device nodes
  arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
  arm64: dts: renesas: r8a774e1: Add operating points
  arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
  arm64: dts: renesas: r8a774e1: Add Ethernet AVB node
  arm64: dts: renesas: r8a774e1: Add GPIO device nodes
  arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes
  arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
  ARM: dts: gose: Fix ports node name for adv7612
  ARM: dts: renesas: Fix SD Card/eMMC interface device node names
  arm64: dts: renesas: Fix SD Card/eMMC interface device node names
  arm64: dts: renesas: add full-pwr-cycle-in-suspend into eMMC nodes
  ...

Link: https://lore.kernel.org/r/20200717112427.26032-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-17 15:36:24 +02:00
Geert Uytterhoeven
8aa937cb4a ARM: dts: sh73a0: Add missing clocks to sound node
The device node for the FIFO-buffered Serial Interface sound node lacks
the "clocks" property, as the DTS file didn't describe any clocks yet at
its introduction.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200519075525.24742-1-geert+renesas@glider.be
2020-07-17 10:58:24 +02:00
Niklas Söderlund
59692ac5a7 ARM: dts: gose: Fix ports node name for adv7612
When adding the adv7612 device node the ports node was misspelled as
port, fix this.

Fixes: bc63cd87f3 ("ARM: dts: gose: add HDMI input")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200713111016.523189-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-17 10:58:23 +02:00
Yoshihiro Shimoda
d8293670ae ARM: dts: renesas: Fix SD Card/eMMC interface device node names
Fix the device node names as "mmc@".

Fixes: 6647469792 ("ARM: dts: r7s72100: add sdhi to device tree")
Fixes: a49f76cdda ("ARM: dts: r7s9210: Add SDHI support")
Fixes: 43304a5f51 ("ARM: shmobile: r8a73a4: tidyup DT node naming")
Fixes: 7d907894bf ("ARM: shmobile: r8a7740: tidyup DT node naming")
Fixes: 3ab2ea5fd1 ("ARM: dts: r8a7742: Add SDHI nodes")
Fixes: 63ce8a617b ("ARM: dts: r8a7743: Add SDHI controllers")
Fixes: b591e323b2 ("ARM: dts: r8a7744: Add SDHI nodes")
Fixes: d83010f87a ("ARM: dts: r8a7744: Initial SoC device tree")
Fixes: 7079131ef9 ("ARM: dts: r8a7745: Add SDHI controllers")
Fixes: 0485da7880 ("ARM: dts: r8a77470: Add SDHI1 support")
Fixes: 15aa5a95e8 ("ARM: dts: r8a77470: Add SDHI0 support")
Fixes: f068cc8160 ("ARM: dts: r8a77470: Add SDHI2 support")
Fixes: 14e1d9147d ("ARM: shmobile: r8a7778: tidyup DT node naming")
Fixes: 2624705ceb ("ARM: shmobile: r8a7779: tidyup DT node naming")
Fixes: b718aa4483 ("ARM: shmobile: r8a7790: tidyup DT node naming")
Fixes: b7ed8a0dd4 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI")
Fixes: ce01b14ecf ("ARM: dts: r8a7792: add SDHI support")
Fixes: fc9ee228f5 ("ARM: dts: r8a7793: Add SDHI controllers")
Fixes: b8e8ea127d ("ARM: shmobile: r8a7794: add SDHI DT support")
Fixes: 33f6be3bf6 ("ARM: shmobile: sh73a0: tidyup DT node naming")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-17 10:58:23 +02:00
Enric Balletbo i Serra
67c70aa86f arm/arm64: defconfig: Update configs to use the new CROS_EC options
We refactored the CrOS EC drivers moving part of the code from the MFD
subsystem to the platform chrome subsystem. During this change we needed
to rename some config options, so, update the defconfigs accordingly.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-17 08:57:02 +02:00
Krzysztof Kozlowski
5720fcdc2e ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-07-17 10:09:21 +08:00
Arnd Bergmann
0e9aa96859 More dts changes for omaps for v5.9
A series of changes to configure IPU and DSP remoteproc for omap4 & 5.
 And a change to configure the default mux for am335x-pocketbeagle, and
 a change to use https for external links.
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Merge tag 'omap-for-v5.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

More dts changes for omaps for v5.9

A series of changes to configure IPU and DSP remoteproc for omap4 & 5.
And a change to configure the default mux for am335x-pocketbeagle, and
a change to use https for external links.

* tag 'omap-for-v5.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT
  ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP
  ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP
  ARM: dts: omap5-uevm: Add system timers to DSP and IPU
  ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP
  ARM: dts: omap5: Add aliases for rproc nodes
  ARM: dts: omap5: Add DSP and IPU nodes
  ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
  ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP
  ARM: dts: omap4: Add aliases for rproc nodes
  ARM: dts: omap4: Add IPU DT node
  ARM: dts: omap4: Update the DSP node
  ARM: dts: omap5: Add timer_sys_ck clocks for timers
  ARM: dts: omap4: Add timer_sys_ck clocks for timers
  ARM: dts: am335x-pocketbeagle: set default mux for gpio pins

Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-16 22:36:35 +02:00
Arnd Bergmann
32ed5880ae Drop more legacy platform data for omaps for v5.9
A series of changes to drop remaining USB platform data for omap4/5,
 and am4, and dra7.
 
 And a patch to drop AES platform data for omap3.
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Merge tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Drop more legacy platform data for omaps for v5.9

A series of changes to drop remaining USB platform data for omap4/5,
and am4, and dra7.

And a patch to drop AES platform data for omap3.

* tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Drop legacy platform data for omap5 usb host
  ARM: OMAP2+: Drop legacy platform data for omap4 usb
  ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
  ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
  ARM: OMAP2+: Drop legacy platform data for am4 dwc3
  bus: ti-sysc: Add missing quirk flags for usb_host_hs
  ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2

Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-16 22:13:54 +02:00
Arnd Bergmann
fb4ae31614 SoC changes for omaps for v5.9 merge window
Just one commit to use https for the external links.
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Merge tag 'omap-for-v5.9/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

SoC changes for omaps for v5.9 merge window

Just one commit to use https for the external links.

* tag 'omap-for-v5.9/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP: Replace HTTP links with HTTPS ones

Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-16 22:12:23 +02:00
Arnd Bergmann
b041ef0e58 Fixes for omaps for v5.8-rc cycle
Few fixes for issues noticed during testing:
 
 - Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
   driver
 
 - A regression fix for ti-sysc no-idle handling that caused issues
   compared to earlier platform data based booting
 
 - A fix for memory leak for omap_hwmod_allocate_module
 
 - Fix d_can driver probe for am437x
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Merge tag 'omap-for-v5.8/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.8-rc cycle

Few fixes for issues noticed during testing:

- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
  driver

- A regression fix for ti-sysc no-idle handling that caused issues
  compared to earlier platform data based booting

- A fix for memory leak for omap_hwmod_allocate_module

- Fix d_can driver probe for am437x

* tag 'omap-for-v5.8/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Fix dcan driver probe failed on am437x platform
  ARM: OMAP2+: Fix possible memory leak in omap_hwmod_allocate_module
  bus: ti-sysc: Do not disable on suspend for no-idle
  bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirk
  bus: ti-sysc: Fix wakeirq sleeping function called from invalid context

Link: https://lore.kernel.org/r/pull-1594840100-132735@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-16 22:08:22 +02:00
Arnd Bergmann
d943a9c83e i.MX fixes for 5.8, round 2:
- A couple of fixes on i.MX platform device registration code to stop
   the use of invalid IRQ 0.
 - Fix a regression seen on ls1021a platform, caused by commit
   52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
 - Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
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Merge tag 'imx-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.8, round 2:

- A couple of fixes on i.MX platform device registration code to stop
  the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
  52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.

* tag 'imx-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: check ls1021a
  ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
  ARM: imx: Provide correct number of resources when registering gpio devices
  ARM: dts: imx6qdl-gw551x: fix audio SSI

Link: https://lore.kernel.org/r/20200714145649.GP15718@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-16 22:08:07 +02:00
Arnd Bergmann
c07e902a51 Amlogic fixes for v5.8-rc
- misc DT fixes, and SoC ID fixes
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Merge tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/fixes

Amlogic fixes for v5.8-rc
- misc DT fixes, and SoC ID fixes

* tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson: Align L2 cache-controller nodename with dtschema
  arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
  arm64: dts: meson: add missing gxl rng clock
  soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's

Link: https://lore.kernel.org/r/7hk0zc1ujc.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-16 22:07:48 +02:00
Kees Cook
3f649ab728 treewide: Remove uninitialized_var() usage
Using uninitialized_var() is dangerous as it papers over real bugs[1]
(or can in the future), and suppresses unrelated compiler warnings
(e.g. "unused variable"). If the compiler thinks it is uninitialized,
either simply initialize the variable or make compiler changes.

In preparation for removing[2] the[3] macro[4], remove all remaining
needless uses with the following script:

git grep '\buninitialized_var\b' | cut -d: -f1 | sort -u | \
	xargs perl -pi -e \
		's/\buninitialized_var\(([^\)]+)\)/\1/g;
		 s:\s*/\* (GCC be quiet|to make compiler happy) \*/$::g;'

drivers/video/fbdev/riva/riva_hw.c was manually tweaked to avoid
pathological white-space.

No outstanding warnings were found building allmodconfig with GCC 9.3.0
for x86_64, i386, arm64, arm, powerpc, powerpc64le, s390x, mips, sparc64,
alpha, and m68k.

[1] https://lore.kernel.org/lkml/20200603174714.192027-1-glider@google.com/
[2] https://lore.kernel.org/lkml/CA+55aFw+Vbj0i=1TGqCR5vQkCzWJ0QxK6CernOU6eedsudAixw@mail.gmail.com/
[3] https://lore.kernel.org/lkml/CA+55aFwgbgqhbp1fkxvRKEpzyR5J8n1vKT1VZdz9knmPuXhOeg@mail.gmail.com/
[4] https://lore.kernel.org/lkml/CA+55aFz2500WfbKXAx8s67wrm9=yVJu65TpLgN_ybYNv0VEOKA@mail.gmail.com/

Reviewed-by: Leon Romanovsky <leonro@mellanox.com> # drivers/infiniband and mlx4/mlx5
Acked-by: Jason Gunthorpe <jgg@mellanox.com> # IB
Acked-by: Kalle Valo <kvalo@codeaurora.org> # wireless drivers
Reviewed-by: Chao Yu <yuchao0@huawei.com> # erofs
Signed-off-by: Kees Cook <keescook@chromium.org>
2020-07-16 12:35:15 -07:00
Dmitry Osipenko
3a3cb021b0 ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500
Enable several very useful options and drivers for hardware that is found
on Nexus 7 and Acer A500 tablet devices. Please note that some drivers may
require firmware files extracted from original Android image.

Link: https://github.com/grate-driver/linux-firmware
Link: https://github.com/grate-driver/alsa-ucm-conf
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-16 14:22:41 +02:00
Dmitry Osipenko
2720008f42 ARM: tegra: Add device-tree for ASUS Google Nexus 7
There are few hardware variants of NVIDIA Tegra30-based Nexus 7 device:

1. WiFi-only (named Grouper)
2. GSM (named Tilapia)
3. Using Maxim PMIC (E1565 board ID)
4. Using Ti PMIC (PM269 board ID)

This patch adds device-trees for known and tested variants.

Link: https://wiki.postmarketos.org/wiki/Google_Nexus_7_2012_(asus-grouper)
Tested-by: Pedro Ângelo <pangelo@void.io>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Tested-by: Zack Pearsall <zpearsall@yahoo.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-16 14:21:31 +02:00
Dmitry Osipenko
674b5102e3 ARM: tegra: Add device-tree for Acer Iconia Tab A500
Add device-tree for Acer Iconia Tab A500, which is NVIDIA Tegra20-based
tablet device.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-16 14:20:45 +02:00
Niklas Söderlund
0acc7a6396 ARM: dts: renesas: Remove unused remote property from adv7180 nodes
The remote property is never read by the driver, remove it.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200704155856.3037010-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-16 10:21:47 +02:00
Niklas Söderlund
d344234abd ARM: dts: gose: Fix ports node name for adv7180
When adding the adv7180 device node the ports node was misspelled as
port, fix this.

Fixes: 8cae359049 ("ARM: dts: gose: add composite video input")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200704155856.3037010-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-16 10:21:47 +02:00
Krzysztof Kozlowski
d7adfe5ffe ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache@fffff000: $nodename:0:
        'l2-cache@fffff000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Fixes: 475dc86d08 ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2020-07-15 14:13:00 -05:00
Thierry Reding
bd26938b40 ARM: tegra: Add HDMI supplies on Nyan boards
The SOR controller needs the AVDD I/O and VDD HDMI PLL supplies in order
to operate correctly. Make sure to specify them for Nyan boards.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15 11:56:00 +02:00
Thierry Reding
7ee1e9feff ARM: tegra: Add missing DSI controller on Tegra30
Tegra30 has a DSI controller, although it is never used on any of the
devices supported by the upstream Linux kernel.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15 11:55:58 +02:00
Thierry Reding
cb26dc7ba8 ARM: tegra: Add i2c-bus subnode for DPAUX controllers
The DPAUX controller device tree bindings require the bus to have an
i2c-bus subnode to distinguish between I2C clients and pinmux groups.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15 11:55:56 +02:00
Tony Lindgren
cca3f3e6f9 ARM: OMAP2+: Drop legacy platform data for omap5 usb host
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-14 08:41:18 -07:00
Tony Lindgren
509b1377eb ARM: OMAP2+: Drop legacy platform data for omap4 usb
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-14 08:41:18 -07:00
Tony Lindgren
c7b72abca6 ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-14 08:41:18 -07:00
Tony Lindgren
0db53013cd ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-14 08:41:18 -07:00
dillon min
2a4117df9b ARM: dts: Fix dcan driver probe failed on am437x platform
Got following d_can probe errors with kernel 5.8-rc1 on am437x

[   10.730822] CAN device driver interface
Starting Wait for Network to be Configured...
[  OK  ] Reached target Network.
[   10.787363] c_can_platform 481cc000.can: probe failed
[   10.792484] c_can_platform: probe of 481cc000.can failed with error -2
[   10.799457] c_can_platform 481d0000.can: probe failed
[   10.804617] c_can_platform: probe of 481d0000.can failed with error -2

actually, Tony has fixed this issue on am335x with the patch [3]

Since am437x has the same clock structure with am335x
[1][2], so reuse the code from Tony Lindgren's patch [3] to fix it.

[1]: https://www.ti.com/lit/pdf/spruh73 Chapter-23, Figure 23-1. DCAN
     Integration
[2]: https://www.ti.com/lit/pdf/spruhl7 Chapter-25, Figure 25-1. DCAN
     Integration
[3]: commit 516f1117d0 ("ARM: dts: Configure osc clock for d_can on
     am335x")

Fixes: 1a5cd7c23c ("bus: ti-sysc: Enable all clocks directly during init to read revision")
Signed-off-by: dillon min <dillon.minfei@gmail.com>
[tony@atomide.com: aligned commit message a bit for readability]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-14 08:03:28 -07:00
Chen Tao
a18fb07623 ARM: OMAP2+: Fix possible memory leak in omap_hwmod_allocate_module
Fix memory leak in omap_hwmod_allocate_module not freeing in
handling error path.

Fixes: 8c87970543b17("ARM: OMAP2+: Add functions to allocate module data from device tree")
Signed-off-by: Chen Tao <chentao107@huawei.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
[tony@atomide.com: fix call iounmap for missing regs]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-14 08:03:05 -07:00
Jon Hunter
5384e0019d ARM: tegra: Enable CPUFREQ userspace governor
Enable the CPUFREQ userspace governor in the tegra_defconfig so that
we can test CPUFREQ with the userspace governor with this configuration
on 32-bit Tegra devices.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-14 10:28:02 +02:00
Linus Torvalds
e9919e11e2 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull input fixes from Dmitry Torokhov:
 "A few quirks for the Elan touchpad driver, another Thinkpad is being
  switched over from PS/2 to native RMI4 interface, and we gave a brand
  new SW_MACHINE_COVER switch definition"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
  Input: elan_i2c - add more hardware ID for Lenovo laptops
  Input: i8042 - add Lenovo XiaoXin Air 12 to i8042 nomux list
  Revert "Input: elants_i2c - report resolution information for touch major"
  Input: elan_i2c - only increment wakeup count on touch
  Input: synaptics - enable InterTouch for ThinkPad X1E 1st gen
  ARM: dts: n900: remove mmc1 card detect gpio
  Input: add `SW_MACHINE_COVER`
2020-07-13 18:31:15 -07:00
Martin Blumenstingl
d6a3873c7b ARM: dts: meson8b: odroidc1: enable the SDHC controller
Odroid-C1 has an eMMC connector where users can optionally install an
eMMC module. The eMMC modules run off a 1.8V VQMMC supply which means
that HS-200 mode can be used (this is the highest mode that the SDHC
controller supports). Enable the SDHC controller so eMMC modules can be
accessed.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-4-martin.blumenstingl@googlemail.com
2020-07-13 11:58:15 -07:00
Martin Blumenstingl
73501b890a ARM: dts: meson8b: ec100: enable the SDHC controller
EC-100 has built-in eMMC flash which is hard-wired to 3.3V VCC (which
means it's limited to high-speed MMC modes). Enable the SDHC controller
to access the contents of the eMMC flash.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-3-martin.blumenstingl@googlemail.com
2020-07-13 11:58:15 -07:00
Martin Blumenstingl
73106f75bf ARM: dts: meson: add the SDHC MMC controller
Meson6, Meson8, Meson8b and Meson8m2 are using a similar SDHC controller
IP which typically connects to an eMMC chip (because unlike the SDIO
controller the SDHC controller has an 8-bit bus interface).

On Meson8, Meson8b and Meson8m2 the clock inputs are all the same.
However, Meson8m2 seems to have an improved version of the SHDC
controller IP which doesn't require the driver to wait manually for a
flush of a DMA transfer. Thus every SoC has it's own compatible string
so if more difference are discovered they can be implemented.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-2-martin.blumenstingl@googlemail.com
2020-07-13 11:58:15 -07:00
Martin Blumenstingl
9960cacbae ARM: dts: meson8b: add power domain controller
The Meson8b SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-4-martin.blumenstingl@googlemail.com
2020-07-13 11:56:23 -07:00
Martin Blumenstingl
c5d3d3cf00 ARM: dts: meson8m2: add resets for the power domain controller
The Meson8m2 SoCs has introduced additional reset lines for the VPU
compared to Meson8. Also it uses a slightly different VPU clock
frequency compared to Meson8 since it can now achieve 364MHz thanks to
the addition of the GP_PLL.
Add the reset lines, VPU clock configuration and update the compatible
string so the implementation differences can be managed.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-3-martin.blumenstingl@googlemail.com
2020-07-13 11:56:23 -07:00
Martin Blumenstingl
aecc72b14d ARM: dts: meson8: add power domain controller
The Meson8 SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-2-martin.blumenstingl@googlemail.com
2020-07-13 11:56:23 -07:00
Alexander A. Klimov
e9dbebaf9b ARM: OMAP: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:37:54 -07:00
Alexander A. Klimov
75f66813e0 Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:25:29 -07:00
Suman Anna
e94828c17c ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP
The watchdog timers have been added for the IPU and DSP remoteproc
devices for the OMAP5 uEVM board. The following timers (same as the
timers on OMAP4 Panda boards) are used as the watchdog timers,
        DSP : GPT6
        IPU : GPT9 & GPT11 (one for each Cortex-M4 core)

The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.

These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:44 -07:00
Suman Anna
f1c4a33fb8 ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP
The watchdog timers have been added for the IPU and DSP remoteproc
devices on all the OMAP4-based Panda boards. The following timers
are used as the watchdog timers,
	DSP : GPT6
	IPU : GPT9 & GPT11 (one for each Cortex-M3 core)

The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.

These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:43 -07:00
Suman Anna
f0954943a3 ARM: dts: omap5-uevm: Add system timers to DSP and IPU
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices for the OMAP5 uEVM boards. The following timers
(same as the timers on OMAP4 Panda boards) are chosen:
        IPU : GPT3 (SMP-mode)
        DSP : GPT5

IPU has two Cortex-M4 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.

The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:42 -07:00
Suman Anna
1e48754f2c ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on the OMAP5 uEVM board. These nodes are assigned
to the respective rproc device nodes, and both the IPU and DSP remote
processors are enabled for this board.

The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.

An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:42 -07:00
Suman Anna
e8661220e1 ARM: dts: omap5: Add aliases for rproc nodes
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP5 boards. The aliases uses
the stem "rproc", and are identical to the values
chosen on OMAP4 boards.

The aliases can be overridden, if needed, in the
respective board files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:41 -07:00
Suman Anna
3026ce4749 ARM: dts: omap5: Add DSP and IPU nodes
OMAP5, like OMAP4, also has two remote processor subsystems,
DSP and IPU. The IPU subsystem though has dual Cortex-M4
processors instead of the dual Cortex-M3 processors in OMAP4,
but otherwise has almost the same set of features. Add the
DT nodes for these two processor sub-systems for all OMAP5
SoCs.

The nodes have the 'iommus', 'clocks', 'resets', 'firmware' and
'mboxes' properties added, and are disabled for now. The IPU node
has its L2 RAM memory specified through the 'reg' and 'reg-names'
properties. The DSP node doesn't have these since it doesn't have
any L2 RAM memories, but has an additional 'ti,bootreg' property
instead as it has a specific boot register that needs to be
programmed for booting.

These nodes should be enabled as per the individual product
configuration in the corresponding board dts files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:41 -07:00
Suman Anna
7f7d771c00 ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. The
following DMTimers are chosen:
	IPU : GPT3 (SMP-mode)
	DSP : GPT5

IPU has two Cortex-M3 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.

The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:40 -07:00
Suman Anna
b4778e787f ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. These nodes
are assigned to the respective rproc device nodes, and both the
IPU and DSP remote processors are enabled for all these boards.

The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.

An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:39 -07:00
Suman Anna
691eb1805f ARM: dts: omap4: Add aliases for rproc nodes
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP4 boards. The aliases uses
the stem "rproc".

The aliases can be overridden, if needed, in the
respective board files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:39 -07:00
Suman Anna
5ce170cdaa ARM: dts: omap4: Add IPU DT node
The DT node for the Dual-Cortex M3 IPU processor sub-system has
been added for OMAP4 SoCs. The L2RAM memory region information
has been added to the node through the 'reg' and 'reg-names'
properties. The node has the 'iommus', 'clocks', 'resets',
'mboxes' and 'firmware' properties also added, and is disabled
for now. It should be enabled as per the individual product
configuration in the corresponding board dts files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:38 -07:00
Suman Anna
9ae60ac13f ARM: dts: omap4: Update the DSP node
The compatible property for the DSP node is updated to match
the OMAP remoteproc bindings. The node is moved from the soc
node to the ocp node to better reflect the connectivity from
MPU side.

The node is updated with the 'ti,bootreg', 'clocks', 'resets',
'iommus', 'mboxes' and 'firmware' properties. Note that the
node does not have any 'reg' or 'reg-names' properties since
it doesn't have any L2 RAM memory, but only Unicaches.

The node is disabled for now, and should be enabled as per
the individual product configuration in the corresponding
board dts files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:37 -07:00
Suman Anna
52ddb6d914 ARM: dts: omap5: Add timer_sys_ck clocks for timers
The commit d41e530409 ("clk: ti: omap5: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes except for the always-on timers 1 and 12.

This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:37 -07:00
Suman Anna
214ec0319e ARM: dts: omap4: Add timer_sys_ck clocks for timers
The commit 1c7de9f27a ("clk: ti: omap4: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes.

This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:36 -07:00
Drew Fustini
abe4e4675d ARM: dts: am335x-pocketbeagle: set default mux for gpio pins
These pins on the PocketBeagle P1 and P2 headers are connected to AM3358
balls with gpio lines, and these pins are not used for any other
peripherals by default. These GPIO lines are unclaimed and could be used
by userspace program through the gpiod ABI.

This patch adds a "default" state in the am33xx_pinmux node and sets the
mux for those pins to gpio (mode 7) and input enable.

The "pinctrl-single,bias-pullup" and "pinctrl-single,bias-pulldown"
pinconf properties are also set for each pin per the ball reset state in
section 4.2 of the datasheet [0].

This is the AM335x pin control register format in Table 9-60 [1]:

 bit     attribute      value
----------------------------------
31-7     reserved       0 on reset
   6     slew           { 0: fast, 1: slow }
   5     rx_active      { 0: rx disable, 1: rx enabled }
   4     pu_typesel     { 0: pulldown select, 1: pullup select }
   3     puden          { 0: pud enable, 1: disabled }
   2     mode           3 bits to selec mode 0 to 7
   1     mode
   0     mode

The values for the bias pinconf properties are derived as follows:

pinctrl-single,bias-pullup   = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pullup   = <  0x10      0x10      0x10   0x18 >;

          2^5    2^4    2^3    2^2    2^1    2^0  |
         0x20   0x10   0x08   0x04   0x02   0x01  |
--------------------------------------------------|
input       x      1      0     x      x      x   | 0x10
enabled     x      1      0     x      x      x   | 0x10
disabled    x      0      0     x      x      x   | 0x00
mask        x      1      1     x      x      x   | 0x18

pinctrl-single,bias-pulldown = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pulldown = <   0x0       0x0      0x10   0x18 >;

          2^5    2^4    2^3    2^2    2^1    2^0  |
         0x20   0x10   0x08   0x04   0x02   0x01  |
--------------------------------------------------|
input       x      0      0     x      x      x   | 0x00
enabled     x      0      0     x      x      x   | 0x00
disabled    x      1      0     x      x      x   | 0x10
mask        x      1      1     x      x      x   | 0x18

[0] http://www.ti.com/lit/ds/symlink/am3358.pdf
[1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf

Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:08:04 -07:00
Linus Walleij
8cdcd8aeee
spi: imx/fsl-lpspi: Convert to GPIO descriptors
This converts the two Freescale i.MX SPI drivers
Freescale i.MX (CONFIG_SPI_IMX) and Freescale i.MX LPSPI
(CONFIG_SPI_FSL_LPSPI) to use GPIO descriptors handled in
the SPI core for GPIO chip selects whether defined in
the device tree or a board file.

The reason why both are converted at the same time is
that they were both using the same platform data and
platform device population helpers when using
board files intertwining the code so this gives a cleaner
cut.

The platform device creation was passing a platform data
container from each boardfile down to the driver using
struct spi_imx_master from <linux/platform_data/spi-imx.h>,
but this was only conveying the number of chipselects and
an int * array of the chipselect GPIO numbers.

The imx27 and imx31 platforms had code passing the
now-unused platform data when creating the platform devices,
this has been repurposed to pass around GPIO descriptor
tables. The platform data struct that was just passing an
array of integers and number of chip selects for the GPIO
lines has been removed.

The number of chipselects used to be passed from the board
file, because this number also limits the number of native
chipselects that the platform can use. To deal with this we
just augment the i.MX (CONFIG_SPI_IMX) driver to support 3
chipselects if the platform does not define "num-cs" as a
device property (such as from the device tree). This covers
all the legacy boards as these use <= 3 native chip selects
(or GPIO lines, and in that case the number of chip selects
is determined by the core from the number of available
GPIO lines). Any new boards should use device tree, so
this is a reasonable simplification to cover all old
boards.

The LPSPI driver never assigned the number of chipselects
and thus always fall back to the core default of 1 chip
select if no GPIOs are defined in the device tree.

The Freescale i.MX driver was already partly utilizing
the SPI core to obtain the GPIO numbers from the device tree,
so this completes the transtion to let the core handle all
of it.

All board files and the core i.MX boardfile registration
code is augmented to account for these changes.

This has been compile-tested with the imx_v4_v5_defconfig
and the imx_v6_v7_defconfig.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Robin Gong <yibin.gong@nxp.com>
Cc: Trent Piepho <tpiepho@impinj.com>
Cc: Clark Wang <xiaoning.wang@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Link: https://lore.kernel.org/r/20200625200252.207614-1-linus.walleij@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-13 18:27:06 +01:00
Tony Lindgren
3c881456b6 ARM: OMAP2+: Drop legacy platform data for am4 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

[tony@atomide.com: fixed typo for am3 vs am4]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 09:59:48 -07:00
Arnd Bergmann
42027dfe59 This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.9 please pull the following:
 
 - Rafal specifies the switch ports for various Luxul devices (XAP-1410,
   XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)
 
 - Krzysztof fixes the L2 cache controller node name to conform to
   dtschema
 
 - Maxime introduces two new clock providers for Raspberry Pi 4, one to
   support firmware based clocks and another one for the DVP block
   feeding into the two HDMI blocks.
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Merge tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.9 please pull the following:

- Rafal specifies the switch ports for various Luxul devices (XAP-1410,
  XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)

- Krzysztof fixes the L2 cache controller node name to conform to
  dtschema

- Maxime introduces two new clock providers for Raspberry Pi 4, one to
  support firmware based clocks and another one for the DVP block
  feeding into the two HDMI blocks.

* tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcm: Align L2 cache-controller nodename with dtschema
  ARM: dts: BCM5301X: Specify switch ports for Luxul devices
  ARM: dts: bcm2711: Add HDMI DVP
  ARM: dts: bcm2711: Add firmware clocks node

Link: https://lore.kernel.org/r/20200707045759.17562-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13 15:23:07 +02:00
Arnd Bergmann
67b2563855 Device tree changes for omaps for v5.9 merge window
This series of changes configures the GPIO line names for am335x beaglebone
 black and pocketbeagle to make it easier to configure the pins. To make use
 of the pins, we also add the gpio-ranges for am335x.
 
 We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then
 there are two non-urgent dtschema validator warning fixes.
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Merge tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Device tree changes for omaps for v5.9 merge window

This series of changes configures the GPIO line names for am335x beaglebone
black and pocketbeagle to make it easier to configure the pins. To make use
of the pins, we also add the gpio-ranges for am335x.

We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then
there are two non-urgent dtschema validator warning fixes.

* tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x-pocketbeagle: add gpio-line-names
  ARM: dts: am335x-boneblack: add gpio-line-names
  ARM: dts: am33xx-l4: add gpio-ranges
  ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxes
  ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocs
  ARM: dts: am: Align L2 cache-controller nodename with dtschema
  ARM: dts: omap: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/pull-1594402929-762188@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13 15:08:43 +02:00
Arnd Bergmann
056a7ecf47 UniPhier ARM SoC DT updates for v5.9
- add missing interrupts property to support card serial
 
 - fix node names to follow the DT schema
 
 - add PCIe endpoint and PHY nodes for Pro5 SoC
 
 - simplify device hierarchy of support-card.dtsi
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Merge tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt

UniPhier ARM SoC DT updates for v5.9

- add missing interrupts property to support card serial

- fix node names to follow the DT schema

- add PCIe endpoint and PHY nodes for Pro5 SoC

- simplify device hierarchy of support-card.dtsi

* tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  ARM: dts: uniphier: simplify support-card node structure
  ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5
  ARM: dts: uniphier: Rename ethphy node to ethernet-phy
  ARM: dts: uniphier: give fixed port number to support card serial
  ARM: dts: uniphier: rename support card serial node to fix schema warning
  ARM: dts: uniphier: add interrupts to support card serial

Link: https://lore.kernel.org/r/CAK7LNARGDcCKxV3-H7WmuZAVe49n0QF+672-KN0tsP0och0a_A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13 15:00:36 +02:00
Parthiban Nallathambi
f9ecf10cb8 ARM: dts: imx6ull: add MYiR MYS-6ULX SBC
Add support for the MYiR imx6ULL based single board computer
equipped with on board 256MB NAND & RAM. The board also
provides expansion header for expansion board, but this
commit adds only support for SBC.

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Chris Healy
93e881e1f1 ARM: dts: vf610-zii-spb4: Add node for switch watchdog
Add I2C child node for switch watchdog present on SPB4

Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Philippe Schenker
c68a1c9253 ARM: dts: colibri-imx6: remove pinctrl-names orphan
This is not necessary without a pinctrl-0 statement. Remove this
orphan.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Uwe Kleine-König
fa28d8212e ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files
The imx-pwm driver supports 3 cells and this is the more flexible setting.
So use it by default and overwrite it back to two for the files that
reference the PWMs with just 2 cells to minimize changes.

This allows to drop explicit setting to 3 cells for the boards that already
depend on this. The boards that are now using 2 cells explicitly can be
converted to 3 individually.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Andrew Lunn
5c73d9acd1 ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseX
The SFF soldered onto the board expect the ports to use 1000BaseX.  It
makes no sense to have the ports set to SGMII, since they don't even
support that mode.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Chris Healy
bcf9d46729 ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseX
The SFF soldered onto the board expects the port to use 1000BaseX.  It
makes no sense to have the port set to SGMII, since it doesn't even
support that mode.

Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Chris Healy
b955387667 ARM: dts: ZII: update MDIO speed and preamble
Update MDIO configuration with ZII devices to fully utilize
MDIO endpoint capabilities.  All devices support 12.5MHz clock and
don't require MDIO preable.

Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Andrey Smirnov
493e873368 ARM: dts: vfxxx: Add node for CAAM
Add node for CAAM device in NXP Vybrid SoC.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Richard Zhu
d4650bd53f ARM: dts: imx6qp-sabresd: enable sata
Enable SATA on iMX6QP SABRESD board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Richard Zhu
af3eaa4ab0 ARM: dts: imx6qp-sabreauto: enable sata
Enable SATA on iMX6QP SABREAUTO board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Oleksij Rempel
c90fdc5021 ARM: dts: add Protonic RVT board
Protonic RVT is an internal development platform for a wireless ISObus
Virtual Terminal based on COTS tablets, and the predecessor of the WD2
platform.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Oleksij Rempel
5a1dcf4a6b ARM: dts: add Protonic VT7 board
The Protonic VT7 is a mid-class ISObus Virtual Terminal with a 7 inch
touchscreen display.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Oleksij Rempel
88010b8174 ARM: dts: add Protonic WD2 board
Add support for the Protonic WD2 board, which is an internal development
platform for low-cost agricultural Virtual Terminals based on COTS tablets
and web applications.
It inherits from the PRTI6Q base class.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Oleksij Rempel
0d446a5055 ARM: dts: add Protonic PRTI6Q board
Protonic PRTI6Q is a development board and a base class for different
specific customer application boards based on the i.MX6 family of SoCs,
developed by Protonic Holland.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
7c2b325020 ARM: dts: imx6ul: Add ASRC device node
Add ASRC device node.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Krzysztof Kozlowski
69cc1502a8 ARM: dts: imx: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache@a02000: $nodename:0:
        'l2-cache@a02000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Krzysztof Kozlowski
954809fb53 ARM: dts: vf610: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache@40006000: $nodename:0:
        'l2-cache@40006000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
73691f21e2 ARM: dts: imx6sx-sdb: Add MQS support
Add MQS support. As the pin conflict with usdhc2, then need
to add a separate dts.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Biwen Li
22b6db7831 ARM: dts: ls1021a: add ftm_alarm0 DT node
The patch add ftm_alarm0 DT node
	- add rcpm node
	- add ftm_alarm0 node
	- aliases ftm_alarm0 as rtc1

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
a2e4a60de4 ARM: dts: imx6sx-sabreauto: Add cs42888 sound card support
Complete the ESAI node and Add cs42888 sound card support.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
9ef33df18c ARM: dts: imx6sx-sabreauto: Add SPDIF support
Add SPDIF support.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
903c0ef28b ARM: dts: imx6sx-sdb: Add SPDIF support
Add SPDIF support.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
c3a71ffb6d ARM: dts: imx6sx: Enable ASRC device
Add compatible string, update the clock table,
add fsl,asrc-rate and fsl,asrc-width property.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Ian Ray
8a915ec0c8 ARM: dts: imx53-ppd: alarm LEDs use kernel LED interface
Use kernel LED interface for the alarm LEDs.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Samu Nuutamo <samu.nuutamo@vincit.fi>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Shengjiu Wang
5da1b522cf ARM: dts: imx6sll: Make ssi node name same as other platforms
In imx6sll.dtsi, the ssi node name is different with other
platforms (imx6qdl, imx6sl, imx6sx), but the
sound/soc/fsl/fsl-asoc-card.c machine driver needs to check
ssi node name for audmux configuration, then different ssi
node name causes issue on imx6sll platform.

So we change ssi node name to make all platforms have same
name.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
a6d094403c ARM: dts: imx: Change usdhc node name on i.MX6/i.MX7 SoCs
Change i.MX6/i.MX7 SoCs usdhc node name from usdhc to mmc to be
compliant with yaml schema, it requires the nodename to be "mmc".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
7e4cd9d8f7 ARM: dts: imx: Change esdhc node name on i.MX2/i.MX3/i.MX5 SoCs
Change i.MX2/i.MX3/i.MX5 SoCs esdhc node name from esdhc to mmc to
be compliant with yaml schema, it requires the nodename to be "mmc".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
459ebbee05 ARM: dts: imx: Change sdhci node name on i.MX27/i.MX31 SoCs
Change i.MX27/i.MX31 node name from sdhci to mmc to be compliant
with yaml schema, it requires the nodename to be "mmc".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
c13168a565 ARM: dts: imx6qdl: Remove invalid interrupt for GPC node
In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved,
so remove it from GPC node.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
78b05005e2 ARM: dts: imx: change iim node name on i.MX SoCs
Change IIM node name from iim to efuse to be compliant
with yaml schema, it requires the nodename to be one of
"eeprom|efuse|nvram".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
17a2deb061 ARM: dts: imx: change ocotp node name on MXS SoCs
Change OCOTP node name from ocotp to efuse to be compliant
with yaml schema, it requires the nodename to be one of
"eeprom|efuse|nvram".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
a1abd6777f ARM: dts: imx: change ocotp node name on i.MX6/7 SoCs
Change OCOTP node name from ocotp-ctrl to efuse to be compliant with
yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Yangbo Lu
5656bb3857 ARM: dts: ls1021a: output PPS signal on FIPER2
The timer fixed interval period pulse generator register
is used to generate periodic pulses. The down count
register loads the value programmed in the fixed period
interval (FIPER). At every tick of the timer accumulator
overflow, the counter decrements by the value of
TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
counter value reaches zero. It reloads the down counter
in the cycle following a pulse.

To use the TMR_FIPER register to generate desired periodic
pulses. The value should programmed is,
desired_period - tclk_period

Current tmr-fiper2 value is to generate 100us periodic pulses.
(But the value should have been 99995, not 99990. The tclk_period is 5.)
This patch is to generate 1 second periodic pulses with value
999999995 programmed which is more desired by user.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
915e19686f ARM: dts: imx: Make tempmon node as child of anatop node
i.MX6/7 SoCs' temperature sensor is inside anatop module from HW
perspective, so it should be a child node of anatop.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Lee Jones
2f96126500 arch: arm: mach-omap2: mmc: Move omap_mmc_notify_cover_event() prototype
When building the kernel with W=1 the build system complains of:

 drivers/mmc/host/omap.c:854:6: warning: no previous prototype for ‘omap_mmc_notify_cover_event’ [-Wmissing-prototypes]
 854 | void omap_mmc_notify_cover_event(struct device *dev, int num, int is_closed)
 | ^~~~~~~~~~~~~~~~~~~~~~~~~~~

If we move the prototype into a shared headerfile the build system
will be satisfied.  Rather than create a whole new headerfile just
for this purpose, it makes sense to use the already existing
mmc-omap.h.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-mmc@vger.kernel.org
Cc: Tony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20200701102317.235032-1-lee.jones@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-07-13 12:18:26 +02:00
Peng Fan
250ce11ed7 ARM: imx_v6_v7_defconfig: Support i.MX8MM
i.MX8MM is built with AArch64 hardware, this is to support
it could run in Aarch32 mode with clock and pinctrl driver enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 16:44:10 +08:00
Bjorn Helgaas
f8951dce10 ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
No callers of imx_add_imx_dma() need an error IRQ, so they supply 0 as
"irq_err", which means we register a resource of IRQ 0, which is invalid
and causes a warning if used.

Remove the "irq_err" argument altogether so there's no chance of trying to
use the invalid IRQ 0.

Fixes: a85a6c86c2 ("driver core: platform: Clarify that IRQ 0 is invalid")
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: kernel@pengutronix.de
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 11:26:50 +08:00
Guenter Roeck
2a83544007 ARM: imx: Provide correct number of resources when registering gpio devices
Since commit a85a6c86c2 ("driver core: platform: Clarify that IRQ 0 is
invalid"), the kernel is a bit touchy when it encounters interrupt 0.
As a result, there are lots of warnings such as the following when booting
systems such as 'kzm'.

WARNING: CPU: 0 PID: 1 at drivers/base/platform.c:224 platform_get_irq_optional+0x118/0x128
0 is an invalid IRQ number
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.8.0-rc3 #1
Hardware name: Kyoto Microcomputer Co., Ltd. KZM-ARM11-01
[<c01127d4>] (unwind_backtrace) from [<c010c620>] (show_stack+0x10/0x14)
[<c010c620>] (show_stack) from [<c06f5f54>] (dump_stack+0xe8/0x120)
[<c06f5f54>] (dump_stack) from [<c0128878>] (__warn+0xe4/0x108)
[<c0128878>] (__warn) from [<c0128910>] (warn_slowpath_fmt+0x74/0xbc)
[<c0128910>] (warn_slowpath_fmt) from [<c08b8e84>] (platform_get_irq_optional+0x118/0x128)
[<c08b8e84>] (platform_get_irq_optional) from [<c08b8eb4>] (platform_irq_count+0x20/0x3c)
[<c08b8eb4>] (platform_irq_count) from [<c0728660>] (mxc_gpio_probe+0x8c/0x494)
[<c0728660>] (mxc_gpio_probe) from [<c08b93cc>] (platform_drv_probe+0x48/0x98)
[<c08b93cc>] (platform_drv_probe) from [<c08b703c>] (really_probe+0x214/0x344)
[<c08b703c>] (really_probe) from [<c08b7274>] (driver_probe_device+0x58/0xb4)
[<c08b7274>] (driver_probe_device) from [<c08b7478>] (device_driver_attach+0x58/0x60)
[<c08b7478>] (device_driver_attach) from [<c08b7504>] (__driver_attach+0x84/0xc0)
[<c08b7504>] (__driver_attach) from [<c08b50f8>] (bus_for_each_dev+0x78/0xb8)
[<c08b50f8>] (bus_for_each_dev) from [<c08b62cc>] (bus_add_driver+0x154/0x1e0)
[<c08b62cc>] (bus_add_driver) from [<c08b82b8>] (driver_register+0x74/0x108)
[<c08b82b8>] (driver_register) from [<c0102320>] (do_one_initcall+0x80/0x3b4)
[<c0102320>] (do_one_initcall) from [<c1501008>] (kernel_init_freeable+0x170/0x208)
[<c1501008>] (kernel_init_freeable) from [<c0e178d4>] (kernel_init+0x8/0x11c)
[<c0e178d4>] (kernel_init) from [<c0100134>] (ret_from_fork+0x14/0x20)

As it turns out, mxc_register_gpio() is a bit lax when setting the
number of resources: it registers a resource with interrupt 0 when in
reality there is no such interrupt. Fix the problem by not declaring
the second interrupt resource if there is no second interrupt.

Fixes: a85a6c86c2 ("driver core: platform: Clarify that IRQ 0 is invalid")
Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 11:01:28 +08:00
Alexandre Belloni
44f6fa431b ARM: dts: at91: sama5d2: add TCB GCLK
The sama5d2 tcbs take an extra input clock, their gclk.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200710230813.1005150-4-alexandre.belloni@bootlin.com
2020-07-11 18:57:03 +02:00
Tim Harvey
4237c62530 ARM: dts: imx6qdl-gw551x: fix audio SSI
The audio codec on the GW551x routes to ssi1.  It fixes audio capture on
the device.

Cc: stable@vger.kernel.org
Fixes: 3117e851ce ("ARM: dts: imx: Add TDA19971 HDMI Receiver to GW551x")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-11 22:31:30 +08:00
Peter Zijlstra
a634291588 arm: Break cyclic percpu include
In order to use <asm/percpu.h> in irqflags.h, we need to make sure
asm/percpu.h does not itself depend on irqflags.h.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lkml.kernel.org/r/20200623083721.454517573@infradead.org
2020-07-10 12:00:02 +02:00
Masahiro Yamada
781865604d ARM: dts: uniphier: simplify support-card node structure
This device hierarchy is needlessly complex.

Remove the support-card node level, and move the ethernet and serial
nodes right under the system-bus node.

This also fixes the following warning from 'make ARCH=arm dtbs_check':

  support-card@1,1f00000: $nodename:0: 'support-card@1,1f00000' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-10 17:13:20 +09:00
Kunihiko Hayashi
c60a5cee6e ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5
This adds PCIe endpoint controller and PHY nodes for Pro5 SoC,
and also adds pinctrl node for PCIe.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-10 10:31:44 +09:00