AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-28 11:18:45 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

ARM: dts: meson8b: add power domain controller

Browse Source 
The Meson8b SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-4-martin.blumenstingl@googlemail.com
This commit is contained in:
Martin Blumenstingl 2020-06-20 18:10:10 +02:00 committed by Kevin Hilman
parent c5d3d3cf00
commit 9960cacbae
1 changed files with 27 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
arch/arm/boot/dts/meson8b.dtsi
View File

@ -7,6 +7,7 @@
#include <dt-bindings/clock/meson8-ddr-clkc.h>
#include <dt-bindings/clock/meson8b-clkc.h>
#include <dt-bindings/gpio/meson8b-gpio.h>
#include <dt-bindings/power/meson8-power.h>
#include <dt-bindings/reset/amlogic,meson8b-reset.h>
#include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
#include "meson.dtsi"
@ -433,6 +434,8 @@ &ethmac {
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
power-domains = <&pwrc PWRC_MESON8_ETHERNET_MEM_ID>;
};
&gpio_intc {
@ -449,6 +452,30 @@ clkc: clock-controller {
#clock-cells = <1>;
#reset-cells = <1>;
};
pwrc: power-controller {
compatible = "amlogic,meson8b-pwrc";
#power-domain-cells = <1>;
amlogic,ao-sysctrl = <&pmu>;
resets = <&reset RESET_DBLK>,
<&reset RESET_PIC_DC>,
<&reset RESET_HDMI_APB>,
<&reset RESET_HDMI_SYSTEM_RESET>,
<&reset RESET_VENCI>,
<&reset RESET_VENCP>,
<&reset RESET_VDAC_4>,
<&reset RESET_VENCL>,
<&reset RESET_VIU>,
<&reset RESET_VENC>,
<&reset RESET_RDMA>;
reset-names = "dblk", "pic_dc", "hdmi_apb", "hdmi_system",
"venci", "vencp", "vdac", "vencl", "viu",
"venc", "rdma";
clocks = <&clkc CLKID_VPU>;
clock-names = "vpu";
assigned-clocks = <&clkc CLKID_VPU>;
assigned-clock-rates = <182142857>;
};
};
&hwrng {