BreadBee is an opensource development board based on the
MStar msc313(e) SoC.
Hardware details, schematics and so on can be found at:
https://github.com/breadbee/breadbee
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds a family level dtsi for the mercury5 and then a
chip level dtsi for the ssc8336n chip.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds two family level dtsis for the infinity and infinity3
and then adds a chip level dtsi each for a chip in those families.
infinity3.dtsi includes infinity.dtsi as these SoCs share most of
their memory map and we would have a lot of duplication otherwise.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Adds initial dtsi for the base MStar/Sigmastar Armv7 SoCs.
These SoCs have very similar memory maps and this will avoid
duplicating nodes across multiple dtsis.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Initial support for the MStar/Sigmastar Armv7 based IP camera
and dashcam SoCs.
These chips are interesting in that they contain a Cortex-A7,
peripherals and system memory in a single tiny QFN package that
can be hand soldered allowing almost anyone to embed Linux
in their projects.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the second EHCI controller on the AST2600. Also add a line-name
for the GPIO that controls power to the USB port.
The power control is in place to allow the port to be disabled, for
those that are worried about rogue USB sticks.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Enable the second EHCI controller on the AST2600. Also add a line-name
for the GPIO that controls power to the USB port.
The power control is in place to allow the port to be disabled, for
those that are worried about rogue USB sticks.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Rainier uses the P10 processor so the OCC binding should reflect that.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add the four SPI masters on each CFAM. Each master has four 128KB EEPROM
devices attached to it.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Adding pca9552 exposes the presence detect lines for the cards and
tca9554 exposes the presence details for the cards.
Signed-off-by: Jet Li <Jet.Li@ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Initial introduction of AMD EthanolX platform equipped with an
Aspeed ast2500 BMC manufactured by AMD.
AMD EthanolX platform is an AMD customer reference board with an
Aspeed ast2500 BMC manufactured by AMD.
This adds AMD EthanolX device tree file including the flash layout
used by EthanolX BMC machines.
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
We have a 4-bus mux whose output is selected by two GPIO inputs. Wire it
up in the devicetree and ensure the output is enabled by hogging the
appropriate line.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
dump_fpu() is used only on the architectures that support elf
and have neither CORE_DUMP_USE_REGSET nor ELF_CORE_COPY_FPREGS
defined.
Currently that's csky, m68k, microblaze, nds32 and unicore32. The rest
of the instances are dead code.
NB: THIS MUST GO AFTER ELF_FDPIC CONVERSION
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Since commit bcf3440c6d ("net: phy: micrel: add phy-mode support for the
KSZ9031 PHY") the networking is broken on keystone-k2g-evm board.
The above board have phy-mode = "rgmii-id" and it is worked before because
KSZ9031 PHY started with default RGMII internal delays configuration (TX
off, RX on 1.2 ns) and MAC provided TX delay by default.
After above commit, the KSZ9031 PHY starts handling phy mode properly and
enables both RX and TX delays, as result networking is become broken.
Fix it by switching to phy-mode = "rgmii-rxid" to reflect previous
behavior.
Fixes: bcf3440c6d ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
CAN_M_CAN_PLATFORM is needed to probe the driver on sama5 platforms
after the driver was split into multiple files.
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200723162434.1983643-3-codrin.ciubotariu@microchip.com
These modules are needed to configure bridges in Linux, to take full
advantage of the KSZ switch capabilities.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200723162434.1983643-2-codrin.ciubotariu@microchip.com
Enable DSA and KSZ9477 support as modules. Ethernet switches are used by
the SAMA5D2-ICP board.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200723162434.1983643-1-codrin.ciubotariu@microchip.com
- new board: WeTek Core2
- audio playback support on more boards
- add GPU DVFS
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl8bNuMACgkQWTcYmtP7
xmWmKw/+PAiU3PsHH8MPyN2hRQwK3MFG786Tw4A8lRhVSKZAR7u0vPRxTD1OTyt7
ikSH3RO1e1pYzcOF32frwI5nQ3lokcvaQNTY8UdqVmFdise8P8uLm9a9cXWx2YFa
JiznocTKlvPkQLoW6c1VTeQiUDCIIf448LhNg4yw6vSfdWvY0QubP+HawcSwyMOh
0cfXC4v3lqsx0u1OBCOnGWMN0LofPtpzYHv5WTRC1k5Zsc1O4W54mOwaR8qkE2Wt
gNFQbojaOwJgWY29loHFNoAUdgONIFHoHj8nta3ewaWn0zWvizDgpVDtP9JwxTE6
NhT6qa04K6BpbRpHjrXkLoLLT9uKZuSpPUhpwTKXuzuaGtUUrSN5owFpX/+R8wVf
Jl911zDfgkS6Fjt1QRxZcxYQKWqefGCd+fPFJrkGIvMATRoLmUE8b0HTIgbJTCsG
w3AJfZexwVvlnsXkv1jIsMSkgs+Tv5zRG8g7unqs/mYB8mVgeHiF/t1EIuxZri+x
vF8MwLbFg01pdDyUJV0MxL00bc/oKhRdaYMgtSPR1THWy0H+9LieO35dpFM9f5no
nidDvhgw3j9PJqEpZj5E69oisqSjESM7YK1xxGwPG9p9Faq/xNR0/RrAyXHzt44j
gvzY3aa44XwVWh3wFdCYD1QiKtpuvfTQp04Uoz+wf6eWt9a2nHU=
=ibOR
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: amlogic: updates for v5.9 (round 2)
- new board: WeTek Core2
- audio playback support on more boards
- add GPU DVFS
* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS
arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS
arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS
arm64: dts: meson: add support for the WeTek Core 2
dt-bindings: arm: amlogic: add support for the WeTek Core 2
arm64: dts: meson: add audio playback to khadas-vim3l
arm64: dts: meson: add audio playback to odroid-c4
arm64: dts: meson: update spifc node name on Khadas VIM3/VIM3L
ARM: dts: meson: Align L2 cache-controller nodename with dtschema
arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
arm64: dts: meson: add missing gxl rng clock
soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's
Link: https://lore.kernel.org/r/7h8sf8671u.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- DT change for Armada 38x allowing to add the register needed to fix
NETA lockup when repeatedly switching speed.
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXxqaPwAKCRALBhiOFHI7
1YANAKCEUNj0n91jslQNBACKuB7a79Ag3ACbB/hWOsGi+BVNlDy5mnXeoT5ZEd0=
=GJyb
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/fixes
mvebu fixes for 5.8 (part 1)
- DT change for Armada 38x allowing to add the register needed to fix
NETA lockup when repeatedly switching speed.
* tag 'mvebu-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
ARM: dts: armada-38x: fix NETA lockup when repeatedly switching speeds
Use of for_each_requested_gpio() for gpio driver still in plat-orion
for non DT platform.
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXxqe7QAKCRALBhiOFHI7
1TxKAJ4hJdhVQZ3ygdkMF9AwIRyMzUnQIwCcCYUXQ7XZ9yNXBj0DpqTZQM5PC0c=
=UP5s
-----END PGP SIGNATURE-----
Merge tag 'mvebu-arm-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/soc
mvebu arm for 5.9 (part 1)
Use of for_each_requested_gpio() for gpio driver still in plat-orion
for non DT platform.
* tag 'mvebu-arm-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
ARM: orion/gpio: Make use of for_each_requested_gpio()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix the reg-init PHY for the dlink-dns327l (Armada 370)
- Replace HTTP links with HTTPS one in device tree of the Excito
Bubba B3 (Kirkwood)
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXxqh0gAKCRALBhiOFHI7
1R9KAJ0TuEHE0boReOUAhpAlfYIqYeR5QQCfUuD/p2aoTSfNNyctLQsHmnjBYao=
=PzgE
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt for 5.9 (part 1)
- Fix the reg-init PHY for the dlink-dns327l (Armada 370)
- Replace HTTP links with HTTPS one in device tree of the Excito
Bubba B3 (Kirkwood)
* tag 'mvebu-dt-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
ARM: dts: dlink-dns327l: fix reg-init PHY
ARM: dts: kirkwood: Replace HTTP links with HTTPS ones
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
To support the change in "phy: armada-38x: fix NETA lockup when
repeatedly switching speeds" we need to update the DT with the
additional register.
Fixes: 14dc100b44 ("phy: armada38x: add common phy support")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Enable pwm_tacho device for fan control and monitoring in Wedge40.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Enable ADC controller and corresponding voltage sensoring channels for
Wedge40.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Disable i2c bus #9, #10 and #13 as these i2c controllers are not used on
Wedge40.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Create all the i2c switches in device tree and use aliases to assign
child channels with consistent bus numbers.
Besides, "i2c-mux-idle-disconnect" is set for all the i2c switches to
avoid potential conflicts when multiple devices (beind the switches)
use the same device address.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The GPIO on Q0 is used for resetting the CFAM of the processor that the
ASPEED master is connected to.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The GPIO on Q0 is used for resetting the CFAM of the processor that the
ASPEED master is connected to.
The signal is wired as active high on the first pass systems.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
- Add the high resolution support for SMP/SMT on the Ingenic timer (Zhou Yanjie)
- Add support for i.MX TPM driver with ARM64 (Anson Huang)
- Fix typo by replacing KHz to kHz (Geert Uytterhoeven)
- Add 32kHz support by setting the minimum ticks to 5 on Nomadik MTU (Linus Walleij)
- Replace HTTP links with HTTPS ones for security reasons (Alexander A. Klimov)
- Add support for the Ingenic X1000 OST (Zhou Yanjie)
-----BEGIN PGP SIGNATURE-----
iQEzBAABCAAdFiEEGn3N4YVz0WNVyHskqDIjiipP6E8FAl8ZqeUACgkQqDIjiipP
6E9tawf/UGUhEfB+VmH9w60NJlM0fC5a/TjVOb4yMjTZjjdyd4zMBHemF+dqMNnw
wTr+S8U9QfvP4BDgg1hWV+vhAwxz2xkhR0cGtOQjck5322vZglGSmAVqTCAlQMoZ
LNm98XeUYYVNMB+/+BHkf8F/nHV9vRo8sJg7UnvX/6RCykXFYXVP+P8LfkAU1MPt
8vaRPCcyGnYXrgjDYY5M5qYudLNpFPrzr1yJDWdwWUliwH3T1X1FNogTdUo955qk
wM+Hb4yPRuRufM+yATPsRedQypZFpoWFObuEMD2FaIw/LZVxV7D1tmw5KhL2V1tZ
XSzNiJDEgri/4LaVzXKP7sVlQlZfDQ==
=DXTp
-----END PGP SIGNATURE-----
Merge tag 'timers-v5.9' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull clock event/surce driver changes from Daniel Lezcano:
- Add sama5d2 support and rework the 32kHz clock handling (Alexandre Belloni)
- Add the high resolution support for SMP/SMT on the Ingenic timer (Zhou Yanjie)
- Add support for i.MX TPM driver with ARM64 (Anson Huang)
- Fix typo by replacing KHz to kHz (Geert Uytterhoeven)
- Add 32kHz support by setting the minimum ticks to 5 on Nomadik MTU (Linus Walleij)
- Replace HTTP links with HTTPS ones for security reasons (Alexander A. Klimov)
- Add support for the Ingenic X1000 OST (Zhou Yanjie)
SOM and it's Rock Pi N8 icarnation. This brings some arm64 dts-changes
with it as the underlying Dalang carrier board is shared by both
an arm32 rk3288 SOM and an arm64 rk3399 SOM (Rock Pi N10).
Other than that rk3288 gets its ohci node added that only works
on the fixed rk3288w variant of the soc and some asorted fixes
and improvements for dt-binding-check.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl8YzOAQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgY9aB/0folCAovUA97bILQR/62PspVGR1i/S2GJe
sQqKuWDyBtJNM3IYNVMd/AtcrP+U0ZD4MX6TKbabs+ZuIc4EksXRroMTMm2azme1
rOrQuGSKcdhPobJOHlpbSC/QPWWi5GGGWDnwXY8T68NedeYLP/o8sOmZQtUi80R9
ueP5ZwiviwMrVzRITPb8sB89WEyRqaas2H0fc/4OjGRY/jeTKwCk9sP/JytA6gUB
/GXn+uUk5WcRkekujBi1LVi4BIhm7PMW9kM1AHWAV6+2Yd8uFyG4ut9MB7SmaQt8
QfEoPpLvQicpZCVB3VFOPJ38z4YuOXsqo85u8T3ZkgpLdInoa/J9
=GUhq
-----END PGP SIGNATURE-----
Merge tag 'v5.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Biggest part is the addition of the rk3288 variant of the VMARC
SOM and it's Rock Pi N8 icarnation. This brings some arm64 dts-changes
with it as the underlying Dalang carrier board is shared by both
an arm32 rk3288 SOM and an arm64 rk3399 SOM (Rock Pi N10).
Other than that rk3288 gets its ohci node added that only works
on the fixed rk3288w variant of the soc and some asorted fixes
and improvements for dt-binding-check.
* tag 'v5.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Add PCIe for RockPI N10
ARM: dts: rockchip: Add HDMI out for RockPI N8/N10
ARM: dts: rockchip: Add USB for RockPI N8/N10
ARM: dts: rockchip: Add usb host0 ohci node for rk3288
ARM: dts: rockchip: Fix VBUS on rk3288-vyasa
ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
dt-bindings: arm: rockchip: Add Rock Pi N8 binding
arm64: dts: rk3399pro: vmarc-som: Move common properties into Carrier
arm64: dts: rk3399pro: vmarc-som: Move supply regulators into Carrier
arm64: dts: rk3399pro: vmarc-som: Fix sorting nodes, properties
ARM: dts: rockchip: dalang-carrier: Move i2c nodes into SOM
ARM: dts: rockchip: Add 'arm,pl330-periph-burst' for dmac
ARM: dts: rockchip: Add marvell BT irq config
ARM: dts: rockchip: rename label and nodename pinctrl subnodes that end with gpio
Link: https://lore.kernel.org/r/2472314.kD9Egx1jfM@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add a simple custom voltage regulator coupler for Exynos5800 SoCs, which
require coupling between "vdd_arm" and "vdd_int" regulators. This coupler
ensures that the voltage values don't go below the bootloader-selected
operation point during the boot process until the clients set their
constraints. It is achieved by assuming minimal voltage value equal to
the current value if no constraints are set. This also ensures proper
voltage balancing if any of the client driver is missing.
The balancing code comes from the regulator/core.c with the additional
logic for handling regulators without client constraints applied added.
Link: https://lore.kernel.org/r/20200721180900.13844-5-krzk@kernel.org
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This enables the audio SRAM, DMA engine, I2S interface, and codec, hooks
them together and adds a audio-graph-card instance.
It also removes the jack gpios from the gpio-keys instance, because the
audio jack driver registers an input device.
Link: https://lore.kernel.org/r/20200718205019.184927-10-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This memory is region is where the two-channel audio DMA can pump sound
samples into the SSPA's internal FIFO.
Link: https://lore.kernel.org/r/20200718205019.184927-6-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The ACGR register is at the offset of 0x1024, beyond the 4k originally
assigned to the MPMU range.
Link: https://lore.kernel.org/r/20200718205019.184927-5-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The power management unit, described by the soc_clocks node, controls the
power to the peripherals by the means of power domains with a single
cell -- the domain number.
Link: https://lore.kernel.org/r/20200718205019.184927-4-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
On the XO-1.75, this node represents a bus interface that operates in slave
mode and thus is only able to accommodate a single subnode; no address
cells are necessary.
The Documentation/devicetree/bindings/spi/spi-controller.yaml binding
prefers that we drop the property instead of setting it to zero.
This fixes a DT validation error:
arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@d4037000:
{ ... } is valid under each of {'required': ['spi-slave']},
{'required': ['#address-cells']}
We also need to drop #size-cells:
arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@d4037000:
'#address-cells' is a dependency of '#size-cells'
Link: https://lore.kernel.org/r/20200718205019.184927-3-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: $nodename:0:
'camera_i2c' does not match '^i2c(@.*)?'
mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'sda-gpios' is a required property
mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'scl-gpios' is a required property
The "gpios" property actually was documented as deprecated, but got dropped
in commit 0175ce4a58 ("dt-bindings: i2c: Convert i2c-gpio binding to
json-schema"). It's probably best kept forgotten though.
Link: https://lore.kernel.org/r/20200718205019.184927-2-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
MCU part:
-Enable stmpe811 on stm32f429
-Enable l3gd20-gyro on stm32f429
-Enable panel-ilitek-9341 on stm32f429
-Fixes for yaml validation (leds, nodes names,
remove useless bindings ...)
-Add stm32xxx compatibles for syscon nodes
MPU part:
-Add support for usb role switch to dwc2
-Add stm32xxx compatibles for syscon nodes
-Update uart4 pin configuration for low power mode
used by dkx and ed1 ST boards
-Fix uart nodes ordering and uart7_pins_a comments
-Add the support of uart instances available on STM32MP157 boards:
- usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
- uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
- usart2 on stm32mp157c-dk2
-Configure I2C5 on stm32mp15 DK boards
-----BEGIN PGP SIGNATURE-----
iQJMBAABCgA2FiEEctl9+nxzUSUqdELdf5rJavIecIUFAl8YQ6AYHGFsZXhhbmRy
ZS50b3JndWVAc3QuY29tAAoJEH+ayWryHnCFzGsP/A+rZHA3rpQXros5WEj/PV2+
1ePtLCXHW1mkhcsPQJb3p0bziGsVI8at2DMSlpeh6Koh+U8UkzD04Md4roqVWenM
XB6R6LBMuNVn2U3n3D7wGrcbkGPHTY/6lwpuyUqcm43yT8KhK1kLOdblSdeudZw6
JPowhZVk2uUXQRBr2RDZczSVYs5nAoB6qviuUN//LHVcTh/EyRAfOsB3Mdym2kqq
9umMqTLpznae5z648TdHJnDgqi/OKAFemQaLrl43dAnrZ0WfGuOfdApdlCAXfspg
RJ7Ciheba2Gd2RGAPHEhTN3+1DWErpxk2OhrhWt6YeTggkx+3V0psub807EXpZew
K1Y2xkrzPnL1uR0sK90bYVw2o+XUn08fckm7wWCWHwMKOp7WFPjBJj+CWIePAN0g
TIriAsBusxB/tN0wJJujPDvkXkZXkxo+l2P7BmY/KiXw7hhQVBsOmK+Gat56o1Ib
EkHLxUmdn0e1pJjN8DOsIA91MekEznnQ7QcQSGVdaYJXCUq8YUfB1t3Syjg1H4Vr
3RqEgbsaOva2MOKiNZ1iNWQkmmaRAmedSn0FTeQEyHu6ZULABtDApBbiKXjL8Gqf
Iw06PYjEN45r0UeOlLaSWQIRlfnRC17isFDfT9VxCEV3R84RBm7hA6VfLDvFEgj/
tC4AWykV22sYgMRn9wOg
=ga5j
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.9, round 1
Highlights:
----------
MCU part:
-Enable stmpe811 on stm32f429
-Enable l3gd20-gyro on stm32f429
-Enable panel-ilitek-9341 on stm32f429
-Fixes for yaml validation (leds, nodes names,
remove useless bindings ...)
-Add stm32xxx compatibles for syscon nodes
MPU part:
-Add support for usb role switch to dwc2
-Add stm32xxx compatibles for syscon nodes
-Update uart4 pin configuration for low power mode
used by dkx and ed1 ST boards
-Fix uart nodes ordering and uart7_pins_a comments
-Add the support of uart instances available on STM32MP157 boards:
- usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
- uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
- usart2 on stm32mp157c-dk2
-Configure I2C5 on stm32mp15 DK boards
* tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (38 commits)
ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkx
ARM: dts: stm32: Add compatibles for syscon for stm32mp151
ARM: dts: stm32: Add compatibles for syscon for stm32h743
ARM: dts: stm32: Add compatibles for syscon for stm32f746
ARM: dts: stm32: Add compatibles for syscon for stm32f426
dt-bindings: arm: stm32: Add compatibles for syscon nodes
ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl
ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkx
ARM: dts: stm32: add usart2 node to stm32mp157c-dk2
ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boards
ARM: dts: stm32: add usart3 node to stm32mp157c-ev1
ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boards
ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl
ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrl
ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl
ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl
ARM: dts: stm32: Update UART4 pin states on stm32mp15xx-dkx
ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
ARM: dts: stm32: update uart4 pin configuration for low power on stm32mp157
dt-bindings: usb: dwc2: Fix issues for stm32mp15x SoC
...
Link: https://lore.kernel.org/r/8a9bb27b-fc08-126a-11f7-01354e8577e1@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Enable Bluetooth on Artik5 (Exynos3250).
2. Enable accelerometer on Aries boards (Samsung Galaxy S family,
S5Pv210); multiple fixes.
3. Fix highest frequencies on Exynos5800.
4. Fix rare USB instability on Odroid XU3 family (Exynos5422).
5. Minor DTS fixes and adjustments with dtschema.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl8XLS0QHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1y34D/9o8783Hal7oDpRIZ1zCYricFDapXH4Bcbl
ZDvVnhJbfLylIJEclfAh9K4ce9hyLZXu+Ijwzntcev0XCH9Ab+c3H6wQdwwljH80
Up5HSk2wYAzA6cvOaanFj57zs1mVaCAkoXj+6V/9vDMg9Fr5BcTvOBfDvXJgh7vp
pqTo7PmSmsRp+Q8gsmM8yYUmQMC1JocWvLstQ3gxCFxh/Ct5enhfn1zdjZsd6cIZ
CUEqwgFMBQx3jNkCeKKWF6loe2ePSx5FY5Saz6eBaG01ceAIr+O3k7Fo5K36SWoF
Y7aUjyciiQSpvJI6sZ1CZjKZRVze9c2QZVuWZLjn+dBcvzZn85SpyM7YZACg5AnF
dgPx1JvBcwdUla7rEY/xHIzNfR7f7EmX+5CSjpWp0PmShQaF+TygyTnwj2L4nBeR
GRPseAPfcj0Bmju6ufx2A/UmsWbtasRfHiN0d69J75NmpTqvr9sPoxWEG7j6+zxY
OOnXfdEOuUpAykhVaJ7g9UogUWlvbw3JXDOAegBFdDVqG8mcYpBJq/W7bhnlA8d7
nFU6KBHKUdckQFdaakL3GyDiOjfTFmhvrUYGVJoKg4dEzcNniun7+3/Z7oG2wfeD
Y0888J8K4OwJv8/epEe+dPhkfvs26lin2EChN7dDovF9+jmOml7c0zu0spNVfRH4
rZEivJHx9g==
=k3pO
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.9
1. Enable Bluetooth on Artik5 (Exynos3250).
2. Enable accelerometer on Aries boards (Samsung Galaxy S family,
S5Pv210); multiple fixes.
3. Fix highest frequencies on Exynos5800.
4. Fix rare USB instability on Odroid XU3 family (Exynos5422).
5. Minor DTS fixes and adjustments with dtschema.
* tag 'samsung-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Replace HTTP links with HTTPS ones
ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 family
ARM: dts: exynos: Define fixed regulators in root node for consistency in SMDK5420
ARM: dts: exynos: Define fixed regulators in root node for consistency in Arndale
ARM: dts: exynos: Define fixed regulators in root node for consistency in Origen
ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings
ARM: dts: exynos: Fix missing empty reg/ranges property regulators on Trats
ARM: dts: exynos: Align L2 cache-controller nodename with dtschema
ARM: dts: s5pv210: Correct BCM4329 bluetooth node
ARM: dts: s5pv210: Add BMA023 accelerometer support to Aries
ARM: dts: s5pv210: Add support for GP2A light sensor on Aries
ARM: dts: s5pv210: Correct fuelgauge definition on Aries
ARM: dts: s5pv210: Add interrupt-controller property to gph3
ARM: dts: exynos: Enable Bluetooth support for Artik5 board
ARM: dts: exynos: Extend all Exynos5800 A15's OPPs with max voltage data
Link: https://lore.kernel.org/r/20200721180900.13844-2-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add QFPROM and ethernet for ipq8064 and a new DTS for the MikroTik
RB3011 using the same platform.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl8WVY0bHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FLgkQAM7yAWDqsT4x5DD/1KQ0
/k19ic5bBlqurA4R7JTiXFxdLUBmAtVwErwzVZigoNgnZDg2w/Z5ATbbogQz+wGd
aUE+7+u0sECJZ1WkhTOz8GOu0Faf1HXywj9k1wLrHyIQJ7dnd33w8zuSWWNMo5d8
bEXQ1kboeiiyni1hiVQP04uFaj4MLxwS0iMJfz2XklSmF7x80KmaT+l6eOQfeIIy
XeLjrI8SOKQ0Bfp7FRvptD1GJmXMSFnO3GdVEVeabIAq5BAioZF89tfELsjIIXG4
IqtKt7h8x4qS2ufhnkhM3Svlc82iFIMEGAPMv48x3MPlhX+cPAMVdhdxg6sIkDxN
YayAX/PKdluU7qk3W4ca44C7oHmCru7IrRqc82rFR2V+9D97eo5Wmovdma9rSpCJ
WDpGeM4iwuH8hdrLfwJzmMpX1VQhL9GAfgHBejTuHeRH6mr87f3vUhQJy+36CR2k
MpvUUDv8F5DCfUh9pogyk6FBSIZhbAUy8Soo77Jcl87+iRRNP2kXYwheK5cDU5qr
SDrJWBwUOpCU8NgZ8MBa/qgMmykGvb/dyltsWaxMjycnRCmRClT3ApGx10KYDbU+
q5SjtTU9Bb8qG2aj3+VZH1DsjNq4OfjlOT878F00Irjy70jNF8EjvfD8rDhel0X3
DmuG4fBHkBI8la8lqYekp1Ru
=wWXD
-----END PGP SIGNATURE-----
Merge tag 'qcom-dts-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM dts updates for v5.9
Add QFPROM and ethernet for ipq8064 and a new DTS for the MikroTik
RB3011 using the same platform.
* tag 'qcom-dts-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: add qfprom definition to ipq806x
ARM: dts: qcom: Add MikroTik RB3011
ARM: dts: qcom: add ethernet definitions to ipq8064
Link: https://lore.kernel.org/r/20200721045032.3430395-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
support, including:
- CPUFreq / Thermal throttling support for the H5
- Touchscreen support for the Pinephone
- New boards: PinePhone v1.2
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXxWlZAAKCRDj7w1vZxhR
xft/AQCaR2CkyOVyK32yPUX0ZF2nS+LYzalJIUpOuLhy37GQVwEA+vlQTa7fKdtW
4IX58peBkRD8FwTszrwR/tImDPd8Rwg=
=z8pA
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual number of patches to improve the Allwinner Device Tree
support, including:
- CPUFreq / Thermal throttling support for the H5
- Touchscreen support for the Pinephone
- New boards: PinePhone v1.2
* tag 'sunxi-dt-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h5: bananapi-m2-plus-v1.2: Tie in CPU OPPs
arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs
arm64: dts: allwinner: h5: Add CPU Operating Performance Points table
arm64: dts: allwinner: h5: Add trip and cooling maps to CPU thermal zones
arm64: dts: allwinner: h5: Add clock to CPU cores
ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages
ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores
ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores
arm64: dts: sun50i-pinephone: dldo4 must not be >= 1.8V
arm64: dts: allwinner: Add support for PinePhone revision 1.2
dt-bindings: arm: sunxi: Add PinePhone 1.2 bindings
arm64: dts: sun50i-a64-pinephone: Add touchscreen support
arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone
ARM: dts: orange-pi-zero-plus2: add leds configuration
ARM: dts: orange-pi-zero-plus2: enable USB OTG port
Link: https://lore.kernel.org/r/fa48ffcb-3404-41bb-b065-a16717cf5688.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
just a single patch fixing up the node names for schema.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl8VmEkACgkQQRCzN7AZ
XXO7uhAAsfr1+/YaaPZHxjFa29DUoEiXy7cPW8MC0OkQbmh+nBJY+evvYyrW8p80
FxduQIUqeGBh6HetswPGF3/4ZkEkorVwoR+8iJD9rERh6skEDlbnCzbWU9Jdeu0V
09EXcU3XBNLu+S0xVoCBFz8DKoFvv3oi7e/5+3kJyUKXlQo3o5g05/5C9ihzu/B7
g8nACYVr5Wa41Y+GgLxlNRPfJy5jMERvqcvy5vpbk7xyzONps53u0nahtAF5/BHz
XHomPlyuJsZWX+VnW7xxPhh66sng8YD4kFZV110lGYFzCXizMYPG1L0vGIO4tX/P
EPNkgwCdNmHvXAqqC5yRJ8UGNFl/GVf0kgeFy/hJlgCigbue2C0rzGYtkDCxQktp
mCmRnJQ8za8Dz9FkYbxZZ46TQzxXulIle2AqOnj0gh/sgUYVUvGpIcuyDO15W4v5
rPfEYx6hiPra5r3ITUDZt1kQKKAV5CPw1Q/0+kmVCbeehZNz2kftFNnErBGPdVZe
jZk9eU6Sh/rt+WbginVEOj2SNzdSFp77G9ciPeMU5GsJrdXK/yHTppPPtAjI01JO
SUyA0bICsJv0c8m+lqoDh6m1AePx9RWQUzfUOWxKwWF1qAXnd63NFye88fi8Da3x
WeqNvjptFnRJYHzxtPMvjjcs6CJWFb9qHtTsNTW3ut0GzhEkhlU=
=xBG2
-----END PGP SIGNATURE-----
Merge tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt
Versatile DTS changes for the v5.9 kernel cycle, essentially
just a single patch fixing up the node names for schema.
* tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: arm-realview: Align L2 cache-controller nodename with dtschema
Link: https://lore.kernel.org/r/CACRpkdbkM9ZmuG2FnBmO7upcJfnqq2oSLDCFDXC5b3K+dtps9Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC.
- Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings.
- Make tempmon node as child of anatop node according to hardware
architecture.
- The vf610-zii device update: configure fiber port to 1000BaseX, add
switch watchdog, MDIO speed and preamble.
- A series from Fabio Estevam to update imx6qdl-sabresd and
imx6q-tbs2910 for using MDIO node and reset-assert-us.
- Align L2 cache-controller device node name with .yaml schema.
- Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board.
- A series of patches from Shengjiu Wang to enable various audio
support on i.MX6 devices.
- Add Gateworks System Controller support for imx6qdl-gw devices.
- Change default #pwm-cells setting to <3> in the SoC dtsi files.
- Other small random changes.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl8VVgcUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7azwf+KzAukegArKtAmsbAnYNKYztXXifW
6Hc3+hv2mfUtsGfHPSUJJ5MhEW52xAbcXnYETUkmoWe1W1zIxrNNWvBUm4nPF5os
0cO8tjk4cE4CYDnsl8sBSqT55sd3ke61I+j9q0NAQNyX9OlmZ3kfm8yw0yIsxTKp
/FzoLmOeRzhVKHdZczuJ9Ts4kFyf3XtQrrN1UTbu715KdIbbsrJtXQ74ADBCnjfX
8RUm3Y5XIaPcF4z2U8reMsbHCF120ENIfGwFRNo/Odx+1OVo1IrDB1+f/SP9ZP0T
6+iKvfSS4RavzB1tvLdJ2/911t7qtqsneU33kwQKL0wrFZsT4ih42uBfpw==
=1hHY
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree update for 5.9:
- New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC.
- Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings.
- Make tempmon node as child of anatop node according to hardware
architecture.
- The vf610-zii device update: configure fiber port to 1000BaseX, add
switch watchdog, MDIO speed and preamble.
- A series from Fabio Estevam to update imx6qdl-sabresd and
imx6q-tbs2910 for using MDIO node and reset-assert-us.
- Align L2 cache-controller device node name with .yaml schema.
- Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board.
- A series of patches from Shengjiu Wang to enable various audio
support on i.MX6 devices.
- Add Gateworks System Controller support for imx6qdl-gw devices.
- Change default #pwm-cells setting to <3> in the SoC dtsi files.
- Other small random changes.
* tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (43 commits)
ARM: dts: vf610-zii-ssmb-spu3: Add node for switch watchdog
ARM: dts: vf610-zii-ssmb-dtu: Add no-sdio/no-sd properties
ARM: dts: imx6q-tbs2910: Pass reset-assert-us
ARM: dts: imx6q-tbs2910: Add an mdio node
ARM: dts: imx6qdl-sabresd: Pass reset-assert-us
ARM: dts: imx6qdl-sabresd: Add an mdio node
ARM: dts: imx6qdl-gw: add Gateworks System Controller support
ARM: dts: imx6ull: add MYiR MYS-6ULX SBC
ARM: dts: vf610-zii-spb4: Add node for switch watchdog
ARM: dts: colibri-imx6: remove pinctrl-names orphan
ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files
ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseX
ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseX
ARM: dts: ZII: update MDIO speed and preamble
ARM: dts: vfxxx: Add node for CAAM
ARM: dts: imx6qp-sabresd: enable sata
ARM: dts: imx6qp-sabreauto: enable sata
ARM: dts: add Protonic RVT board
ARM: dts: add Protonic VT7 board
ARM: dts: add Protonic WD2 board
...
Link: https://lore.kernel.org/r/20200720085536.24138-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A couple of FEC2 phy-mode fixes on imx6sx-sabreauto and imx6sx-sdb
board.
- One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card
detect work correctly.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl8VFn0UHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM52gQf+OGrSQq1t77ltL5EKeeV8f+PCu7UP
X7I2IJY+9FIYA1wuu0/AuhHaJ9NR0hN2mZVT+ktmxIDMVuHZJpAuHRfGp7anfVKr
vo1JgT9CbVZ/kD0n5a6TN28Kb7DVkIM4QGcEJuCD2mb1UJarlVX8YHg9Otv7b26p
3arPLR8eocPh2jNNdYnwSoZ8Li7Dm1SQloRAoCJOHAgAuSAdhG15rJBG70zX0F7d
QEWu6tNjN8FSrWeT1GLlzywYxGp1t592yuUpKAoppuJgxyUPIYA15vRB0d/KRqUL
CWYrDNh/dAvafI9HfeQQK5BjQhW58gy2c38s+bR9iPGoy88GzZiy+AatYQ==
=NlnX
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.8, round 3:
- A couple of FEC2 phy-mode fixes on imx6sx-sabreauto and imx6sx-sdb
board.
- One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card
detect work correctly.
* tag 'imx-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6qdl-icore: Fix OTG_ID pin and sdcard detect
ARM: dts: imx6sx-sabreauto: Fix the phy-mode on fec2
ARM: dts: imx6sx-sdb: Fix the phy-mode on fec2
Link: https://lore.kernel.org/r/20200720040148.GA20462@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
were failing on older SoCs and one to fix Cedrus on the H6.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXxWlyQAKCRDj7w1vZxhR
xcNtAQDO2rSFHGpQsUE/MCRxMqd2c2OQ9zpovRnirnyJqLCPEwD/b8GAi9tfJksM
lmghSQnByq6Sqm9UA/i6jjLfz//4iQg=
=JoYD
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes
Two fixes for the Allwinner SoCs, one to relax the CMA allocation ranges that
were failing on older SoCs and one to fix Cedrus on the H6.
* tag 'sunxi-fixes-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h6: Fix Cedrus IOMMU usage
ARM: dts sunxi: Relax a bit the CMA pool allocation range
Link: https://lore.kernel.org/r/e24f0608-6a4f-4163-b99e-a5f48e796184.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Enable PCA9450 regulator driver in arm64 defconfig.
- Enable RV8803 RTC and FSL_SAI audio support in arm64 defconfig to make
it useful for Kontron sl28 boards.
- Enable i.MX8MM clock and pinctrl driver in imx_v6_v7_defconfig to get
AARCH32 mode kernel work on AARCH64 hardware.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl8VWPcUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM77HQgAshj+pVP6bsje1ToHm1qdeYTiNYEw
rvmEZ+5+S6Qmj8wj7z0pSwAGsUe7ZqkfcOJqRUBOHQHxNKSpTvccg75QX3SQBFPE
1vojpN+XP2cDRyWFe4cbNjoAJV9hudix+AZAJNbhth92Z7YEz/KHu2oIuni6Xqqn
V+qFqqsuTCRUp+4C1rJphGaCnS5ux4E1gDz3Ae1e6LKprk4sPtpo4ViuNLRZDigK
O1RSiQJYcNTWEKdmrKQiMLPcO4elHnsf+kvi5hHXRc3a5h44yQ3qdMmysw/X6n/9
ElbmI9PCeKOaLqmkzsQYBl2M6v24KXjijmjQgA+tf2kZJB+zlSR8RwkqeQ==
=J5lQ
-----END PGP SIGNATURE-----
Merge tag 'imx-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig
i.MX defconfig update for 5.9:
- Enable PCA9450 regulator driver in arm64 defconfig.
- Enable RV8803 RTC and FSL_SAI audio support in arm64 defconfig to make
it useful for Kontron sl28 boards.
- Enable i.MX8MM clock and pinctrl driver in imx_v6_v7_defconfig to get
AARCH32 mode kernel work on AARCH64 hardware.
* tag 'imx-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Support i.MX8MM
arm64: defconfig: enable RTC and audio support on Kontron sl28 boards
arm64: defconfig: add pca9450 pmic driver
Link: https://lore.kernel.org/r/20200720085536.24138-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds support to enable HDMI out for
N10 and N8 combinations SBCs.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200720110230.367985-2-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0
ports.
This patch adds support to enable all these USB ports for
N10 and N8 combinations SBCs.
Note that the USB 3.0 port on RockPI N8 combination works
as USB 2.0 OTG since it is driven from RK3288.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200720110230.367985-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
rk3288 and rk3288w have a usb host0 ohci controller.
Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.
So add usb host0 ohci node in rk3288 dtsi and boards
can then enable it if supported.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: William Wu <william.wu@rock-chips.com>
Link: https://lore.kernel.org/r/20200720105846.367776-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Detail the success return condition, and that we rely on KERNEL_DS
being zero for this to operate correctly.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This option now correctly depends on CPU_FREQ_THERMAL, so select it on the
architectures that implement the required functions,
arch_set_thermal_pressure() and arch_get_thermal_pressure().
Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lkml.kernel.org/r/20200712165917.9168-4-valentin.schneider@arm.com
The following commit:
14533a16c4 ("thermal/cpu-cooling, sched/core: Move the arch_set_thermal_pressure() API to generic scheduler code")
moved the definition of arch_set_thermal_pressure() to sched/core.c, but
kept its declaration in linux/arch_topology.h. When building e.g. an x86
kernel with CONFIG_SCHED_THERMAL_PRESSURE=y, cpufreq_cooling.c ends up
getting the declaration of arch_set_thermal_pressure() from
include/linux/arch_topology.h, which is somewhat awkward.
On top of this, sched/core.c unconditionally defines
o The thermal_pressure percpu variable
o arch_set_thermal_pressure()
while arch_scale_thermal_pressure() does nothing unless redefined by the
architecture.
arch_*() functions are meant to be defined by architectures, so revert the
aforementioned commit and re-implement it in a way that keeps
arch_set_thermal_pressure() architecture-definable, and doesn't define the
thermal pressure percpu variable for kernels that don't need
it (CONFIG_SCHED_THERMAL_PRESSURE=n).
Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200712165917.9168-2-valentin.schneider@arm.com
There is no need to call 'gpio_free(evm_sw_gpio[i])' for these error
handling cases, it is already done in the error handling path at label
'out_free'.
Simplify the code and axe a few LoC.
While at it, also explicitly return 0 in the normal path.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The word 'descriptor' is misspelled throughout the tree.
Fix it up accordingly:
decriptors -> descriptors
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
[nsekhar@ti.com: fixed up subject prefix]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The it8152 PCI host controller was only used by cm-x2xx platforms.
Since these platforms were removed, there is no point to keep it8152
driver.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Since clang does not push pc and sp in function prologues, the current
implementation of unwind_frame does not work. By using the previous
frame's lr/fp instead of saved pc/sp we get valid unwinds on clang-built
kernels.
The bounds check on next frame pointer must be changed as well since
there are 8 less bytes between frames.
This fixes /proc/<pid>/stack.
Link: https://github.com/ClangBuiltLinux/linux/issues/912
Reported-by: Miles Chen <miles.chen@mediatek.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Cc: stable@vger.kernel.org
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The integrated assembler of Clang 10 and earlier do not allow to access
the VFP registers through the coprocessor load/store instructions:
arch/arm/vfp/vfpmodule.c:342:2: error: invalid operand for instruction
fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK));
^
arch/arm/vfp/vfpinstr.h:79:6: note: expanded from macro 'fmxr'
asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr " #_vfp_ ", %0"
^
<inline asm>:1:6: note: instantiated into assembly here
mcr p10, 7, r0, cr8, cr0, 0 @ fmxr FPEXC, r0
^
This has been addressed with Clang 11 [0]. However, to support earlier
versions of Clang and for better readability use of VFP assembler
mnemonics still is preferred.
Ideally we would replace this code with the unified assembler language
mnemonics vmrs/vmsr on call sites along with .fpu assembler directives.
The GNU assembler supports the .fpu directive at least since 2.17 (when
documentation has been added). Since Linux requires binutils 2.21 it is
safe to use .fpu directive. However, binutils does not allow to use
FPINST or FPINST2 as an argument to vmrs/vmsr instructions up to
binutils 2.24 (see binutils commit 16d02dc907c5):
arch/arm/vfp/vfphw.S: Assembler messages:
arch/arm/vfp/vfphw.S:162: Error: operand 0 must be FPSID or FPSCR pr FPEXC -- `vmsr FPINST,r6'
arch/arm/vfp/vfphw.S:165: Error: operand 0 must be FPSID or FPSCR pr FPEXC -- `vmsr FPINST2,r8'
arch/arm/vfp/vfphw.S:235: Error: operand 1 must be a VFP extension System Register -- `vmrs r3,FPINST'
arch/arm/vfp/vfphw.S:238: Error: operand 1 must be a VFP extension System Register -- `vmrs r12,FPINST2'
Use as-instr in Kconfig to check if FPINST/FPINST2 can be used. If they
can be used make use of .fpu directives and UAL VFP mnemonics for
register access.
This allows to build vfpmodule.c with Clang and its integrated assembler.
[0] https://reviews.llvm.org/D59733
Link: https://github.com/ClangBuiltLinux/linux/issues/905
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The integrated assembler of Clang 10 and earlier do not allow to access
the VFP registers through the coprocessor load/store instructions:
<instantiation>:4:6: error: invalid operand for instruction
LDC p11, cr0, [r10],#32*4 @ FLDMIAD r10!, {d0-d15}
^
This has been addressed with Clang 11 [0]. However, to support earlier
versions of Clang and for better readability use of VFP assembler
mnemonics still is preferred.
Replace the coprocessor load/store instructions with explicit assembler
mnemonics to accessing the floating point coprocessor registers. Use
assembler directives to select the appropriate FPU version.
This allows to build these macros with GNU assembler as well as with
Clang's built-in assembler.
[0] https://reviews.llvm.org/D59733
Link: https://github.com/ClangBuiltLinux/linux/issues/905
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Explicit FPU selection has been introduced in commit 1a6be26d5b
("[ARM] Enable VFP to be built when non-VFP capable CPUs are selected")
to make use of assembler mnemonics for VFP instructions.
However, clang currently does not support passing assembler flags
like this and errors out with:
clang-10: error: the clang compiler does not support '-Wa,-mfpu=softvfp+vfp'
Make use of the .fpu assembler directives to select the floating point
hardware selectively. Also use the new unified assembler language
mnemonics. This allows to build these procedures with Clang.
Link: https://github.com/ClangBuiltLinux/linux/issues/762
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The act_mm assembly macro is actually partly reimplementing
get_thread_info so let's just use that.
Suggested-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Use the standard obj-y form to specify the sub-directories under
arch/arm/. No functional change intended.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Commit
84e6ffb2c4 ("arm: add support for folded p4d page tables")
updated create_mapping_late() to take folded P4Ds into account when
creating mappings, but inverted the p4d_alloc() failure test, resulting
in no mapping to be created at all.
When the EFI rtc driver subsequently tries to invoke the EFI GetTime()
service, the memory regions covering the EFI data structures are missing
from the page tables, resulting in a crash like
Unable to handle kernel paging request at virtual address 5ae0cf28
pgd = (ptrval)
[5ae0cf28] *pgd=80000040205003, *pmd=00000000
Internal error: Oops: 207 [#1] SMP THUMB2
Modules linked in:
CPU: 0 PID: 7 Comm: kworker/u32:0 Not tainted 5.7.0+ #92
Hardware name: QEMU KVM Virtual Machine, BIOS 0.0.0 02/06/2015
Workqueue: efi_rts_wq efi_call_rts
PC is at efi_call_rts+0x94/0x294
LR is at efi_call_rts+0x83/0x294
pc : [<c0b4f098>] lr : [<c0b4f087>] psr: 30000033
sp : e6219ef0 ip : 00000000 fp : ffffe000
r10: 00000000 r9 : 00000000 r8 : 30000013
r7 : e6201dd0 r6 : e6201ddc r5 : 00000000 r4 : c181f264
r3 : 5ae0cf10 r2 : 00000001 r1 : e6201dd0 r0 : e6201ddc
Flags: nzCV IRQs on FIQs on Mode SVC_32 ISA Thumb Segment none
Control: 70c5383d Table: 661cc840 DAC: 00000001
Process kworker/u32:0 (pid: 7, stack limit = 0x(ptrval))
...
[<c0b4f098>] (efi_call_rts) from [<c0448219>] (process_one_work+0x16d/0x3d8)
[<c0448219>] (process_one_work) from [<c0448581>] (worker_thread+0xfd/0x408)
[<c0448581>] (worker_thread) from [<c044ca7b>] (kthread+0x103/0x104)
...
Fixes: 84e6ffb2c4 ("arm: add support for folded p4d page tables")
Reviewed-by: Mike Rapoport <rppt@linux.ibm.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
__vdso_*() should be removed and fallback used if CNTCVT is not
available by cntvct_functional(). __vdso_clock_gettime64 when added
previous commit is using the incorrect CNTCVT value in that state.
__vdso_clock_gettime64 is also added to remove it's symbol.
Cc: stable@vger.kernel.org
Fixes: 74d06efb9c ("ARM: 8932/1: Add clock_gettime64 entry point")
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Robin Murphy <robin.mruphy@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Unprivileged memory accesses generated by the so-called "translated"
instructions (e.g. LDRT) in kernel mode can cause user watchpoints to fire
unexpectedly. In such cases, the hw_breakpoint logic will invoke the user
overflow handler which will typically raise a SIGTRAP back to the current
task. This is futile when returning back to the kernel because (a) the
signal won't have been delivered and (b) userspace can't handle the thing
anyway.
Avoid invoking the user overflow handler for watchpoints triggered by
kernel uaccess routines, and instead single-step over the faulting
instruction as we would if no overflow handler had been installed.
Cc: <stable@vger.kernel.org>
Fixes: f81ef4a920 ("ARM: 6356/1: hw-breakpoint: add ARM backend for the hw-breakpoint framework")
Reported-by: Luis Machado <luis.machado@linaro.org>
Tested-by: Luis Machado <luis.machado@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
[nsekhar@ti.com: drop obsolete hawkboard.org URL completeley
fixup subject line prefix]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The OMAP1 OHCI driver is using the legacy GPIO API to grab some
random GPIO lines. One is from the TPS65010 chip and used for
power, another one is for overcurrent and while the driver picks
this line it doesn't watch it at all.
Convert the driver and the OMAP1 OSK board file to pass these
two GPIOs as machine described GPIO descriptors.
I noticed the overcurrent GPIO line is not really used in the
code so dropped in a little comment for other developers.
Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200720135524.100374-2-linus.walleij@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Now that 'smp_read_barrier_depends()' has gone the way of the Norwegian
Blue, drop the inclusion of <asm/barrier.h> in 'asm-generic/rwonce.h'.
This requires fixups to some architecture vdso headers which were
previously relying on 'asm/barrier.h' coming in via 'linux/compiler.h'.
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Will Deacon <will@kernel.org>
Now that USB OTG driver supports usb role switch by overriding PHY input
signals (A-Valid, B-Valid and Vbus-Valid), enable it on stm32mp15xx-dkx.
dr_mode needn't to be forced to Peripheral anymore, it is set to OTG in
SoC device tree.
USB role (USB_ROLE_NONE, USB_ROLE_DEVICE, USB_ROLE_HOST) will be provided
by STUSB1600 Type-C controller driver.
This patch depends on "Add STUSB160x Type-C port controller support"
series, which is under review.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Move spi4_pins_a nodes from pinctrl_z to pinctrl as the associated pins
are not in BANK Z.
Fixes: 498a701498 ("ARM: dts: stm32: Add missing pinctrl entries for STM32MP15")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Configure I2C5 on stm32mp15 DK boards. It's available and can be used on:
- Arduino connector
- GPIO expansion connector
Keep it disabled by default, so the pins are kept in their initial state to
lower power consumption. This way they can also be used as GPIO.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Adds the usart2 node to stm32mp157c-dk2 board. usart2 pins are connected
to Bluetooth component. usart2 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Adds uart7 node to stm32mp15xx-dkx and uart7 alias to stm32mp157a-dk1 and
stm32mp157c-dk2 boards. uart7 pins are connected to Arduino connector.
uart7 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Adds the usart3 node to stm32mp157c-ev1 board. usart3 pins are connected to
GPIO Expansion connector. usart3 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Adds usart3 node to stm32mp15xx-dkx and usart3 alias to stm32mp157a-dk1
and stm32mp157c-dk2 boards. usart3 pins are connected to GPIO Expansion
connector. usart3 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Adds usart2_pins_c, usart3_pins_b, usart3_pins_c and uart7_pins_c pins
configurations in stm32mp15-pinctrl.
- usart2_pins_c pins are connected to Bluetooth chip on dk2 board.
- usart3_pins_b pins are connected to GPIO expansion connector on evx board.
- usart3_pins_c pins are connected to GPIO expansion connector on dkx board.
- uart7_pins_c pins are connected to Arduino Uno connector on dkx board.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Use tabs where possible and remove multiple blanks lines.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
add all the new drivers merged recently.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXxWlogAKCRDj7w1vZxhR
xZRpAP9zz41nKML2Dtb08tYExiCpYTPpKxZLditIVb++2m+MmAEAzC4DAKZ+8TeR
q64W64aLxbulbLsWw24pPRyMUKPZswM=
=JhPS
-----END PGP SIGNATURE-----
Merge tag 'sunxi-config-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfig
A bunch of patches to generally make sunxi_defconfig more helpful and
add all the new drivers merged recently.
* tag 'sunxi-config-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: configs: sunxi: Enable crypto related options
ARM: sunxi: configs: Enable the Mailbox driver
ARM: configs: sunxi: Enable the PS/2 controller
ARM: configs: sunxi: Enable Lima
ARM: configs: sunxi: Add DRM output-related options
ARM: configs: sunxi: Enable ASoC options
ARM: configs: sunxi: Enable Cedrus
ARM: configs: sunxi: Enable the deinterlace and rotation engines
ARM: configs: sunxi: Enable the CSI drivers
ARM: configs: sunxi: Run savedefconfig
Link: https://lore.kernel.org/r/c74e64c9-f1f2-40ee-b4cd-c1430d32cf8d.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enables a few new configuration options that are useful on the new Nexus
7 and Acer A500 devices, as well as the userspace CPU frequency governor
that's mainly used for testing.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl8RzOsTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZz+EACSWbN0LCgn5qhF3nlG0VmLjhnpKQse
78UQnXZj+ekw5L+WJBObGAp/1Tn/MYWtknoA6abXUkFlinIkFvOasnc7hVMdHEBP
p4+UQxy73pHHcz4FmERiAD0KFasqriclHvABB5+hUjz6Qid6/ZsjAMz1S2LxZZqC
4eNTRBgVf1/eA5R9GLIXceszvsofGOKt0ApZNB2R7kNA3r3ww4PXzEinaTlfqajI
qYWUQCC4WMdtKS0lhND/Z7eqpk9uCGJVxn8d2Tv0BaHDAq+zc+AO9ovoVPwgJ/Pp
/SXwvtBsNz/XM+Klyj3WEH0sUDBc5OR5uu7hg+4YMZImyA3NpiNJHSI7yHNOBRR9
oiMfVYRW94BPOlgVjQ8K/QXEGTctkCTSOyRNmrK56ou4dKmvM9k5HWNsQzmN6Hly
DYVWeHsEKURFRAR/VIAxpFQIlSJcZe0kl8TSgcG8Lv6sqRiY6/hMFcT5jVXL72QL
KiMXGEKk0Kc3s6JxTJgf//V/rZ/0GIN1y4aeBWBzNIgvNE9TloVhvGwi2tLZ74Nb
fmeNbbwDVjVxf7NfhKzZJEAUSFU8/giD3F4dfgFPHQafuQajhTddN0pmJ8Qn01XB
ZJ/fcLGlf+4YJsNhxvb7ZqxM3LzsbaRwWpfEytVd5vVNh8AZnLM0yxfLZt1V62ry
OL0p8ork6MAn0g==
=x+zU
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.9-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig
ARM: tegra: Default configuration changes for v5.9-rc1
Enables a few new configuration options that are useful on the new Nexus
7 and Acer A500 devices, as well as the userspace CPU frequency governor
that's mainly used for testing.
* tag 'tegra-for-5.9-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500
ARM: tegra: Enable CPUFREQ userspace governor
Link: https://lore.kernel.org/r/20200717161300.1661002-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Bananapi M2+ uses a GPIO line to change the effective resistance of
the CPU supply regulator's feedback resistor network. The voltages
described in the device tree were given directly by the vendor. This
turns out to be slightly off compared to the real values.
The updated voltages are based on calculations of the feedback resistor
network, and verified down to three decimal places with a multi-meter.
Fixes: 6eeb4180d4 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-4-wens@kernel.org
The device tree currently only assigns the a supply for the first CPU
core, when in reality the regulator supply is shared by all four cores.
This might cause an issue if the implementation does not realize the
sharing of the supply.
Assign the same regulator supply to the remaining CPU cores to address
this.
Fixes: 6eeb4180d4 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-3-wens@kernel.org
The device tree currently only assigns the a supply for the first CPU
core, when in reality the regulator supply is shared by all four cores.
This might cause an issue if the implementation does not realize the
sharing of the supply.
Assign the same regulator supply to the remaining CPU cores to address
this.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-2-wens@kernel.org
Since commit bcf3440c6d ("net: phy: micrel: add phy-mode support for the
KSZ9031 PHY"), networking is broken on sama5d3 xplained.
The device tree has phy-mode = "rgmii" and this worked before, because
KSZ9031 PHY started with default RGMII internal delays configuration (TX
off, RX on 1.2 ns) and MAC provided TX delay. After above commit, the
KSZ9031 PHY starts handling phy mode properly and disables RX delay, as
result networking is become broken.
Fix it by switching to phy-mode = "rgmii-rxid" to reflect previous
behavior.
Fixes: bcf3440c6d ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200717233644.841080-1-alexandre.belloni@bootlin.com
Commit 1019fe2c72 ("ARM: dts: exynos: Adjust bus related OPPs to the
values correct for Exynos5422 Odroids") changed the parameters of the
OPPs for the FSYS bus. Besides the frequency adjustments, it also removed
the 'shared-opp' property from the OPP table used for FSYS_APB and FSYS
busses.
This revealed that in fact the FSYS bus frequency scaling never worked.
When one OPP table is marked as 'opp-shared', only the first bus which
selects the OPP sets the rate of its clock. Then OPP core assumes that
the other busses have been changed to that OPP and no change to their
clock rates are needed. Thus when FSYS_APB bus, which was registered
first, set the rate for its clock, the OPP core did not change the FSYS
bus clock later.
The mentioned commit removed that behavior, what introduced a regression
on some Odroid XU3 boards. Frequency scaling of the FSYS bus causes
instability of the USB host operation, what can be observed as network
hangs. To restore old behavior, simply disable frequency scaling for the
FSYS bus.
Reported-by: Willy Wolff <willy.mh.wolff.ml@gmail.com>
Fixes: 1019fe2c72 ("ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
GPIOP7 is used in the Rainier design to manage the state of a
microcontroller elsewhere in the system but its ball, Y23, is the
driver of the heartbeat LED on the ast2600-evb and the SoC defaults Y23
at power-on to the pulse-train behaviour used to drive the LED. This
causes much confusion for the micro in the Rainier system, so hog the
line as early as possible.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The hub FSI master can access the cfams on two other processors. Reflect
this by adding a second cfam to the first hub description.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Tested-by: Andrew Geissler <geissonator@yahoo.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Rainier uses GPIO B6 as the checkstop GPIO. Define the line-name
so that this GPIO can be found by name.
Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The attention handler will monitor the checkstop gpio via the character
device interface so it needs to not be defined.
Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add a reserved memory node for the VGA memory. Add the XDMA engine node,
enable it, and point it's memory region to the VGA memory.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add a reserved memory node for the VGA memory. Add the XDMA engine node,
enable it, and point it's memory region to the VGA memory.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add the PCI-E root complex reset, correct the pcie-device property, and
add the Aspeed SCU interrupt controller include.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Correct the pcie-device property, and add the Aspeed SCU interrupt
controller include.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The current pin muxing scheme muxes GPIO_1 pad for USB_OTG_ID
because of which when card is inserted, usb otg is enumerated
and the card is never detected.
[ 64.492645] cfg80211: failed to load regulatory.db
[ 64.492657] imx-sdma 20ec000.sdma: external firmware not found, using ROM firmware
[ 76.343711] ci_hdrc ci_hdrc.0: EHCI Host Controller
[ 76.349742] ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 2
[ 76.388862] ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
[ 76.396650] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.08
[ 76.405412] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 76.412763] usb usb2: Product: EHCI Host Controller
[ 76.417666] usb usb2: Manufacturer: Linux 5.8.0-rc1-next-20200618 ehci_hcd
[ 76.424623] usb usb2: SerialNumber: ci_hdrc.0
[ 76.431755] hub 2-0:1.0: USB hub found
[ 76.435862] hub 2-0:1.0: 1 port detected
The TRM mentions GPIO_1 pad should be muxed/assigned for card detect
and ENET_RX_ER pad for USB_OTG_ID for proper operation.
This patch fixes pin muxing as per TRM and is tested on a
i.Core 1.5 MX6 DL SOM.
[ 22.449165] mmc0: host does not support reading read-only switch, assuming write-enable
[ 22.459992] mmc0: new high speed SDHC card at address 0001
[ 22.469725] mmcblk0: mmc0:0001 EB1QT 29.8 GiB
[ 22.478856] mmcblk0: p1 p2
Fixes: 6df11287f7 ("ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support")
Cc: stable@vger.kernel.org
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
esdhc0 is connected to an eMMC, so it is safe to pass the "no-sdio"/"no-sd"
properties.
esdhc1 is wired to a standard SD socket, so pass the "no-sdio" property.
Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode") fixed the
phy-mode for fec1, but missed to fix it for the fec2 node.
Fix fec2 to also use "rgmii-id" as the phy-mode.
Cc: <stable@vger.kernel.org>
Fixes: 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode") fixed the
phy-mode for fec1, but missed to fix it for the fec2 node.
Fix fec2 to also use "rgmii-id" as the phy-mode.
Cc: <stable@vger.kernel.org>
Fixes: 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the AR8035 datasheet:
"When using crystal, the clock is generated internally after power is
stable. For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms
requirement is satisfied."
Pass the 'reset-assert-us' property to describe such requirement.
While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4.
The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
Improve the Ethernet representation by adding an mdio node with such
information.
This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now
expects the 'qca,clk-out-frequency' property to be passed via
device tree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Tested-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the AR8031 datasheet:
"When using crystal, clock is generated internally after the power is
stable. In order to get reliable power-on-reset, it is recommended to
keep asserting the reset low signal long enough (10 ms) to ensure the
clock is stable and clock-to-reset (1 ms) requirement is satisfied."
Pass the 'reset-assert-us' property to describe such requirement.
While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.
The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
Improve the Ethernet representation by adding an mdio node with such
information.
An advantage of adding the mdio node is that the AR8031 initialization
code in the mx6sabresd board file in U-Boot can totally be removed.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add Gateworks System Controller support to Gateworks Ventana boards:
- add dt bindings for GSC mfd driver and hwmon driver for ADC's and
fan controllers.
- add dt bindings for gpio-keys driver for push-button and interrupt events
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Avoid the overhead of the dma ops support for tiny builds that only
use the direct mapping.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
The marvell PHY reg-init registers for the D-Link DNS-327L are wrong.
Currently the first field is used to set the page 2, but this is
pointless. The usage is not correct, and we are setting the wrong
registers.
Fix it.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Make use of for_each_requested_gpio() instead of home grown analogue.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Gregory Clement <gregory.clement@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Connect the voltage regulator of vbus to the otg connector.
Depending on the current mode this is enabled (in "host" mode")
or disabled (in "peripheral" mode). The regulator must be updated
if the controller is configured in "otg" mode and the status changes
between "host" and "peripheral".
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200707101214.2301768-1-michael@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-8-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-7-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Some of gmac, sdmmc node properties are common across rk3288 and
rk3399pro SOM's so move them into Carrier dtsi.
Chosen node is specific to rk3399pro configure SBC, so move it into
RockPI N10 dts.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-5-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Supply regulators are common across different variants of vmarc SOM's
since the Type C power controller IC is part of the carrier board.
So, move the supply regulators into carrier board dtsi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-4-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
I2C nodes and associated slave devices defined in Carrier board
are specific to rk3399pro vmrac SOM.
So, move them into SOM dtsi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-2-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200713065859.31770-1-grandmaster@al2klimov.de
if of_find_device_by_node() succeed, at91_pm_sram_init() doesn't have
a corresponding put_device(). Thus add a jump target to fix the exception
handling for this function implementation.
Fixes: d2e4679055 ("ARM: at91: pm: use the mmio-sram pool to access SRAM")
Signed-off-by: yu kuai <yukuai3@huawei.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200604123301.3905837-1-yukuai3@huawei.com
This time there are a number of actual code fixes, plus
a small set of device tree issues getting addressed:
- Renesas:
- one defconfig cleanup to allow a later Kconfig change
- Intel socfpga:
- enable QSPI devices on some machines
- fix DTC validation warnings
- TI OMAP:
- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
driver
- A regression fix for ti-sysc no-idle handling that caused issues
compared to earlier platform data based booting
- A fix for memory leak for omap_hwmod_allocate_module
- Fix d_can driver probe for am437x
- NXP i.MX
- A couple of fixes on i.MX platform device registration code to stop
the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
- Amlogic Meson
- misc DT fixes
- SoC ID fixes to detect all chips correctly
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl8RzGIACgkQmmx57+YA
GNnCvRAAnK5OHHScD0OW7MyyX5J8YZj8ngC8CJc+mt62SgjFe0fp4z6+U7NFI8d6
wHgYSuHClKQqCxtddVrWlnudztX8/a3M8YL2Hia1c50JIdWNcuW3mtORsI+TVdMV
F1/SpPmHI42ciTA94JbbPHgsq+ISSQONfCQoMNZUnLIyEVaVh3hl2mY2uISKHND5
ydVwARvlp0/MgcrTaC4+9rf/qmZoqssBKwowf0X1bx9OjuEbk8JwcBUiao9f8Cnk
bGSgly6ephJH2uVKw5p46/NLGiEn6bB/KAZA9ZnVSYwJ0+09WT1Lnk4UQP/qLfPP
AOcsFiPjxUp8E/h4LUHhEsXha4C3Ge+xaj6PXlzHytxAXZhHO2oYEg6ZyhYeYNhK
jx1f4dHnI9CVWngVIlna2g+tVfFXtmeYEqGr7aCk3Tsacars3/LLMKZ9XYa4BFBi
FBMzbGMGAklOCJhKPfnzDIkxCsQze1OeKExWgEpk0DCmipFmDC8Lld6go/xosecG
sSoAcsBQgAItH0+Pxc6TAiy7Cx64Mq0WFS2uFBzf22NCH8jeznFrE2SZvZobdap3
SqNLjDp+TDh+w+IqPTnmZLHFmlAhU12jbN8Sx8Pof1ylTT+sHdMs+1BmR8X/XwiT
uMBzj/7VKpTUOSEc7cpjZPPNFDgDHCKAprJk9ky+P6YLsZGC2bY=
=Xlng
-----END PGP SIGNATURE-----
Merge tag 'arm-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into master
Pull ARM SoC fixes from Arnd Bergmann:
"This time there are a number of actual code fixes, plus a small set of
device tree issues getting addressed:
Renesas:
- one defconfig cleanup to allow a later Kconfig change
Intel socfpga:
- enable QSPI devices on some machines
- fix DTC validation warnings
TI OMAP:
- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target
module driver
- A regression fix for ti-sysc no-idle handling that caused issues
compared to earlier platform data based booting
- A fix for memory leak for omap_hwmod_allocate_module
- Fix d_can driver probe for am437x
NXP i.MX:
- A couple of fixes on i.MX platform device registration code to
stop the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
Amlogic Meson:
- misc DT fixes
- SoC ID fixes to detect all chips correctly"
* tag 'arm-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
arm64: dts: stratix10: increase QSPI reg address in nand dts file
arm64: dts: stratix10: add status to qspi dts node
arm64: dts: agilex: add status to qspi dts node
ARM: dts: Fix dcan driver probe failed on am437x platform
ARM: OMAP2+: Fix possible memory leak in omap_hwmod_allocate_module
arm64: defconfig: Enable CONFIG_PCIE_RCAR_HOST
soc: imx: check ls1021a
ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
ARM: imx: Provide correct number of resources when registering gpio devices
ARM: dts: imx6qdl-gw551x: fix audio SSI
bus: ti-sysc: Do not disable on suspend for no-idle
bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirk
bus: ti-sysc: Fix wakeirq sleeping function called from invalid context
ARM: dts: meson: Align L2 cache-controller nodename with dtschema
arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
arm64: dts: meson: add missing gxl rng clock
soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl8RzHQTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTpqD/9hvGv+pk5hY5uF0tX0AVr+N5yKZvwP
H6yi0CSp+wVlSzzSPU+uOa4v/NfQIFg5GK5TClbxiPSlCNKf8Oh3LKcR+RUp0Xv1
Icsn8O3xlCcGpJ3x4/ofsBG0FdxjoI9XvFv4JkwlBidCVuaDTbBje+8S22deL2Zp
yMIUhvc0aPS4uNkB58+7fshnzuOwjt0AI7zU/A3p+PI3ac42dALtzAAwnoHc6ydp
lNpqSxXAYxhTnM6dPfxWgDaJTqYJkQ8qX2VT/X63eaBoVJJio8spVtbpyw+HGX+s
Amj0G39aehv9iz2XP8YCUN272iJVTyBZ8VSlg+GXX4fkUg3r29lPIeAfxJrgNaRh
1kGJ1COrracE2adxs5EWuB1+0y9g8cMn4ycQ69fL5owVMiRDHldkBkhn7HhRIWPm
fRTrp2e7vdMrRkF/YfquvHz6vtdAGslxjIxILIInPDWi+3X/HdhF1kNdtJKyfor3
3lD5IxWFCnvx9kbu13bxbPKfDge5zznpwONnEogijQuXmjSHEYnNOmAWGxQbnKDE
zKxqHnzYNYA1Act5p6JnByjGE0uZOv8FdzZZUvsV/QFwb2QIvQ5DYxbx+PD9NWH7
fnyZEJPOwEZABYI4JwPM76Q0j/EImIRMP/L3CZWUyXCfMC/lSGpOCFe8BrSmq8u6
UUr6zTDnyx8FOQ==
=oFYm
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.9-rc1
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.
* tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (38 commits)
ARM: tegra: Add device-tree for ASUS Google Nexus 7
ARM: tegra: Add device-tree for Acer Iconia Tab A500
ARM: tegra: Add HDMI supplies on Nyan boards
ARM: tegra: Add missing DSI controller on Tegra30
ARM: tegra: Add i2c-bus subnode for DPAUX controllers
ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
ARM: tegra: The Tegra30 DC is not backwards-compatible
ARM: tegra: Remove spurious comma from node name
ARM: tegra: Add parent clock to DSI output
ARM: tegra: Use standard names for SRAM nodes
ARM: tegra: seaboard: Use standard battery bindings
ARM: tegra: Use standard names for LED nodes
ARM: tegra: Use numeric unit-addresses
ARM: tegra: medcom-wide: Remove extra panel power supply
ARM: tegra: Use proper unit-addresses for OPPs
ARM: tegra: Add missing clock-names for SDHCI controllers
ARM: tegra: Fix order of XUSB controller clocks
ARM: tegra: Add #reset-cells to Tegra124 memory controller
ARM: tegra: Add missing panel power supplies
ARM: tegra: Add micro-USB A/B port on Jetson TK1
...
Link: https://lore.kernel.org/r/20200717161300.1661002-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a functionally trivial patch which removes the word
'blacklist' (and variations) from this code and replaces it
with 'quirklist'
It has no other effect.
Link: https://lore.kernel.org/r/20200715024755.967904-1-paul@mawsonlakes.org
Signed-off-by: Paul Schulz <paul@mawsonlakes.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>