Commit Graph

20737 Commits

Author SHA1 Message Date
Arnd Bergmann
aafd017347 Allwinner Fixes for v5.6
A pretty normal set of fixes for v5.6:
 
   - Fix reversed macros used for A83T EMAC clock and reset
   - Fix camera regulator voltage and USB OTG for TBS-A711
   - 16-bit / 8-bit mixed read fix for our RSB driver
   - Fix SPI controller base address for R40
   - Reorder device nodes based on base address for R40
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAl5rGFcOHHdlbnNAY3Np
 ZS5vcmcACgkQOJpUIZwPJDC7ehAAjd+M6e4/XPSJvR6w5EOSbbZ7lJbW916+I4TK
 vFvwyow4YQX7ryE6ivq0ytGYA2THJQI8TSxhaeLUVNF64TnG6LzsXIyyqPRVyav+
 AxIB2tQWWnemcVPfS1CobRF3FXng1hBzs2ooaGb3N9ois1wcVTqHvcOxkvaNvZ3s
 0q8tIAmvnkBiqBESdcwz3hjYZqhcbkj3qra73xJVy7BmwOhsBquEYbeCmO2eyqdO
 FjhWpE5BuR/4D3UZYrVnhz+r+6LSWlM/Bc8MfAOmtFHrYJkcFLF5CYqctGzPyjkS
 sPWtmHKszJfep7u8PHVvEsM7T9EXjtj/B2/z3ms0Z8YnWiEMkBB9qfc9dnvdy0QI
 TAod6n4i2r2Jf8lFVSnDYEGBa2+vD3D6ySG5vAi4PzkErF+eO9Av3t/JUeco2uWY
 uD7UROyK+34kxPcn+RYkcudnTqPyAmSiAPE9xBOM9qIzaEXk9bwrdI4bA+LVtoYX
 y2/c1MC3j4iM+7Xa7UxSkclmDi8Pty++wwtTX6g8MAzEhncx52SALa2mmm6LCSNc
 Z2zOBy1SFkzi71c11GZCzMu8cV+W6R9wXQ8x2hfqqngPDrXBUgnKy6jpCEzF/NCm
 O1JYtwRHslMEsRwR+Co/4Av/Smt20qC1peVjQe93OLWOYTj3YAdLTVR9sd3DLcLd
 S4DkeJ0=
 =yBY0
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-fixes-for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes

Allwinner Fixes for v5.6

A pretty normal set of fixes for v5.6:

  - Fix reversed macros used for A83T EMAC clock and reset
  - Fix camera regulator voltage and USB OTG for TBS-A711
  - 16-bit / 8-bit mixed read fix for our RSB driver
  - Fix SPI controller base address for R40
  - Reorder device nodes based on base address for R40

* tag 'sunxi-fixes-for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: dts: sun8i: r40: Move SPI device nodes based on address order
  ARM: dts: sun8i: r40: Fix register base address for SPI2 and SPI3
  ARM: dts: sun8i: r40: Move AHCI device node based on address order
  bus: sunxi-rsb: Return correct data when mixing 16-bit and 8-bit reads
  ARM: dts: sun8i-a83t-tbs-a711: Fix USB OTG mode detection
  ARM: dts: sun8i-a83t-tbs-a711: HM5065 doesn't like such a high voltage
  ARM: dts: sun8i: a83t: Fix incorrect clk and reset macros for EMAC device

Link: https://lore.kernel.org/r/20200313055233.GA19649@wens.csie.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 13:41:02 +01:00
Masahiro Yamada
d198b34f38 .gitignore: add SPDX License Identifier
Add SPDX License Identifier to all .gitignore files.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-25 11:50:48 +01:00
Lubomir Rintel
a0c4adeeea ARM: dts: tango4: Make /serial compatible with ns16550a
ralink,rt2880-uart is compatible with ns16550a and all other
instances of RT2880 UART nodes include it in the compatible property.
Add it also here, to make the binding schema simpler.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Mans Rullgard <mans@mansr.com>
Link: https://lore.kernel.org/r/20200320174107.29406-8-lkundrak@v3.sk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-24 12:27:29 +01:00
Lubomir Rintel
ecd755fb73 ARM: dts: mmp*: Make the serial ports compatible with xscale-uart
XScale serial port driver is perfectly capable of supporting this hardware. A
separate compatible string is probably a historical mess.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200320174107.29406-7-lkundrak@v3.sk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-24 12:27:29 +01:00
Lubomir Rintel
c10419f945 ARM: dts: mmp*: Fix serial port names
A preferred node name for serial ports is "serial":

  mmp2-olpc-xo-1-75.dt.yaml: uart@d4030000: $nodename:0: 'uart@d4030000'
      does not match '^serial(@[0-9a-f,]+)*$'
  ...

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200320174107.29406-6-lkundrak@v3.sk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-24 12:27:29 +01:00
Lubomir Rintel
5a56cf3e87 ARM: dts: mmp2-brownstone: Don't redeclare phandle references
Extend the nodes by their phandle references instead of recreating the
tree and declaring references of the same names.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200320174107.29406-5-lkundrak@v3.sk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-24 12:27:29 +01:00
Lubomir Rintel
d6a14ce6cd ARM: dts: pxa*: Make the serial ports compatible with xscale-uart
Some drivers that claim to support mrvl,mmp-uart default to a reg-shift
of two, some don't. Be explicit to be on a safe side.

With that in place, a XScale serial port driver is perfectly capable of
supporting the MMP serial port. Add a compatible string.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200320174107.29406-4-lkundrak@v3.sk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-24 12:27:28 +01:00
Lubomir Rintel
8524e2a939 ARM: dts: pxa*: Fix serial port names
There's a preferred node name for serial ports, and it's not "uart":

  pxa910-dkb.dt.yaml: uart@d4017000: $nodename:0: 'uart@d4017000'
      does not match '^serial(@[0-9a-f,]+)*$'
  ...

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200320174107.29406-3-lkundrak@v3.sk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-24 12:27:28 +01:00
Lubomir Rintel
1f0c1314c5 ARM: dts: pxa*: Don't redeclare phandle references
Extend the nodes by their phandle references instead of recreating the
tree and declaring references of the same names.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200320174107.29406-2-lkundrak@v3.sk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-24 12:26:11 +01:00
Sungbo Eo
deeabb4c13 ARM: dts: oxnas: Fix clear-mask property
Disable all rps-irq interrupts during driver initialization to prevent
an accidental interrupt on GIC.

Fixes: 84316f4ef1 ("ARM: boot: dts: Add Oxford Semiconductor OX810SE dtsi")
Fixes: 38d4a53733 ("ARM: dts: Add support for OX820 and Pogoplug V3")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-03-23 09:34:09 +01:00
Greg Kroah-Hartman
d2e971d884 Merge 5.6-rc7 into usb-next
We need the USB fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-23 08:04:08 +01:00
Nicolas Saenz Julienne
55c7c06210 ARM: dts: bcm283x: Fix vc4's firmware bus DMA limitations
The bus is virtual and devices have to inherit their DMA constraints
from the underlying interconnect. So add an empty dma-ranges property to
the bus node, implying the firmware bus' DMA constraints are identical to
its parent's.

Fixes: 7dbe8c62ce ("ARM: dts: Add minimal Raspberry Pi 4 support")
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-03-22 14:45:24 -07:00
Cristian Birsan
b8c2c052de ARM: dts: at91: sama5d27_wlsom1_ek: add USB device node
Add USB device node for WLSoM1 EK and enable it.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
[eugen.hristev@microchip.com: ported to 5.4]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lore.kernel.org/r/20200318104236.21114-1-eugen.hristev@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-20 23:58:14 +01:00
Linus Walleij
6e97f0aaca ARM: dts: gemini: Add thermal zone to DIR-685
The DIR-685 can now exploit the thermal zone added by the
drive temperature sensor inside the hard drive. We have
patched the libata subsystem to assign the device nodes
properly to the SCSI devices and this is what the drivetemp
driver will use to populate the sensor and the thermal
zone, so pick that up into the thermal zone and let this
control the fan.

The hardware lacks an embedded temperature sensor so the
D-Link vendor firmware uses this method to control the
temperature of the NAS enclosure using the thermal sensor
inside the hard drive.

The drive temperature trigger points to be used comes from
the vendor firmware.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-20 23:20:31 +01:00
Linus Walleij
67ac6549b7 ARM: dts: gemini: Rename IDE nodes
By renaming the ATA drive nodes to "ide@" we activate the
semantic checks to the DT schema for the controller and use
the correct notation for PATA drives.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-20 23:20:26 +01:00
Dalon Westergreen
bd76a4f942 ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodes
The ptp_ref clock for Arria10 defaults to using the peripheral
pll emac ptp clock.  Without the ptp_ref clock in the gmac nodes
the driver defaults to the gmac main clock resulting in an
incorrect period for the ptp counter.

Signed-off-by: Dalon Westergreen <dalon.westergreen@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2020-03-20 14:27:39 -05:00
Rob Herring
ac5fe2e6d8 ARM: dts: sunxi: Fix dtc 'dma-ranges' warnings
'#address-cells' and '#size-cells' are needed in the same node (for the
child bus) as 'dma-ranges' in order to parse it. The kernel is more lax
and will walk up the tree to get the properties from a parent node, but
it's better to be explicit. dtc now does checks on 'dma-ranges' and is
more strict:

arch/arm/boot/dts/sun5i.dtsi:189.4-52: Warning (dma_ranges_format): \
/soc/dram-controller@1c01000:dma-ranges: "dma-ranges" property has invalid length (12 bytes) (parent #address-cells == 1, child #address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/sun8i-r40.dtsi:742.4-52: Warning (dma_ranges_format): \
/soc/dram-controller@1c62000:dma-ranges: "dma-ranges" property has invalid length (12 bytes) (parent #address-cells == 1, child #address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/sunxi-h3-h5.dtsi:563.4-52: Warning (dma_ranges_format): \
/soc/dram-controller@1c62000:dma-ranges: "dma-ranges" property has invalid length (12 bytes) (parent #address-cells == 1, child #address-cells == 2, #size-cells == 1)

Cc: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2020-03-19 21:16:20 -06:00
Roger Quadros
dfa7ea303f ARM: dts: omap5: Add bus_dma_limit for L3 bus
The L3 interconnect's memory map is from 0x0 to
0xffffffff. Out of this, System memory (SDRAM) can be
accessed from 0x80000000 to 0xffffffff (2GB)

OMAP5 does support 4GB of SDRAM but upper 2GB can only be
accessed by the MPU subsystem.

Add the dma-ranges property to reflect the physical address limit
of the L3 bus.

Cc: stable@kernel.org
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 10:01:28 -07:00
Tony Lindgren
4abd9930d1 ARM: dts: omap4-droid4: Fix lost touchscreen interrupts
Looks like we can have the maxtouch touchscreen stop producing interrupts
if an edge interrupt is lost. This can happen easily when the SoC idles as
the gpio controller may not see any state for an edge interrupt if it
is briefly triggered when the system is idle.

Also it looks like maxtouch stops sending any further interrupts if the
interrupt is not handled. And we do have several cases of maxtouch already
configured with a level interrupt, so let's do that.

With level interrupt the gpio controller has the interrupt state visible
after idle. Note that eventually we will probably also be using the
Linux generic wakeirq configured for the controller, but that cannot be
done until the maxtouch driver supports runtime PM.

Cc: maemo-leste@lists.dyne.org
Cc: Arthur Demchenkov <spinal.by@gmail.com>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 10:01:03 -07:00
Tony Lindgren
0143b9fd06 ARM: OMAP2+: Drop legacy platform data for ti81xx edma
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 09:48:54 -07:00
Tony Lindgren
e0c782f561 ARM: dts: Configure interconnect target module for ti816x edma
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure edma for
dm816x similar to what we have for dm814x.

Let's initially keep the legacy "ti,hwmods" peroperty, it will be
removed for all ti81xx in a later patch.

Note that as we now also start using the clkctrl clock binding on
dm816x, the board specific dts files must also have compatible
"ti,dm816". This is needed for the clkctrl clocks to probe properly,
so any out of tree dts files may need to be updated accordingly.

Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 09:48:54 -07:00
Tony Lindgren
e8bf402a48 ARM: dts: Configure interconnect target module for dm814x tptc3
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 09:48:53 -07:00
Tony Lindgren
71b35ca4e8 ARM: dts: Configure interconnect target module for dm814x tptc2
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 09:48:53 -07:00
Tony Lindgren
0cd3043431 ARM: dts: Configure interconnect target module for dm814x tptc1
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 09:48:53 -07:00
Tony Lindgren
08b3e52bc8 ARM: dts: Configure interconnect target module for dm814x tptc0
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 09:48:53 -07:00
Tony Lindgren
7b187c2a75 ARM: dts: Configure interconnect target module for dm814x tpcc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 09:48:53 -07:00
Tony Lindgren
6398f3478e ARM: dts: Configure interconnect target module for dm814x cpsw
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop the legacy "ti,hwmods" property.

As this module is very similar to what we already have configured
and working for am33xx, let's just update the whole cpsw with a
single patch to avoid some extra churn on the dts files.

Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 09:48:52 -07:00
Tony Lindgren
a7cbd5cb41 Drop legacy platform data for omaps for v5.7
This series of changes continues dropping legacy platform data for
 omaps by updating devices to probe with ti-sysc interconnect target
 module driver:
 
 - Update omap4, omap5, am437x, and dra7 display subsystem (DSS)
   to probe with device tree data only
 
 - Update am335x, am437x and dra7 to probe EDMA to probe with
   device tree data only
 
 - Drop legacy platform data for am335x and am437x PRUSS as the
   current code just keeps the devices in reset
 
 - Drop legacy platform data for omap4 DSP and IPU as the current
   code just keeps the devices in reset
 
 - Configure am437x and dra7 PRU-ICSS to probe with device tree
   data
 
 For the dropped omap4 DSP and IPU platform data, there will be patches
 coming later on to configure the accelerators using the omap remoteproc
 bindings so hopefully folks can actually use these devices eventually.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl5nwYURHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXNknBAAoxZgT7vx2BwsG0lpjbFrhBXIm9gQoCxC
 fFiMRLX4PdEtMSzyHooszuBVJN/AzFb/dY43psccKZnwkigfAduiB/9Gn9Nw/Cwf
 yLsaWiaUUfM6c1iQqv6HDV6fKal55emRZ/6RSfUlUMIyCcMRxg0NR8mSju3+uN9O
 qGK2Ksxp4sRdG+m2KylNMB7MDSSHxKEsAmEMHlAQNOF6+O0m+AoDLN39XCY50XS+
 2aUbcbyXbIK0lNSkbVOLf+UPZECIs7sy1qc02/OtG5i29z+0lJ/7men4R7gWIXRN
 m7P0OPFlo8GyMKDcSfWDvw7UC2bNGvQKDisW4AfN3CjnlxD67S/F/bMbS8SK3Nec
 vev/BmcMrhq4kEeTS+syUdLKwc8JI5dmrP/dhOBGwh1fdfoOrL2heG4ntLkMYX9r
 SeEcSY3ixbr+/oClM61lbxV1TCro5oTzvWhYipf8KJiuXQD8ggEyeoO+0VAqK7Xq
 LHdH+fEP2J72hXPdStUir6hJq1Fm1LClD9f0FPNWVj54xJtlHRYto/rKC7H3KzBJ
 +KncyaFuUmOCDgt0bDqiTV7PXfURzqDERW6YL2UYpHGgQ0CqeBE89MGEKHU5Xzno
 i8PrTFDLM9Icej8LIuD65CvFzAMFg5Hxu0bD7JDXh+Vmox5aHiQCPCLYD5oK3d/e
 Z/tllQbJpIM=
 =QqzI
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.7/ti-sysc-drop-pdata-signed' into ti81xx

Drop legacy platform data for omaps for v5.7

This series of changes continues dropping legacy platform data for
omaps by updating devices to probe with ti-sysc interconnect target
module driver:

- Update omap4, omap5, am437x, and dra7 display subsystem (DSS)
  to probe with device tree data only

- Update am335x, am437x and dra7 to probe EDMA to probe with
  device tree data only

- Drop legacy platform data for am335x and am437x PRUSS as the
  current code just keeps the devices in reset

- Drop legacy platform data for omap4 DSP and IPU as the current
  code just keeps the devices in reset

- Configure am437x and dra7 PRU-ICSS to probe with device tree
  data

For the dropped omap4 DSP and IPU platform data, there will be patches
coming later on to configure the accelerators using the omap remoteproc
bindings so hopefully folks can actually use these devices eventually.
2020-03-17 09:48:39 -07:00
Tony Lindgren
1bf4b15b19 clk: ti: Fix dm814x clkctrl for ethernet
We are missing alwon ethernet clock for dm814x and this prevents us
from probing the CPSW with device tree only data. Looks like Ethernet
currently only works if it has been enabled in the bootloader.

Looks like relying on the bootloader clocks is not an issue with the
mainline kernel currently, but it will be an issue when configuring
CPSW Ethernet to probe with device tree data only as we will be managing
the clocks.

Fixes: 26ca2e9738 ("clk: ti: dm814: add clkctrl clock data")
Cc: linux-clk@vger.kernel.org
Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 09:45:24 -07:00
Johan Jonker
9b505cf549 ARM: dts: rockchip: remove #address-cells and #size-cells from i2s nodes
An experimental test with the command below gives
for example this error:

arch/arm/boot/dts/rk3036-evb.dt.yaml: i2s@10220000:
'#address-cells', '#size-cells'
do not match any of the regexes: 'pinctrl-[0-9]+'

'#address-cells' and '#size-cells' are not a valid property
for i2s nodes, so remove them.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200311162524.19748-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:24:06 +01:00
Johan Jonker
d4502e6398 ARM: dts: rockchip: swap clocks and clock-names values for i2s nodes
Current dts files with 'i2s' nodes are manually verified.
In order to automate this process rockchip-i2s.txt
has to be converted to yaml. In the new setup dtbs_check with
rockchip-i2s.yaml expect clocks and clock-names values
in the same order. Fix this for some older Rockchip models.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200311162524.19748-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:23:41 +01:00
Johan Jonker
dff0387340 ARM: dts: rockchip: remove clock-names property from 'generic-ohci' nodes
A test with the command below gives for example this error:

arch/arm/boot/dts/rv1108-evb.dt.yaml: usb@30160000:
'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+'

'clock-names' is not a valid property name for usb_host nodes with
compatible string 'generic-ohci', so remove them.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ohci.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200312171441.21144-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:23:17 +01:00
Johan Jonker
d1068578ec ARM: dts: rockchip: remove clock-names property from 'generic-ehci' nodes
A test with the command below gives for example this error:

arch/arm/boot/dts/rv1108-evb.dt.yaml: usb@30140000:
'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+'

'clock-names' is not a valid property name for usb_host nodes with
compatible string 'generic-ehci', so remove them.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ehci.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200312171441.21144-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:23:08 +01:00
Johan Jonker
384fdcec30 ARM: dts: rockchip: swap clocks and clock-names values for spdif nodes
Current dts files with 'spdif' nodes are manually verified.
In order to automate this process rockchip-spdif.txt
has to be converted to yaml. In the new setup dtbs_check with
rockchip-spdif.yaml expect clocks and clock-names values
in the same order. Fix this for some older Rockchip models.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-spdif.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200312172240.21362-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:22:54 +01:00
Joshua Watt
579f52f680 ARM: dts: rockchip: Keep rk3288-tinker SD card IO powered during reboot
IO voltage regulator for the SD card must be kept on all the time,
otherwise when the board reboots the SD card can't be read by the
bootloader.

Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Link: https://lore.kernel.org/r/20200219204224.34154-1-JPEWhacker@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:22:31 +01:00
Johan Jonker
5b9870acf6 ARM: dts: rockchip: remove clock-frequency from saradc node rv1108
An experimental test with the command below gives these errors:

arch/arm/boot/dts/rv1108-elgin-r1.dt.yaml: adc@1038c000:
'clock-frequency'
does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/rv1108-evb.dt.yaml: adc@1038c000:
'clock-frequency'
does not match any of the regexes: 'pinctrl-[0-9]+'

'clock-frequency' is not a valid property for a saradc node,
so remove it.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/iio/adc/
rockchip-saradc.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200313132646.10317-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:22:05 +01:00
Johan Jonker
6263806b0a ARM: dts: rockchip: fix vref-supply for &saradc node rk3288 firefly reload
A test with the command below gives this error:

arch/arm/boot/dts/rk3288-firefly-reload.dt.yaml: saradc@ff100000:
'vref-supply' is a required property

PMIC Channel OUT11 with powername 'vcc_18'
(connected through R155 bridge with 'vccio_wl')
is used for the recovery key and ADC_AVDD_1V8.

Fix error by adding 'vcc_18' as vref for the saradc.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/iio/adc/
rockchip-saradc.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200314140755.4877-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:21:48 +01:00
Katsuhiro Suzuki
3425fe335c ARM: dts: rockchip: use DMA channels for UARTs for RK3288
This patch enables to use DMAC for all UARTs that are connected to
dmac_peri core for Rochchip RK3288.

Only uart2 is connected different DMAC (dmac_bus_s) so keep current
settings on this patch.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Link: https://lore.kernel.org/r/20200315095115.10106-1-katsuhiro@katsuster.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:20:22 +01:00
Johan Jonker
c0044dc7d6 ARM: dts: rockchip: rk3xxx: fix L2 cache-controller nodename
A test with the command below gives for example this error:

arch/arm/boot/dts/rk3066a-bqcurie2.dt.yaml:
l2-cache-controller@10138000: $nodename:0:
'l2-cache-controller@10138000'
does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Fix error by changing nodename to 'cache-controller'.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/l2c2x0.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200316165453.3022-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:19:46 +01:00
Johan Jonker
1a7e99599d ARM: dts: rockchip: fix lvds-encoder ports subnode for rk3188-bqedison2qc
A test with the command below gives this error:

arch/arm/boot/dts/rk3188-bqedison2qc.dt.yaml: lvds-encoder:
'ports' is a required property

Fix error by adding a ports wrapper for port@0 and port@1
inside the 'lvds-encoder' node for rk3188-bqedison2qc.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/
bridge/lvds-codec.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200316174647.5598-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17 01:19:24 +01:00
Linus Torvalds
3d135f5224 ARM fixes for 5.6:
- allow use of ARMv8 arch timer in 32-bit VDSO
 - rename missed .fixup section
 - fix kbuild issue with stack protector GCC plugin
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEuNNh8scc2k/wOAE+9OeQG+StrGQFAl5vYRQACgkQ9OeQG+St
 rGRBoRAAgiHNxQsp2KhIPVdFIff6+pROJlS0faZiy5EhJpst4YUuGrVl8VTcWHxA
 Lyj1pR4yI59bGI9c3Z9XPspJDLyAO5dL454KA5/+M2tqYNzs+eQWfnPfbASun+5C
 RRfGxjCuWME9Hv/KoZ2kqx3LFFcfb1jlcLHZIq7R/yoviLZK4wuBsleIfPsApkmK
 W2Oc8MbTZRakOVdrg1xcavf7TWA6X/8SoUwgC2toqXfzr6VOpHoSWNq1DxH1A8d4
 fJSaN8s6A0inGUlqfsjStnIAwVQGrKIY0xl4Dxl9IV7wuFBJ/yKYUm7+gl0Shk1l
 h867+NcGgD3xBklVYekZZB5L3VtvMjkSfRW8VWaxeeivlM+puKverVIrisOyBCVV
 WyMws6+kiJRIUyrbxNRJxPD7qrDZuZUp5djGVKPr1xjyHJR203dYF9CBmMNfzsV0
 TrNNFSwiTKb3y0XNQO/G/m7QfB/cnAB+/KBhOoO8jEHrNpqVU8uqpKzUto3tlcNM
 WfHWOauoJtZNqtNVlhXyylHCoZ7P6jg2MqCE1gL+CzgoQJFkwWs1+lW00P3d9s2O
 09SBp1jHsAF05gpaq3uAQDRKeuMggAtlkolRnu2EY0tolG8snwocO4lwHUw0S0z6
 OdjGtBcec2KPWK3kzaym4F0/RPa2xgvHaTO/LSU0Ckw1GgXwG0E=
 =5UES
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:

 - allow use of ARMv8 arch timer in 32-bit VDSO

 - rename missed .fixup section

 - fix kbuild issue with stack protector GCC plugin

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8961/2: Fix Kbuild issue caused by per-task stack protector GCC plugin
  ARM: 8958/1: rename missed uaccess .fixup section
  ARM: 8957/1: VDSO: Match ARMv8 timer in cntvct_functional()
2020-03-16 15:39:52 -07:00
Kunihiko Hayashi
d1876a0bcf ARM: dts: uniphier: Set SCSSI clock and reset IDs for each channel
Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.

Pro5 and PXs2 are affected by this fix, but the SCSSI clock gate of Pro5 is
common to all channels.

Fixes: 92fa4f4cc2 ("ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-17 00:01:02 +09:00
Kunihiko Hayashi
8b1d9ec4c2 ARM: dts: uniphier: Add USB3 controller nodes for Pro5
Add USB3 controller nodes for Pro5 SoC and the boards.

Pro5 SoC has 2 controllers. USB0 includes 1 SS-PHY and 1 HS-PHY, and USB1
includes 1 SS-PHY and 2 HS-PHY.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16 23:52:09 +09:00
Oleksij Rempel
2d42fa311d ARM: dts: imx6q-marsboard: properly define rgmii PHY
The Atheros AR8035 PHY can be autodetected but can't use interrupt
support provided on this board. Define MDIO bus and the PHY node to make
it work properly.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:47:20 +08:00
Oleksij Rempel
3ce705650d ARM: dts: imx6dl-riotboard: properly define rgmii PHY
The Atheros AR8035 PHY can be autodetected but can't use interrupt
support provided on this board. Define MDIO bus and the PHY node to make
it work properly.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:47:03 +08:00
Lucas Stach
ab56990713 ARM: dts: imx51-zii-rdu1: set name prefix for TPA6130A2
Set a sound name prefix for the HPA, as otherwise the sound controls
naming will clash with the controls of the DAC.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:44:53 +08:00
Lucas Stach
49b027156b ARM: dts: imx6: RDU2: assign video PLL as input to LDB
Currently we don't ensure that the LDB is clocked from the video PLL
and relied on the bootloader to do the correct setup. This isn't always
true, in which case we would run with a vastly different video clock
than the desired one. Fix this by assigning the proper parent to the
LDB.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:44:09 +08:00
Igor Opaniuk
47d1825a6a ARM: dts: vf: toradex: SPDX tags and copyright cleanup
1. Replace boiler plate licenses texts with the SPDX license
identifiers in Toradex Vybrid-based SoM device trees.
2. As X11 is identical to the MIT License, but with an extra sentence
that prohibits using the copyright holders' names for advertising or
promotional purposes without written permission, use MIT license instead
of X11 ('s/X11/MIT/g').
3. Replace "Toradex AG" with "Toradex" in the Copyright notice.
4. Use GPL2.0+ instead of GPL2.0, as it's used now by default for all
new DTS files.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:26:36 +08:00
Igor Opaniuk
9ceef851b0 ARM: dts: imx7: toradex: use SPDX-License-Identifier
1. Replace boiler plate licenses texts with the SPDX license
identifiers in Toradex i.MX7-based SoM device trees.
2. As X11 is identical to the MIT License, but with an extra sentence
that prohibits using the copyright holders' names for advertising or
promotional purposes without written permission, use MIT license instead
of X11 ('s/X11/MIT/g').
3. Replace "Toradex AG" with "Toradex" in the Copyright notice.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:26:28 +08:00
Igor Opaniuk
bb42a8bf2e ARM: dts: imx6: toradex: use SPDX-License-Identifier
1. Replace boiler plate licenses texts with the SPDX license
identifiers in Toradex iMX6-based SoM device trees.
2. As X11 is identical to the MIT License, but with an extra sentence
that prohibits using the copyright holders' names for advertising or
promotional purposes without written permission, use MIT license instead
of X11 ('s/X11/MIT/g').
3. Replace "Toradex AG" with "Toradex" in the Copyright notice.
4. Use GPL2.0+ instead of GPL2.0, as it's used now by default for all
new DTS files from Toradex.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:03:01 +08:00
Philipp Zabel
288b9e6f75 ARM: dts: imx51: add capture-subsystem device
Add IPU CSI ports and capture-subsystem device so the capture subsystem
part of the IPUv3EX can be used with the staging imx-media driver.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:41:15 +08:00
Peng Fan
f5d35d87ef ARM: dts: imx: add nvmem property for cpu0
Add nvmem related property for cpu0, then nvmem API could be used
to read cpu speed grading to avoid directly read OCOTP registers
mapped which could not handle defer probe.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:18:29 +08:00
Fabio Estevam
98670a0bb0 ARM: dts: imx6qdl: Add imx6qdl-pico support
Add support for all the imx6qdl-pico variants.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:07:31 +08:00
Fabio Estevam
47246fafef ARM: dts: imx6ul-pico: Add support for the dwarf baseboard
Add support for the imx6ul pico board with dwarf baseboard combination.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:07:28 +08:00
Fabio Estevam
6418fd9241 ARM: dts: imx7d-pico: Add support for the nymph baseboard
Add support for the imx7d pico board with nymph baseboard combination.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:07:26 +08:00
Fabio Estevam
8b646cfb84 ARM: dts: imx7d-pico: Add support for the dwarf baseboard
Add support for the imx7d pico board with dwarf baseboard combination.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:07:15 +08:00
Michael Heimpold
e4fdac5def ARM: dts: imx23: introduce mmc0_sck_cfg
The Olimex Olinuxino board has a user led connected to SSP1_DETECT.
But since this pin is listed in mmc0_pins_fixup, it is already claimed
by MMC driver and this results in this error during boot:

[    1.390000] imx23-pinctrl 80018000.pinctrl: pin SSP1_DETECT already
  requested by 80010000.spi; cannot claim for leds
[    1.400000] imx23-pinctrl 80018000.pinctrl: pin-65 (leds) status -22
[    1.410000] imx23-pinctrl 80018000.pinctrl: could not request pin 65
   (SSP1_DETECT) from group led_gpio2_1.0  on device 80018000.pinctrl
[    1.420000] leds-gpio leds: Error applying setting, reverse things back
[    1.430000] leds-gpio: probe of leds failed with error -22

This fix it, introduce mmc0_sck_cfg and switch the Olinuxino board to it.

Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 08:49:55 +08:00
Tao Ren
df8ae98d0b ARM: dts: aspeed-g4: add vhub port and endpoint properties
Add "aspeed,vhub-downstream-ports" and "aspeed,vhub-generic-endpoints"
properties to describe supported number of vhub ports and endpoints.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-03-15 12:11:56 +02:00
Tao Ren
a1256487fd ARM: dts: aspeed-g5: add vhub port and endpoint properties
Add "aspeed,vhub-downstream-ports" and "aspeed,vhub-generic-endpoints"
properties to describe supported number of vhub ports and endpoints.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-03-15 12:11:53 +02:00
Tao Ren
3f796460ed ARM: dts: aspeed-g6: add usb functions
Add USB components and according pin groups in aspeed-g6 dtsi.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-03-15 12:11:49 +02:00
Yann Gautier
431c89e6f3 ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards
On those boards, as stated in schematics files, the regulator used for IOs
is VDD. It was wrongly set to v3v3.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Yann Gautier
79e9650538 ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards
On STM32MP1 DK1, DK2, ED1 and EV1 boards, there is only a micro SD socket.
This is also the case on Avenger board.
They don't support the Write Protect pin.
The disable-wp is then added in the SD-cards sdmmc1 nodes.
This avoids executing some code and a warning during driver probe.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Yann Gautier
877db62ea5 ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards
The broken-cd properties are replaced with cd-gpios, with the correct
GPIO to detect the card insertion. The GPIO lines require a pull-up.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Benjamin Gaignard
7519e95ba5 ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards
Remove unused properties from stpmic node.
The issues have been detected by running dtbs_check.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Benjamin Gaignard
f68e2dbc59 ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1
Rename stmfx joystick pins names according to yaml description.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Ahmad Fatoum
d6210da4f8 ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x
All of the STM32MP151[1], STM32MP153[2] and STM32MP157[3] have their
Cortex-A7 cores running at 650 MHz.

Add the clock-frequency property to CPU nodes to avoid warnings about
them missing.

[1]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp151.html
[2]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp153.html
[3]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Alain Volmat
b65b6fc569 ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
Add the wakeup-source property in all i2c nodes of
the SoC stm32mp157c so that those I2C controllers can become
wakeup-source.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 16:11:12 +01:00
Alain Volmat
1c1cf5996c ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp157c-ed1 board.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 16:11:12 +01:00
Roger Quadros
cfb5d65f25 ARM: dts: dra7: Add bus_dma_limit for L3 bus
The L3 interconnect's memory map is from 0x0 to
0xffffffff. Out of this, System memory (SDRAM) can be
accessed from 0x80000000 to 0xffffffff (2GB)

DRA7 does support 4GB of SDRAM but upper 2GB can only be
accessed by the MPU subsystem.

Add the dma-ranges property to reflect the physical address limit
of the L3 bus.

Issues ere observed only with SATA on DRA7-EVM with 4GB RAM
and CONFIG_ARM_LPAE enabled. This is because the controller
supports 64-bit DMA and its driver sets the dma_mask to 64-bit
thus resulting in DMA accesses beyond L3 limit of 2G.

Setting the correct bus_dma_limit fixes the issue.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Cc: stable@kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-13 07:40:55 -07:00
Linus Walleij
2118c8fd98 ARM: dts: Add devicetree for Samsung GT-S7710
The Samsung GT-S7710 also known as XCover 2 or Skomer is a
Ux500-based mobile phone. In the source code release from
Samsung's open source site it is referred to as "Skomer".

Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200307193627.4092-1-linus.walleij@linaro.org
[Typographic fixups when applying]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-13 14:06:51 +01:00
Alain Volmat
bef15fc0fa ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
Add the sleep state pinctrl entry for the i2c2 and i2c5 nodes
of the stm32mp157c-ev1 board.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 13:00:16 +01:00
Alain Volmat
b7fc0a87b9 ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp15xx-dkx.dtsi

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 13:00:16 +01:00
Alain Volmat
a5e5576552 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards
On DK boards, all I2C4 bus slaves supports I2C Fast Mode hence setting
the bus frequency to 400 KHz.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 12:57:43 +01:00
Alain Volmat
8bc631b650 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1
On this board, the I2C4 bus has only a single slave (pmic) which
supports I2C Fast Mode hence setting bus frequency to 400 KHz.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 12:47:21 +01:00
Sowjanya Komatineni
bdb2c52a6e ARM: tegra: Update sound node clocks in device tree
clk_out_1, clk_out_2, and clk_out_3 are part of Tegra PMC block but were
previously erroneously provided by the clock and reset controller.

clk_out_1 is dedicated for audio mclk on Tegra30 through Tegra210.

This patch updates device tree sound node to use clk_out_1 from the PMC
provider as mclk and uses assigned-clock properties to specify clock
parents for clk_out_1 and extern1.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:25:44 +01:00
Sowjanya Komatineni
86614b5d6d ARM: tegra: Add clock-cells property to PMC
Tegra PMC has clk_out_1, clk_out_2, clk_out_3, and blink clock.

These clocks were erroneously provided by the clock and reset controller
and are now provided by the PMC instead because that's where the primary
controls are.

This patch adds #clock-cells property with 1 clock specifier to the
Tegra PMC node in device tree.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:25:43 +01:00
Nagarjuna Kristam
24d43a30e7 ARM: tegra: Remove USB 2-0 port from Jetson TK1 padctl
On Jetson TK1 USB 2-0 port is controlled by phy-tegra-usb driver
rather than padctl driver. Remove the entry for the same.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:25:43 +01:00
Nick Hudson
6687c201fd ARM: bcm2835-rpi-zero-w: Add missing pinctrl name
Define the sdhci pinctrl state as "default" so it gets applied
correctly and to match all other RPis.

Fixes: 2c7c040c73 ("ARM: dts: bcm2835: Add Raspberry Pi Zero W")
Signed-off-by: Nick Hudson <skrll@netbsd.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-03-12 13:06:55 -07:00
Jernej Skrabec
dbf72a8c01 ARM: dts: sun8i: a83t: Add device node for rotation core
Allwinner A83T contains rotation core. Add a node for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-12 00:27:18 +08:00
Jernej Skrabec
da18032258 ARM: dts: sunxi: Fix DE2 clocks register range
As it can be seen from DE2 manual, clock range is 0x10000.

Fix it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Fixes: 73f122c827 ("ARM: dts: sun8i: a83t: Add display pipeline")
Fixes: 05a43a262d ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Fixes: 21b2992093 ("ARM: sun8i: v3s: add device nodes for DE2 display pipeline")
Fixes: d8c6f1f029 ("ARM: sun8i: h3/h5: add DE2 CCU device node for H3")
[wens@csie.org: added fixes tags]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-12 00:24:29 +08:00
Corentin Labbe
00cef5e404 ARM: dts: sun8i: a33: add the new SS compatible
Add the new A33 SS compatible to the crypto node.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-11 23:12:06 +08:00
Chen-Yu Tsai
d9b553b02e ARM: dts: sun8i: r40: Move SPI device nodes based on address order
When the SPI device nodes were added, they were added in the wrong
location in the device tree file. The device nodes should be sorted
by register address.

Move the devices node to their correct positions within the file.

Fixes: 554581b791 ("ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes")
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-11 22:49:40 +08:00
Chen-Yu Tsai
abe076fb0d ARM: dts: sun8i: r40: Fix register base address for SPI2 and SPI3
When the SPI device nodes were added, SPI2 and SPI3 had incorrect
register base addresses.

Fix the base address for both of them.

Fixes: 554581b791 ("ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes")
Reported-by: JuanEsf <juanesf91@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-11 22:47:58 +08:00
Chen-Yu Tsai
fe3a04824f ARM: dts: sun8i: r40: Move AHCI device node based on address order
When the AHCI device node was added, it was added in the wrong location
in the device tree file. The device nodes should be sorted by register
address.

Move the device node to before EHCI1, where it belongs.

Fixes: 41c64d3318 ("ARM: dts: sun8i: r40: add sata node")
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-11 22:45:58 +08:00
Marek Szyprowski
32a1671ff8 ARM: dts: exynos: Fix polarity of the LCD SPI bus on UniversalC210 board
Recent changes in the SPI core and the SPI-GPIO driver revealed that the
GPIO lines for the LD9040 LCD controller on the UniversalC210 board are
defined incorrectly. Fix the polarity for those lines to match the old
behavior and hardware requirements to fix LCD panel operation with
recent kernels.

Cc: <stable@vger.kernel.org> # 5.0.x
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-03-11 11:03:03 +01:00
Johan Jonker
0c1cb8b00c ARM: dts: add bus to rockchip amba nodenames
A test with the command below gives for example this error:

arch/arm/boot/dts/rk3188-bqedison2qc.dt.yaml: amba: $nodename:0:
'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

AMBA is a open standard for the connection and
management of functional blocks in a SoC.
It's compatible with 'simple-bus', so fix this error
by adding 'bus' to all Rockchip 'amba' nodes.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/
schemas/simple-bus.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200302153047.17101-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-11 10:30:43 +01:00
Johan Jonker
79f23601fc ARM: dts: rockchip: remove #dma-cells from dma client nodes for rv1108
When we combine spi-rockchip.yaml and
spi-controller.yaml and add 'additionalProperties: false'
it gives for example this error:

arch/arm/boot/dts/rv1108-evb.dt.yaml: spi@10270000:
'#dma-cells' does not match any of the regexes:
'^.*@[0-9a-f]+$', '^slave$'

'#dma-cells' are not used for dma clients, so remove them all.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/spi-rockchip.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200309134020.14935-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-11 10:08:48 +01:00
Johan Jonker
8a385eb572 ARM: dts: rockchip: fix rockchip,default-sample-phase property names
A test with the command below does not detect all errors
in combination with 'additionalProperties: false' and
allOf:
  - $ref: "synopsys-dw-mshc-common.yaml#"
allOf:
  - $ref: "mmc-controller.yaml#"

'additionalProperties' applies to all properties that are not
accounted-for by 'properties' or 'patternProperties' in
the immediate schema.

First when we combine rockchip-dw-mshc.yaml,
synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives
for example this error:

arch/arm/boot/dts/rk3036-evb.dt.yaml: mmc@1021c000:
'default-sample-phase' does not match any of the regexes:
'^.*@[0-9]+$', '^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|
uhs-(sdr(12|25|50|104)|ddr50))$', 'pinctrl-[0-9]+'

'default-sample-phase' is not a valid property name for mmc nodes.
Fix this error by renaming it to 'rockchip,default-sample-phase'.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200307134841.13803-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-11 10:06:49 +01:00
Johan Jonker
9cd568dc58 ARM: dts: rockchip: fix vqmmc-supply property name for rk3188-bqedison2qc
A test with the command below does not detect all errors
in combination with 'additionalProperties: false' and
allOf:
  - $ref: "synopsys-dw-mshc-common.yaml#"
allOf:
  - $ref: "mmc-controller.yaml#"

'additionalProperties' applies to all properties that are not
accounted-for by 'properties' or 'patternProperties' in
the immediate schema.

First when we combine rockchip-dw-mshc.yaml,
synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives
this error:

arch/arm/boot/dts/rk3188-bqedison2qc.dt.yaml: mmc@10218000:
'vmmcq-supply' does not match any of the regexes:
'^.*@[0-9]+$',
'^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|
uhs-(sdr(12|25|50|104)|ddr50))$',
'pinctrl-[0-9]+'

'vmmcq-supply' is not a valid property name for mmc nodes.
Fix this error by renaming it to 'vqmmc-supply'.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200307134841.13803-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-11 10:06:30 +01:00
Martin Kaiser
c2902fb04e ARM: dts: imx25-pinfunc: add config for kpp rows 4 to 7
i.MX25's Keypad Port (KPP) can be used with a key pad matrix of up to
8 x 8 keys. Add pin configurations for rows 4 to 7.

The new defines have been tested on an out-of-tree board.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:55:19 +08:00
Horia Geantă
6cef60ff17 ARM: dts: imx: align name for crypto node and child nodes
crypto node should use the "crypto" generic naming,
and not a specific one ("sahara", "dcp", "caam").

Child nodes of the crypto node for caam crypto engine
should use the "jr" name (without an index),
as indicated in the DT binding.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:53:01 +08:00
Marco Felsch
636b45b8ef ARM: dts: imx6: phycore-som: fix arm and soc minimum voltage
The current set minimum voltage of 730000µV seems to be wrong. I don't
know the document which specifies that but the imx6qdl datasheets says
that the minimum voltage should be 0.925V for VDD_ARM (LDO bypassed,
lowest opp) and 1.15V for VDD_SOC (LDO bypassed, lowest opp).

Fixes: ddec5d1c00 ("ARM: dts: imx6: Add initial support for phyCORE-i.MX 6 SOM")
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:28:33 +08:00
Tim Harvey
d2cf2f91ba ARM: dts: imx6qdl-gw5910: add CC1352 UART
The GW5910-C revision adds a TI CC1352 connected to IMX UART4

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:03:00 +08:00
Marian-Cristian Rotariu
99ae78f1fc ARM: dts: iwg22d-sodimm: Enable touchscreen
In one of the iWave-G22D development board variants, called Generic SODIMM
Development Platform, we have an LCD with touchscreen. The resistive touch
controller, STMPE811 is on the development board and is connected through
the i2c5 of the RZ-G1E.

Additionally, this controller should generate an interrupt to the CPU and
it is connected through GPIO4,4 to the GIC.

Touch was tested with one of our iW-RainboW-G22D-SODIMM RZ/G1E development
platforms.

More details on the iWave website:
https://www.iwavesystems.com/rz-g1e-sodimm-development-kit.html

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1583336650-25848-1-git-send-email-marian-cristian.rotariu.rb@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-03-11 09:01:09 +01:00
Marian-Cristian Rotariu
7f61dff1ed ARM: dts: iwg22d-sodimm: Enable LCD panel
On the Generic SODIMM Development Platform there is an RGB LCD panel
directly connected to the DU output. It uses the TPU0 as backlight, one
GPIO pull-up configuration for power enable, R[2:7], G[2:7], B[2:7],
VSYNC, HSYNC, DU0_DISP and, DU0_CLK as inputs.

There is no encoder between the DU and the panel, therefore the default
connector driver is used.

The two variants of the iW-G22D should be mutually exclusive, therefore
this patch also disables the RGB LCD display when the HDMI extension board
is used.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1583239490-8837-1-git-send-email-marian-cristian.rotariu.rb@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-03-11 09:01:09 +01:00
Russell King
b7dc7205b2 ARM: dts: imx6qdl-sr-som-ti: indicate powering off wifi is safe
We need to indicate that powering off the TI WiFi is safe, to avoid:

wl18xx_driver wl18xx.2.auto: Unbalanced pm_runtime_enable!
wl1271_sdio mmc0:0001:2: wl12xx_sdio_power_on: failed to get_sync(-13)

which prevents the WiFi being functional.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:46:01 +08:00
Marco Felsch
50f5b89a32 ARM: dts: imx6: phycore-som: add da9062 gpio support
The pmic is a mfd device and supports gpios. Those gpios are not routed
to the SoM baseboard pin header but they are connected to the i.MX6. We
need the GPIO's to configure the pmic to select between the
suspend/resume arm and soc voltages

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:37:13 +08:00
Marco Felsch
1f4e29d24b ARM: dts: imx6: phycore-som: explicit disable pmic watchdog during suspend
By default the phycore-som has support for two watchdog devices: 1st the
internal imx6 watchdog and 2nd the DA9062 PMIC watchdog. According [1]
the PMIC watchdog is used as boot watchdog. It is common to use this
watchdog during "system up" time too. Furthermore the PMIC watchdog can
be used to address ERR007117 since the phycore-som can be equipped with
NAND or eMMC storage.

The PMIC watchdog can be enabled/disabled by the PMIC itself if the PMIC
enters POWERDOWN mode or by the host. The PMIC powerdown mode can't be
used due to the PCB design. So the watchdog is still enabled during a
suspend which causes a system reset. We need to tell the driver to
disable the watchdog during a system suspend and to reenable it upon a
resume to fix this.

[1] https://git.pengutronix.de/cgit/barebox/tree/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi#n73

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:36:16 +08:00
Anson Huang
684720000a ARM: dts: imx: Make iomuxc node name generic
Node name should be generic, use "pinctrl" instead of "iomuxc"
for all i.MX6/7 SoCs.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:20:51 +08:00
André Draszik
135be16d35 ARM: dts: imx7s: add snvs clock to pwrkey
On i.MX7, the SNVS requires a clock. This is similar to the clock
bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled,
then SNVS doesn't work, and as such the pwrkey driver doesn't
work (i.e. hangs the kernel, as the clock isn't enabled).

Also see commit ec2a844ef7
("ARM: dts: imx7s: add snvs rtc clock")
for a similar fix.

Signed-off-by: André Draszik <git@andred.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 14:46:38 +08:00