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ARM: dts: sun8i: r40: Fix register base address for SPI2 and SPI3

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When the SPI device nodes were added, SPI2 and SPI3 had incorrect
register base addresses.

Fix the base address for both of them.

Fixes: 554581b791 ("ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes")
Reported-by: JuanEsf <juanesf91@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Chen-Yu Tsai 2020-03-11 01:47:08 +08:00
parent fe3a04824f
commit abe076fb0d
1 changed files with 4 additions and 4 deletions
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8
arch/arm/boot/dts/sun8i-r40.dtsi
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@ -689,10 +689,10 @@ spi1: spi@1c06000 {
#size-cells = <0>;
};
spi2: spi@1c07000 {
spi2: spi@1c17000 {
compatible = "allwinner,sun8i-r40-spi",
"allwinner,sun8i-h3-spi";
reg = <0x01c07000 0x1000>;
reg = <0x01c17000 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
clock-names = "ahb", "mod";
@ -702,10 +702,10 @@ spi2: spi@1c07000 {
#size-cells = <0>;
};
spi3: spi@1c0f000 {
spi3: spi@1c1f000 {
compatible = "allwinner,sun8i-r40-spi",
"allwinner,sun8i-h3-spi";
reg = <0x01c0f000 0x1000>;
reg = <0x01c1f000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
clock-names = "ahb", "mod";