Commit Graph

60 Commits

Author SHA1 Message Date
Simon Horman
56de959f53 arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property
Remove cap-mmc-highspeed property from SDHI2 and SDHI3.

This property is unnecessary as the driver automatically sets
the highspeed capability. Furthermore its use is inconsistent with SDHI0
and SDHI1 which are also highspeed capable but do not have this property
present.

Found by inspection.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:16 +02:00
Geert Uytterhoeven
f826473520 arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes
The audio-dmac nodes used the generic compatible property only.
Add the SoC-specific one, to make it future proof.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:23 +02:00
Laurent Pinchart
a001a07fe8 arm64: dts: renesas: r8a7795: Add DU device to DT
Add the DU device to r8a7795.dtsi in a disabled state.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:10 +02:00
Laurent Pinchart
9f8573e38a arm64: dts: renesas: r8a7795: Add VSP instances
The r8a7795 has 9 VSP instances.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:10 +02:00
Laurent Pinchart
52cd078325 arm64: dts: renesas: r8a7795: Add FCPV nodes
The FCPs handle the interface between various IP cores and memory. Add
the instances related to the VSP2s.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:09 +02:00
Yoshihiro Shimoda
d2422e1088 arm64: dts: r8a7795: Add HSUSB device node
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:26:27 +02:00
Wolfram Sang
dcdca4d538 arm64: dts: r8a7795: set maximum frequency for SDHI clocks
Define the upper limit otherwise the driver cannot utilize max speeds.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:26:27 +02:00
Kieran Bingham
bfb3145934 arm64: dts: r8a7795: add FDP1 device nodes
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:26:26 +02:00
Kieran Bingham
28fc813153 arm64: dts: r8a7795: add FCPF device nodes
Provide nodes for the FCP devices dedicated to the FDP device channels.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:26:26 +02:00
Ramesh Shanmugasundaram
162cd7845d arm64: dts: r8a7795: Add CAN FD support
Adds CAN FD controller node for r8a7795.

Note: CAN FD controller register base address specified in R-Car Gen3
Hardware User Manual v0.5E is incorrect. The correct address is:

CAN FD - 0xe66c0000

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-07-07 10:21:18 +02:00
Geert Uytterhoeven
a5547642a4 arm64: dts: r8a7795: Add missing blank lines between cpu nodes
For consistency with a57_0/a57_1 cpu nodes, and all other nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-07-07 10:21:18 +02:00
Simon Horman
21cc405c8a arm64: dts: r8a7795: Drop 0x from unit address of gic
Drop 0x from unit address of gic as this is the desired form for
a unit address.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-05-30 10:18:01 +09:00
Geert Uytterhoeven
6f7bf82cc9 arm64: dts: r8a7795: Fix W=1 dtc warnings
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property

Move the cache-controller nodes under the cpus node, and make their unit
names and reg properties match the MPIDR values.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30 09:34:50 +09:00
Geert Uytterhoeven
b186fbb6cc arm64: dts: r8a7795: Use SYSC "always-on" PM Domain for RWDT node
Hook up the RWDT device node to the SYSC "always-on" PM Domain, for a
more consistent device-power-area description in DT.

Cfr. commit 38dbb45ee4 ("arm64: dts: r8a7795: Use SYSC "always-on" PM
Domain")

Fixes: f43838a7ae014cba ("arm64: dts: r8a7795: Add RWDT node")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30 09:34:50 +09:00
Wolfram Sang
3114815f63 arm64: dts: r8a7795: Add RWDT node
This patch adds the RWDT device node for r8a7795.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30 09:34:50 +09:00
Niklas Söderlund
d78a1cfa61 arm64: dts: r8a7795: enable DMA for I2C
Add DMA properties to the I2C nodes.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30 09:34:50 +09:00
Pooya Keshavarzi
457f47b765 arm64: dts: r8a7795: Increase the size of GIC-400 mapped registers
There are some requirements about the GIC-400 memory layout and its
mapping if using 64k aligned base addresses like on r8a7795.

See e.g.

http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=21550029f709072aacf3b9

Map the whole memory range instead of only 0x2000. This will fix
the issue that some hypervisors, e.g. Xen, fail to handle the
interrupts correctly.

Signed-off-by: Pooya Keshavarzi <Pooya.Keshavarzi@de.bosch.com>
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30 09:34:49 +09:00
Geert Uytterhoeven
38dbb45ee4 arm64: dts: r8a7795: Use SYSC "always-on" PM Domain
Hook up all devices that are part of the CPG/MSSR Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27 14:10:41 +10:00
Geert Uytterhoeven
abbecab1a0 arm64: dts: r8a7795: Add SYSC PM Domains
Add a device node for the System Controller.
Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2
caches/SCUs to their respective PM Domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27 14:10:27 +10:00
Geert Uytterhoeven
9f33a8a9e1 arm64: dts: r8a7795: Don't disable referenced optional clocks
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.

Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.

Reported-by: Jürg Billeter <j@bitron.ch>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27 11:48:34 +10:00
Phil Edworthy
9251024a6a arm64: dts: r8a7795: Add PCIe nodes
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27 11:48:28 +10:00
Simon Horman
81ae0ac31b arm64: dts: r8a7795: Use USB3.0 fallback compatibility string
Use recently added fallback compatibility string in r8a7795 device tree.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-03-28 08:52:47 +09:00
Ramesh Shanmugasundaram
308b7e4ba6 arm64: dts: r8a7795: Add CAN support
Adds CAN controller nodes for r8a7795.

Note: CAN channel register base address mentioned in R-Car Gen3 Hardware
User Manual v0.5E is incorrect. The corrected base addresses are:

CAN Channel 0 - 0xe6c30000
CAN Channel 1 - 0xe6c38000

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-03-28 08:52:47 +09:00
Ramesh Shanmugasundaram
7811482f0e arm64: dts: r8a7795: Add CAN external clock support
Adds external CAN clock node for r8a7795. This clock can be used as
fCAN clock of CAN and CAN FD controller.

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-03-28 08:52:47 +09:00
Yoshihiro Shimoda
a2bcdc2876 arm64: dts: r8a7795: add USB2.0 Host (EHCI/OHCI) device nodes
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26 08:55:31 +09:00
Yoshihiro Shimoda
5923bb5227 arm64: dts: r8a7795: add usb2_phy device nodes
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26 08:55:31 +09:00
Simon Horman
2b953ccd0e arm64: dts: r8a7795: use fallback etheravb compatibility string
Use recently added fallback compatibility string in r8a7795 device tree.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-26 08:55:30 +09:00
Ai Kyuse
d9d67010e0 arm64: dts: r8a7795: Add SDHI support to dtsi
Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[wsa: squashed some fixes and added mmc-caps]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26 08:55:18 +09:00
Dirk Behme
4c811edf65 arm64: dts: r8a7795: Add GIC-400 virtual interfaces
Besides the distributor and the CPU interface the GIC-400 additionally
supports the virtual interface control blocks and the virtual CPU interfaces.

Add the physical base addresses and size for these.

See

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0471b/index.html
-> 3.2. GIC-400 register map

and Linux kernel's

Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt

for more details.

For the at GICH Virtual interface control blocks at 0xf1040000 cover the
whole 128kB (0x20000) range. This is done based on the advice from Marc
Zyngier http://www.spinics.net/lists/arm-kernel/msg483139.html

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19 14:55:33 +09:00
Magnus Damm
9c6c053c9e arm64: dts: r8a7795: Add INTC-EX device node
Add a single r8a7795 INTC-EX device node to support
external IRQ pins IRQ0 -> IRQ5.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-17 14:55:59 +09:00
Geert Uytterhoeven
8e1c3aa30c arm64: dts: r8a7795: Add CA53 L2 cache-controller node
Add a device node for the Cortex-A53 L2 cache-controller.

The L2 cache for the Cortex-A53 CPU cores is 512 KiB large (organized as
32 KiB x 16 ways).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-17 14:53:14 +09:00
Geert Uytterhoeven
a528b4bf1a arm64: dts: r8a7795: Add missing properties to CA57 L2 cache node
Add the missing "cache-unified" and "cache-level" properties to the
Cortex-A57 cache-controller node.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-17 14:53:08 +09:00
Simon Horman
52b541abbc arm64: dts: r8a7795: use GIC_* defines
Use GIC_* defines for GIC interrupt cells in r8a7795 device tree.

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-16 06:56:37 +09:00
Dirk Behme
3d0cd46889 arm64: dts: r8a7795: pmu: switch to Cortex specific device nodes
Instead of using the generic armv8-pmuv3 compatibility use the more
specific Cortex A57 compatibility.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-08 10:20:51 +01:00
Geert Uytterhoeven
7b337e61a4 arm64: dts: r8a7795: Add L2 cache-controller nodes
Add device nodes for the L2 caches, and link the CPU node to its L2
cache node.

The L2 cache for the Cortex-A57 CPU cores is 2 MiB large (organized as
128 KiB x 16 ways).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-05 10:43:42 +01:00
Geert Uytterhoeven
3da41e4cf6 arm64: dts: r8a7795: Add BRG support for (H)SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depend on
the actual board.

Add the two optional clock sources (S3D1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-03 10:04:29 +01:00
Geert Uytterhoeven
69e359ca88 arm64: dts: r8a7795: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-03 10:03:51 +01:00
Geert Uytterhoeven
653f502d77 arm64: dts: r8a7795: Add SCIF fallback compatibility strings
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-02 12:20:08 +01:00
Yoshihiro Shimoda
652a4306be arm64: dts: r8a7795: Add USB-DMAC device nodes
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-02 12:20:04 +01:00
Yoshihiro Shimoda
171f2ef822 arm64: dts: r8a7795: Add USB3.0 host device nodes
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-26 09:41:34 +09:00
Geert Uytterhoeven
e2102cea9b arm64: dts: r8a7795: Complete SYS-DMAC nodes
Complete the dma-controller nodes for SYS-DMAC 0 to 2.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-25 08:43:32 +09:00
Ulrich Hecht
2eb2b50661 arm64: renesas: r8a7795: fix SATA clock assignment
SATA clock is 815, not 915.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18 10:07:29 +09:00
Kouei Abe
4c13472b8c arm64: dts: r8a7795: Add SATA controller node
This adds SATA device node to r8a7795.dtsi.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
[uli: adjusted for new MSTP clock scheme]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18 10:07:28 +09:00
Wolfram Sang
9036a73087 arm64: renesas: r8a7795: add internal delay for i2c IPs
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18 10:07:28 +09:00
Yoshifumi Hosoya
a6b6b47845 arm64: dts: r8a7795: Add pmu device nodes
Enabling the performance monitor unit on r8a7795.

Signed-off-by: Masaru Nagai <masaru.nagai.vx@renesas.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18 10:07:27 +09:00
Gaku Inami
0ed1a79ed0 arm64: dts: r8a7795: Add Cortex-A57 CPU cores
Add Cortex-A57 CPU cores to r8a7795 SoC for a total of 4 x Cortex-A57.

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Sigend-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18 10:07:27 +09:00
Gaku Inami
12e5155783 arm64: dts: r8a7795: Add PSCI node
Add PSCI node for r8a7795 SoC, and cpu node enable-method property is
set to "psci".

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18 10:07:27 +09:00
Kuninori Morimoto
b9dd9450ce arm64: renesas: r8a7795: Sound DVC support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26 11:31:42 +09:00
Kuninori Morimoto
b868ff51d5 arm64: renesas: r8a7795: Sound SRC support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26 11:31:42 +09:00
Kuninori Morimoto
10d18ab839 arm64: renesas: r8a7795: Sound SSI DMA support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26 11:31:42 +09:00