Define the iWave RainboW-G20D-Qseven board dependent part of the Ethernet
AVB device node.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add Ethernet AVB support for r8a7743 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adding pinctrl support for scif0 interface.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe GPIO blocks in the R8A7743 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the (previously omitted) Ether/PHY pin data to the SK-RZG1M board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the (previously omitted) SCIF0 pin data to the SK-RZG1M board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7743 part of the PFC device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that the CCU device tree binding headers have been merged, we can
use the properly named macros in the device tree, instead of raw
numbers.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The datasheet said that emac register size is 0x10000 not 0x104
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[wens@csie.org: Fixed commit subject prefix]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Drop the unused endpoints. They should only be used when there is an
actual remote-endpoint connected.
Cc: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Drop the unused endpoints. They should only be used when there is
an actual remote-endpoint connected.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
- Fix wrong irq type for gpio expeander on Armada 388 GP
- Use __pa_symbol instead of virt_to_phys in the mv98dx3236 platform
SMP code
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWW3X4iMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71e78AJ4+wNdgOn6C
8PVxz97Ngx2L0O44AgCfXWXbhHye3y4p2wfLfFTBT1prMZ4=
=gydP
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.13-1' of git://git.infradead.org/linux-mvebu into fixes
Pull "mvebu fixes for 4.13 (part 1)" from Gregory CLEMENT:
- Fix wrong irq type for gpio expeander on Armada 388 GP
- Use __pa_symbol instead of virt_to_phys in the mv98dx3236 platform
SMP code
* tag 'mvebu-fixes-4.13-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-38x: Fix irq type for pca955
ARM: mvebu: use __pa_symbol in the mv98dx3236 platform SMP code
Add necessary parent clocks for audss (Audio SubSystem, MAUDIO) clock
controller block.
This allows driver to keep EPLL enabled before accessing any MAUDIO
registers thus fixing silent hang. This silent hang appeared with
commit 6edfa11cb3 ("clk: samsung: Add enable/disable operation for
PLL36XX clocks"), e.g. on Odroid U3 usually with last (but unrelated)
messages:
[ 2.382741] input: gpio_keys as /devices/platform/gpio_keys/input/input0
[ 2.405686] usb 1-3: new high-speed USB device number 3 using exynos-ehci
[ 2.419843] max77686-rtc max77686-rtc: setting system clock to 2017-06-21 17:04:13 UTC (1498064653)
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix disable_irq related shared IRQ warnings for omap3 PRM
- Fix omap4 legacy code regression that accidentally removed code that
we still need for PRM interrupts
- Fix dm8168-evm NAND pins and MMC write protect pin direction
- Fix dra71-evm mdio impedance values
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlld8MERHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPnxRAAkGl1Q0HYGFl6+0YCLzk4jAD8Tx3T8kS6
Y+zaXkUowyQj548Sx55hSbCfxIyJETF2VBFWbMVMeNaDE1Gge+2rj6NdELAP1olu
cOIuRlJt4R6xBXRhJKMu4yA2DqslOD6C2rNM6B0qmNFoO+O4/9uhYZEAD03/RFRJ
8EXvr5lGjCfljEC/EgN7kfyPCOjU4aknbREZOUknQ/CMYm53G6FrNzppNNe0CVmj
59/Pp6lgYVPrBNXMpcD1LXu8fkOcp6vQ70h+WFLrdaf1GOZSj7SDHD50Lk2tNnN6
UWJ3aRE3cGnaNBwcnnrMkwMyIWBU6mEWSAOl/bQgf/jFiyFcgqDk+/i9POqGqzou
p3Jyn9of8Cg3SoIbImOsPODMgtesDmxy36nYcR+EH6x/mGDnwFzhxR74RB/X2ltq
RoeT8RbJxckz+h80Zjp6IbJQoJ6CcNqtPDiaf/GqsloSEYcUh51CBrP0teT51nFU
VZk9PRRsasIc7mpgyDg8jODZCtzvK0KTyTU3l6b6Oct7o8b/BOMAunKTAvujsT5Q
gqFCIJZ/iNTZ5GN8I6qEOTD4um5NFDl//tiQlVbU4/t/k2eUzlHErl0sc+ycv+N5
pRmz843Zs7U3lSithCF4/840BG7dQ0cTbx9binYtSCUOI9wKKORWz6ieKOf7mZi2
TR/Sqx+i0dI=
=ibLi
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.13/fixes-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Pull "Few fixes for omaps for issues found recently" from Tony Lindgren:
- Fix disable_irq related shared IRQ warnings for omap3 PRM
- Fix omap4 legacy code regression that accidentally removed code that
we still need for PRM interrupts
- Fix dm8168-evm NAND pins and MMC write protect pin direction
- Fix dra71-evm mdio impedance values
* tag 'omap-for-v4.13/fixes-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra71-evm: mdio: Fix impedance values
ARM: dts: dm816x: Correct the state of the write protect pin
ARM: dts: dm816x: Correct NAND support nodes
ARM: OMAP4: Fix legacy code clean-up regression
ARM: OMAP2+: Fix omap3 prm shared irq
There's a potentiometer connected to ADC1 and ADC2 in0 on
stm32h743i-eval board.
- Add fixed-voltage 'vdda' regulator that supplies 'vref' pin.
It's used as voltage reference for ADC and/or DAC.
- Enable ADC1 in0 input (arbitrary choice: could be ADC2 as well).
Note: No pinctrl is needed to use in0 dedicated analog input pin
(e.g. ADC12_INP0).
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for ADC (Analog to Digital Converter) to STM32H743.
It has 3 ADCs, distributed over two ADC blocks:
- ADC1 and ADC2 @0x40022000
- ADC3 @0x58026000 (instantiated separately)
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for DAC (Digital to Analog Converter) to STM32H743.
STM32H743 DAC has two output channels.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for DAC (Digital to Analog Converter) to STM32F429.
STM32F429 DAC has two output channels.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Joanthan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
add cec in devicetree for stm32f7 family
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Reorder nodes to keep coherency with others platforms (stm32f4/stm32f7).
Nodes are ordered following base address.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch adds the pin muxing for classd and enables it.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
This patch adds nodes for the classd device and its generated clock.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Declared as a regulator since the driver doesn't have a reset-gpios
property for this.
This ensures that the PHY is woken up, not depending on the state the
second stage bootloader leaves the pin.
This is a workaround until a proper mechanism is provided to reset such
devices like the pwrseq library [1] for instance.
[1] https://lkml.org/lkml/2017/2/10/779
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Declared as a regulator since the driver doesn't have a reset-gpios
property for this.
This ensures that the PHY is woken up, not depending on the state the
second stage bootloader leaves the pin.
This is a workaround until a proper mechanism is provided to reset such
devices like the pwrseq library [1] for instance.
[1] https://lkml.org/lkml/2017/2/10/779
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
gpio-line-names may help to make work with GPIOs from user space easier.
Following examples are provided with libgpiod
https://github.com/brgl/libgpiod :
|# Toggle a GPIO by name, then wait for the user to press ENTER.
|$ gpioset --mode=wait `gpiofind "USR-LED-2"`=1
|# Pause execution until a single event of any type occurs. Don't print
|# anything. Find the line by name.
|$ gpiomon --num-events=1 --silent `gpiofind "USR-IN"`
Used names was taken from RIoTboard schematics, version 1 (2013.12.07).
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Micrel PHY has its interrupt pin connected to a GPIO line. Wire
this up in the device tree.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Marvell switch has its interrupt pin connected to a GPIO
line. Wire this up in the device tree. This then allows us to use
interrupts from the embedded Ethernet PHYs in the switch. Also wire
them up in device tree.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Marvell switch has an EEPROM connected to it. List the size in DT,
in order to enable access to it via ethtool.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The RDU2 has a Marvell 88E6352 switch. Both the FEC and the i210
Ethernet interfaces are connected to the switch. Make the FEC the DSA
"CPU" port, and the i210 as a regular port on the switch.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The FEC has a Micrel PHY connected to it. This PHY is managed using
the bit-banging MDIO bus. Add this to the device tree.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently the LCD is turned on thanks to the bootloader initialization.
In order to make the kernel to turn on the LCD on is own, pass the
'enable-gpios' and 'power-supply' properties.
Also, the GPIO1_IO01 is not used as PWM functionality on this board. It is
connected to the PWREN pin of connector J14 and has a GPIO function, so
remove the PWM1 node and change the GPIO1_IO01 IOMUX to GPIO function.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is preferred to use the panel compatible string rather than passing the
LCD timming in the device tree.
So pass the "innolux,at043tn24" compatible string to describe the parallel
LCD on this board.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The 'uart-has-rtscts' property should be used when the board exposes the
native RTS and CTS UART pins.
On the imx6qdl-gw5xxx boards such pins are not used, so remove the
'uart-has-rtscts' property to make the hardware description correct.
Documentation/devicetree/bindings/serial/serial.txt states that
'uart-has-rtscts' and 'rts-gpios' properties are mutually exclusive.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Somehow the strange property ordering of the rv1108 mmc nodes slipped
through when it was added. To lessen the confusion in the future, do
the needed reordering to bring them in line with our regular order.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable sdmmc on rv1108 evaluation board. Also
add pinctrl for sdmmc controller.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
On tango platforms, firmware configures the CPU clock, and Linux is
then only allowed to use the cpu_clk_divider to change the frequency.
Build the OPP table dynamically at init, in order to support whatever
firmware throws at us.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Add a reset-controller node for managing resets of various
remote processor devices on the SoC over the Texas Instrument's
System Control Interface (TI SCI) protocol.
Signed-off-by: Andrew F. Davis <afd@ti.com>
[s-anna@ti.com: rename node name, drop obsolete header]
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add a ti-sci node representing the clock provider in the system.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add a ti-sci k2g_pds node to act as our generic power domain provider
in the system.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is implemented in Keystone 2 generation 66AK2G SoC with the PMMC entity.
Add the ti-sci node representing this 66AK2G PMMC module.
Signed-off-by: Nishanth Menon <nm@ti.com>
[s-anna@ti.com: add unit address to DT node]
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
fix up binding violation where the reset property is required
additionally.
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
As written in the datasheet the PCA955 can only handle low level irq and
not edge irq.
Without this fix the interrupt is not usable for pca955: the gpio-pca953x
driver already set the irq type as low level which is incompatible with
edge type, then the kernel prevents using the interrupt:
"irq: type mismatch, failed to map hwirq-18 for
/soc/internal-regs/gpio@18100!"
Fixes: 928413bd85 ("ARM: mvebu: Add Armada 388 General Purpose
Development Board support")
Cc: stable@vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The tps61052 device node doesn't have a vendor prefix
in its compatible string, fix it by adding one.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The retu device node doesn't have a vendor prefix
in its compatible string, fix it by adding one.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
It's not correct to encode the subsystem in the I2C device name, so
drop the -mfd suffix. To maintain bisect-ability, change driver and
platform code / DTS users in the same patch.
Suggested-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
dwmmc driver deprecated num-slots and plan to get rid
of it finally. Just move a step to cleanup it from DT.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The OF graph is not needed because the panel is a child of dsi. Remove
the ports node in DSI node, and port node in panel node.
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add a efuse node in the device tree for the rk3228 SoC.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add support for Altera FPGA connected to an spi port
to the evi devicetree file
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Signed-off-by: Alan Tull <atull@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
A new compatible string has been introduced for sama5d2 SMC to allow to
manage the registers mapping change.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
This patch adds gpio power-key support for rk3229-evb board.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch enables the tsadc for rk3229-evb board.
The rk3229 evb board uses the CRU to reset the chip since it has not
the PMIC to connect it, and TSHUT is low active on evb board.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch enables eMMC support for rk3229-evb board.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch enables io-domain support for rk3229-evb board.
The power domain of VCCIO3 is selected from maskrom, so we do not
need to configure it.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the cpu-supply property so that cpu can do dvfs
on rk3229-evb board.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds regulator info for rk3229-evb board.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds amend compatible content for eMMC of RK3228 SoC.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch sets PSCI as the default cpu enable-method for RK3228 SoC.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We deprecated the "num-slots" property now and plan to get
rid of it finally. Just move a step to cleanup it from DT.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds io-domain support for rk3228 SoC.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Due to some tiny differences between RK3228 and RK3229, this patch adds
a basic dtsi file which first includes a new CPU opp table for RK3229.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add reference to the Mali GPU device tree node on rk3288-fennec
Tested on Fennec board.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add reference to the Mali GPU device tree node on rk3288-evb.
Tested on rk3288-evb-act8846 board.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add reference to the Mali GPU device tree node on rk3288-tinker.
Tested on Tinker board.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
"clock-freq-min-max" was deprecated. There is only using in rv1108.dtsi.
Use the "max-frequency" for removiing "clock-freq-min-max" in future.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The binding specifies the actual implementations only (mali-t760
for example) but not the arm,mali-midgard used in some vendor kernels.
So drop that compatible property from the rk3288 where it had slipped in.
Also fix the node name which should be a generic gpu@...
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Commit fa53757bca ("ARM: dts: uniphier: use SPDX-License-Identifier")
missed to touch these two. Now updating.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
pinctrl_spi4 pin group is not part of the low power iomux controller,
so move it under the normal iomuxc node.
Fixes: 184f39b57c ("ARM: dts: imx7d-sdb: Add GPIO expander node")
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pass the 'backlight' property as described in
Documentation/devicetree/bindings/display/panel/simple-panel.txt
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is preferred to use the panel compatible string rather than passing the LCD
timming in the device tree.
So pass the "innolux,at043tn24" compatible string to describe the parallel LCD
on this board.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Make the syscon-poweroff driver change only the shutdown bits on the
SNVS_LP control register.
This change fixes an issue with the RTC wakeup alarm, that was
previously disabled during power off.
Signed-off-by: Guy Shapiro <guy.shapiro@mobi-wize.com>
Reviewed-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6qdl-icore-rqs boards use sgtl5000 codec and the machine
file (imx-sgtl5000) already sets SSI in slave mode and codec in
master mode, so there is no need for having this property.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pass the phy-reset-gpios property so that Ethernet PHYs can go
through a proper reset.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The IPU that drives HDMI must have its pre_sel set to pll2_pfd_396m
to avoid stepping on the LVDS output's toes, as the PLL can't be clocked
to the pixel clock and to the LVDS serial clock (3.5*pixel clock) at the
same time.
As we are using ipu1_di0 and ipu2_di0, ensure both are switched to
to pll2_pfd2_396m to avoid issues. The LDB driver will switch the
required IPU to ldb_di1 when it uses it to drive LVDS.
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to mx7sabresd schematics the MIPI CSI/DSI voltage rails
should be 2.8V but the voltage provided is a maximum of 3.3V and
minimum of 1.8V. Providing such a higher voltage might damage the
peripherals and violates the schematic settings.
Signed-off-by: Gautam Bhat <mindentropy@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enables the ADV7180 analog video decoder sensor connected to the
IMX6 IPU on various Gateworks Ventana boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for Sound card and related codec(via i2c1) nodes
on Engicam GEAM6UL variant module boards.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Engicam SOM's with mounted on starter kits like icorem6(rqs), isiot
usually not explicitly named with -kit in dts file names and
instead Model has mentioned 'Starter kit' So apply the same rule
for geam SOM as well.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
GEAM6UL SOM does have single module, it doesn't come with
any variants. Maintaining imx6ul-geam.dtsi make no sense
so move all devices from .dtsi into dts file and drop the same.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
usdhc1 is enabled and assigned pinctrl-0 on imx6ul-geam.dtsi
but same thing done on imx6ul-geam-kit.dts, so remove this
re-enabled node from the same.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for Sound card and related codec(via i2c1) nodes
on Engicam Is.IoT MX6UL variant module boards.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Maintaining separate dtsi file with common nodes make unclear and
confusing since -isiot.dtsi is available for adding common nodes.
If the nodes are common between the dts files then mark status
as "okay" otherwise mark it "disabled" so-that respective dts
can mark status "okay"
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
dwmmc driver deprecated num-slots and plan to get rid
of it finally. Just move a step to cleanup it from DT.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit 7dd968163f ("bitmap: bitmap_equal memcmp optimization") was
rather more restrictive than necessary; we can use memcmp() to implement
bitmap_equal() as long as the number of bits can be proved to be a
multiple of 8. And architectures other than s390 may be able to make
good use of this optimisation.
[arnd@arndb.de: fix build: add a memcmp() declaration]
Link: http://lkml.kernel.org/r/20170630153908.3439707-1-arnd@arndb.de
Link: http://lkml.kernel.org/r/20170628153221.11322-5-willy@infradead.org
Signed-off-by: Matthew Wilcox <mawilcox@microsoft.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
v1 series[1] for dp83867 phy impedance-control support,
specifies to use ti,impedance-control with a value. These
properties got updated iduring review to specify whether
min or max impedance. But the DT still uses the old values
which never takes effect. Update the DT node by using the
proper DT properties.
[1] https://patchwork.kernel.org/patch/9239729/
Fixes: 9868bc585ae2c ("ARM: dts: Add support for dra718-evm")
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 599c376c49 ("ARM: dts: Fix gpio interrupts for dm816x")
corrected some problems with the MMC. However, it gets the write
protect pin backwards. It needs to be ACTIVE_HIGH not ACTIVE_LOW.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mihail Grigorov <michael.grigorov@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The ELM node in dm816x.dtsi needs to declare the correct compatible
value here as per the binding only one value is correct, and the current
driver handles it correctly. We then add pinmux information for the
NAND found on the EVM so that we do not rely on the ROM to do this for
us, and also so that we do not try and probe NAND before we probe the
ELM.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Roger Quadros <rogerq@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Mihail Grigorov <michael.grigorov@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Device-tree continues to see lots of updates. The majority of patches
here are smaller changes for new hardware on existing platforms, and
there are a few larger changes worth pointing out.
New machines:
- The new Action Semi S500 platform is added along with initial
support for the LeMaker Guitar board.
- STM32 gains support for three new boards: stm32h743-disco,
stm32f746-disco, and stm32f769-disco, along with new device
support for the existing stm32f429 boards.
- Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H
with 10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module
plus board.
- On Marvell "mvebu", we gain support for the Linksys WRT3200ACM
wireless router.
- For NXP i.MX, we gain support for the Gateworks Ventana GW5600
and the Technexion Pico i.MX7D single-board computers.
- The BeagleBone Blue is added for OMAP, it's the latest variation
of the popular Beaglebone Black single-board computer.
- The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards
are added, these are the latest variations of a seemingly endless
supply of similar single-board computers.
Other updates:
- Linus Walleij improves support for the "Faraday" based SoC platforms
from various SoC makers (Moxart, Aspeed, Gemini)
- The ARM Mali GPU is now describe on Rockchips SoCs
- Mediatek MT7623 is extended significantly, making it much
more useful.
- Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom,
Allwinner, Qualcomm, iMX
- For Amlogic, the clock support is extended a lot on meson8b.
- We now build the devicetree file for the Raspberry Pi 3 on 32-bit
ARM, in addition to the existing ARM64 support, to help users
wanting to run a 32-bit system on it.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWVpLH2CrR//JCVInAQK5hxAAj8u8Y1RFWsfEXqAeGBme7PdiilEfm1ZR
U6wu6unW/zUb+QwQj52hzmYB9+FEd/bcNgw4AqEzypqMA+vJ6AP5tpujCrOXREsG
sk2LBnhOi/QbYfzIH6MYqjnrMbjSZ3LZpJ8+PSO+DpGwMkSKhWG5Jjjf1V69IbYJ
8eTpsnDbpo1OA4mtj+7fDxKGdH2WFx4922UuqTSzgoIqaTV1X2wcicpiJsfKynXY
3I9Apwhf/gKbtkWkVlNW7gxaAHONZOHEJ9rgIu6XoUCKbQrtbjZWEbKDUM1nJq5J
4ZYbd9r1HZvujuLk2/IuKTidmXj/4Q1FiIn4jqHINVqNj8dPKKYIoW5nU8rlbxG/
Ymy9WRY97YznWai49dnURGRbPNuiGyd9oaVsw7Wi1G2F4PgkAMgHs1rpERtIgnZg
ZzPxlXZdowYUgL6Qawk3//81QqGG/YL8VZ+VltPkjFNNYtEk0U+j3xW/n2ORAdvT
8EuNlTKid0Cq045nKkpAd5AWcgHIJe7IE3KiX/SpBtgH5PINlnUnwnm2f2TjRZCh
bw3g32er1JLSW9lAl6agu58lxox7NC1AV4Qy7Qk23IsR2mAv5gb5zad5GXwE41nT
qcyJ4OnDUpv/3f0LmH3WATQeHNnG8l8RgY8B6fH2GLlTQdmO7W7UTJ8tWU8E2sZ8
5xPePuor0JM=
=onXv
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM device-tree updates from Arnd Bergmann:
"Device-tree continues to see lots of updates. The majority of patches
here are smaller changes for new hardware on existing platforms, and
there are a few larger changes worth pointing out.
New machines:
- The new Action Semi S500 platform is added along with initial
support for the LeMaker Guitar board.
- STM32 gains support for three new boards: stm32h743-disco,
stm32f746-disco, and stm32f769-disco, along with new device support
for the existing stm32f429 boards.
- Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H with
10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module plus
board.
- On Marvell "mvebu", we gain support for the Linksys WRT3200ACM
wireless router.
- For NXP i.MX, we gain support for the Gateworks Ventana GW5600 and
the Technexion Pico i.MX7D single-board computers.
- The BeagleBone Blue is added for OMAP, it's the latest variation of
the popular Beaglebone Black single-board computer.
- The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards are
added, these are the latest variations of a seemingly endless
supply of similar single-board computers.
Other updates:
- Linus Walleij improves support for the "Faraday" based SoC
platforms from various SoC makers (Moxart, Aspeed, Gemini)
- The ARM Mali GPU is now describe on Rockchips SoCs
- Mediatek MT7623 is extended significantly, making it much more
useful.
- Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom,
Allwinner, Qualcomm, iMX
- For Amlogic, the clock support is extended a lot on meson8b.
- We now build the devicetree file for the Raspberry Pi 3 on 32-bit
ARM, in addition to the existing ARM64 support, to help users
wanting to run a 32-bit system on it"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (345 commits)
ARM: dts: socfpga: set the i2c frequency
ARM: dts: socfpga: Add second ethernet alias to VINING FPGA
ARM: dts: socfpga: Drop LED node from VINING FPGA
ARM: dts: socfpga: Remove I2C EEPROMs from VINING FPGA
ARM: dts: socfpga: Enable QSPI support on VINING FPGA
ARM: dts: socfpga: Fix the ethernet clock phandle
ARM: pxa: Use - instead of @ for DT OPP entries
ARM: dts: owl-s500: Add SPS node
ARM: dts: owl-s500: Set CPU enable-method
dt-bindings: arm: cpus: Add S500 enable-method
ARM: dts: Add Actions Semi S500 and LeMaker Guitar
dt-bindings: arm: Document Actions Semi S900
dt-bindings: timer: Document Owl timer
ARM: dts: imx6q-cm-fx6: add sdio wifi/bt nodes
dt-bindings: arm: Document Actions Semi S500
dt-bindings: Add vendor prefix for Actions Semi
ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM
ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango)
ARM: dts: armada-385-linksys: fixup button node names
ARM: dts: armada-385-linksys: group pins in pinctrl
...
Smaller patches that didn't seem to find a home in other branches, and
low-priority fixes from late in the merge window.
- Lee Jones retires as bcm2835 (raspberry pi) co-maintainer.
- A couple of bugfixes for the ARM CCN bus driver that were
regarded not important enough
- minor device tree fixes for the Renesas and Marvell platforms,
that came a little late or did not justify have another
pull request after the last -rc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWVo4sGCrR//JCVInAQJIHxAA0XYSjDhLL/hAnaltF4vi+t4MLdFvhv5A
KE4hKXuwkbDxZsRLR93saUX9pp5Ps5XD56OCcy4V7wIUoqpQoYRrxKNf+wvO/q8s
3o5woDW6UJv4ISBZUQAc2tYjCETtxoVi/fQ995txBNSrODKkrKl7/lsGhGLDiUCx
rtAwaUUvS5uFBAg7Fp4B7MnZnoO4iNewd5187dA5d03nrR/w69DMBwQl18LKGXr0
UZKf2cSSiQnzbohom7v01+VJqMzjYs6SfDzdhwTCHcnNV2yqny23pI/qtFNZdJ47
O/ftU+FKjTszUXwGs0ox8uvj8yV2g0cjdVj6rfKjrBpJxREM9SPr/AnC+PChmmKl
HbZa+KN5uVTDfMYK1Uyj+NskhNWV7bys+81QNtF4Y0D3JdUuzXnzqo4FNQ87+El1
bzW67ybIHw/Yk3lhO56+jSqq5LhmIn/qKJQxV4UmEPKLR9YI7BpSi5QHZnS9X7h+
6dU+krc8ruG5PcEi3ZFx2iV8X5+TUIYnWw4iPYsRyQJxKuAHs22lfJq8TE3PR7w2
qIf64OhrDeBZDba6q+tJvlgY0FpK2phP1fenThmw/1iEzxopnk79hvrWh1XV7lBT
cjbVYE0uHiBXY4MuWG4AfZ9Kfho+r/+cSvx6Wcw7r22iLMFNTyaYbu6IPfVrB+Qo
ByGNYOo5+N8=
=MBxL
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull non-urgent ARM SoC fixes from Arnd Bergmann:
"Smaller patches that didn't seem to find a home in other branches, and
low-priority fixes from late in the merge window.
- Lee Jones retires as bcm2835 (raspberry pi) co-maintainer.
- a couple of bugfixes for the ARM CCN bus driver that were regarded
not important enough
- minor device tree fixes for the Renesas and Marvell platforms, that
came a little late or did not justify have another pull request
after the last -rc"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
bus: arm-ccn: Enable stats for CCN-502 interconnect
dt-bindings: arm-ccn: Add bindings info for CCN-502 compatible string
bus: arm-ccn: Use devm_kcalloc() in arm_ccn_probe()
bus: arm-ccn: Fix module autoload
MAINTAINERS: add RV1108 Rockchip soc to maintained files
ARM: dts: kirkwood: Fix Openblock A6 nand partition overlap
ARM: dts: armadillo800eva: Split LCD mux and gpio
MAINTAINERS: Remove Lee Jones from bcm2835.
- Add support to enable irq wake for slot gpio
- Remove MMC_CAP2_HC_ERASE_SZ and make it the default behaviour
- Improve R1 response error checks for stop commands
- Cleanup and clarify some MMC specific code
- Keep card runtime resumed while adding SDIO function devices
- Use device_property_read instead of of_property_read in mmc_of_parse()
- Move boot partition locking into a driver op to enable proper I/O scheduling
- Move multi/single-ioctl() to use block layer to enable proper I/O scheduling
- Delete bounce buffer Kconfig option
- Improve the eMMC HW reset support provided via the eMMC pwrseq
- Add host API to manage SDIO IRQs from a workqueue
MMC host:
- dw_mmc: Drop support for multiple slots
- dw_mmc: Use device_property_read instead of of_property_read
- dw_mmc-rockchip: Optional improved tuning to greatly decrease tuning time
- dw_mmc: Prevent rpm suspend for SDIO IRQs instead of always for SDIO cards
- dw_mmc: Convert to use MMC_CAP2_SDIO_IRQ_NOTHREAD for SDIO IRQs
- omap_hsmmc: Convert to mmc regulator APIs to consolidate code
- omap_hsmmc: Deprecate "vmmc_aux" in DT and use "vqmmc" instead
- tmio: make sure SDIO gets reinitialized after resume
- sdhi: add CMD23 support to R-Car Gen2 & Gen3
- tmio: add CMD23 support
- sdhi/tmio: Refactor code and rename files to simplify Kconfig options
- sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers
- sdhci-pci: Add support for Intel CNP
- sdhci-esdhc-imx: Remove ENGcm07207 workaround - allow multi block transfers
- sdhci-esdhc-imx: Allow all supported prescaler values
- sdhci-esdhc-imx: Fix DAT line software reset
- sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR
- atmel-mci: Drop AVR32 support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZWg0DAAoJEP4mhCVzWIwpyaUQAKpJl/QF5S8E4XaM+GKhhQfz
Af4EEGz/ySIJILCEe/A1W+xjTJh/n5jdTUTa197mDr136wp4UP8OUIhjtHHLY92E
Q74+piB77wSP0zeGFuDmtY/BRmMsXS2GOK1DlLovsDnThVNe5vZQgdXMTpx8Cfau
Bqea566L5EqGL4clOhYgmw3f9QVREDfqw2UahhrvTViSeJ2BZAYgl1lX/5YyX3vX
TIIrnSllGGTYTFTB+TLPsH6ac21IDJvagXySyMBUTVfHau9AXo8tDH+WbwfVYLwH
OmqmKaI6WT8z7oQy+WNC0P/r9GDRuqWAxdNPPF2PsRE+RbFeZVrBuN5brQxB+gMm
IJCA1z7RgLOoiu8tVOj30GXmmMM54NTkD2SLnsWG99Edh7jQ0gCVE8TGnFbgi7jl
8o/N1bB5fOeOMojgoFrTZmRKwIw1nPGFTehfiOzoll1BQy4CRqj7ZM8ji3THz11B
GrDMlbv+ocHRW9BVD0PNRUq+AVp5HRzV9actANArhhrHOwG/s9foVdEF+lVpSXty
M8PImSDrJ2bNi3aqbdkJ4IFMlAcrHw7m6mBlwTF7uCfRtcacbAy+cxYYCqNh+EOt
5l4qwbU1knH+IEEhgeSL0QQ8QNJcfR9fygifPovLN5Jo2yr0ZBMVD3wKPkZgOIJ2
Lsqoo2URLwa0uE2VU8Nm
=zJi3
-----END PGP SIGNATURE-----
Merge tag 'mmc-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Add support to enable irq wake for slot gpio
- Remove MMC_CAP2_HC_ERASE_SZ and make it the default behaviour
- Improve R1 response error checks for stop commands
- Cleanup and clarify some MMC specific code
- Keep card runtime resumed while adding SDIO function devices
- Use device_property_read instead of of_property_read in mmc_of_parse()
- Move boot partition locking into a driver op to enable proper I/O scheduling
- Move multi/single-ioctl() to use block layer to enable proper I/O scheduling
- Delete bounce buffer Kconfig option
- Improve the eMMC HW reset support provided via the eMMC pwrseq
- Add host API to manage SDIO IRQs from a workqueue
MMC host:
- dw_mmc: Drop support for multiple slots
- dw_mmc: Use device_property_read instead of of_property_read
- dw_mmc-rockchip: Optional improved tuning to greatly decrease tuning time
- dw_mmc: Prevent rpm suspend for SDIO IRQs instead of always for SDIO cards
- dw_mmc: Convert to use MMC_CAP2_SDIO_IRQ_NOTHREAD for SDIO IRQs
- omap_hsmmc: Convert to mmc regulator APIs to consolidate code
- omap_hsmmc: Deprecate "vmmc_aux" in DT and use "vqmmc" instead
- tmio: make sure SDIO gets reinitialized after resume
- sdhi: add CMD23 support to R-Car Gen2 & Gen3
- tmio: add CMD23 support
- sdhi/tmio: Refactor code and rename files to simplify Kconfig options
- sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers
- sdhci-pci: Add support for Intel CNP
- sdhci-esdhc-imx: Remove ENGcm07207 workaround - allow multi block transfers
- sdhci-esdhc-imx: Allow all supported prescaler values
- sdhci-esdhc-imx: Fix DAT line software reset
- sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR
- atmel-mci: Drop AVR32 support"
* tag 'mmc-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (86 commits)
mmc: dw_mmc: remove the unnecessary slot variable
mmc: dw_mmc: use the 'slot' instead of 'cur_slot'
mmc: dw_mmc: remove the 'id' arguments about functions relevant to slot
mmc: dw_mmc: change the array of slots
mmc: dw_mmc: remove the loop about finding slots
mmc: dw_mmc: deprecated the "num-slots" property
mmc: dw_mmc-rockchip: parse rockchip, desired-num-phases from DT
dt-bindings: rockchip-dw-mshc: add optional rockchip, desired-num-phases
mmc: renesas-sdhi: improve checkpatch cleanness
mmc: tmio: improve checkpatch cleanness
mmc: sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers
mmc: slot-gpio: Add support to enable irq wake on cd_irq
mmc: core: Remove MMC_CAP2_HC_ERASE_SZ
mmc: core: for data errors, take response of stop cmd into account
mmc: core: check also R1 response for stop commands
mmc: core: Clarify code for sending CSD
mmc: core: Drop mmc_all_send_cid() and use mmc_send_cxd_native() instead
mmc: core: Re-factor code for sending CID
mmc: core: Remove redundant code in mmc_send_cid()
mmc: core: Make mmc_can_reset() static
...
Pull timer updates from Thomas Gleixner:
"A rather large update for timers/timekeeping:
- compat syscall consolidation (Al Viro)
- Posix timer consolidation (Christoph Helwig / Thomas Gleixner)
- Cleanup of the device tree based initialization for clockevents and
clocksources (Daniel Lezcano)
- Consolidation of the FTTMR010 clocksource/event driver (Linus
Walleij)
- The usual set of small fixes and updates all over the place"
* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (93 commits)
timers: Make the cpu base lock raw
clocksource/drivers/mips-gic-timer: Fix an error code in 'gic_clocksource_of_init()'
clocksource/drivers/fsl_ftm_timer: Unmap region obtained by of_iomap
clocksource/drivers/tcb_clksrc: Make IO endian agnostic
clocksource/drivers/sun4i: Switch to the timer-of common init
clocksource/drivers/timer-of: Fix invalid iomap check
Revert "ktime: Simplify ktime_compare implementation"
clocksource/drivers: Fix uninitialized variable use in timer_of_init
kselftests: timers: Add test for frequency step
kselftests: timers: Fix inconsistency-check to not ignore first timestamp
time: Add warning about imminent deprecation of CONFIG_GENERIC_TIME_VSYSCALL_OLD
time: Clean up CLOCK_MONOTONIC_RAW time handling
posix-cpu-timers: Make timespec to nsec conversion safe
itimer: Make timeval to nsec conversion range limited
timers: Fix parameter description of try_to_del_timer_sync()
ktime: Simplify ktime_compare implementation
clocksource/drivers/fttmr010: Factor out clock read code
clocksource/drivers/fttmr010: Implement delay timer
clocksource/drivers: Add timer-of common init routine
clocksource/drivers/tcb_clksrc: Save timer context on suspend/resume
...
This adds an initial DT for the S500 SoC and a devboard based on it.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJZTUJnAAoJEPou0S0+fgE/iG8P+wdYY0r5HRpGgRKnMUEPzn2Y
xNGyjF9afyQ8YBv+9qWBqAFct4nxNckEm+0TIVCVQ4Pwuv/i4ovgx5bZ6ud2I9wY
jBIbgonuZx3ycLrUYiKLIvvkqbOYxkaoyU5Wxn/xc3G8VH+iF4NDJ4fok7BWlMk/
hJsuGmq6xC2FTSgQ4aXufLX0fWT3+Lblome9eoKOaN+NMh6iy8yENtPVPpSYIpIL
0Nx22FGZj2htUiabwuBYn2nDAYDW9/IkOPAklbZN0YtZ/jfCti1Ch77APqMuekvD
6pUJAT3/nqpRFPW5DGeuMmln+5yAcM1dar0B53lK+C91pQhk3L/o75YLJprhyxkq
MtbONE2PcPuE31zNU/yvd/xwOeLKPYPTmbV/ceOM2C5qeUghYN/278Io86oCA6Ru
szb3dONzjnFA8Oac2deuUvSOnmWqcH0ST0I/nBYXK9ZozAYyOGlq4lvVf80zayy+
tMpsq3vHLjpguCQQalhTwfix0JfgApgruHoupWgKPZuKFW2Sn/42kUOGOb9djoCx
aw4+OL4S/XWbL39CVkDts00VG0jXihjtNvY1pLVO0PYSatbamzDf+Yg0JKEFZ2PC
yeLkKDc0T9PjWmQBDgAo95e3oP7WgohciC/SEiXxPVAyxNtW4l7A5Lj1iVo0kv7X
E5hkIU6svr10sE/rGtbU
=Z5XX
-----END PGP SIGNATURE-----
Merge tag 'actions-arm-dt-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/dt
Pull "Actions Semi ARM based SoC DT for v4.13" from Andreas Färber:
This adds an initial DT for the S500 SoC and a devboard based on it.
* tag 'actions-arm-dt-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
ARM: dts: owl-s500: Add SPS node
ARM: dts: owl-s500: Set CPU enable-method
dt-bindings: arm: cpus: Add S500 enable-method
ARM: dts: Add Actions Semi S500 and LeMaker Guitar
dt-bindings: arm: Document Actions Semi S900
dt-bindings: timer: Document Owl timer
dt-bindings: arm: Document Actions Semi S500
dt-bindings: Add vendor prefix for Actions Semi
- greatly expands DT clock support for meson8b
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJZTDWYAAoJEFk3GJrT+8ZlGwsP/0K7Mb81/wkne6Yr7FOQ/PTm
QcPG9QGhj/2QyafiAEu5REeg/oraHxt/HCAC9uz7jM0CfrdYLD0imoMTOgqaIGZc
BtvdJthSRUZPc91ou6vP527MB46ipTtP/69Ed/hmkSALm9QAhs430HsXfmmU7KnS
M0dbQ1KOqQ4Hd/zup3D1LfUlsaOcuiiu73Ys3Xg5zBAq8QWJypLhZL7f9dvVYCQ+
lqEtsjUt/qNvky72oKsSZX6Eb2gHKtC38fOVeYq3Z5xatU2UNWlEBGxmfTyFQP+E
T3wBvCVgSPmqW0wD9yGdfqKtH7ZXJ1OBE/21pxjPLq1Rb45kC26jC9FMDOb0RS3w
jaPzinjCcJ0AR5wUojmy7xbaVBrAESaldtj32Fxz4LIe6qPUB8AAiUsTAzwve/Bk
17RP5Zf2BsBcmfsai+HYc6zGCwqC2pbmotuX3Sfw/CeE3sRhWqtpkixV9xsidM5f
oR7bBsAjAhzRJ+SvMiJ0kPa9iNQdCgE3C2quIns7F35jwuWMAckGe6BeJ6RbX1ZK
Mrzq4r7Q1utYldYfBgus/1Tf/RW+iwqGcyarhq6GAFcjx9siKF4lb5tXt237xwK2
vP+KTRAAqii3F0+sUkzKZV2/RpqRDslmCPuq2mQNRfCtm+Px97vl+saRduz2R2jd
vcKSfM8Vj2voxITL3nNz
=o8Zj
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Merge "Amlogic 32-bit DT changes for v4.13 (round 2)" from Kevin Hilman:
- greatly expands DT clock support for meson8b
* tag 'amlogic-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (22 commits)
ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b
ARM: dts: meson8b: add the SCU device node
ARM: dts: meson: add USB support on Meson8 and Meson8b
ARM: dts: meson: add the hardware random number generator
ARM: dts: meson8: add reserved memory zones
ARM: dts: meson: add the SAR ADC
ARM: dts: meson8: add the pins for the SDIO controller
ARM: dts: meson8: add the PWM_E and PWM_F pins
ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING macros
ARM: dts: meson: use C preprocessor friendly include syntax
ARM: dts: meson8: fix the IR receiver pins
clk: meson8b: export the ethernet gate clock
clk: meson8b: export the USB clocks
clk: meson8b: export the gate clock for the HW random number generator
clk: meson8b: export the SDIO clock
clk: meson8b: export the SAR ADC clocks
clk: meson-gxbb: un-export the CPU clock
clk: meson-gxbb: expose UART clocks
clk: meson-gxbb: expose SPICC gate
clk: meson-gxbb: expose spdif master clock
...
Pull ARM fixes from Russell King:
"Three more fixes:
- Fix the previous fix merged in the last pull for the Thumb2
decompressor.
- A fix from Vladimir to correctly identify the V7M cache type.
- The optimised 3G vmsplit case does not work with LPAE, so don't
allow this to be selected for LPAE configurations"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8682/1: V7M: Set cacheid iff DminLine or IminLine is nonzero
ARM: 8681/1: make VMSPLIT_3G_OPT depends on !ARM_LPAE
ARM: 8680/1: boot/compressed: fix inappropriate Thumb2 mnemonic for __nop
Use 'clock-frequency' binding for the i2c node that will put the I2C driver
into the standard operating mode. 'speed-mode' was not a valid binding for
the I2C driver, remove it.
Signed-off-by: Alan Tull <atull@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add DT alias for the second ethernet present on mainboard rev 1.10.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Drop the LED node from VINing FPGA DT because the LED wiring is
different on each mainboard revision. This wiring is therefore
handled in mainboard DT Overlays.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Remove the EEPROMs attached to the I2C expander ports which
lead to the backplane slots from the main VIN|ING DTS file.
These EEPROMs are bound using separate DTO files, which lets
us handle both two-slot and six-slot configuration of the
backplane.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The ethernet block clock phandle must point to the clock node which
represents the clock which directly supply the ethernet block. This
is emac_x_clk , not emacx_clk , so fix this.
From: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
- cpu operating points renaming from Viresh
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZSqEIAAoJEAP2et0duMsSArIP/RW+VulRdyplsFlvIejM2kMt
wmMUinNQWDEob0mqWBKcPuoX89qI+J2psvX+IbqG/lAgkCmT9C3QH2k+4QEyoeTf
YuN4h9vhaetOROthnz8xcz5w8hVkxTeMSaOA/OHWMC0Ao/2/n2VP2UDS5J5aN97o
wWTR2FWdpQ1uqfv/GRngM3jmLn1EvufwgVKwfEd2J6iYuHdESFURsGzafOBk5stX
GP5UUtzTP+vrEapfxZtcKM1hhDtoDDLXa3FAQ9YUv4bX1DQVSwXnm43rKcxvBfo7
2fUSJSqeRnj4kkGaAtT8/Nm8lhJQUP5xsBVbUs1S2hwooLczinSdlOuIlUgfWrA9
KnNljLOsWiq2onobI4YMMS3J01X/k1nXt7qF7tju1z/H2/IoEgnD7QuJJAE982Of
PSoi1C7adRf7d2FSZsNlYMiUkSzVwGdgfA6x97ar1yH/rJnVojW/s3wurrQYT9Lo
/uz81rbHxR6XmkAYIB5PA9TyxQkuFrioiMnAjiF2jldRzFodTaTz+9lvTDUrJe02
jj7sshrafuht0tNiVPwJSpmWUK+gP3+nxseJ6MwRfDX40VsdC+TbSumWplyFqowo
IU8jjF1ueW2wBtAnEA5ZH9ZhoCeGC9KCqxdLiplaDVnXa8pc7bThPw4LTC60Xe3T
wlNJwqJHMjjCx/am1jIO
=QBWb
-----END PGP SIGNATURE-----
Merge tag 'pxa-dt-4.13' of https://github.com/rjarzmik/linux into next/dt
Pull "pxa-dt for v4.13" from Robert Jarzmik:
This device-tree pxa update brings :
- cpu operating points renaming from Viresh
* tag 'pxa-dt-4.13' of https://github.com/rjarzmik/linux:
ARM: pxa: Use - instead of @ for DT OPP entries
1. Add needed property for CEC on Odroid U3,
2. Fix reset GPIO polarity on Rinato.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZR/UNAAoJEME3ZuaGi4PXU+sP/2HfLknIYwHqNuojfrrKJ2/r
rZSeJvDkLTGTcbfNbE5e+VcRQiDlIuJoiizecOFpTh5Rpa7eEWj5kFLM9T/Yf2UH
dkbCCOIph3nUmvrkiqfd6j6/39cVhEkNTOr6W2tjA9sLFYyJl4trU9v0Ac6FhDiY
GFILNZHH+aeoarqZ38vfJSGYpyBLPnJsJbicN+o7B3ahBmzFXUb38B0i3WuH4cPc
kRxUUjagPfW4Eqq7AKlEU4rygCF8SqjcDrVWaL6fndJhu8Sn+XmspmjGgiNnUndb
hIzAiMvKjLfYoLxA30JxEucfUrzHEUFieL+L/e55KjtYiukdLrnIerbgM8i8C5sr
VGA/i7yDdNiMFNP9wE3SCFrTYN7vHDZiWdYzI8w1aPE5sypwxC3Dpjl7zq8hT9jH
0fD7m8dFzqgkAgVj1cO0/ctPKhjVLHu5qIQTFMjxJ+uW2Tdk+UVKiITRyeuaokBf
vWM2Bv4g4wGDZmKXotv03XW+SHljquzuj8kVliU2xB2dfjIkeJiYOySHHzee0oiw
Pyr7kE+puuKKIQ3kQy7Xvqgh5+xJCyOptuy8G1Qd+0fWPpnKvY4RJSEIf8P/7ZBT
vFWQ19GgSCKfy56SBbCGMVo5PSUBufMbnFdbA14MVtKQwlnImUFKfu12jE2ogC/q
Yd3mAsNMPhdKRSQfywi6
=iCaB
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Pull "Samsung DeviceTree update for v4.13, part two" from Krzysztof Kozłowski:
1. Add needed property for CEC on Odroid U3,
2. Fix reset GPIO polarity on Rinato.
* tag 'samsung-dt-4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Fix polarity of panel reset gpio in Rinato
ARM: dts: exynos: add needs-hpd to &hdmicec for Odroid-U3
Compiling the DT file with W=1, DTC warns like follows:
Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property
Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.
Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
commit 94647a3012 ("ARM: dts: omap3-overo: Enable WiFi/BT combo")
while enabling WiFi/BT combo added regulator to trigger the nReset
signal of the Bluetooth module in vqmmc-supply. However BT should be
handled by UART. Moreover "vqmmc" is not a defined binding for
omap_hsmmc. While "vqmmc" in mmc2 hasn't caused any issues so far,
mmc2 will start to mis-behave once omap_hsmmc defines "vqmmc"
binding.
Remove "vqmmc-supply" property in mmc2 here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add "max-frequency" property to MMC dt nodes and set the
maximum frequency to 192MHz for MMC1/MMC2, 64MHz for MMC3
and 192MHz for MMC4. pdata quirks must be utilized to
detect presence of rev 1.1/1.0 of silicon and adjust
maximum frequencies as per restrictions documented in i843.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On DRA75x EVM, MMC2 vdd/ios are connected to a common supply fixed at 1.8V
not 3.3V
Fixes: 6cf02dbb4b ("ARM: dts: dra7-evm: Add mmc2 node for eMMC support")
Signed-off-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dt binding documentation of omap-hsmmc recommends using
"vmmc_aux" for IO supply lines. However
commit 0af28cc926 ("ARM: dts: am57xx-beagle-x15: Add support
for rev B1") added it as "vmmc-aux". Now that anyways it
needs to be fixed, use the generic "vqmmc" binding instead of
the deprecated "vmmc_aux".
Fixes: commit 0af28cc926 ("ARM: dts: am57xx-beagle-x15: Add
support for rev B1")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add vqmmc-supply property to mmc1 dt node and populate
it with ldo1_reg to reflect ldo1_out is connected to mmc1 IO lines.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add vqmmc-supply property to mmc1 dt node and populate
it with ldo1_reg to reflect ldo1_out is connected to mmc1 IO lines.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On dra72/dra71 evms, mmc2 vdd/ios are connected to a common 1.8V supply
not 3.3V. Also the regulator that supplies 1.8V is different on dra71-evm
so move the supply property from common dtsi to evm specific dts files.
Fixes: a4240d3af6 ("ARM: dts: Add support for dra72-evm rev C (SR2.0)")
Signed-off-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Stream of fixes has slowed down, only a few this week:
- Some DT fixes for Allwinner platforms, and addition of a clock to
the R_CCU clock controller that had been missed.
- A couple of small DT fixes for am335x-sl50.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZR3FwAAoJEIwa5zzehBx3MmsQAJ+VV9hfqtXihWZFTqM+RqLO
0qn4BU+zpxS/4TK/cVXy69/PNXRJJqq0hPfmyfBPj3Mm5revejFaFg7w620mBvUy
01w1Wu2bLf6HG+9PBjmwBl9CIG4qjSHQXKvkT3A/ZVvV1zw+V/Yvs48Y7e7CDYMc
or+URw9JS5R8UZdJ03oklnkNdSRLfXCfjfwKz6Hn1WmZ30Gsg74DYBuGzvL2wFRx
qyBaNwTaItipiIIPSzrns4yexpujYwzMxypIF6q9cHXfmnA669NwHCUwhZawdvQi
ibEoGxTpisjus07/y+zcar73f+NFN3QVtKdTi+XxYTKBPH3OxU4d4DbbE4EBpazk
G/I8ZVZ87tpuskkLegTuXDjsgfsVJTdBt+Rck4+MGiP/4DccOXXauEsGhbryk5Jg
TB6r45tf9pDpoYiCF0JIkkl9TLEv4hUXgIYZBYtH1lFXbSVkGpk1y+ZM3SrgSoP1
U2wAY6vxAB6taGHI/99i3/8VI5Fd7Q06XpaGVyk9ET7pRc5Lvpbz9255jpLOasf/
8ZkaVk3yM9mzcSEezHohzQd2en1sIvA6gZbLFMBL9UoLBgrtbSJPQCIalnRelwJf
SZoO/mDmgYAr3Tq3NuYUI4dp1U49q5nGme6ujm98Hg5VdH/50ZDwidaFS/N+Ba71
gIc2TLD0OMC/zhuOOBaE
=pi+d
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Stream of fixes has slowed down, only a few this week:
- Some DT fixes for Allwinner platforms, and addition of a clock to
the R_CCU clock controller that had been missed.
- A couple of small DT fixes for am335x-sl50"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU
ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
ARM: dts: am335x-sl50: Fix cannot claim requested pins for spi0
ARM: dts: am335x-sl50: Fix card detect pin for mmc1
arm64: allwinner: h5: Remove syslink to shared DTSI
ARM: sunxi: h3/h5: fix the compatible of R_CCU
- New board support: Gateworks Ventana GW5600, Technexion Pico i.MX7D
Board.
- A series from Alexandre Belloni to correct the vendor prefix for
rv4162 compatible.
- A patch-set from Andrey Smirnov ot enable PCIe support for i.MX7 and
imx7d-sdb board.
- Increase the SGTL5000 LRCLK pad strength to fix a random audio
channel swapping seen on imx6qdl-wandboard and imx6qdl-colibri
boards.
- Clean up non-existing property 'enable-active-low' from fixed
regulator device nodes.
- Correct GPIO polarity for Ethernet PHY and PCI reset lines, even
though device drivers do not use the polarity for now.
- Add Wifi and Bluetooth support for imx7d-sdb board.
- Adopt the i.MX6Q/DL DT to the new and more flexible GPC binding.
- Update zii-rdu2 device tree source to use #include "..." for local
inclusion.
- A series from Philipp Zabel and Steve Longerbeam to enable video
capture support for imx6qdl platforms.
- A number of small random updates on various board support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJZRcZ+AAoJEFBXWFqHsHzOPrcIAKrIeegjnl29Fp6JA2u3xC3R
XRyi59ybxGLB/8FNdbKqWJS9cAgOuF61FgYIgSRTqxVobPtZTdGMicnbp+FTTRYa
AaXxeB+3YVH2PJxDB1f4ZrlcBMNo3cpSO4ECbtnBgxoupQXOKIBQbLbujbyjsnbP
d/XFCC6LQFlL7yH8+jQrjiUkk0HSzHpzq3Kt6Dzq7WqWsOghOqDfsV2PhqnKvNzL
V0iovP9u9rayWn7Ik+bg7GlOtdaBTf8i0/TN4LcpCiKSw3wh7Uz03E0Cd2WMIO3N
Qs9R2QQ/GS0zZOmBlpYBO2waw9Xy9ZnbX/5zJtnw29IBiVdmbSNA5Q0QJySxPtw=
=hxCr
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
The i.MX device tree updates for 4.13:
- New board support: Gateworks Ventana GW5600, Technexion Pico i.MX7D
Board.
- A series from Alexandre Belloni to correct the vendor prefix for
rv4162 compatible.
- A patch-set from Andrey Smirnov ot enable PCIe support for i.MX7 and
imx7d-sdb board.
- Increase the SGTL5000 LRCLK pad strength to fix a random audio
channel swapping seen on imx6qdl-wandboard and imx6qdl-colibri
boards.
- Clean up non-existing property 'enable-active-low' from fixed
regulator device nodes.
- Correct GPIO polarity for Ethernet PHY and PCI reset lines, even
though device drivers do not use the polarity for now.
- Add Wifi and Bluetooth support for imx7d-sdb board.
- Adopt the i.MX6Q/DL DT to the new and more flexible GPC binding.
- Update zii-rdu2 device tree source to use #include "..." for local
inclusion.
- A series from Philipp Zabel and Steve Longerbeam to enable video
capture support for imx6qdl platforms.
- A number of small random updates on various board support.
* tag 'imx-dt-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (47 commits)
ARM: dts: imx6q-cm-fx6: add sdio wifi/bt nodes
ARM: dts: ls1021a: update the clockgen node
ARM: dts: imx6-sabreauto: add the ADV7180 video decoder
ARM: dts: imx6-sabreauto: add pinctrl for gpt input capture
ARM: dts: imx6-sabreauto: add reset-gpios property for max7310_b
ARM: dts: imx6-sabreauto: create i2cmux for i2c3
ARM: dts: imx6-sabresd: add OV5642 and OV5640 camera sensors
ARM: dts: imx6-sabrelite: add OV5642 and OV5640 camera sensors
ARM: dts: imx6qdl-sabrelite: remove erratum ERR006687 workaround
ARM: dts: imx6qdl: add capture-subsystem device
ARM: dts: imx6qdl: Add video multiplexers, mipi_csi, and their connections
ARM: dts: imx6qdl: Add compatible, clocks, irqs to MIPI CSI-2 node
ARM: dts: imx6qdl: add multiplexer controls
ARM: dts: imx6: Fix PCI GPIO reset polarity
ARM: dts: imx7d-sdb: Add Bluetooth support
ARM: dts: imx7d-sdb: Add Wifi support
ARM: dts: imx7d-sdb: Adjust the regulator nodes
ARM: dts: imx: Fix Ethernet PHY reset polarity
ARM: dts: imx7: Fix typo in watchdog pin name
ARM: dts: vf610-zii: Add switch eeprom-length properties
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add Linksys WRT3200ACM (Rango) support
- Add PWM properties for gpio on Aramda XP and 38x
- A couple of minor updates for the 98dx3236 and 98dx4251
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWUTNiiMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71SXoAJsEyr+EVfF0
JgsHdARO9tMWcZ8otQCdHFovLqsE2/sNSkwdZrUjaC3xRgY=
=bXFP
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.13-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.13 (part 1)
- Add Linksys WRT3200ACM (Rango) support
- Add PWM properties for gpio on Aramda XP and 38x
- A couple of minor updates for the 98dx3236 and 98dx4251
* tag 'mvebu-dt-4.13-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM
ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango)
ARM: dts: armada-385-linksys: fixup button node names
ARM: dts: armada-385-linksys: group pins in pinctrl
ARM: dts: armada-385-linksys: partition layout is board specific
ARM: dts: armada-385-linksys: use binary unit prefixes
ARM: dts: armada-385-linksys: drop legacy DSA bindings
ARM: dts: armada-385-linksys: usb3 label cleanup
ARM: dts: armada-385-linksys: bm pools by label order
ARM: dts: armada-385-linksys: drop redundant properties in dependants
ARM: dts: armada-385-linksys: flatten dependants
ARM: dts: armada-385-linksys: label nodes
ARM: dts: armada-385-linksys: flatten dtsi
ARM: dts: mvebu: disable the rtc on 98dx3236 SoC
ARM: dts: mvebu: add missing interrupt to 98dx4251 switch
ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan
ARM: dts: mvebu: Add PWM properties for armada-38x
ARM: dts: mvebu: Add PWM properties to .dtsi files
Signed-off-by: Olof Johansson <olof@lixom.net>
- Switch to the new NAND binding
- A few non urgent fixes
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEXx9Viay1+e7J/aM4AyWl4gNJNJIFAllEBfYACgkQAyWl4gNJ
NJJ1gRAAi9RveH8fm3qzN4gif/uzgXUgAhptAz9WF4m7ikPQqGIvBqV27w3Sgq+i
GeUymMp10t55hgyi9OZ7NxvD1sb+cyD3IAMWmQI5HdmGYEmw7Xc4cdksaJ7lG+Iw
dc+oYgHqGYdvkaEIqKElP6rD/EVksNiAoMvZ97U+bcQoIVko5wSY3cpvdo3FHPha
kWood5/U5NMQqgoN4CwYsfDrDK4lEKUXiS4cKKP2UcX1yoONkvB+/e/b8XJHtIrD
kApsUJUwvTvs8Q/EAdgquVS0pxepdwSsFE+VIBK6DaXHhflfG0Q38Pj2W0dpoVsL
Ohx78+q68Fd3utdbcRkGPcpyws8t8+yb+7l4rjvb+eUpTG34vnL5lQJCHtGNPXGG
oXBP3/z+Ip3Hoo0B89r4Ipv81rvzq+6Sig6tkunKb9fhgUaRSGlKlNYfnBKxztkM
ryXjrV8LnKdUSeqkvxJ2Q6g5DIYTueppquaaKQFpIqZanIhOIuo2BK1JdbfRODkd
lNm3IZ+HzV1k/PG2UKEH6fusOvq3pukxwQ8uZo3MsPoYEBWXaIf97Jm5xf2XZPCl
ofLSPzIgEhovxn3SdlYo/v52lWUW+Uyn1InvcBk+D3ns9Zw+5CroXbSaWvGGaqZI
/P84HVKFGYF5Cfry/g/ERSAwSCAOVCI3vYUUGNlNVgadhk7hqL0=
=N7os
-----END PGP SIGNATURE-----
Merge tag 'at91-ab-4.13-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt
DT for 4.13
- Switch to the new NAND binding
- A few non urgent fixes
* tag 'at91-ab-4.13-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91: sama5d2_xplained: remove wrong memory node
ARM: dts: at91: sama5d2_xplained: add pwm controller
ARM: dts: at91: Add the NOR flash available on sama5d3 dev kits
ARM: dts: at91: Switch to the new NAND bindings
ARM: dts: at91: Declare EBI/NAND controllers
dt-bindings: mtd: atmel-nand: Document the nfc-io bindings
ARM: dts: at91-sama5d4: use IRQ_TYPE_* to specify irq flags
dts: gpio_atmel: adapt binding doc to reality
ARM: dts: at91: sama5d2: add m_can nodes
ARM: dts: at91: Add generic compatible string for I2C EEPROM
Signed-off-by: Olof Johansson <olof@lixom.net>
Cleanup:
* Correct PCI bus dtc warnings for r8a779x SoCs
Enhancements:
* Add support for iWave G20D-Q7 board based on RZ/G1M SoC
* Add support for GR-Peach board based on r7s72100 SoC
* Add composite video and HDMI input to gose board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZQ9eZAAoJENfPZGlqN0++m0sQAJ6eIa0UylzP2mamuO6qqsiz
np/zUggVGQhPeIqiT0sd8vE4h2vFkB+lsKXwIuWIdqm6ehIR+vOPsurmO92d9sSF
IR6VlB0oHOj+e02JLT9UctsljLEieFqWtOoeOlgwC0ybxE1aAwfD3GVk+YMEr/uv
0TTAKAypW2Vz97IEARmvPb760LleaoxMX+DQr+l23Adc7r+mV8LMsloxK9iF0Xlx
UTW4nmKcPfxdkrGRLUzavA6nO6VX16EbIK5AIaVtmhjVFFoXk3Iawg796a9ay6DC
f/1gARF4Dzz/NRfTNFb1YJSJtcyYQsJrG4QS3OmgmX5LUqGOlW7zZGf0r468bfJW
H084JaWO7MdH0mURHYOP9jW4ahrIjPfL15HO5USI4FcrUeKhhVEOzBugWGOMy9++
7aIx+veUPHtdFOm/Fbm0WxZe5FVTf8xx8qPfiH8Witldm6hjTxAVbqmUYOgal9Md
hBlZ1MA4UxVduOVW7ITO78k15QNg4/gyHNyhEOQVXeQVRVRlYdkPUlJDyNgp1Jjb
XYpG0OJvXGffoefr6zQMUQMTMhEYUTifOknTST7cF7PsFfKwfuk6A4F12LE8XVVN
etlG/OhxE5F3+PqovYOctSDwYH56d6jBmxYeE6RT60KG16LsSAoqxg3kSnSWCMjx
Zp70DNr9Tkgi6T27YrmI
=zBWR
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.13
Cleanup:
* Correct PCI bus dtc warnings for r8a779x SoCs
Enhancements:
* Add support for iWave G20D-Q7 board based on RZ/G1M SoC
* Add support for GR-Peach board based on r7s72100 SoC
* Add composite video and HDMI input to gose board
* tag 'renesas-dt2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r8a779x: Fix PCI bus dtc warnings
ARM: dts: iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1M
ARM: dts: iwg20m: Add iWave RZG1M Qseven SOM
ARM: dts: gose: add composite video input
ARM: dts: r7s72100: Add support for GR-Peach
ARM: dts: gose: add HDMI input
Signed-off-by: Olof Johansson <olof@lixom.net>
* Fix IPQ4019 i2c0 node
* Add GSBI7 on IPQ8064
* Add misc APQ8060 devices
* Fixup USB related devices on APQ8064 and MSM8974
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZQBRbAAoJEFKiBbHx2RXV3coP/R9aQZy2x4tbkEm8YuUIJbkI
Jiw3ACIw74UoAiGBJ2JqCDDBegY8ZY2x+7ttgCWrqdqT9eU8ktlw0Uy/9SitxVMD
SrM2IygKVQiIZy7xIDBAZe4+OYCJk17HJZtl6jt9IYSNTTvkot0V4pePNu6pg4sH
OIg4l6au3jT483pPu3faHzPc7NU7BECT67u3JWpJdHSIE3kXaFFySIUNK+YmR37H
hTpHxCBoIPQSc3zTzbLSYpGA46sB2eIKjk1cQpyvOrITzL+W1pRs0OSEkY7pJJPX
Mm7HfGRxL6tNHWZ6KiB8QrEx2/PemSmXVKzluebyN2a4JBrBZGhSrFagSOLoye3E
eVnOZsBQL2yosgjKEUcH+K1wRHSjgFJAcmnWaY5DQUqieAjzuHPp1Y+ePUkkB3m5
w/xEVxNVxhRp2Id4gxn52/VNbkhzh3MhPr+ILdZlGUIZPC9PGfNpoGx53/YJB2xh
ZBq3HMAR81f1tTOgRErN54Kl7R2NtXLCVTjP2gCIKRiC7QgSn64/ysWijZEA8a3O
7jyfR87LJuxQda0uOz41abyvm9cGlc2AL+kSOqWgKYNKyqNahIwCrDYtoYStGxvs
34V6lzZ4rFYP3LqP3gXAROiqp/yt6g6U0YS3YOiunYIIfZeF6FmpLuUK8YTc4EqD
5TBr7HLNEAwz2SxmpAsW
=ynzd
-----END PGP SIGNATURE-----
Merge tag 'qcom-dts-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Qualcomm Device Tree Changes for v4.13
* Fix IPQ4019 i2c0 node
* Add GSBI7 on IPQ8064
* Add misc APQ8060 devices
* Fixup USB related devices on APQ8064 and MSM8974
* tag 'qcom-dts-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: add core I2C devices to the APQ8060 Dragonboard
ARM: dts: add GSBI8 defines to the MSM8660 family
ARM: dts: Qualcomm APQ8060 DragonBoard ALS sensor
ARM: dts: add XOADC and IIO HWMON to MSM8660/APQ8060
ARM: dts: qcom: ipq4019: fix i2c_0 node
ARM: dts: qcom: add gsbi7 serial to ipq8064 SoC device tree
ARM: dts: qcom-apq8064: Collapse usb support into one node
ARM: dts: qcom-msm8974: Add HS usb node and OTG detection mechanisms
ARM: dts: qcom: add charger otg regulator
ARM: dts: qcom: Remove s4/5vs1,2 from RPM pm8941 control
Signed-off-by: Olof Johansson <olof@lixom.net>
This removes support for the Whistler board, which only a handful of
people ever had access to and which doesn't provide any features over
other Tegra20 devices that we support.
Also this cleans up some PCI related device tree content in preparation
for a future DTC release that has additional checks for the PCI bus.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAllDkUETHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZshD/4sRJTnD5ssHfPmERnv3ezZmKw6ej/A
lqnl29GX59JJ9EN3sbeUXvdTw0uYlAaw3UX55tfPhA57spaL/fH4GcdBnEcfaDKd
i0LhtnBCY+jopaavQHKB0fyt9U7EJyXIq8t23yR1LWINp0frEiPoQUt89ttegTPs
rJyJg//qa5egRsL1U/fN3pqqqmCQlboPOP2YLsR+D5kFShUA6qxDMWwqXKvR1V+v
QIEOCC6stUDKRosEGj4B1i9AMoi2LgSQd+dszVOZMaycnPycunQ/ozPcgN98IqDn
0m4Y2VC6ac6l4eaA9RWyZai3YMF+eK2ZWOHbtbfT9z6+NEBUJeIrG7AmSsM2TtYQ
vfCG5Tz3Ie8mgVUZ/wD+FE8aIPgVgCYYjypt0Kg/eREgiHvAeswp/N/YAGHDsiI6
tRzH+e0EDIndEyNYW7/Eb5jaJ/ueqsgLZkLIoExpvRlHmZTGCnAfWvvqnu8pVLRe
cDzbkYgop/F52IJ5iE8QqDeAY098jum9YPafDIovsZRTV6KB50DJ32LsAZPrUfCg
DhMGpAiENUkRv1hC4EWvMvg2VfecAQBnSuddNFwpmwsFcBLTsXtoDEO+61K41tym
cTfJ+Xnm6ziLvLheCEZFqWLCPyRNijrhmQ/YNiS+fatJlNUKnw2WcnGEAWkSOhhQ
DvGm2hZMJ2rzkw==
=Il+U
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.13-rc1
This removes support for the Whistler board, which only a handful of
people ever had access to and which doesn't provide any features over
other Tegra20 devices that we support.
Also this cleans up some PCI related device tree content in preparation
for a future DTC release that has additional checks for the PCI bus.
* tag 'tegra-for-4.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra: fix PCI bus dtc warnings
ARM: tegra: remove Whistler support
Signed-off-by: Olof Johansson <olof@lixom.net>
This tag is about bringing the EMAC support to the H3 boards.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZQZqLAAoJEBx+YmzsjxAgyn0P/3ZYfm7/aNwEBs7OjDv9mFb+
0b7nuSd2meiGcJKZXeimrYeFEUUEgFBNB++yHXSkVOpIdgf1RGO5KrCFhqfQcpq4
uluwtpNoWHeDp5vg1Oa93gJSg31r/a/m0r+Tp+xfDShZUrJr30YSn+7XVammTJov
KW9SfX2z3re1dB1zsxojPA6CZxuUCzMBGfx/bJ8p9UqKAYdAHcKsLNSlc8ykTG3/
2FooaMn8pPfeeSq6O8HFJLSFEYc48Hkcyy6ZFDqWoUeG0gLyB8jl/5xfsEEfLllW
ljvRDT499uoRLpOS4LUMyavSZAiBvyqv2tz+8bMiHqEzTieVWS9UEKDJvsAe+7Js
jWo5EHvLay3/jRMCdIYmR2xcomiyUxEWwqiCQaNnVOiKB8b+SmznuJZhcPJeTDdD
SBjn1iTFnl60UAOJ0IKsIta9jdiJ05bmQawpEqVpMvjvDvakLqBXUVH8EDm/wBEH
T6qY33Yv7dORKEws06duB4+fpQ+T6Gmeihwuyi4t5ogDhXOMrb662uztEaUHb78Q
7DOL7hunzyhLJYFmPRo6Ot01j1K2mhuD27NbP1WiN2zSf3t0c9m0GZCS2rGfD9vV
Aw6tccyQed4w3gPxA7AZz91336tIGvMwEVkn0AR6bO0fGrceQ9V80Ff8xaZjtF14
Pjx3BTBE/9dW1pPqHJlm
=1g1O
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-h3-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3 changes for 4.13
This tag is about bringing the EMAC support to the H3 boards.
* tag 'sunxi-dt-h3-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sun8i: h3: Enable EMAC with external PHY on Orange Pi Plus 2E
arm: sun8i: orangepi-zero: Enable dwmac-sun8i
ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i
ARM: sun8i: orangepi-plus: Enable dwmac-sun8i
arm: sun8i: nanopi-neo: Enable dwmac-sun8i
arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active high
arm: sun8i: orangepi-2: Enable dwmac-sun8i
arm: sun8i: orangepi-one: Enable dwmac-sun8i
arm: sun8i: orangepi-pc: Enable dwmac-sun8i
arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver
arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module
ARM: sunxi: h3-h5: Convert R_CCU raw numbers to macros
Signed-off-by: Olof Johansson <olof@lixom.net>
A few fixes around the PRCM support that got in 4.12 with a wrong
compatible, and a missing clock in the binding.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZQZkZAAoJEBx+YmzsjxAg4nAQAJJqzy8//Ur0o6Ppc6eufIAY
gYGS80x5n/a6/X7PPMj/cMBVc1/HoOoF5YVKry2edRi4jKwpBjCE6THNJ/EdI0LM
6PrN4y9yJAzxbwWfD9rfVNLg54665TGW8etBp5C3Sqdi+qmU9BTL068UYGcA46I8
XGZ53wGLnCfRH5VGpVzxORbdQMStKsZ2D0PTmZ7aJU2nrPugbf4DiGg2Uhgdx+bI
Mz3Zl6cZQraWdl6gSVTjG1Z5LQOKo5tXGIaC4zxbXe/Ss2lspxM3WKtJDhdtoTH9
ZiLGDf6Q3XUeMN5WkQNT6ZnT8+/8NQujhcktEfxhfiA5pGeHLzuOCaOLgEWVy8sc
Z6jNLHUht3W/XGOGY0szKfqmsOnDdnsnv3YbCUoWJ/0ER8kwQdJ8k4iI1EVMi23Q
UcXDiZivCgjj7mYOzfhG2YYZ03rxhadPqsnoDro/a+mI6splPhQplJC/we8TUYHt
eJmXF3rvOgXGYJAdnF8FJiftzUKUd0h8S8qsxBB3knP4mPY73vtppsvJwPOqlil2
EPcqHmcd3EvHRZrmHNsP7qpQXMiaWqImf6Ioq7hz4mPPJ5uiIPrEIdRmACCAdn9H
eeOQyI0rdg3bTCKi/dztaX4zVCMjEy9HG0xZ/Y6dvPwKjuWTpJApsTC+xEaiql2L
gQ+OFMX4mvgr79OUNp7L
=WD1J
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Allwinner fixes for 4.12
A few fixes around the PRCM support that got in 4.12 with a wrong
compatible, and a missing clock in the binding.
* tag 'sunxi-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU
ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
arm64: allwinner: h5: Remove syslink to shared DTSI
ARM: sunxi: h3/h5: fix the compatible of R_CCU
Signed-off-by: Olof Johansson <olof@lixom.net>
The usual chunk of patches. The most notable improvements are the power
supplies improvements (battery and AC-IN), crypto support for the sun5i
family, HDMI support for the A10s, plus a lot of new things for the V3S and
the A83T.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZQZJwAAoJEBx+YmzsjxAgx04QAKdl/M8KtGRCXaKC0AiAloQo
XNL1j2ylkSviQ19XP+1UjgtJq+86iNZCZ9iHegZuaHBzSP/t+8gZ8gbEexBz7lRz
ybIBRMcuMx9uO7aTKH74MGpIQWlZp6dziWbL0kDOKoIaXWyHT0/iftwuOsqDrC3H
K82pmg7OrNgmtApBDyqGMwwSLosrXuMyycsB1moyE/xbdcsKJmISJ3l9Kron8cyK
bi4CNoJ/J4Z1S6SWYUAQiRVYq8+DYz09dZgkyn4YlwRw30Sddzg11qduUVLCeYcD
BAERcJrzrHZLxOP6Cr6/5VvKDSvLN3poJXRIXRGzz7bAMVracOGIqC4PJ5bvduJ9
x0jeVPdMNNfRLXfeLFymBArGiSwfOeYcZJK4PzQx1M1mksDmFKQ9MxJwPNYhxT7I
lssOo+LRg2zdotxVd7zXNOc8FdY5zyi2ThhmUFwTDVRKnq6X+r4iyxosGOd3sPkd
/aOzyT+cdxC7vDoHfTfqRR9ZHBoLiWdD8+XBEQvjrMdENoFOaeys1aZle1/ZpR8J
O8kl6YyDxVNBxi9E8oO72DDM5U7pZYZG7XJsWnEOmTEwn1Xl6+89XQ/jvFdwHxZA
dIbchAn8gqoqe9vu9WSmBh4Tt1BIK5nI97B0KVMMeAgDx5gt7HBNKqcq1Ev34T4u
lpe4MRlx094nCukVA7Fm
=fwEx
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.13
The usual chunk of patches. The most notable improvements are the power
supplies improvements (battery and AC-IN), crypto support for the sun5i
family, HDMI support for the A10s, plus a lot of new things for the V3S and
the A83T.
* tag 'sunxi-dt-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (47 commits)
ARM: sun6i: a31s: primo81: Enable battery power supply
ARM: sun6i: a31s: primo81: Change USB OTG to OTG mode
ARM: sun8i: a83t: Add dt node for the syscon control module
ARM: sun8i: a83t: Add device node for R_PIO
ARM: sun8i: v3s: add device nodes for DE2 display pipeline
ARM: dts: sunxi: add SoC specific compatibles for the crypto nodes
ARM: sun5i: add a cryptographic engine node
ARM: sun8i: a83t: Add device node for PRCM
ARM: dts: sun8i: h3: Add initial NanoPi M1 Plus support
ARM: dts: orange-pi-zero: add node for SPI NOR
ARM: sun7i: a20: cubietruck: Tie AXP209's USB power supply to USB PHY
ARM: sun6i: a31: hummingbird: Enable AXP221's ACIN power supply
ARM: sun4i: a10: cubieboard: Enable AXP209's ACIN power supply
ARM: sun7i: a20: bananapi-m1-plus: Enable AXP209's ACIN power supply
ARM: sun7i: a20: cubieboard2: Enable AXP209's ACIN power supply
ARM: sun7i: a20: cubieboard2: Move usb_otg node for alphabetical ordering
ARM: sun8i: a83t: cubietruck-plus: Enable SPDIF output
ARM: sun8i: a83t: cubietruck-plus: Add LED device nodes
ARM: sun8i: a83t: Add device node for SPDIF transmitter
ARM: sun8i: a83t: Add device node for DMA controller
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- minor reorganization to support different busses
- add/use real clock controller
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJZQW1yAAoJEFk3GJrT+8ZloYUP/24OL8focZDhH6ehDYi3rQPb
qddthnw/dlvSX1fS1U1HYNvBzKs5yUaKLNsD4d1Zq9Ldc3eDgnss7hT3l4H+lUdK
DzxkwHhSdqwuxB/d6v2YcpP7IEUUflmKWhltr1Em7528zHTUnIbxwYt+afPYU2kb
C1HQ+M1L7ehf1w5A0MlyRTVukYKAfs8IJ7Sp2Zw/BGNH+vW11Ao83Suy45lbT6Ce
v5fiRBAAXdr0XnSF68g1/LkTN1tPy5wHDPBNCPG9lU2TUvidjOb33r2ICG8jDwna
FuHo3spLn+O02VtisDp42b6cLN2nMsyWyNObkpfvMCddR1MAn4efygVehcm568wI
qndAZJB54qcYRk5gUji1pEklqicnZXXLFZtQq0MITbBXVRXu0XapxE+sik9fOXw4
XFt5+trVbPVqJ/O2MiG12HiPSc5Wbudwen3ihqpzMKOxoKjOCEBaEiaOmQmUQ2/q
zELTcMdiYeetebAG1iLddSydmDGoru+HoPBLNAsFZ2IHv+TGtYYNcFJlnSPiApSv
rAYk5hGhubamLP9Y8UZQyeDhwFNLNIqVOJ+WZhxjAJPxMNaKZCoxkgXOiq0r+Otk
4NF3+tPrAEqMPmmUPL5ME/RQ4v2+QL8iHjXB8A1nnb62cI6jPpbYV/xmLx8Dpmkv
HWFjc+EA+tU77fqaPso8
=3gA0
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 32-bit DT changes for v4.13:
- minor reorganization to support different busses
- add/use real clock controller
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8: add and use the real clock controller
ARM: dts: meson: Extend L2 cache controller node for Meson8 and Meson8b
ARM: dts: meson8b: inherit meson.dtsi from meson8b.dtsi
ARM: dts: meson: organize devices in their corresponding busses
Signed-off-by: Olof Johansson <olof@lixom.net>
Note that Baruch's changes are fixes that are currently included in v4.12-rc2,
but they are also included here in order to keep this tag based off v4.12-rc1.
Please pull the following:
- Rafal adds CPU and thermal zones to the Northstar (BCM5301X) Device Tree and he
also adds the MDIO controller nodes for later use by USB PHYs
- Eric adds support for the V3D engine and Ethernet switch on the Cygnus
platforms, he also adds a set of Device Tree sources and include files for the
Raspberry Pi 3 (BCM2837) to be used with the ARM/Linux kernel,
- Jon adds CPU and thermal zones to the Northstar Plus Device Tree files
- Stefan updates the Raspberry Pi DTS files with thermal trip points and zones,
adds support for the USB OTG on the Raspberry Pi Zero which includes the
proper dwc2 configuration, a generic USB PHY and finally the enabling of the
OTG controller by including the proper DTS include file
- Gerd switches the Raspberry Pi DTS files to use the SDHOST controller (faster
than the SDHCI)
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZQEOMAAoJEIfQlpxEBwcEDh4QALPsHSHfEpMgpKAE87OWryhV
QGfPDNeSQElTNmeSfi/cytdy7yTAw/pJYsLxpyDoJ/a+Dac58Jd3gqmhSN6Gw6cd
vND9cxZ/tyadHbcqtmnse+5QO7nDH8xFwUEg3yLP50ieQ6Hlqbdv5USvKHTC1Xi3
5qXjlTTdcATRh6X+tKw8tTBOcgPPt4ZiV2Xzl59uqV468QbTZC+sh5ZskgIZBaZE
u1rfTXnEAcFT/5xle0CEFP4/yPc6gyZFdnXCQw1hmTimOUW8tlqsHI0S1CGY+pzK
nxSDOyDYHHHb0HvbJdYC22VE8CLBYIFal6W+kGxFBpP16elxTIke5N12x/xx2WFp
jCcLJj0PDdGXotaJYSHMuHTQuvKo7hOTU7oWgFHZGdTZNkMA3FWPInbT7v056SNG
TkfcC86077gaptIshNTCqZCfmm0SVd5oCSyi7kCulcS6tqKMgviaMiqlp0DLnxsO
bZpYIhdiScHheWy3tifTUBbhiGBy7R57ttMRP0oloOVT+Xgmg1/6+jaN6BLShiZp
BaOq4IoNwkSDJyVHZEMl81KHFqWN13g+P3wqnNIRpH4t94oo7uM2DXoVsVfsISY0
uQmWI07SZkw55NkCgn2bVeyzFW1RfW0vFYef9prqjfB4egKRBoZHqzMAnOeQmsMP
s5w93RzKj/o7r2CQzjzX
=aDbe
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.13/devicetree' of http://github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM-based Device Tree changes for 4.13.
Note that Baruch's changes are fixes that are currently included in v4.12-rc2,
but they are also included here in order to keep this tag based off v4.12-rc1.
Please pull the following:
- Rafal adds CPU and thermal zones to the Northstar (BCM5301X) Device Tree and he
also adds the MDIO controller nodes for later use by USB PHYs
- Eric adds support for the V3D engine and Ethernet switch on the Cygnus
platforms, he also adds a set of Device Tree sources and include files for the
Raspberry Pi 3 (BCM2837) to be used with the ARM/Linux kernel,
- Jon adds CPU and thermal zones to the Northstar Plus Device Tree files
- Stefan updates the Raspberry Pi DTS files with thermal trip points and zones,
adds support for the USB OTG on the Raspberry Pi Zero which includes the
proper dwc2 configuration, a generic USB PHY and finally the enabling of the
OTG controller by including the proper DTS include file
- Gerd switches the Raspberry Pi DTS files to use the SDHOST controller (faster
than the SDHCI)
* tag 'arm-soc/for-4.13/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm2835-rpi-zero: Enable OTG mode
ARM: dts: bcm283x: Add generic USB PHY
ARM: dts: bcm283x: Add dtsi for OTG mode
ARM: dts: Cygnus: Add the ethernet switch and ethernet PHY
ARM: dts: NSP: Add Thermal Support
ARM: dts: Cygnus: Add BCM11360's V3D device
ARM: dts: BCM5301X: Specify MDIO bus in the DT
ARM: dts: BCM5301X: Add CPU thermal sensor and zone
ARM: dts: bcm283x: switch from &sdhci to &sdhost
ARM: dts: bcm283x: Add CPU thermal zone with 1 trip point
ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6)
Signed-off-by: Olof Johansson <olof@lixom.net>
* Split LCD mux and gpio on armadillo800eva board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZPl2BAAoJENfPZGlqN0++Wf0P/A+9vI+/4d6wmztfIlxuxixU
9voJfNpwNHKFfGf7k5Wm1xCHbwiAGkWlyZ2TvvfbZjjALj1VhFrBUQSBmw4COrf4
A4uBRlOFrGlLevgYvbN8NLWNmxICXmzb4fyjjErXrB9Xq4Nf24HdZuhETB4KKXlq
Q2GETUa97RvVhptxCb5qN4R810lptu80xJDFB2stWdD8H2057dBKLVuy8D3iDToG
H8HD4CxjnMXwtuLsmAG6JKSwoSs6vEkHCUBWXhKCI7Fndr23xfNNu4ha6R3aRd0u
0NCAMIt9LxsLJqSFmV6XLenK3gSYfqWEgAGly+WpguHDUzGio7xDGOJcgelhOoX/
ZO4d+ZQMzjPRR57GRL6bZjWfFrzI/MP2pnjxlYiSVZsDTpDkrow/EZDR5HIrbvkI
6EXYl4MtjdKMnTPqieMfoNfnNtywWRk5ZbOtZYMiLWqv8OFRRCWayZhICTIHcyeW
YG9vUFVSVuPyMvvD/q+rb8KcyQOscaw0/7JEnCH96gi43qv0eXgnPVnjk2ClKYAS
ojSFY+zwbPXwNCbNf421zacK02bcIBWkN8m+7Ivk7+HgJiqzh8UmpCVlmoPRqOy+
YQbuW1m60garcaOGOjVvNMMnMrAxPeZZRy45Cj4NFH8e1IV4BgHqXQh1zCch5H8H
I1TrR70J9dbhA2EaJQnB
=oB4F
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/fixes-non-critical
Second Round of Renesas ARM Based SoC Fixes for v4.12
* Split LCD mux and gpio on armadillo800eva board
* tag 'renesas-fixes2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: armadillo800eva: Split LCD mux and gpio
Signed-off-by: Olof Johansson <olof@lixom.net>
following (and including) the new Mali Midgard binding; a lot of
improvements for the rk3228/rk3229 socs (tsadc, operating points,
usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
rename and adc buttons for the rk3288 firefly boards.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlk5x+gQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgVOmB/sHN5YBQCwdlermcO75CiLktacneQ6qcom2
GCBHfKwXxmey7puB8cKfQ1IgvvsKmXU1+QbUDjxD13p7b139WVRM3VEokOiSR7cl
XjGFFy9u6ECfPRpJfPBN/8oENcZ1N94S3gfhCwgcF6JDkumMI4DWVTLD4lZLeIcR
LTfZMddSevITXMzrWh0+Q9/TgnJbD58x4lSxs5m85h/8JDSfqdsijs/j2HJrBHPv
01NwQBm8w6rmTNL3UGfqDeUZTnmaczXRf2sgEr5ORLln2Qn++FpUaJiRPUdtYRs7
NEWLppFQeykoxgTQnttkt8oOyaKfNS3PsvwgA7R35w5HnbEtXcDK
=b2HZ
-----END PGP SIGNATURE-----
Merge tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
A bunch of changes including mali gpu nodes for rk3288 boards
following (and including) the new Mali Midgard binding; a lot of
improvements for the rk3228/rk3229 socs (tsadc, operating points,
usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
rename and adc buttons for the rk3288 firefly boards.
* tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: enable usb for rk3229 evb board
ARM: dts: rockchip: add usb nodes on rk322x
ARM: dts: rockchip: add adc button for Firefly
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-veyron
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-firefly
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-rock2-som
ARM: dts: rockchip: add ARM Mali GPU node for rk3288
dt-bindings: gpu: add bindings for the ARM Mali Midgard GPU
ARM: dts: rockchip: set a sane frequence for tsadc on rk322x
ARM: dts: rockchip: add operating-points-v2 for cpu on rk322x
ARM: dts: rockchip: set default rates for core clocks on rk322x
ARM: dts: rockchip: add second uart2 pinctrl on rk322x
ARM: dts: rockchip: correct rk322x uart2 pinctrl
ARM: dts: rockchip: add watchdog device node on rk322x
clk: rockchip: add clock-ids for more rk3228 clocks
clk: rockchip: add ids for camera on rk3399
ARM: dts: rockchip: fix rk322x i2s1 pinctrl error
ARM: dts: rockchip: rename RK1108-evb to RV1108-evb
ARM: dts: rockchip: rename core dtsi from RK1108 to RV1108
ARM: dts: rockchip: Setup usb vbus-supply on rk3288-rock2
Signed-off-by: Olof Johansson <olof@lixom.net>
EV3 battery support, DMA support for MUSB, and non-critical fixes to
GPIO nodes of DA850's GPIO controller and GPIO expander available on
DA850 EVM.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZOSmIAAoJEGFBu2jqvgRNFNUP/irdqTUCOPUdpHS+Qrsz1+CE
4U0VpEvFnrlRqJa97zZ1Tps71x0UFfIcVJDveY8rTGK4rMNR6pgalf8PIT+65UVi
exWxkF+OIOjqS6wKu9zN6yn8RemNViiAqtGwcoI9AUAeX+dBg7IZ58bBGAtNf0uy
5Bn99C/5jompTPUPSnZTv5ZW0BZmv8El5WUL3wQh4nT24BzfrAI0miI3d8lW5MKF
/ttkinxeFy9xZEaE+xOKkGtcg4z4JhfalEHtCQhRweE+VJJwEGwdghFs3AT3GLO8
ksRufJzB1R/KEexL9qeHWY+VXRVF1tbdzbDcdrHjqxYUlTVxda5+36NOYANzz3NT
heGXn4mAPm5YiE78ygV7dMaaSMlq6ahjmVSmGjmMvUHFSUaK4WVS8OVJxOmZhi6k
mkxaJ2PIyzFBUlpu35435VqkAc7k5EyKni+HilW5kg4a2o3K0HjS8M1tvf/CkvVk
3evOnVqHare4UajPCQiIPnbSld3fXPl/g7dxLbyXBPY1FtrWxK9Vz11TdpzkiNAy
g2TJFJSQ39lStamW3i1ZAMzej0QCQnsJnZsY7e6JHHfJBxvvKiy3pjlZqhHN7N9M
joFSwaaye05HKacLhKGkSN/NY5fPHDEixc8V1NeoqODan3XoCv6naIjAXMDObASu
vxUIUeg4o7xHjnuGgQ7h
=ZLlm
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.13/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Miscellaneous DT support updates for DA850. Includes Lego mindstorms
EV3 battery support, DMA support for MUSB, and non-critical fixes to
GPIO nodes of DA850's GPIO controller and GPIO expander available on
DA850 EVM.
* tag 'davinci-for-v4.13/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-evm: fix tca6416 for use with GPIO hogs
ARM: dts: da850: Add interrupt-controller property to gpio node
ARM: dts: da850: Add CPPI 4.1 DMA to USB OTG controller
ARM: dts: da850-lego-ev3: Add node for LEGO MINDSTORMS EV3 Battery
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds support for am335x-boneblue. The rest of
the changes are for enabling features on various
devices with the git shortlog describing the changes.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlk3sEwRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNyuRAAkj0cC0jcKs3ol7XDLaVmiO94wb8UDXHJ
/ishcgq7bQm90UDEnzPP1NiH2tM9zG62lWwc/i8H2K3nQ+/Wrscl7GTPjTF2GK4H
DSzM2+uCFFxypJZPOp536IkQA3ZqFC+/jFt2qQ/Xwg5TB8+ckJL0sQMUW9jvWVf0
RhA41xy7ibnKKGwHdvZfWUO3VHEp57dC3E8GgbQKEJiqoea5oTDH6ee2bzxnq2dC
jpKIHU0wvG0RXX04mviDxDtaFoQLNpTh1D8+vK9AFx4sU/LQzuQjsSz4jD9XSeRR
OrcVz0Ol4nk9jq54AcAkbcO2v/3Lp2SDDLVA8fo7rEkfT8EGflKLMraeOCMPMl2F
ipz26jKLB3mRGKGZEI+zR15QbQjIXp68GT3jgCJVQyIM+i/IaDEerFdPfH6OkYwv
HkKNftGN5qTT8njQw6a8IdVUbXjKjDhQtDbGjZkmYuhVEs7+W9q2GWqIGiXH8uVX
KsfP5qx/DlddHSpSx0nmFfiaannVrU2SX6viWFqlaqusf+Fw/Tdj1SfZWTKxD6/u
6t78arDFQrzWQY8lcDB/YdixGd1q0go1FmlTvGgU7ObS2lJfp4F7wxx0XHio2D5C
41GXG4JWnEv4n7uzvJgKdf1+jy/dibKnEg02YfCl0GLCo4PQNTJMkS4EQ9xlR4Ke
Dxi22SUpBFE=
=u58m
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omaps for v4.13 merge window.
This adds support for am335x-boneblue. The rest of
the changes are for enabling features on various
devices with the git shortlog describing the changes.
* tag 'omap-for-v4.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm: dts: am33xx: Remove redundant interrupt-parent property
ARM: dts: bonegreen-wireless: add WL1835 Bluetooth device node
ARM: dts: AM43XX: Remove min and max voltage values for dcdc3
ARM: dts: Add am335x-boneblue
ARM: dts: twl4030: Add missing madc reference for bci subnode
ARM: dts: am43xx-clocks: Add support for CLKOUT2
ARM: dts: Configure USB host for 37xx-evm
ARM: dts: omap: Add generic compatible string for I2C EEPROM
ARM: dts: Enable earlycon stdout path for LogicPD torpedo
ARM: dts: Enable earlycon stdout path for duovero
arm: dts: boneblack-wireless: add WL1835 Bluetooth device node
ARM: dts: am571x-idk: Enable the system mailboxes 5 and 6
ARM: dts: am572x-idk: Enable the system mailboxes 5 and 6
ARM: dts: omap4-devkit8000: fix gpmc ranges property
ARM: dts: omap3: Remove 'enable-active-low' property
ARM: dts: OMAP5: uevm: add µSD card detect
ARM: dts: omap4-droid4: Add bluetooth
ARM: dts: dra7x-evm: Enable dual-role mode for USB1
ARM: dts: Use - instead of @ for DT OPP entries for TI SoCs
ARM: dts: am335x-phycore-som: fix rv4162 compatible
Signed-off-by: Olof Johansson <olof@lixom.net>
for claiming SPI pins, and to fix a SDIO card detect
pin for production version of the device.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlk3q9cRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMFbRAAx9XBHtsHPI0AcWEagprXFoeKClEmlV33
Az06mEwgWKM0IMKELdstFLgpT80zp71v44k61vxWHudJi3a3rEbcDiujmttKg4II
fL3CfjpYS3son449VZWc/X0ZsvU/5vhusDkx8QwGWK1FgfOLVNvwNtgxWr3roUFC
qUQZImkTvgKYuhoaoV5Sx0VtUEJ9ukLNAqjy0HTfTU15jkX4/nqmlB+8ov2oamYv
r502+LEzNVoCmlYW1SBH+yn7zebIad2UtRZqz+TV8FnJl3p4yFI1Odvo8hbODTzT
vo+YsSmhd23eKnw+yXpqdPYng3yXH5Co3vLFumpBcyNkZlCtSokLrJ1/VOjtTNVn
oM+gsR77I6zGknFdiBzITLJRFABHlziSfeaDyyhfQX9CAfrCv9t5hiqn6KwRuiGj
H1hD2JkFWeJLLPGO4YauJk5PLcAdMILfjHRHW7lBeKaT76nH4Ha5PgpCj22hNSCo
m1EDdR30QzkfL28iYp8LM9yNhkm05Y8VG517AmIrzJUl6/RhTRH2f5d6+ChTQ7AA
cp89ITqEeccCso6xULCPjqaGIuYCEopDFjQN/WP8Pt5bXweiiQ6HpAgMDp2E5PfD
3yKwYvXDyl5HIa+ZbEDPLuna1OjDu7BrCe+nuDwsVfeM0fOHViABPl6mAvH7VXvb
nQhOVeQSP8I=
=e4F/
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.12/fixes-sl50' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Two fixes for am335x-sl50 to fix a boot time error
for claiming SPI pins, and to fix a SDIO card detect
pin for production version of the device.
* tag 'omap-for-v4.12/fixes-sl50' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-sl50: Fix cannot claim requested pins for spi0
ARM: dts: am335x-sl50: Fix card detect pin for mmc1
Signed-off-by: Olof Johansson <olof@lixom.net>
The cm-fx6 module has an on-board AW-NH387 WiFi/BT module which is
based on Marvell's SD8787 chip and is connected to the usdhc1
controller.
Unfortunately, the chip gets unresponsive if the Bluetooth AMP
(Alternate Mac/Phy) function gets probed but the loaded firmware
doesn't support it. For instance, this is the case for the most
recent firmware in linux-firmware (Version 14.66.35.p52).
Thus, just add the required nodes but leave the usdhc1 node disabled
explicitly. Users who disabled the Bluetooth (AMP) support of their
OS can then conveniently enable WiFi (or even plain Bluetooth) support
with a simple device tree overlay/bootloader configuration.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The "test" and "conf" nand partitions partly overlap:
Creating 6 MTD partitions on "orion_nand":
0x000000000000-0x000000090000 : "uboot"
0x000000090000-0x0000000d4000 : "env"
0x0000000d4000-0x0000000f8000 : "test"
0x0000000f4000-0x0000004f4000 : "conf"
That is unlikely to be desired, and not matching the partition map used in
u-boot - So adjust the test partition size to fix this.
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Linksys WRT3200ACM (Rango) is the lates Armada-385 based router in
the Linksys WRT AC Series which got released in October 2016.
Key differences to the earlier Armada-385 based devices in the series is
a bigger flash chip, next generation wireless modules (Marvell 88W8964)
in the mini pcie slots as well as a Marvell SD8887. Finally the CPU is
clocked at 1866 GHz by default.
The file armada-385-linksys-rango.dts is loosly based off of a DTS
authored by Imre Kaloz.
As Rango is part of the armada-385-linksys family of boards use the
armada-385-linksys.dtsi as basis. As for functional differences to Imre
Kaloz dts, the wlan LEDs aren't connected to the expander chip pca9635
but directly to GPIOs. Then mpp47 controls the USB2.0 port and not the
USB3.0 port, so use the correct GPIO mpp44 for it. Finally use
non-removable instead of broken-cd with the sdhci node to avoid polling.
Other changes can be categorized as just cleanup / reorganization due to
using the armada-385-linksys.dtsi.
URL: 0abc3fa5a9/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-linksys-rango.dts
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Buttons don't have a reg property; drop pseudo address and fixup names
of individual button nodes. Also drop #address-cells and #size-cells
properties.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
A pin group per node is sufficient, further specialization only serves
as documentation which can be a comment just as well. This simplifies
configuring pins for nodes in dependants.
Also use labels which end up right by the node they are intended for.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Move the partition layout to individual boards. The Linksys WRT 3200 ACM
(Rango) comes with a 256MiB nand flash chip and different layout.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Use IEEE 1541-2002 unit prefixes for sizes.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The new ones work so there is little reason to keep the legacy bindings.
Use the rework as the opportunity to drop the legacy node.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Now that we use the reference for the USB3.0 port update the node name
and labels for the phy and vbus to match the label used by
armada-38x.dtsi.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Which pools we assing doesn't matter. Use the order which doesen't leave
a chance for questions for first time readers.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Drop redundant declaration of #address-cells and #size-cells.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Flatten dts of individual boards to match the new style used in
armada-385-linksys.dtsi and for the Rango addition.
* Caiman - Linksys WRT1200AC v1 & v2
* Cobra - Linksys WRT1900AC v2
* Shelby - Linksys WRT1900ACS v1 & v2
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add labels to nodes used by dependants. Also rename node gpio_keys to
gpio-keys to match the style of the rest of the file as well as the
documented example.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Since the addition of the spi reference two styles are used. Use
references instead of recreating the same structure over and over again.
This helps to distinguish which are changes to the underlying nodes and
which are new additions and helps maintainability in general.
Verified the resulting dtb to be binary identical.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
There is no rtc for the 98dx3236 and derivative SoCs. Disable the rtc
node inherited from the armada-370-xp base.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The 98dx4251 has 4 interrupts for the packet processor whereas the
98dx3236 and 98dx3336 only have 3.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
driver to control the fan of the WRT1900AC, giving us finer grained control
over its speed and hence noise.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427291/
[Ralph Sennhauser: drop flags paramter from pwms, no longer used]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add the required properties to the GPIO nodes for them to be used as PWM
lines.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add properties to the GPIO nodes for Armada 370/XP to allow them to be
also used as PWM lines.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427294/
[Ralph Sennhauser: Add new compatible string marvell,armada-370-gpio]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Until now clk81 was used as gate clock for the ethernet controller on
Meson8 whereas Meson8b did not configure a gate clock at all. Use
CLKID_ETH for both SoCs, which is the real gate clock for the ethernet
controller.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Amlogic's Meson8b SoC has a Snoop Control Unit (SCU), just like many
other Cortex-A5 SoCs. Add the corresponding devicetree node so it can be
used during SMP boot.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the DWC2 USB controller nodes and the corresponding USB2 PHY
nodes to meson.dtsi (as the same - or at least a very similar) IP block
is used on all SoCs (at the same physical address).
Additionally meson8.dtsi and meson8b.dtsi add the required clocks to the
DWC2 and USB2 PHY nodes, otherwise the DWC2 controller cannot be
initialized by the dwc2 driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
All supported Meson SoCs have a random number generator in CBUS.
Newer SoCs (GXBB, GXL and GXM) provide only one 32-bit random number
register, whereas the older SoCs (Meson6, Meson8 and Meson8b) have two
32-bit random number registers. The existing meson-rng driver only
supports the lower 32-bit - but it still works fine on the older SoCs
apart from this small limitation.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There seem to be two memory regions that need to be reserved, otherwise
the system just hangs when running:
$ stress --vm-bytes $(awk '/MemFree/{printf "%d\n", $2 * 0.9;}' < /proc/meminfo)k \
--vm-keep -m 1
The first memory region is really crucial and without it the system
hangs. I could not find any references to this in Amlogic's GPL kernel
sources.
The second region is used by the "suspend firmware". The u-boot sources
(/arch/arm/cpu/aml_meson/m8/firmwareld.c) state that the suspend
firmware is located at "64M + 15M" which matches CONFIG_MESON_SUSPEND in
the Amlogic GPL kernel sources. The "suspend firmware" is responsible
for waking up the system from suspend state.
This also fixes reading the full SD card as without this the system
would simply hang (probably related to the first memory region, if some
buffer is allocated there).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the SAR ADC to meson.dtsi and configures the clocks on Meson8
and Meson8b to allow boards to use it. Some boards use it to connect a
button to it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the definition of the PWM_E (CBUS) and PWM_F (AOBUS) to
meson8.dtsi, allowing devices to use them. PWM_E can be used on some
devices to generate the 32.768kHz clock for the SDIO wifi module, while
PWM_F can be used to control the power LED.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This makes meson.dtsi easier to read as we are not using magic numbers
for the GIC interrupt type (GIC_SPI) and the interrupt polarity
(IRQ_TYPE_EDGE_RISING).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This replaces the "/include/" syntax with the "#include" syntax in all
Amlogic Meson .dts and .dtsi files. That is required to use preprocessor
defines (like GIC_SPI and IRQ_TYPE_EDGE_RISING) in meson.dtsi (all files
which directly or indirectly include meson.dtsi need to use the
"#include" syntax, otherwise the .dts files cannot be compiled).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The IR receiver pins are currently defined in the CBUS pin-controller.
However the pins are in the AO region, which is controlled by the AOBUS
pin-controller. Move the pins to pinctrl_aobus so they can actually be
used.
Fixes: b60e1157d8 ("ARM: dts: amlogic: Split pinctrl device for Meson8 / Meson8b")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This reset gpio is active low, therefore fix from active high to low.
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Odroid-U3 board has an IP4791CZ12 level shifter that is
disabled if the HPD is low, which means that the CEC pin is
disabled as well.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
qoriq clock driver has been updated to parse the clock configuration
information defined in driver itself not in dts.
Since the new implementation and the bindings have been merged,
it is time to update the clock related node and remove redundent clock
configuration information from the dts.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The MSI Primo81 tablet has a 3500 mAh 3.7V LiPo battery.
Enable the PMIC's battery power supply so the battery can be monitored.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have support for the AXP221 PMIC's USB VBUS detection and
DRIVEVBUS vbus control, we can use the USB OTG port in proper OTG mode.
This patch enables the aforementioned PMIC functions, adds the OTG ID
detection pin to the USB PHY node, and changes the mode of USB OTG to
"otg".
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch add the dt node for the syscon register present on the
Allwinner A83T
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enables the ADV7180 decoder sensor. The ADV7180 connects to the
parallel-bus mux input on ipu1_csi0_mux.
The ADV7180 power pin is via max7310_b port expander.
Changes from Tim Harvey:
- Use IRQ_TYPE_LEVEL_LOW instead of 0x8 for interrupt type for clarity.
- For 8-bit parallel IPU1-CSI0 bus connection only data[12-19] are used.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The reset pin to the port expander chip (MAX7310) is controlled by a gpio,
so define a reset-gpios property to control it. There are three MAX7310's
on the SabreAuto CPU card (max7310_[abc]), but all use the same pin for
their reset. Since all can't acquire the same pin, assign it to max7310_b,
that chip is needed by more functions (usb and adv7180).
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The sabreauto uses a steering pin to select between the SDA signal on
i2c3 bus, and a data-in pin for an SPI NOR chip. Use i2cmux to control
this steering pin. Idle state of the i2cmux selects SPI NOR. This is not
a classic way to use i2cmux, since one side of the mux selects something
other than an i2c bus, but it works and is probably the cleanest
solution. Note that if one thread is attempting to access SPI NOR while
another thread is accessing i2c3, the SPI NOR access will fail since the
i2cmux has selected the SDA pin rather than SPI NOR data-in. This couldn't
be avoided in any case, the board is not designed to allow concurrent
i2c3 and SPI NOR functions (and the default device-tree does not enable
SPI NOR anyway).
Devices hanging off i2c3 should now be defined under i2cmux, so
that the steering pin can be properly controlled to access those
devices. The port expanders (MAX7310) are thus moved into i2cmux.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enables the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor.
The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux.
The OV5640 connects to the input port on the MIPI CSI-2 receiver on
mipi_csi.
Until the OV5652 sensor module compatible with the SabreSD becomes
available for testing, the ov5642 node is currently disabled.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adds the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor.
Both hang off the same i2c2 bus, so they require different (and non-
default) i2c slave addresses.
The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux.
The OV5640 connects to the input port on the MIPI CSI-2 receiver on
mipi_csi.
The OV5642 node is disabled temporarily while the subdev driver is
cleaned up and submitted later.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There is a pin conflict with GPIO_6. This pin functions as a power
input pin to the OV5642 camera sensor, but ENET uses it as the h/w
workaround for erratum ERR006687, to wake-up the ARM cores on normal
RX and TX packet done events. So we need to remove the h/w workaround
to support the OV5642. The result is that the CPUidle driver will no
longer allow entering the deep idle states on the sabrelite.
This is a partial revert of
commit 6261c4c8f1 ("ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC
interrupt.")
commit a28eeb43ee ("ARM: dts: imx6: tag boards that have the HW workaround
for ERR006687")
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the device tree graph connecting the input multiplexers
to the IPU CSIs and the MIPI-CSI2 gasket on i.MX6. The MIPI_IPU
multiplexers are added as children of the iomuxc-gpr syscon device node.
On i.MX6Q/D two two-input multiplexers in front of IPU1 CSI0 and IPU2
CSI1 allow to select between CSI0/1 parallel input pads and the MIPI
CSI-2 virtual channels 0/3.
On i.MX6DL/S two five-input multiplexers in front of IPU1 CSI0 and IPU1
CSI1 allow to select between CSI0/1 parallel input pads and any of the
four MIPI CSI-2 virtual channels.
Changes from Steve Longerbeam:
- Removed some dangling/unused endpoints (ipu2_csi0_from_csi2ipu)
- Renamed the mipi virtual channel endpoint labels, from "mipi_csiX_..."
to "mipi_vcX...".
- Added input endpoint anchors to the video muxes for the connections
from parallel sensors.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The IOMUXC General Purpose Register space contains various bitfields
that control video bus multiplexers. Describe them using a mmio-mux
node. The placement of the IPU CSI video mux controls differs between
i.MX6D/Q and i.MX6S/DL.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
OMAP4 has AES2 instance, so add its integration data under DT.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
"aes1_fck" and "aes2_fck" are controlled by hwmod. Drop clock
entries to avoid conflicts.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP4 has a second aes module, so let's use proper name for
the first instance.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The NAS4229B and SQ201 Gemini systems have a PATA controller
which is linked to a SATA bridge in the SoC. Enable both
platforms to use the PATA/SATA devices.
Cc: John Feng-Hsin Chiang <john453@faraday-tech.com>
Cc: Greentime Hu <green.hu@gmail.com>
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the Faraday Technology FTDMAC020 DMA controller to
the Gemini SoC DTSI file. It is only used for memcpy work so
we can activate it for all users of the chipset.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
mode, the new thermal nodes, switches to the faster sdhost controller
for MMC, and enables USB OTG mode on the Pi 0.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE/JuuFDWp9/ZkuCBXtdYpNtH8nugFAlk/E94ACgkQtdYpNtH8
nujc6g/9HBpmIPkiK0g2pQ50BYQnxCcZDpkq4su7kj4+IVyMk/EyPlMUBFAkZGGx
zaRFbUEVGCAfZ9vJXebUc0l0x3N0DNA88L1PFkKWXt9TkrbOBnbSNMyIzJBxRs81
Ucl4h7WUox2Y3XeGluOcl/d6wMvBHNwrA+Nm46VfTX29nTu3fnL3Piq+JPRB0Q2N
I1Apt4oydTChIUY2EeM/N5FkDssMbjJqI8ZQSxRB1W6ppfOBmbyenb4Un+3NsPsX
dkozW5TseBPHKXnQDI+pPMXWgQ+GlGuceOrggsvh9X2+WcHib4R7aua5rCAZMVb5
tcUW8PmTDmSQ3YoDpAEUdK6FJipQMx8AU8v1XtZq6r1eUd9fkjvehGajjxBUNGpM
4UYbk9fFWp/vcq9ZYWEdqk0qqLu1kwv7XCzPDgYpedT/hXQbMiP0FNkU1id5js7+
3ZnfPu/58IXafPcqmHRG5txX67I+5QvktUswTAaEP6eFEV+HnE7sMfEYuIhlGUKZ
CN9mY7X90PgzjZzM0fi6UZn7ddpu4K9qqkaZxFEc2rKSdEg+oeV/HdLGFmhs2kFb
fDSoFOvsfdpypof7B6/LqhQ/4PBQeT8ZCfT3ShIhiuuTFuBSua5bw7b0D2N11w9H
JZhaZb+IaRNKT0jGsHLjvX66dk/mhxK2bk2jaZLPlhET5EnHZk4=
=2WZ2
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZQD9RAAoJEIfQlpxEBwcEQe0QAMEP8kRwZ9T8qa/UbuDFu5Nn
tyj5xFz63Z9Tt4OcrOfezV0ehnT5qinym8zIt+0S0L9RCEafw/Ous2sMcFpC0cjH
Mnava0H9QELaE68/lZH4RqTd+zzYeJOUe9YD0YsIJ8MBfOkz62fR2mppur1b8E42
MUNGgXqCf7B6IFF+JQWVBlw7x9uiBn+mKShEY81FezQijVZOpG4Fa6R6tqeBw3J8
+t1v4H9zc41aFfYJbdnuaTIL1MU84fL0xKBRa6A1+jEP2qctik1xza84uZHip98Y
RG1SVAfvVUeWR0+RtJZqIKjfu71yFDeUkiywlspM1PfXRABm7ZQun3HvzeZcoMoF
QQ+ITPUL9+p4VVFf+Sl4C0GjOiHzpH1ah/d65uVyl2AbsOnMG+klBLmT4Em3oy/Q
8auIfXSkvmlVx0lp/hna98T2uEdG4sAs3sw4Qr+uF5qkqgr7lsjNxniNQLTE+BoO
/JqAH1E2lOA7wmgkDFBsYzkJpNi8z4uE0rKRe93CcZT69Zg4+/ZfYWU7QlTrrN3+
qnsdqq9cfjSmMoXYP2/EawcFl2Dx48BJBvd1vgULJGxpw4JEap7Wp37fUDavpCdK
GD2hXQfGTzXdZJOLEbBbxxX9zZSF0LUA+PWFSbmIf03nGy5X9Fu/XQR04NxNrSpI
HrfKxcwV02yF8jTib2i/
=HNJf
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-dt-next-2017-06-12' into devicetree/next
This pull request brings in installation of the RPi3 DT in 32-bit
mode, the new thermal nodes, switches to the faster sdhost controller
for MMC, and enables USB OTG mode on the Pi 0.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The APQ8060 Dragonboard has an Atmel AT24c128 EEPROM and a
Wolfson Micro WM8903 codec connected to its GSBI8 I2C bus.
Add entries for these to the device tree. The interrupt line
from the WM8903 chip is not routed anywhere on this design
so it can not be used.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Whistler is an ancient Tegra 2 reference board. I may have been the only
person who ever used it with upstream software, and I've just recycled
the board hardware. Hence, it makes sense to remove support from software.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Since 635c21068cf ("usb: dwc2: gadget: Fix WARN_ON messages
during FIFO init") the dwc2 driver is able to handle OTG and gadget
mode for bcm2835. So enable this feature for the Raspberry Pi Zero.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
In order to use dwc2 in OTG or gadget mode the USB PHY should be
specified. Since there is no bcm283x USB PHY driver use the generic
one.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
The Raspberry Pi Zero also supports OTG mode. So provide a dtsi file
to configure the USB interface accordingly. The fifo sizes are optimized
for device endpoint 6 and 7 with the maximum of 768.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Cygnus has a single amac controller connected to the B53 switch with 2
PHYs. On the BCM911360_EP platform, those two PHYs are connected to the
external ethernet jacks.
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add thermal support via the ns-thermal driver and create a single
thermal zone for the entire SoC.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This loads the VC4 driver on the 911360_entphn platform (with the
corresponding series sent to dri-devel), which is supported by master
of the Mesa tree.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Northstar devices have MDIO bus that may contain various PHYs attached.
A common example is USB 3.0 PHY (that doesn't have an MDIO driver yet).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This uses CPU thermal sensor available on every Northstar chipset to
monitor temperature. We don't have any cooling or throttling so only a
critical trip was added.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Commit 06a4b6d009 ("ARM: 8677/1: boot/compressed: fix decompressor
header layout for v7-M") fixed an issue in the layout of the header
of the compressed kernel image that was caused by the assembler
emitting narrow opcodes for 'mov r0, r0', and for this reason, the
mnemonic was updated to use the W() macro, which will append the .w
suffix (which forces a wide encoding) if required, i.e., when building
the kernel in Thumb2 mode.
However, this failed to take into account that on Thumb2 kernels built
for CPUs that are also ARM capable, the entry point is entered in ARM
mode, and so the instructions emitted here will be ARM instructions
that only exist in a wide encoding to begin with, which is why the
assembler rejects the .w suffix here and aborts the build with the
following message:
head.S: Assembler messages:
head.S:132: Error: width suffixes are invalid in ARM mode -- `mov.w r0,r0'
So replace the W(mov) with separate ARM and Thumb2 instructions, where
the latter will only be used for THUMB2_ONLY builds.
Fixes: 06a4b6d009 ("ARM: 8677/1: boot/compressed: fix decompressor ...")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The GPU has two functional clocks - GPU_CORE_GCLK and GPU_HYD_GCLK.
Both of these are mux clocks and are derived from the DPLL_CORE
H14 output clock CORE_GPU_CLK by default. These clocks can also be
be derived from DPLL_PER or DPLL_GPU.
The GPU DPLL provides the output clocks primarily for the GPU.
Configuring the GPU for different OPP clock frequencies is easier
to achieve when using the DPLL_GPU rather than the other two DPLLs
due to:
1. minimal affect on any other output clocks from these DPLLs
2. may require an impossible post-divider values on existing DPLLs
without affecting other clocks.
So, switch the GPU functional clocks to be sourced from GPU DPLL by
default. This is done using the DT standard properties "assigned-clocks"
and "assigned-clock-parents". Newer u-boots (from 2017.01 onwards) reuse
and can update these properties to choose an appropriate one-time fixed
OPP configuration as all the required ABB/AVS setup is performed within
the bootloader. Note that there is no DVFS supported for any of the
non-MPU domains. The DPLL will automatically transition into a low-power
stop mode when the associated output clocks are not utilized or gated
automatically.
This patch also sets the initial values for the DPLL_GPU outputs.
These values are chosen based on the OPP_NOM values defined as per
recommendation from design team. The DPLL locked frequency is kept
at 1277 MHz, so that the value for the divider clock, dpll_gpu_m2_ck,
can be set to 425.67 MHz for OPP_NOM.
Signed-off-by: Subhajit Paul <subhajit_paul@ti.com>
[s-anna@ti.com: revise patch description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IVA DPLL in DRA7xx provides the output clocks for only the IVAHD
subsystem in DRA7xx as compared to previous OMAP generations when it
provided the clocks for both DSP and IVAHD subsystems. This DPLL is
currently not configured by older bootloaders. Use the DT standard
properties "assigned-clocks" and "assigned-clock-rates" to set the
IVA DPLL clock rate and the rates for its derivative clocks at boot
time to properly initialize/lock this DPLL and be independent of the
bootloader version. Newer u-boots (from 2017.01 onwards) reuse and
can update these properties to choose an appropriate one-time fixed
OPP configuration. The DPLL will automatically transition into a
low-power stop mode when the associated output clocks are not
utilized or gated automatically.
The reset value of the divider M2 (that supplies the IVA_GFLCK, the
functional clock for the IVAHD subsystem) does not match a specific
OPP. So, the derived output clock from this IVA DPLL has to be
initialized as well to avoid initializing these divider outputs to an
incorrect frequencies.
The OPP_NOM clock frequencies are defined in the AM572x SR2.0 Data
Sheet vB, section 5.5.2 "Voltage And Core Clock Specifications". The
clock rates are chosen based on these OPP_NOM values and defined as per
a DRA7xx PLL spec document. The DPLL locked frequency is 2300 MHz, so
the dpll_iva_ck clock rate used is half of this value. The value for the
divider clock, dpll_iva_m2_ck, has to be set to 388.333334 MHz or more
for the divider clk logic to compute the appropriate divider value for
OPP_NOM.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DSP DPLL is a new DPLL compared to previous OMAP generations and
supplies the root clocks for the DSP processors, as well as a mux
input source for EVE sub-system (on applicable SoCs). This DPLL is
currently not configured by older bootloaders. Use the DT standard
properties "assigned-clocks" and "assigned-clock-rates" to set the
DSP DPLL clock rate and the rates for its derivative clocks at boot
time to properly initialize/lock this DPLL and be independent of the
bootloader version. Newer u-boots (from 2017.01 onwards) reuse and
can update these properties to choose an appropriate one-time fixed
OPP configuration. The DPLL will automatically transition into a
low-power stop mode when the associated output clocks are not
utilized or gated automatically.
The DSP DPLL provides two output clocks, DSP_GFCLK and EVE_GCLK. The
desired rate for DSP_GFCLK is 600 MHz (same as DSP DPLL CLKOUT frequency),
and is currently auto set due to the desired M2 divider value being the
same as reset value for the locked frequency of 600 MHz. The EVE_GCLK
however is required to be 400 MHz, so set the dpll_dsp_m3x2_ck's rate
explicitly so that the divider is set properly. The dpll_dsp_m2_ck rate
is also set explicitly to not rely on any implicit matching divider reset
values to the locked DPLL frequency.
The OPP_NOM clock frequencies are defined in the AM572x SR2.0 Data
Sheet vB, section 5.5.2 "Voltage And Core Clock Specifications". The
clock rates are chosen based on these OPP_NOM values and defined as per
a DRA7xx PLL spec document. The DPLL locked frequency is 1200 MHz, so
the dpll_dsp_ck clock rate used is half of this value.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IPU1 functional clock is actually the output of a mux clock,
ipu1_gfclk_mux. The mux clock is sourced by default from the
DPLL_ABE_X2_CLK, and this results in a rather odd clock frequency
(361 MHz) for the IPU1 functional clock on platforms where ABE_DPLL
is configured properly. Reconfigure the mux clock to be sourced from
CORE_IPU_ISS_BOOST_CLK (dpll_core_h22x2_ck), so that both the IPU1
and IPU2 are running from the same clock and clocked at the same
nominal frequency of 425 MHz.
This also ensures that IPU1 functional clock is always configured
properly and becomes independent of the state of the ABE DPLL on
all boards.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IVA DPLL is not an essential DPLL for the functionality of a
bootloader and is usually not configured (e.g. older u-boots configure
it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer
than 2014.01 do not even have an option), and this results in incorrect
operating frequencies when trying to use a DSP or IVAHD, whose root
clocks are derived from this DPLL. Use the DT standard properties
"assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock
rate and the rates for its derivative clocks at boot time to properly
initialize/lock this DPLL. The DPLL will automatically transition
into a low-power stop mode when the associated output clocks are
not utilized or gated automatically.
The reset values of the dividers H11 & H12 (functional clocks for DSP
and IVAHD respectively) are identical to each other, but are different
at each OPP. The reset values also do not match a specific OPP. So, the
derived output clocks from the IVA DPLL have to be initialized as well
to avoid initializing these divider outputs to incorrect frequencies.
The clock rates are chosen based on the OPP_NOM values as defined in
the OMAP5432 SR2.0 Data Manual Book vK, section 5.2.3.5 "DPLL_IVA
Preferred Settings". The recommended maximum DPLL locked frequency is
2330 MHz for OPP_NOM (value for DPLL_IVA_X2_CLK), so the dpll_iva_ck
clock rate used is half of this value. The value 465.92 MHz is used
instead of 465.9 MHz for dpll_iva_h11x2_ck so that proper divider
value can be calculated.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IVA DPLL is not an essential DPLL for the functionality of a
bootloader and is usually not configured (e.g. older u-boots configure
it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer
than 2014.01 do not even have an option), and this results in incorrect
operating frequencies when trying to use a DSP or IVAHD, whose root
clocks are derived from this DPLL. Use the DT standard properties
"assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock
rate and the rates for its derivative clocks at boot time to properly
initialize/lock this DPLL. The DPLL will automatically transition
into a low-power stop mode when the associated output clocks are
not utilized or gated automatically.
The reset values of the dividers M4 & M5 (functional clocks for DSP and
IVAHD respectively) are identical to each other, but are different at
each OPP. The reset values also do not match a specific OPP. So, the
derived output clocks from the IVA DPLL have to be initialized as well
to avoid initializing these divider outputs to incorrect frequencies.
The clock rates are chosen based on the OPP100 values as defined in the
OMAP4430 ES2.x Public TRM vAP, section "3.6.3.8.7 DPLL_IVA Preferred
Settings". The DPLL locked frequency is 1862.4 MHz (value for
DPLL_IVA_X2_CLK), so the dpll_iva_ck clock rate used is half of
this value.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The bogus 'device_type = "pci"' confuses dtc, causing lots of totally
unrelated warnings. After fixing that, real warnings like
arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,1 PCI unit address format error, expected "1,0"
are left. Correct the unit-addresses and reg properties of the subnodes
to fix these.
Signed-off-by: Rob Herring <robh@kernel.org>
[geert: Improve description]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for iWave RainboW-G20D-Qseven board based on RZ/G1M.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for iWave RZG1M Qseven System On Module.
http://www.iwavesystems.com/rz-g1m-qseven-module.html
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add device tree source for Renesas GR-Peach board.
GR-Peach is an RZ/A1H based board with 10MB of on-chip SRAM and 8MB
QSPI flash storage.
Add support for the board, and create a 2MB partition to use as rootfs.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The merging of a number of clocksource drivers into fttmr010 means we
require clock-names to be specified in the Aspeed timer node, else the
clocksource fails to probe and boot hangs.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Motorola Droid 4 uses a WL1285C, so use proper compatible value.
To avoid regressions while support for the new compatible value
is added to the Linux kernel, the old compatible value is preserved
as fallback.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Droid 4 has a isl29030 to measure ambient light (e.g. for
automatically adapting display brightness) and proximity.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Orange Pi Plus 2E, unlike the Orange Pi PC and PC Plus which its
schematics are based on, uses an external Realtek RTL8211E PHY in
RGMII mode, with a GPIO enabling the regulator for I/O signalling
power supplies. The PHY's main power supply is enabled by the main
5V power supply.
Add the regulator and PHY nodes, and override the PHY phandle under
the EMAC node, so that the EMAC works properly on this board.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This removes the dummy clk81 gate and replaces it with the actual clock
controller's CLKID_CLK81. This will also allow us to pass the real clock
IDs to all devices where the clock is controlled by clkc in the future.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Been sitting on these for a couple of weeks waiting on some larger batches
to come in but it's been pretty quiet.
Just your garden variety fixes here:
- A few maintainers updates (ep93xx, Exynos, TI, Marvell)
- Some PM fixes for Atmel/at91 and Marvell
- A few DT fixes for Marvell, Versatile, TI Keystone, bcm283x
- A reset driver patch to set module license for symbol access
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZN343AAoJEIwa5zzehBx3xJ0QAJSexz+rYI7V3aqvjtNmdEaE
2l7Rl4dNQ13u7RBx+67/m1vAgxTgefXahckuv6x4Jr5S5sQO++OkTm0XBO1+3trY
pwQVJYatOwDt5X7+HOKmTvCgFh48KyrNegXy1lvr/p77CyA+B61zQ2w9wqO0VXua
MQ05HzOt2JroKytPz70MywxtQpULWC8FGZTFbzZqUfdS30HxM4ZXp6gKxMDvRAqh
LpP2hfjCnM0H3QoeNXYsfSydI0T0J0PcavouUzGQk2XSA6k5g+MXpL1IUB+iN9EH
UdmEiVhDcNB3upWQ0lPFi84sexDXSqcu6M9VIozdC/LYDD1lGnHBEZuagoq72/xA
CEU3H81inCQ6cpYRgan7uzlA4+dqKf4HD3H1fkwrowblMQppWPeDe9e/5XAq73Xl
4+5GxXtDhK1KvPaH3USkTnFOjEQ2QELmDxdLqmiTXP8GnXdn5wJTobUj7z6HttXY
Q4jA7F/A8ObHbEbnZI9e8pmrnQeMd/cK47NCZTBkJgN2eIzPw/TJk/bQcIXAq/km
HcVn5R8GbrN9DwJMpMQN9fpH3sXCmcUxujbfldTYGdsBo8rvXChs8DHxJF94FXOV
rMO6Bb25bd7kN8oCvY3r7VeGavpSkO8WVWi3YnNW4KGF9/oGE24LGHdbChjoLyJH
rvv3uVsXtx2A9O9uGYl1
=WlSc
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Been sitting on these for a couple of weeks waiting on some larger
batches to come in but it's been pretty quiet.
Just your garden variety fixes here:
- A few maintainers updates (ep93xx, Exynos, TI, Marvell)
- Some PM fixes for Atmel/at91 and Marvell
- A few DT fixes for Marvell, Versatile, TI Keystone, bcm283x
- A reset driver patch to set module license for symbol access"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
MAINTAINERS: EP93XX: Update maintainership
MAINTAINERS: remove kernel@stlinux.com obsolete mailing list
ARM: dts: versatile: use #include "..." to include local DT
MAINTAINERS: add device-tree files to TI DaVinci entry
ARM: at91: select CONFIG_ARM_CPU_SUSPEND
ARM: dts: keystone-k2l: fix broken Ethernet due to disabled OSR
arm64: defconfig: enable some core options for 64bit Rockchip socs
arm64: marvell: dts: fix interrupts in 7k/8k crypto nodes
reset: hi6220: Set module license so that it can be loaded
MAINTAINERS: add irqchip related drivers to Marvell EBU maintainers
MAINTAINERS: sort F entries for Marvell EBU maintainers
ARM: davinci: PM: Do not free useful resources in normal path in 'davinci_pm_init'
ARM: davinci: PM: Free resources in error handling path in 'davinci_pm_init'
ARM: dts: bcm283x: Reserve first page for firmware
memory: atmel-ebi: mark PM ops as __maybe_unused
MAINTAINERS: Remove Javier Martinez Canillas as reviewer for Exynos
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add basic support for stm32h743i-discovery board
This board offers :
_ 2MBytes Flash
_ 1 x micro USB OTG port
_ 1 x STLink connector (micro USB)
_ 1 x micro SD card slot
_ 1 x RJ45 connector
_ 1 x RCA connector
_ 2 x Audio jack connectors (in and out)
_ 2 x speaker connectors (left and right)
_ 1 x joystick
_ 1 x DCMI connector (Digital camera interface)
_ 1 x 4 inch DSI LCD (Display Serial Interface)
_ Arduino Uno Connectors
_ 2 x PIO connectors (PMOD and PMOD+)
_ 1 x wakeup button
_ 1 x reset button
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This usart is used for console output on stm32h743i-disco board
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Add usart2 pins definition in order to add usart2 support
dedicated for console output on stm32h743i-disco board.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
The A83T has 1 pingroup with 13 pins belonging to the R_PIO
or special pin controller.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The size field of the memory node is wrong. Rely on the default value in
sama5d2.dtsi that happens to be correct for the SAMA5D2 Xplained board.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Configuration of the lcd0 pinmux group and GPIO hog for the external
GPIO mux are done using a single device node, causing the "output-high"
property to be applied to both. This will fail for the pinmux group,
but doesn't cause any harm, as the failure is ignored silently.
However, after "pinctrl: sh-pfc: propagate errors on group config", the
failure will become fatal, leading to a broken display:
sh-pfc e6050000.pin-controller: pin_config_group_set op failed for group 102
sh-pfc e6050000.pin-controller: Error applying setting, reverse things back
sh-pfc e6050000.pin-controller: failed to select default state
Move the GPIO hog to its own node to fix this.
Fixes: ffd2f9a5af ("ARM: shmobile: armadillo800eva dts: Add pinctrl and gpio-hog for lcdc0")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace hard-coded values of type of GIC interrupt and its flags with
respective macros from header to increase code readability.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Replace hard-coded values of interrupt flags with respective macros from
header to increase code readability.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Enable OV2640 camera support of STM32F429-EVAL board.
Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch set each gpio controller as a interrupt controller. User who
wants to use gpio as interrupt will have choice to use either "gpiolib"
interface or "common" interrupt interface.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.
Add device nodes for this display pipeline.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add SoC specific compatibles for all sunXi crypto nodes, in addition to
the one already used (allwinner,sun4i-a10-crypto).
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a node for the cryptographic engine that can be found on sun5i SoCs.
This cryptographic engine is compatible with the Allwinner cryptographic
accelerator driver.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The imx6 PCI driver ignores the GPIO polarity from 'reset-gpio' and
considers that the PCI reset is active low, unless the
property 'reset-gpio-active-high' is present.
Fix the device tree description by explicitly passing the
'GPIO_ACTIVE_LOW' flag to the 'reset-gpio' property.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pull networking fixes from David Miller:
1) Made TCP congestion control documentation match current reality,
from Anmol Sarma.
2) Various build warning and failure fixes from Arnd Bergmann.
3) Fix SKB list leak in ipv6_gso_segment().
4) Use after free in ravb driver, from Eugeniu Rosca.
5) Don't use udp_poll() in ping protocol driver, from Eric Dumazet.
6) Don't crash in PCI error recovery of cxgb4 driver, from Guilherme
Piccoli.
7) _SRC_NAT_DONE_BIT needs to be cleared using atomics, from Liping
Zhang.
8) Use after free in vxlan deletion, from Mark Bloch.
9) Fix ordering of NAPI poll enabled in ethoc driver, from Max
Filippov.
10) Fix stmmac hangs with TSO, from Niklas Cassel.
11) Fix crash in CALIPSO ipv6, from Richard Haines.
12) Clear nh_flags properly on mpls link up. From Roopa Prabhu.
13) Fix regression in sk_err socket error queue handling, noticed by
ping applications. From Soheil Hassas Yeganeh.
14) Update mlx4/mlx5 MAINTAINERS information.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (78 commits)
net: stmmac: fix a broken u32 less than zero check
net: stmmac: fix completely hung TX when using TSO
net: ethoc: enable NAPI before poll may be scheduled
net: bridge: fix a null pointer dereference in br_afspec
ravb: Fix use-after-free on `ifconfig eth0 down`
net/ipv6: Fix CALIPSO causing GPF with datagram support
net: stmmac: ensure jumbo_frm error return is correctly checked for -ve value
Revert "sit: reload iphdr in ipip6_rcv"
i40e/i40evf: proper update of the page_offset field
i40e: Fix state flags for bit set and clean operations of PF
iwlwifi: fix host command memory leaks
iwlwifi: fix min API version for 7265D, 3168, 8000 and 8265
iwlwifi: mvm: clear new beacon command template struct
iwlwifi: mvm: don't fail when removing a key from an inexisting sta
iwlwifi: pcie: only use d0i3 in suspend/resume if system_pm is set to d0i3
iwlwifi: mvm: fix firmware debug restart recording
iwlwifi: tt: move ucode_loaded check under mutex
iwlwifi: mvm: support ibss in dqa mode
iwlwifi: mvm: Fix command queue number on d0i3 flow
iwlwifi: mvm: rs: start using LQ command color
...
The dwmac-sun8i hardware is present on the Orange PI Zero.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The dwmac-sun8i hardware is present on the Banana Pi M2+
It uses an external PHY rtl8211e via RGMII.
This patch create the needed regulator, emac and phy nodes.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The dwmac-sun8i hardware is present on the Orange PI plus.
It uses an external PHY rtl8211e via RGMII.
This patch create the needed regulator, emac and phy nodes.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The dwmac-sun8i hardware is present on the NanoPi Neo.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet
port were changed from active low to active high.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The dwmac-sun8i hardware is present on the Orange PI 2.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The dwmac-sun8i hardware is present on the Orange PI One.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The dwmac-sun8i hardware is present on the Orange PI PC.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000
speed.
This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree.
SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch add the dt node for the syscon register present on the
Allwinner H3/H5
Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock..
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that the R_CCU device tree binding headers have been merged, we
can convert the raw number references in the device trees to use the
defined macros.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order GPIOS from this controller to be used with the "gpio-hogs"
property, the tca6416 node has to properly labeled as a gpio-controller,
and use #gpio-cells.
With that, the SEL_A, SEL_B, SEL_C lines that are used to select VPIF
input can be configured using GPIO hogs.
As an example, example, the configuration below selects the analog video
input on the da850-evm UI board:
&tca6416 {
status = "okay";
sel_a {
gpio-hog;
gpios = <7 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "ADC_ENn";
};
sel_b {
gpio-hog;
gpios = <6 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "CAMERA_ENn";
};
sel_c {
gpio-hog;
gpios = <5 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "VIDEO_IN_ENn";
};
};
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Interrupt-parent property is defined in the root node as
"interrupt-parent = <&intc>". This interrupt-parent value becomes
the default for the system, so removed redundant "interrupt-parent"
property from mmc, mac, lcdc and tscadc nodes.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds the serial slave device for the WL1835 Bluetooth interface.
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Ricardo Salveti <ricardo.salveti@linaro.org>
CC: Tony Lindgren <tony@atomide.com>
CC: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dcdc3 supplies to DDR on AM43x series. When we set both
min and max values to the same value. The regulator framework
sets that particular voltage. This is bad as we are changing
the ddr voltage when executing from ddr. Hence remove the min and
max values. The ddr supply voltage shall be set from bootloader
when not executing from ddr and not while executing from kernel.
The previous discussion can be found here:
http://www.spinics.net/lists/devicetree/msg56399.html
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BeagleBone Blue is robotics-oriented version of the BeagleBone Black (BBB).
This board can be indentified by the BLAx value after A335BNLT (BBB)
in the at24 eeprom:
BLAx [aa 55 33 ee 41 33 33 35 42 4e 4c 54 42 4c 41 30 |.U3.A335BNLTBLA2|]
http://beagleboard.org/bluehttps://github.com/beagleboard/beaglebone-blue
firmware: https://github.com/beagleboard/beaglebone-black-wireless/tree/master/firmware
wl18xx mac address: /proc/device-tree/ocp/ethernet@4a100000/slave@4a100200/mac-address
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Drew Fustini <drew@beagleboard.org>
Acked-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The twl4030_charger driver expects an iio channel to detect the
presence of an AC charger by looking at VAC (madc channel 11).
This definition is missing in the device tree.
Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This defines the memory location and interrupt used by the GSBI8
I2C adapter on the MSM8660 SoCs. We add it as "disabled" by
default so that boards using this I2C can enable it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the Capella CM3605 ambient light and proximity sensor
to the APQ8060 DragonBoard device tree. Notice that we also set
up pin config for the AOUT line and GPIO lines, and that we set
the default trigger on the infrared LED to associate with the
"cm3605" trigger so the IR LED is controlled by this the CM3605
driver.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the PM8058 XOADC node to the PM8058 PMIC node,
defines the 16 channels and further also define an IIO HWMON
node for the channels that are used for housekeeping of
voltages and die temperature for the PMIC chip die.
Tested on the APQ8060 DragonBoard:
cd /sys/class/hwmon/hwmon0
cat in2_input
4773 (DC mains ~5V)
cat in4_input
625 (0.625V reference voltage)
cat in5_input
1250 (1.25V reference voltage)
cat temp1_input
35852 (die temperature)
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch fixes two typos in the i2c_0 node for the ipq4019.
The reg property length is just 0x600. The core clock is
GCC_BLSP1_QUP1_I2C_APPS_CLK. GCC_BLSP1_QUP2_I2C_APPS_CLK is
used by the second i2c.
Fixes: e76b4284b5 ("qcom: ipq4019: add i2c node to ipq4019 SoC and DK01 device tree")
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The gsbi_serial7 under gsbi7 is used by the IPQ8068 based board EWS870AP as
main serial console.
Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Follow the recent trend for the license description, and fix the wrongly
stated X11 to MIT.
The X11 license text [1] is explicitly for the X Consortium and has a
couple of extra clauses. The MIT license text [2] is actually what the
current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Compiling the DT file with W=1, DTC warns like follows:
Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property
Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.
Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Pull ARM fixes from Russell King:
"Three fixes this time around:
- Two fixes for noMMU, fixing the decompressor header layout, and
preventing a build error with some configurations.
- Fixing the hyp-stub updates that went in during the merge window
for platforms that use MCPM"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8677/1: boot/compressed: fix decompressor header layout for v7-M
ARM: 8676/1: NOMMU: provide pgprot_device() macro
ARM: 8675/1: MCPM: ensure not to enter __hyp_soft_restart from loopback and cpu_power_down
imx7d-sdb has a BCM4339 BT chip connected to UART6.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx7d-sdb has a BCM4339 Wifi chip connected to USDHC2.
Add support for it.
While at it, move the WL_REG_ON pin to the correct pinctrl node.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is not recommended to place the regulator nodes inside 'simple-bus',
so adjust them accordingly.
The motivation for rearranging this is to make it easier to add new
regulator nodes in the future.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The FEC driver ignores the GPIO polarity from 'phy-reset-gpios' and
considers that the Ethernet PHY is active low, unless the
property 'phy-reset-active-high' is present.
Fix the device tree description by explicitly passing the
'GPIO_ACTIVE_LOW' flag to the 'phy-reset-gpios' property.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As reported by Patrice, the header layout of the decompressor is
incorrect when building for v7-M. In this case, the __nop macro
resolves to 'mov r0, r0', which is emitted as a narrow encoding,
resulting in the header data fields to end up at lower offsets than
required.
Given the variety of targets we need to support with the same code,
the startup sequence is a bit of a jumble, and uses instructions
and macros whose encoding widths cannot be specified (badr), or only
exist in a narrow encoding (bx)
So force the use of a wide encoding in __nop, and replace the start
sequence with a simple jump to the label marking the start of code,
preceded by a Thumb2 mode switch if required (using explicit wide
encodings where appropriate). The label itself can be moved to the
start of code [where it belongs] due to the larger range of branch
instructions as compared to adr instructions.
Reported-by: Patrice CHOTARD <patrice.chotard@st.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.
This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A83T's PRCM has the same set of clocks and resets as the A64.
However, a few dividers are different. And due to the lack of a low
speed 32.768 kHz oscillator, a few of the clock parents are different.
The PRCM also has controls for various power domains. These are not
supported yet, neither in software nor in the device tree binding.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Exynos5250 and Exynos542x SoCs have the same CEC hardware module as
Exynos4 SoC series, so enable support for it using the same compatible
string.
Tested on Odroid XU3 (Exynos5422) and Google Snow (Exynos5250) boards.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Rockchip's rk3229 evaluation board has one usb otg controller
and three usb host controllers. Each usb controller connect
with one usb2 phy port through UTMI+ interface. And the three
usb host interfaces use the same GPIO VBUS drive. Let's enable
them to support usb on rk3229 evb board.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds usb otg/host controllers and phys nodes on rk322x.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This augments the Moxa Art and Aspeed device trees to:
- Explicitly name the clock "PCLK" as the Faraday FTTMR010
names it.
- List the Moxa timer as compatible with the Faradat FTTMR010
vanilla version.
- Add a comment that the Aspeed driver is a Faraday
FTTMR010 derivative.
- Pass all IRQs to the timer from Aspeed: they are all there
so they should be in the device tree, we only use the
first one anyways.
Tested-by: Joel Stanley <joel@jms.id.au>
Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the reset and clock lines to the Gemini core DTS SoC.
These bindings have been ACKed by the DT maintainer Rob.
The reset driver is going to be merged by the reset maintainer.
The clock driver is going to be merged by the clock maintainers.
Each of these have their macro defines coming with them, split
off as separate patches.
A post-rc1 patch will be sumbitted for switching the numerical
values to the defined macros in line with the ARM SoC DT header
merge strategy.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZJUpbAAoJEEEQszewGV1zXSEQAIGcFltGHqLrbaM1Zc1I2XG3
H1j0W09hQ5Zbnee09x1WBXRt6ickyCjlUb+Is969kF3BANvBGv1kl5UEoHhi86Yp
JmvjxWkXcdqZrkQYobQd3Zi1Okd9W6sTBupVApbErieEYQIhqV7h5yTVdx3UIoEE
dlLesk4l1aDuxAH0xM2o1fIXYH73ZWgRuEcGZlVDw/CgMWFjvmG1twQ1TtTWMDWS
p29we0TjF18aP9fGlf1bBtbKgrrt23NIniuPvriwmUhpWPA/C2fKcw51G39m3Eqv
2ep8azFotJB4EZ4lCv+24GojEkF5I+BmFaeMY/yV3jb2+Gufni7aSpc7c0yM8Zb8
hLrlzbyCBU0Xc/xCuD7Hu0HoTIriJB7YM4W5O9pB3IJvrEjK6kc/tGSZa0YvmurC
qlftNzFDwnUELUOtbOvA2g0BOMHxvbmUDHkFtFH6tWWgLGHsf7axLJSprQZgrmAJ
Pq17XWWiLz3/bSkSOkGncIejp3Ed+5fo7kk06Dn4THCss7pD/KioFd6Wwi+Y2AEX
TF7qP0t6KK9rN5Y1N6H1PRMFjKXARw/Qt3NhbG6RX2PCUPoD/upx6gzsO1Zu+7na
kaZ2qUu2bjB1IQl0f2VGFfzExSBAyEZScFRGAvbY0EKwfI+tipupfsJgu0ocRfk2
DxfT+fD+K35OSvMZ7V41
=SNKP
-----END PGP SIGNATURE-----
Merge tag 'gemini-v4.13-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
This is a first set of Gemini DTS patches for the v4.13 cycle.
This adds the reset and clock lines to the Gemini core DTS SoC.
These bindings have been ACKed by the DT maintainer Rob.
The reset driver is going to be merged by the reset maintainer.
The clock driver is going to be merged by the clock maintainers.
Each of these have their macro defines coming with them, split
off as separate patches.
A post-rc1 patch will be sumbitted for switching the numerical
values to the defined macros in line with the ARM SoC DT header
merge strategy.
* tag 'gemini-v4.13-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Add clocks to the Gemini SoC
ARM: dts: Add the Gemini reset controller
dt-bindings: Augment Gemini for clocks, resets
Signed-off-by: Olof Johansson <olof@lixom.net>
* Switch to panel-lvds bindings for Mitsubishi panels
* Clean up PFC node names
* Enable UHS-I SDR-50 and SDR-104 on r8a7793/Gose
* Add GyroADC clock and device for r8a7791 SoC
* Add USB clocks to device tree for r7s72100 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZItYWAAoJENfPZGlqN0++DkkP/2fCU8IqA1/K9byBcUcbbtN9
trICq5YQhOJ7e0+4lt6J0Fi0Goyem63iQte80PVkbsMV8EPlxrIsd85sIZFf0fMJ
gxs6LiHwHgU4fEzGAxbaFwekIqeHoaL19FmwBq0RtM8ABsWOwrJ/1uA0RFJ272RJ
Tj2RyS+Z+wowXG42TFE/t/42/eYK8rFCODaMlFiKTRb+Z20vy4Hz92rebAhFwg8U
c3xJzr0qn8HTPl+X4Q9+PHOabWM3xlqv+jtKvxEix65e1w1Qls+/KOTIQXiUGqDH
16lUrN5//AtkGKb5ZiH+nroDqmSbsRSPrlc6IA74jsz/gJeRrtEp3cn5z7EyiCSv
+AwGgNIFCgBVMMJBWnSzl5r0zDPJAMZgPiJEP5krZT9vRC8Jkr7yAXMEyU72N45g
ctXYkVG6U91q/ehtoI19fQ5AJdiYOhLENash1bxiKo4nJvfCMPZDY9qAepXTKP3R
7B7Jrkb3Erpwrr+WvUdB+RJIJYH2309kr9KtaSE65+JkZ/Dh4WDLrdcuUEuJhxcw
Gk9p+qKG4YJ0Q8kpBt0R1gRetZBamIC6mzHAlEQHqIwwMrs702xZHJd16skgb7bE
DcC1ijuhFVMvoLG4aO4zqbxt8CfuzJleve8hx0fo8jABBatDvgMwPuSLpTHfT9e+
4x+q4V2hjW7UlViroiY7
=3Bjz
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Updates for v4.13
* Switch to panel-lvds bindings for Mitsubishi panels
* Clean up PFC node names
* Enable UHS-I SDR-50 and SDR-104 on r8a7793/Gose
* Add GyroADC clock and device for r8a7791 SoC
* Add USB clocks to device tree for r7s72100 SoC
* tag 'renesas-dt-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: renesas: Switch to panel-lvds bindings for Mitsubishi panels
ARM: dts: gose: Enable UHS-I SDR-50 and SDR-104
ARM: dts: r8a7793: set maximum frequency for SDHI clocks
ARM: dts: r8a7791: Add GyroADC clock and device node
ARM: dts: r7s72100: add usb clocks to device tree
ARM: dts: sh73a0: update PFC node name to pin-controller
ARM: dts: r8a7793: update PFC node name to pin-controller
ARM: dts: r8a7791: update PFC node name to pin-controller
ARM: dts: r8a7790: update PFC node name to pin-controller
ARM: dts: r8a7779: update PFC node name to pin-controller
ARM: dts: r8a7778: update PFC node name to pin-controller
ARM: dts: r8a7740: update PFC node name to pin-controller
ARM: dts: r8a73a4: update PFC node name to pin-controller
ARM: dts: emev2: update PFC node name to pin-controller
ARM: dts: r7s72100: add USB bit definitions
ARM: dts: r7s72100: add Renesas RZ/A1 pinctrl header
ARM: dts: r8a7791: add GyroADC clock
Signed-off-by: Olof Johansson <olof@lixom.net>
Most of DT files in ARM use #include "..." to make pre-processor
include DT in the same directory, but this is one of the exceptional
files that use #include <...> for that.
Fix it to remove -I$(srctree)/arch/$(SRCARCH)/boot/dts path from
dtc_cpp_flags.
ARM: dts: versatile: use #include "..." to include DT in the same directory
Most of DT files in ARM use #include "..." to make pre-processor
include DT in the same directory, but we have 3 exceptional files
that use #include <...> for that.
They must be fixed to remove -I$(srctree)/arch/$(SRCARCH)/boot/dts
path from dtc_cpp_flags.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The only adc button connected to adc input is recovery button.
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Right now mach-imx6ul registers a fixup for the ksz8081 phy. The same
register values can be set through the micrel phy driver by using dts
properties.
This seems preferable and allows cleanly fixing suspend/resume.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
NanoPi M1 Plus is designed and developed by FriendlyElec
for professionals, enterprise users, makers and hobbyists
using the Allwinner H3 SOC.
NanoPi M1 Plus key features
- Allwinner H3, Quad-core Cortex-A7@1.2GHz
- 1GB DDR3 RAM
- 8GB eMMC
- microSD slot
- 10/100/1000M Ethernet
- Serial Debug Port
- 5V 2A DC power-supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the needed clock nodes for the CLKOUT2 to be usable by boards.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
sama5d3 CPU modules embed a parallel NOR flash connected to the EBI bus.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Use the new EBI/NAND bindings to declare NAND chips and remove old NAND
nodes along the way.
Note that we keep using old bindings in at91rm9200.dtsi because this
SoC is not supported by the EBI driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Declare new nodes for the EBI and NAND controllers embedded in various
at91/sama5 SoCs.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
According to the binding documentation and the source code the atmel-gpio
controller takes IRQ_TYPE_* as its flags values, not GPIO_ACTIVE_*.
This patch uses the right variable type which yields the same result
when compiled. Note that this might be wrong and actually
IRQ_TYPE_LEVEL_LOW is intended by the dt author.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The gpio node has 144 gpios. Each gpio is capable of generating
an interrupt. Hence add interrupt-controller property to the gpio
node. With this in place one can use interrupts property in device
tree to request for the gpio interrupts.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This adds CPPI 4.1 DMA controller to USB OTG controller.
Changes since v2:
- Fixed the the property reg-names (had glue register defined)
- Removed few useless property
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add node for SPI NOR flash on orange-pi-zero board. Disable this node
by default and leave it to users to enable it if their board has
SPI NOR flash chip populated.
SPI NOR flash was optional in the first production batch in Dec 2016.
In later batches flash chip was pre-populated. However there should
be quite a few boards around which do not have flash chip.
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The USB PHY can use either a GPIO pin or the PMIC's USB power supply
to sense VBUS. Since both options are available on the Cubietruck,
add the missing property for the USB power supply to the USB PHY node.
The device tree provides all usable options. Ultimately, which method
is used is up to the driver implementation.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ACIN pins of the AXP221 PMIC on the A31 Hummingbird are tied to the
DC jack on the board through a 12V to 5V buck converter.
Enable the ACIN power supply.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ACIN pins of the AXP209 PMIC on the Cubieboard are tied to the
DC jack on the board.
Enable the ACIN power supply.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ACIN pins of the AXP209 PMIC on the Bananapi M1 Plus are tied to the
"power input" micro USB connector next to the SATA connector on the board.
Enable the ACIN power supply.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ACIN pins of the AXP209 PMIC on the Cubieboard 2 are tied to the
DC jack on the board.
Enable the ACIN power supply.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
We want to keep node references in alphabetical order, except for
instances where node must be #included first.
Move the usb_otg node reference so that all references to non-AXP209
device nodes are in alphabetical order.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Two of the Ethernet switches on this board have EEPROMs connected.
Add the eeprom-length property to the device tree, making it possible
to access the EEPROM using ethtool -e.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch extends the L2 cache controller node for the Amlogic Meson8
and Meson8b SoCs with some missing parameters. These are taken from the
Amlogic GPL kernel source.
Signed-off-by: Carlo Caione <carlo@endlessm.com>
[apply the change to Meson8 and Meson8b and updated description]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Currently only meson6.dtsi and meson8.dtsi inherit the generic
meson.dtsi. However, since the Meson8b platform is basically a slightly
updated version of Meson8 we can safely inherit meson.dtsi. An indicator
for this are the nodes which are identical in meson.dtsi and
meson8b.dtsi (L2, gic, timer, uart_AO, uart_A, uart_B, uart_C).
Additionally this makes the following devices available on Meson8b which
were not avaialble before (however, since all affected drivers support
Meson6, Meson8 and the whole GX series there's no reason to assume that
they are not working):
- i2c_a and i2c_B
- the IR receiver
- SPFIC (SPI flash controller)
- the dwmac ethernet controller
Differences between Meson8 and Meson8b seem to be:
- ARM Cortex-A5 core instead of Cortex-A9 on Meson8
- dwmac on Meson8b supports RGMII
- small pinctrl updates
Inheriting meson.dtsi makes it easier to maintain by removing duplicate
definitions.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic Meson SoCs have most of the internal peripherals organized
in busses. Use them to make the dts easier to read and to avoid
duplicated register (bus) offset definitions.
The bus information is taken from the vendor kernel:
#define IO_CBUS_PHY_BASE 0xc1100000 ///2M
#define IO_AOBUS_PHY_BASE 0xc8100000 ///1M
There are more internal busses (such as the abp bus which seems to
contain audio, HDMI and Mali registers), but since we don't have
drivers for them yet these are not added (yet).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[khilman: minor whitespace fix]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Looks like nobody bothered to configure USB host for 37xx-evm
when we converted things to device tree, so let's add it. This
is similar to beagleboard configuration with few extra quirks
to configure the port. And as with beagleboard, OHCI won't work
because there is no USB LS/FS PHY. A HS USB hub is needed to use
devices like keyboard and mice.
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As long as the kernel cmdline has "earlycon" in it, this allows
seeing debug messages earlier and does not require DEBUG_LL to
be enabled.
Acked-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As long as the kernel cmdline has "earlycon" in it, this allows
seeing debug messages earlier and does not require DEBUG_LL to
be enabled.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds the serial slave device for the WL1835 Bluetooth interface.
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding
child sub-mailbox (IPC 3.x) nodes for the AM571x IDK board.
This is needed to enable communication with the respective
remote processors IPU1, IPU2, and DSP1 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding
child sub-mailbox (IPC 3.x) nodes for the AM572x IDK board.
This is needed to enable communication with the respective
remote processors IPU1, IPU2, DSP1 and DSP2 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With two separate &gpmc nodes the second ranges property overwrites the
first. So put nand and ethernet in a single node and merge the ranges.
While at it also fix the ethernet suffix.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We don't need to bitbang these pins anymore, instead we muxed these
pins as SPI, after this change, done in commit 6c69f726, we introduced
the following error:
pinctrl-single 44e10800.pinmux: pin PIN85 already requested \
by 44e10800.pinmux; cannot claim for 48030000.spi
pinctrl-single 44e10800.pinmux: pin-85 (48030000.spi) status -22
Fixes: 6c69f726 ("ARM: dts: am335x-sl50: Enable SPI0 interface and Flash Memory")
Cc: <stable@vger.kernel.org> # 4.11
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The second version of the hardware moved the card detect pin from gpio0_6
to gpio1_9, as we won't support the first hardware version fix the pinmux
configuration of this pin.
Fixes: 8584d4fc ("ARM: dts: am335x-sl50: Add Toby-Churchill SL50 board support.")
Cc: <stable@vger.kernel.org> # 4.11
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Ethernet networking on K2L has been broken since v4.11-rc1. This was
caused by commit 32a34441a9 ("ARM: keystone: dts: fix netcp clocks
and add names"). This commit inadvertently moves on-chip static RAM
clock to the end of list of clocks provided for netcp. Since keystone
PM domain support does not have a list of recognized con_ids, only the
first clock in the list comes under runtime PM management. This means
the OSR (On-chip Static RAM) clock remains disabled and that broke
networking on K2L.
The OSR is used by QMSS on K2L as an external linking RAM. However this
is a standalone RAM that can be used for non-QMSS usage (as well as from
DSP side). So add a SRAM device node for the same and add the OSR clock
to the node.
Remove the now redundant OSR clock node from netcp.
To manage all clocks defined for netCP's use by runtime PM needs keystone
generic power domain (genpd) driver support which is under works.
Meanwhile, this patch restores K2L networking and is correct irrespective
of any future genpd work since OSR is an independent module and not part
of NetCP anyway.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
[nsekhar@ti.com: commit message updates, port to latest mainline]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Cc: stable@vger.kernel.org # for 4.11
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Identical to the setup on Koelsch.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
We currently have three device nodes for the same USB hardware
block, as evident by the reuse of the same reg address multiple
times. Now that the chipidea driver fully supports OTG with the
MSM wrapper we can collapse the three nodes into one USB device
node, reflecting the true nature of the hardware.
Since we're here, we also mark the irq trigger flags correctly,
as IRQ_TYPE_LEVEL_HIGH instead of IRQ_TYPE_NONE.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This USB controller has two phys, so add them both underneath the
ULPI bus, but only enable one of them based on the board
configuration. To get OTG to work, we need to add the id and vbus
detection info and also populate the regulators for the vbus
supply.
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
These regulators are controlled by the SPMI regulator driver
instead of the RPM regulator driver in the downstream android
kernel sources. Let's remove them from the DTS here because
they'll never be used by the RPM regulator driver.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
please pull the following:
- Phil provides a fix for the BCM283x (Raspberry Pi) by flagging the first
4KiB of physical memory as a reserved region in order to let the secondary
cores successfully spin until they are brought online
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZJ03UAAoJEIfQlpxEBwcEnOwP/02l54jeRuwFFqn8yM89S0rE
ZXgx+DuIlcWGtFbVjzKtqcpV+9Gjdh9eOQaS9SN7p9C/UFVM4m+UUpVojs+yq538
Z6p8soGTlMhQb6zAuajaiOMp7AlARH674kU3cnRi28Iwt81FiVLrAkMf9lRLkTCx
4iyha1vXVQOwY4BxSw91I3gK8vDlDBKLRBmpiPPQ9ZUFNWXsVzbFCrirxUwd5J/h
8TqsSsfsOexqQCHLgixdpu5s5jGWZVMoP+a3xbsF066vv9K0BHZeBrzuQfb5iRdl
O92JlsVzs8gW3C1/0saGRefLwc5kRytWSNpU0RZe/AjkNHL7IR6LgIU0UNaQhwug
N4IUryKLtbJMBuLHYpwliZKmHO9TlDmOC1wdkOnnjYoS9fDEOuMo+UH2aRmFAxcz
gJgrDFb6ajQchM7dPswGrAq+09mcqkkorIvqbPRvB+qlBJoS1UZDjNPQNWvGc+Lk
3l8m71+9ABUmPl3eS4Pfbk3aVQZfsXQerQZwK9EZXyoInhvYrixWf6D5u9sXwqB/
kux4RCSbViwZe3pbOy2eguEkO84xa+nfHQTwjj3/FwsUOEu0IhFmZUyGmQTot/lH
vZqGo1BZPSWoAdd1Lg+HM5UyWn8y5SbyZRCKvz7qqyc91ROyksCaHr0gVTWA/iNS
+W3H2s+FB62Q9fmIU4sv
=x322
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.12/devicetree-fixes-2' of http://github.com/Broadcom/stblinux into fixes
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for 4.12,
please pull the following:
- Phil provides a fix for the BCM283x (Raspberry Pi) by flagging the first
4KiB of physical memory as a reserved region in order to let the secondary
cores successfully spin until they are brought online
* tag 'arm-soc/for-4.12/devicetree-fixes-2' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm283x: Reserve first page for firmware
Signed-off-by: Olof Johansson <olof@lixom.net>
Property 'enable-active-low' does not exist. Only 'enable-active-high' is
valid, and when this property is absent the gpio regulator will act as
active low by default.
So remove the unexisting 'enable-active-low' property.
Currently the GPIO flag is GPIO_ACTIVE_HIGH. In order to make
the dts description accurate, pass the GPIO_ACTIVE_LOW flag instead.
This change is safe because the gpio regulator driver does not take the
GPIO flag polarity into account.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Property 'enable-active-low' does not exist. Only 'enable-active-high' is
valid, and when this property is absent the gpio regulator will act as
active low by default.
So remove the unexisting 'enable-active-low' property.
Currently the GPIO flag is 0, which means active-high. In order to make
the dts description accurate, pass the GPIO_ACTIVE_LOW flag instead.
This change is safe because the gpio regulator driver does not take the
GPIO flag polarity into account.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently the following eMMC error is seen:
mmc1: mmc_select_hs200 failed, error -74
On imx7d-pico the eMMC VCCQ is fixed at 3.15V, so pass the 'no-1-8-v'
property to properly describe that 1.8V operation is not possible.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx7d-pico has the WDOG1_B pin connected to the PMIC, so add the
wdog1 node and use the 'fsl,ext-reset-output' property to
properly describe it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Most of DT files in ARM use #include "..." to make pre-processor
include DT in the same directory, but we have some exceptional files
that use #include <...> for that.
Fix them to remove -I$(srctree)/arch/$(SRCARCH)/boot/dts path from
dtc_cpp_flags.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We have a clock controller for the Gemini SoC, so make use of the
driver and add clocks to the peripherals. Remove the hard-coded
frequency from the UART and add switch the timer compatible to the
generic that uses the clock framework for clock speed look-up.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the Gemini reset controller to the Gemini SoC
DTSI file and also adds the reset references to all existing
blocks already in the device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Cubietruck Plus has an optical SPDIF out connector.
Enable SPDIF audio output for this board.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Cubietruck Plus has 4 LEDs in different colors.
Add device nodes for them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A83T SoC has an SPDIF transmitter block. According to the vendor
BSP kernel, it is compatible with the one found on the H3 SoC.
Add a device node and pinmux setting for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A83T SoC has a DMA controller that supports 8 DMA channels
to and from various peripherals.
Add a device node for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
"bcrmf" is a typo and "wifi" is the preferred form to describe
such node, so change it accordingly.
Reported-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add barebones dts support for TI's K2G Industrial Communication Engine evm.
This dts allows the board to boot using a ram based filesystem.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
With the new Keystone 2 Industrial Communication EVM adding the
unit address to the memory node it made sense to add it for this board
also.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Adding the unit address to the memory node was causing the below error:
Warning (reg_format): "reg" property in /memory has invalid length
(8 bytes) (#address-cells == 2, #size-cells == 2)
Further debugging showed that this was due to the memory node added by
default to skeleton.dtsi which was being included in keystone-k2g.dtsi.
Adding a missing node was all that was needed to remove this deprecated
dtsi file from the SoC dtsi. With skeleton.dtsi removed the dtc compiler
no longer complained about including the unit address for the memory node.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
"bcrmf" is a typo and "wifi" is the preferred form to describe
such node, so change it accordingly.
Reported-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently the following eMMC error is seen:
mmc1: mmc_select_hs200 failed, error -74
mmc1: new MMC card at address 0001
mmcblk1: mmc1:0001 V10008 7.05 GiB
mmcblk1boot0: mmc1:0001 V10008 partition 1 4.00 MiB
mmcblk1boot1: mmc1:0001 V10008 partition 2 4.00 MiB
mmcblk1rpmb: mmc1:0001 V10008 partition 3 4.00 MiB
On imx7s-warp the eMMC VCCQ is fixed at 3.15V, so pass the 'no-1-8-v'
property to properly describe that 1.8V operation is not possible.
With this change HS200 error is gone and another benefit is that the
card can operate in DDR52 mode now:
mmc1: new DDR MMC card at address 0001
mmcblk1: mmc1:0001 V10008 7.05 GiB
mmcblk1boot0: mmc1:0001 V10008 partition 1 4.00 MiB
mmcblk1boot1: mmc1:0001 V10008 partition 2 4.00 MiB
mmcblk1rpmb: mmc1:0001 V10008 partition 3 4.00 MiB
Suggested-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the initial support for imx7d-pico board.
Add support for eMMC, USB host, USB device, PMIC, Ethernet and audio.
For more information about this board, please visit:
http://www.technexion.org/products/pico/pico-som/pico-imx7-emmc
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PWM driver has now capability to specify the PWM polarity
which is e.g. for backlight control. Allow to make use of PWM
polarity by specifying pwm-cells to be 3 in the base dt.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
List GPR block as compatible "fsl,imx6q-iomuxc-gpr" to support drivers
requesting it that way (PCIe driver is one example).
Cc: yurovsky@gmail.com
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that support for 'anatop-enable-bit' has been added to ANADIG
driver, reintroduce 'anatop-enable-bit' for all applicable LDOs.
Cc: yurovsky@gmail.com
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add reference to the Mali GPU device tree node on rk3288-veyron.
Tested on Minnie and Jerry boards.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add reference to the Mali GPU device tree node on rk3288-firefly.
Tested on Firefly board.
Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add reference to the Mali GPU device tree node on the
rk3288-rock2-som platform. Tested on a Radxa Rock2 Square board.
Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add Mali GPU device tree node for the rk3288 SoC, with devfreq
opp table.
Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Property 'enable-active-low' does not exist. Only 'enable-active-high' is
valid, and when this property is absent the gpio regulator will act as
active low by default.
So remove the unexisting 'enable-active-low' property.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Update freq of tsadc's working clock as 32768 hz, if not set, tsadc
will work at a default frequence.
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds a new opp table for cpu on rk322x SoC.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Set sane default frequencies for CPLL, GPLL and some other core clocks
on the rk322x.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The datasheets for Allwinner SoCs set strict requirements on the
stability of the external crystal oscillators. Add the accuracy
for the main 24MHz oscillator to the device tree.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have support for the A83T CCU, add a device node for it,
and replace any existing placeholder clock phandles with the correct
ones.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A10s Olinuxino has an HDMI connector. Make sure we can use it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The A10s has an HDMI controller connected to the second TCON channel. Add
it to our DT.
Since the TV Encoder was the only channel 1 user so far, also add the
property now that we have several users.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[wens@csie.org: Replaced CLK_PLL_VIDEO[01]_2X with raw numbers for now
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
for various devices. Also included is a memory controller (GPMC) debug output
fix as without that the shown bootloader configured GPMC bus width will
be wrong and won't work for kernel timings:
- Add dra7 powerhold configuration to be able to shut down pmic correctly
- Fix polarity for gta04 mcbsp4 clocks for modem
- Fix Pandaboard CEC pin pull making it usable
- Fix LogicPD Torpedo camera pin mux
- Fix GPMC debug bus width
- Reduce cpu thermal shutdown temperature
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlkdw8ARHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXOERBAA0y2DvjgvpYL+AefHlaoeN8OW6PL/GB29
sCZglf3Tc7pdmqJQXFbj1UqqPHCw3tnSAbfYwcOdiFr8g2ni0A9s9HjKoIZQzphw
s+llq282YdTi+pWxjQ79OvkxhTJZnKX0G8Ls31klmHT/4/vIGsiTuYodum3FN0n2
/uFGDGBljjMGyE69klJ6LD13VXcXSe0ESK5iIV/naVMbdzLFUW9kAxMz6IL3TO48
gP/wOpJmksq3l+vFUc/XOrNX3rIFoS/coegYUM5lkFNHtIiooIbvWrTnc6Ub/0oV
XXEoijIUSralcouYyMLdTco+ag/qBtd4xpHdEYGFg04HQrvI7iEF6OAW2MAgjW5z
D9X5CMqkPaMRf6X2/LaVQ6sqrcw2t75lW6sRX/y9N2fH4WtchYyhpMVhw+OH241x
LNLmV7HaNkE0AaWSjHtYUA1HFhMUWHqQAPqy5GWfxoJvzx7HofG1txiLRF9rUzBt
OZ30uWUpVi3koJBVG12Rz+UhN90H4/qK+kwDcQOOEDNd1kQcT/QNFew3fGBNqkDL
PivoXWAJnbEJQ6Xr+ablemE7hyyBHHJxDAQsOLh4VitxEPw1TYh4/widUi52/0VQ
PMUdbIBhQJp6St7TtUWW8CckdzbjsAMk0zJgcZeBXmczfTjH8PMOuxLvATUweEf+
JD+zCBBfXFU=
=My0U
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.12/fixes-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps for v4.12-rc cycle most consisting of few minor dts fixes
for various devices. Also included is a memory controller (GPMC) debug output
fix as without that the shown bootloader configured GPMC bus width will
be wrong and won't work for kernel timings:
- Add dra7 powerhold configuration to be able to shut down pmic correctly
- Fix polarity for gta04 mcbsp4 clocks for modem
- Fix Pandaboard CEC pin pull making it usable
- Fix LogicPD Torpedo camera pin mux
- Fix GPMC debug bus width
- Reduce cpu thermal shutdown temperature
* tag 'omap-for-v4.12/fixes-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra7: Reduce cpu thermal shutdown temperature
memory: omap-gpmc: Fix debug output for access width
ARM: dts: LogicPD Torpedo: Fix camera pin mux
ARM: dts: omap4: enable CEC pin for Pandaboard A4 and ES
ARM: dts: gta04: fix polarity of clocks for mcbsp4
ARM: dts: dra7: Add power hold and power controller properties to palmas
Signed-off-by: Olof Johansson <olof@lixom.net>
- A fix on GPCv2 power domain driver Kconfig which causes a build
failure when CONFIG_PM is not set.
- Pull down PMIC IRQ pin for imx53-qsrb board to prevent spurious
PMIC interrupts from happening.
- Remove board level OPP override for imx6sx-sdb to fix a boot crash
seen on Rev.C boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJZHav8AAoJEFBXWFqHsHzOPWMH/RP4LuJDUoFaPUJ3WsrMhPYR
qmBEzZXvjKBxImFCIiG09vcjQIiN9p5uZ9AqNIQGgoW20DlFKVZ0Rd64MJzp8QnL
J/WwEDTG1qs2jCkNWYkFEUwz6fMWzzTUydj665dkQI3SNwRAJ9dE0LgybM6Yws3C
FQdIUyWR2z8QQYqjLTD9XuDe7ewyoslvFssWRiVzpcnkiu8sWgbTuJ/K+ISCgwo4
rC6Vi7Z4WU47SgL7+d9sOMzDPDIif5mOdfW8uG3tgCeDp/8WNz9IbamCuxhggQpa
+k9jaTHAtOV9ypf1PBUCGHazU7E8hc42XoW6XT0yY3sFynw+VPd1IFVXiWAEBu0=
=gQA8
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.12:
- A fix on GPCv2 power domain driver Kconfig which causes a build
failure when CONFIG_PM is not set.
- Pull down PMIC IRQ pin for imx53-qsrb board to prevent spurious
PMIC interrupts from happening.
- Remove board level OPP override for imx6sx-sdb to fix a boot crash
seen on Rev.C boards.
* tag 'imx-fixes-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: add PM dependency for IMX7_PM_DOMAINS
ARM: dts: imx6sx-sdb: Remove OPP override
ARM: dts: imx53-qsrb: Pulldown PMIC IRQ pin
Signed-off-by: Olof Johansson <olof@lixom.net>
4.12, please pull the following:
- Baruch provides several fixes for the Raspberry Pi (BCM2835) Device
Tree source include file: uart0 pinctrl node names, pin number for
i2c0, uart0 rts/cts pins and invalid uart1 pin, missing numbers for
ethernet aliases
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZF8+xAAoJEIfQlpxEBwcERmUP/iAf5euX/RPb3eJ8QmDhn2ap
bnU4Puh5aT16fwqK/fohpzqcxhlkqsPhIvl6gwi6UHzNbZOqhz2gwXBjP7DuDsPx
rNF7qJE0zFCy/jmhiSbMWiC62Q7UbIR+TmtP3cFzXw8edM6Tjp+IFkE8fuSmQkdd
/djp+3k16KNRsSu+iyNDJSu4jNjigKP1DYPFJi0cMceQZ2Hr6KHO7r2mHXmZ8Cf7
cxIPw38ZRiwIU6gbyPrVSLjJJ1X3O3QAyqlTbeooJn5bZ6cEc7jt2LlUUoLY2JTQ
+2HoT2DsrDX8SfkJmyBr41/awsHq2wx+++zss3qd9LHKqRyKBZgY6HVea05+z1T9
+FtWZ74zmOzHrjqwB5a3fN4+EfY4HKqSDVnrgbNu9Y59LCZPeVSLcFK1rpuLnu62
ZaeTTOmwhwzetOGi96+2LhnMihFbGoB5te+y8nZtf9vAONp6nLsDgQ30gqGC6/19
JeR+5z+z++7TpsghLJ+YlE4HjxMRV5zFYTLmHHI76DJOCb8i48wMURDizPHZYuaq
+aRiBJkmweZtu1KJea867UIDblgk2K9QosL35lomrD518VeTIgSrmBrux7fwlMC/
r8Z0B3z632gNYi+ZrR/Fr+9lmHpq7NBqEai5BAwI1DkwW3HfdeSAczZ5Tij42eGA
U2qLiZSH7U/8cb6mCp0H
=6jUO
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.12/devicetree-fixes' of http://github.com/Broadcom/stblinux into fixes
This pull request contains Broadcom ARM-based SoC Device Tree fixes for
4.12, please pull the following:
- Baruch provides several fixes for the Raspberry Pi (BCM2835) Device
Tree source include file: uart0 pinctrl node names, pin number for
i2c0, uart0 rts/cts pins and invalid uart1 pin, missing numbers for
ethernet aliases
* tag 'arm-soc/for-4.12/devicetree-fixes' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm2835: add index to the ethernet alias
ARM: dts: bcm2835: fix uart0/uart1 pins
ARM: dts: bcm2835: fix i2c0 pins
ARM: dts: bcm2835: fix uart0 pinctrl node names
Signed-off-by: Olof Johansson <olof@lixom.net>
We use a directory under arch/$ARCH/boot/dts as an include path
that has links outside of the subtree to find dt-bindings from under
include/dt-bindings. That's been working well, but new DT architectures
haven't been adding them by default.
Recently there's been a desire to share some of the DT material between
arm and arm64, which originally caused developers to create symlinks or
relative includes between the subtrees. This isn't ideal -- it breaks
if the DT files aren't stored in the exact same hierarchy as the kernel
tree, and generally it's just icky.
As a somewhat cleaner solution we decided to add a $ARCH/ prefix link
once, and allow DTS files to reference dtsi (and dts) files in other
architectures that way.
Original approach was to create these links under each architecture,
but it lead to the problem of recursive symlinks.
As a remedy, move the include link directories out of the architecture
trees into a common location. At the same time, they can now share one
directory and one dt-bindings/ link as well.
Fixes: 4027494ae6 ('ARM: dts: add arm/arm64 include symlinks')
Reported-by: Russell King <linux@armlinux.org.uk>
Reported-by: Omar Sandoval <osandov@osandov.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: linux-arch <linux-arch@vger.kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJZF2pwAAoJEHm+PkMAQRiG9aAIAJJyV6Ux9kaX+glqO3KIs0wm
0K/yqMOv1JTfJ1UUgY4iZbk5XOPPmXv1bdKJFECZfuAHdymJUF/RVNNvDlZbaLdd
K8vDEi92eRwcf07a5b/Q2F8yNfADKKmRAA/oAbuQLBhJ0dPHig70PIvi9gq9kqiE
Ft1MinbsZLavYatLm7oVDr/nsYebEDMGwTy0EX5bF2YjydfAlCvVWnI5ld5wisiV
0fQF4W7MMjjcpAzG8uq3atEB8iQcWS2Ykz2chZRbYzHcdV2WJW751Vge9xc05Hzi
rxlqn6peZFiFyM0qdPLhY0ktGzSTZcCFeb3aZicvm5aOamy2KJjOSZrEwjU8kts=
=VHpx
-----END PGP SIGNATURE-----
Merge tag 'v4.12-rc1' into fixes
We've received a few fixes branches with -rc1 as base, but our contents was
still at pre-rc1. Merge it in expliticly to make 'git merge --log' clear on
hat was actually merged.
Signed-off-by: Olof Johansson <olof@lixom.net>
On imx6sx-sdb rev B/C the VDD_ARM_IN and VDD_SOC_IN supplies are connected
together and both are supplied by the SW1A PMIC output, so model this
correctly in the device tree.
Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Allwinner V3s SoC has a SPI controller, muxed with the MMC2 controller
at PC bank. The controller itself is identical to the one in H3 SoC.
Add device tree node and the only pinmux node for it.
Tested with a Winbond W25Q128FV SPI NOR soldered on the Lichee Pi
early sample.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
