Christoph Hellwig fcdc653751 riscv: provide native clint access for M-mode ... RISC-V has the concept of a cpu level interrupt controller. The interface for it is split between a standardized part that is exposed as bits in the mstatus/sstatus register and the mie/mip/sie/sip CRS. But the bit to actually trigger IPIs is not standardized and just mentioned as implementable using MMIO. Add support for IPIs using MMIO using the SiFive clint layout (which is also shared by Ariane, Kendryte and the Qemu virt platform). Additionally the MMIO block also supports the time value and timer compare registers, so they are also set up using the same OF node. Support for other layouts should also be relatively easy to add in the future. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Anup Patel <anup@brainfault.org> [paul.walmsley@sifive.com: update include guard format; fix checkpatch issues; minor commit message cleanup] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>		2019-11-17 15:17:39 -08:00
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asm-offsets.h	RISC-V: Task implementation	2017-09-26 15:26:46 -07:00
asm-prototypes.h	RISC-V: include linux/ftrace.h in asm-prototypes.h	2018-09-24 13:12:27 -07:00
asm.h	RISC-V: Clear load reservations while restoring hart contexts	2019-10-01 13:16:40 -07:00
atomic.h	locking/atomic, riscv: Use s64 for atomic64	2019-06-03 12:32:56 +02:00
barrier.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234	2019-06-19 17:09:07 +02:00
bitops.h	RISC-V patches for v5.2-rc6	2019-06-17 10:34:03 -07:00
bug.h	riscv: cleanup <asm/bug.h>	2019-10-23 14:53:46 -07:00
cache.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
cacheflush.h	riscv: fix build break after macro-to-function conversion in generic cacheflush.h	2019-07-18 08:16:56 -07:00
clint.h	riscv: provide native clint access for M-mode	2019-11-17 15:17:39 -08:00
cmpxchg.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
csr.h	riscv: abstract out CSR names for supervisor vs machine mode	2019-11-05 09:20:42 -08:00
current.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
delay.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
elf.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
fence.h	riscv/spinlock: Strengthen implementations with fences	2018-04-02 19:59:43 -07:00
fixmap.h	RISC-V: Fix FIXMAP area corruption on RV32 systems	2019-08-28 15:30:12 -07:00
ftrace.h	riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support	2018-04-02 19:59:13 -07:00
futex.h	riscv: remove CONFIG_RISCV_ISA_A	2019-04-25 14:51:10 -07:00
hugetlb.h	riscv: Introduce huge page support for 32/64bit kernel	2019-07-03 15:23:38 -07:00
hwcap.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234	2019-06-19 17:09:07 +02:00
image.h	riscv: modify the Image header to improve compatibility with the ARM64 header	2019-09-13 19:03:52 -07:00
io.h	riscv: separate MMIO functions into their own header file	2019-11-05 09:11:18 -08:00
irq.h	riscv: add missing header file includes	2019-10-28 00:46:01 -07:00
irqflags.h	riscv: abstract out CSR names for supervisor vs machine mode	2019-11-05 09:20:42 -08:00
Kbuild	riscv: include generic support for MSI irqdomains	2019-07-22 13:06:07 -07:00
kprobes.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174	2019-05-30 11:26:41 -07:00
linkage.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
mmio.h	riscv: separate MMIO functions into their own header file	2019-11-05 09:11:18 -08:00
mmiowb.h	riscv/mmiowb: Hook up mmwiob() implementation to asm-generic code	2019-04-08 12:00:40 +01:00
mmu_context.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
mmu.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
module.h	RISC-V: Support MODULE_SECTIONS mechanism on RV32	2019-01-07 08:19:20 -08:00
page.h	RISC-V: Implement sparsemem	2019-08-30 11:10:37 -07:00
pci.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
perf_event.h	RISC-V: Fix !CONFIG_SMP compilation error	2018-08-13 08:31:32 -07:00
pgalloc.h	mm: treewide: clarify pgtable_page_{ctor,dtor}() naming	2019-09-26 10:10:44 -07:00
pgtable-32.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
pgtable-64.h	RISC-V: Setup initial page tables in two stages	2019-07-09 09:08:04 -07:00
pgtable-bits.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
pgtable.h	RISC-V: Add PCIe I/O BAR memory mapping	2019-10-28 10:43:32 -07:00
processor.h	riscv: abstract out CSR names for supervisor vs machine mode	2019-11-05 09:20:42 -08:00
ptrace.h	riscv: abstract out CSR names for supervisor vs machine mode	2019-11-05 09:20:42 -08:00
sbi.h	riscv: provide native clint access for M-mode	2019-11-17 15:17:39 -08:00
sifive_l2_cache.h	RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs	2019-05-16 20:42:13 -07:00
smp.h	riscv: cleanup riscv_cpuid_to_hartid_mask	2019-09-05 01:51:57 -07:00
sparsemem.h	RISC-V: Implement sparsemem	2019-08-30 11:10:37 -07:00
spinlock_types.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
spinlock.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
string.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
switch_to.h	riscv: abstract out CSR names for supervisor vs machine mode	2019-11-05 09:20:42 -08:00
syscall.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
thread_info.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
timex.h	riscv: add support for MMIO access to the timer registers	2019-11-13 14:10:40 -08:00
tlb.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
tlbflush.h	riscv: tlbflush: remove confusing comment on local_flush_tlb_all()	2019-10-14 12:35:36 -07:00
uaccess.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
unistd.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
vdso.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234	2019-06-19 17:09:07 +02:00
word-at-a-time.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00