mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 16:39:53 +07:00
0a1f57b86c
Sometimes Icelake forgets to reset the CSB pointers on a GPU reset,
leading to it carry on updating the old tail of the buffer.
<0>[ 618.138490] i915_sel-5636 3d..1 673425465us : trace_ports: vecs0: submit { 14de2:504, 0:0 }
<0>[ 618.138490] i915_sel-5636 3.... 673425493us : intel_engine_reset: vecs0 flags=100
<0>[ 618.138490] i915_sel-5636 3.... 673425493us : execlists_reset_prepare: vecs0: depth<-0
<0>[ 618.138490] i915_sel-5636 3.... 673425493us : intel_engine_stop_cs: vecs0
<0>[ 618.138490] i915_sel-5636 3.... 673425523us : __intel_gt_reset: engine_mask=40
<0>[ 618.138490] i915_sel-5636 3.... 673425568us : execlists_reset: vecs0
<0>[ 618.138490] i915_sel-5636 3d..1 673425568us : process_csb: vecs0 cs-irq head=1, tail=2
<0>[ 618.138490] i915_sel-5636 3d..1 673425568us : process_csb: vecs0 csb[2]: status=0x00000001:0x40000000
<0>[ 618.138490] i915_sel-5636 3d..1 673425569us : trace_ports: vecs0: promote { 14de2:504*, 0:0 }
<0>[ 618.138490] i915_sel-5636 3d..1 673425570us : __i915_request_reset: vecs0 rq=14de2:504, guilty? yes
<0>[ 618.138490] i915_sel-5636 3d..1 673425571us : __execlists_reset: vecs0 replay {head:2de0, tail:2e48}
<0>[ 618.138490] i915_sel-5636 3d..1 673425572us : __i915_request_unsubmit: vecs0 fence 14de2:504, current 503
<0>[ 618.138490] i915_sel-5636 3.... 673435544us : intel_engine_cancel_stop_cs: vecs0
<0>[ 618.138490] i915_sel-5636 3.... 673435544us : process_csb: vecs0 cs-irq head=11, tail=11
<0>[ 618.138490] i915_sel-5636 3d..1 673435545us : __i915_request_submit: vecs0 fence 14de2:504, current 503
<0>[ 618.138490] i915_sel-5636 3d..1 673435546us : __execlists_submission_tasklet: vecs0: queue_priority_hint:-2147483648, submit:yes
<0>[ 618.138490] i915_sel-5636 3d..1 673435548us : trace_ports: vecs0: submit { 14de2:504*, 0:0 }
<0>[ 618.138490] i915_sel-5636 3.... 673435549us : execlists_reset_finish: vecs0: depth->0
<0>[ 618.138490] ksoftirq-21 2..s. 673435592us : process_csb: vecs0 cs-irq head=11, tail=3
<0>[ 618.138490] ksoftirq-21 2..s. 673435593us : process_csb: vecs0 csb[0]: status=0x00000001:0x40000000
<0>[ 618.138490] ksoftirq-21 2..s. 673435594us : trace_ports: vecs0: promote { 14de2:504*, 0:0 }
<0>[ 618.138490] ksoftirq-21 2..s. 673435596us : process_csb: vecs0 csb[1]: status=0x00000018:0x40000040
<0>[ 618.138490] ksoftirq-21 2..s. 673435597us : trace_ports: vecs0: completed { 14de2:504*, 0:0 }
<0>[ 618.138490] ksoftirq-21 2..s. 673435612us : process_csb: process_csb:2188 GEM_BUG_ON(!i915_request_completed(*execlists->active) && !reset_in_progress(execlists))
After the reset, we do another clflush before checking the CSB to be
sure we see whatever was left in the CSB prior to the reset. So it is
unlikely to be an incoherent view of the CSB, and more likely that
Icelake didn't reset its pointers.
References:
|
||
---|---|---|
.. | ||
selftests | ||
uc | ||
gen6_renderstate.c | ||
gen7_renderstate.c | ||
gen8_renderstate.c | ||
gen9_renderstate.c | ||
intel_breadcrumbs.c | ||
intel_context_types.h | ||
intel_context.c | ||
intel_context.h | ||
intel_engine_cs.c | ||
intel_engine_heartbeat.c | ||
intel_engine_heartbeat.h | ||
intel_engine_pm.c | ||
intel_engine_pm.h | ||
intel_engine_pool_types.h | ||
intel_engine_pool.c | ||
intel_engine_pool.h | ||
intel_engine_types.h | ||
intel_engine_user.c | ||
intel_engine_user.h | ||
intel_engine.h | ||
intel_gpu_commands.h | ||
intel_gt_irq.c | ||
intel_gt_irq.h | ||
intel_gt_pm_irq.c | ||
intel_gt_pm_irq.h | ||
intel_gt_pm.c | ||
intel_gt_pm.h | ||
intel_gt_requests.c | ||
intel_gt_requests.h | ||
intel_gt_types.h | ||
intel_gt.c | ||
intel_gt.h | ||
intel_llc_types.h | ||
intel_llc.c | ||
intel_llc.h | ||
intel_lrc_reg.h | ||
intel_lrc.c | ||
intel_lrc.h | ||
intel_mocs.c | ||
intel_mocs.h | ||
intel_rc6_types.h | ||
intel_rc6.c | ||
intel_rc6.h | ||
intel_renderstate.c | ||
intel_renderstate.h | ||
intel_reset_types.h | ||
intel_reset.c | ||
intel_reset.h | ||
intel_ring_submission.c | ||
intel_ring_types.h | ||
intel_ring.c | ||
intel_ring.h | ||
intel_rps_types.h | ||
intel_rps.c | ||
intel_rps.h | ||
intel_sseu.c | ||
intel_sseu.h | ||
intel_timeline_types.h | ||
intel_timeline.c | ||
intel_timeline.h | ||
intel_workarounds_types.h | ||
intel_workarounds.c | ||
intel_workarounds.h | ||
Makefile | ||
mock_engine.c | ||
mock_engine.h | ||
selftest_context.c | ||
selftest_engine_cs.c | ||
selftest_engine_heartbeat.c | ||
selftest_engine_pm.c | ||
selftest_engine.c | ||
selftest_engine.h | ||
selftest_gt_pm.c | ||
selftest_hangcheck.c | ||
selftest_llc.c | ||
selftest_llc.h | ||
selftest_lrc.c | ||
selftest_reset.c | ||
selftest_timeline.c | ||
selftest_workarounds.c |