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synced 2024-12-28 11:18:45 +07:00
drm/i915: Pass intel_gt to has-reset?
As we execute GPU resets on a gt/ basis, and use the intel_gt as the primary for all other reset functions, also use it for the has-reset? predicates. Gradually simplifying the churn of pointers. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Andi Shyti <andi.shyti@intel.com> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190927211749.2181-1-chris@chris-wilson.co.uk
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@ -4273,7 +4273,7 @@ __intel_display_resume(struct drm_device *dev,
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static bool gpu_reset_clobbers_display(struct drm_i915_private *dev_priv)
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{
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return (INTEL_INFO(dev_priv)->gpu_reset_clobbers_display &&
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intel_has_gpu_reset(dev_priv));
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intel_has_gpu_reset(&dev_priv->gt));
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}
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void intel_prepare_reset(struct drm_i915_private *dev_priv)
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@ -546,8 +546,10 @@ typedef int (*reset_func)(struct intel_gt *,
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intel_engine_mask_t engine_mask,
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unsigned int retry);
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static reset_func intel_get_gpu_reset(struct drm_i915_private *i915)
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static reset_func intel_get_gpu_reset(const struct intel_gt *gt)
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{
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struct drm_i915_private *i915 = gt->i915;
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if (INTEL_GEN(i915) >= 8)
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return gen8_reset_engines;
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else if (INTEL_GEN(i915) >= 6)
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@ -571,7 +573,7 @@ int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
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int ret = -ETIMEDOUT;
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int retry;
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reset = intel_get_gpu_reset(gt->i915);
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reset = intel_get_gpu_reset(gt);
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if (!reset)
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return -ENODEV;
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@ -591,17 +593,20 @@ int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
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return ret;
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}
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bool intel_has_gpu_reset(struct drm_i915_private *i915)
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bool intel_has_gpu_reset(const struct intel_gt *gt)
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{
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if (!i915_modparams.reset)
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return NULL;
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return intel_get_gpu_reset(i915);
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return intel_get_gpu_reset(gt);
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}
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bool intel_has_reset_engine(struct drm_i915_private *i915)
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bool intel_has_reset_engine(const struct intel_gt *gt)
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{
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return INTEL_INFO(i915)->has_reset_engine && i915_modparams.reset >= 2;
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if (i915_modparams.reset < 2)
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return false;
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return INTEL_INFO(gt->i915)->has_reset_engine;
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}
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int intel_reset_guc(struct intel_gt *gt)
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@ -958,7 +963,7 @@ void intel_gt_reset(struct intel_gt *gt,
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awake = reset_prepare(gt);
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if (!intel_has_gpu_reset(gt->i915)) {
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if (!intel_has_gpu_reset(gt)) {
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if (i915_modparams.reset)
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dev_err(gt->i915->drm.dev, "GPU reset not supported\n");
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else
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@ -1179,7 +1184,7 @@ void intel_gt_handle_error(struct intel_gt *gt,
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* Try engine reset when available. We fall back to full reset if
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* single reset fails.
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*/
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if (intel_has_reset_engine(gt->i915) && !intel_gt_is_wedged(gt)) {
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if (intel_has_reset_engine(gt) && !intel_gt_is_wedged(gt)) {
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for_each_engine_masked(engine, gt->i915, engine_mask, tmp) {
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BUILD_BUG_ON(I915_RESET_MODESET >= I915_RESET_ENGINE);
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if (test_and_set_bit(I915_RESET_ENGINE + engine->id,
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@ -14,7 +14,6 @@
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#include "intel_engine_types.h"
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#include "intel_reset_types.h"
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struct drm_i915_private;
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struct i915_request;
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struct intel_engine_cs;
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struct intel_gt;
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@ -80,7 +79,7 @@ static inline bool __intel_reset_failed(const struct intel_reset *reset)
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return unlikely(test_bit(I915_WEDGED, &reset->flags));
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}
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bool intel_has_gpu_reset(struct drm_i915_private *i915);
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bool intel_has_reset_engine(struct drm_i915_private *i915);
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bool intel_has_gpu_reset(const struct intel_gt *gt);
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bool intel_has_reset_engine(const struct intel_gt *gt);
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#endif /* I915_RESET_H */
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@ -458,7 +458,7 @@ static int igt_reset_nop_engine(void *arg)
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/* Check that we can engine-reset during non-user portions */
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if (!intel_has_reset_engine(gt->i915))
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if (!intel_has_reset_engine(gt))
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return 0;
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file = mock_file(gt->i915);
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@ -559,7 +559,7 @@ static int __igt_reset_engine(struct intel_gt *gt, bool active)
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/* Check that we can issue an engine reset on an idle engine (no-op) */
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if (!intel_has_reset_engine(gt->i915))
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if (!intel_has_reset_engine(gt))
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return 0;
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if (active) {
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@ -791,7 +791,7 @@ static int __igt_reset_engines(struct intel_gt *gt,
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* with any other engine.
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*/
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if (!intel_has_reset_engine(gt->i915))
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if (!intel_has_reset_engine(gt))
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return 0;
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if (flags & TEST_ACTIVE) {
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@ -1547,7 +1547,7 @@ static int igt_handle_error(void *arg)
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/* Check that we can issue a global GPU and engine reset */
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if (!intel_has_reset_engine(gt->i915))
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if (!intel_has_reset_engine(gt))
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return 0;
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if (!engine || !intel_engine_can_store_dword(engine))
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@ -1689,7 +1689,7 @@ static int igt_reset_engines_atomic(void *arg)
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/* Check that the engines resets are usable from atomic context */
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if (!intel_has_reset_engine(gt->i915))
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if (!intel_has_reset_engine(gt))
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return 0;
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if (USES_GUC_SUBMISSION(gt->i915))
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@ -1746,7 +1746,7 @@ int intel_hangcheck_live_selftests(struct drm_i915_private *i915)
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bool saved_hangcheck;
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int err;
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if (!intel_has_gpu_reset(gt->i915))
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if (!intel_has_gpu_reset(gt))
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return 0;
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if (intel_gt_is_wedged(gt))
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@ -1310,7 +1310,7 @@ static int live_preempt_hang(void *arg)
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if (!HAS_LOGICAL_RING_PREEMPTION(i915))
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return 0;
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if (!intel_has_reset_engine(i915))
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if (!intel_has_reset_engine(&i915->gt))
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return 0;
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mutex_lock(&i915->drm.struct_mutex);
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@ -112,7 +112,7 @@ static int igt_atomic_engine_reset(void *arg)
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/* Check that the resets are usable from atomic context */
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if (!intel_has_reset_engine(gt->i915))
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if (!intel_has_reset_engine(gt))
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return 0;
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if (USES_GUC_SUBMISSION(gt->i915))
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@ -170,7 +170,7 @@ int intel_reset_live_selftests(struct drm_i915_private *i915)
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};
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struct intel_gt *gt = &i915->gt;
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if (!intel_has_gpu_reset(gt->i915))
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if (!intel_has_gpu_reset(gt))
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return 0;
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if (intel_gt_is_wedged(gt))
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@ -747,7 +747,7 @@ static int live_reset_whitelist(void *arg)
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igt_global_reset_lock(&i915->gt);
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if (intel_has_reset_engine(i915)) {
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if (intel_has_reset_engine(&i915->gt)) {
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err = check_whitelist_across_reset(engine,
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do_engine_reset,
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"engine");
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@ -755,7 +755,7 @@ static int live_reset_whitelist(void *arg)
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goto out;
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}
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if (intel_has_gpu_reset(i915)) {
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if (intel_has_gpu_reset(&i915->gt)) {
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err = check_whitelist_across_reset(engine,
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do_device_reset,
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"device");
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@ -1131,7 +1131,7 @@ live_gpu_reset_workarounds(void *arg)
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struct wa_lists lists;
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bool ok;
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if (!intel_has_gpu_reset(i915))
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if (!intel_has_gpu_reset(&i915->gt))
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return 0;
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ctx = kernel_context(i915);
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@ -1178,7 +1178,7 @@ live_engine_reset_workarounds(void *arg)
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struct wa_lists lists;
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int ret = 0;
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if (!intel_has_reset_engine(i915))
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if (!intel_has_reset_engine(&i915->gt))
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return 0;
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ctx = kernel_context(i915);
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@ -79,8 +79,8 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
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break;
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case I915_PARAM_HAS_GPU_RESET:
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value = i915_modparams.enable_hangcheck &&
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intel_has_gpu_reset(i915);
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if (value && intel_has_reset_engine(i915))
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intel_has_gpu_reset(&i915->gt);
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if (value && intel_has_reset_engine(&i915->gt))
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value = 2;
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break;
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case I915_PARAM_HAS_RESOURCE_STREAMER:
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