f8000000 is less than all the other (top-level) unit addresses.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add Northstar2 device tree entry for Broadcom Secure Processing Unit
(SPU) crypto hardware.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Merge "ARMv8 Juno DT fix for v4.11" from Sudeep Holla:
Just single patch to fix replicator in order to prevent overflows at
the source and reduce the back pressure by splitting the trace output
to TPIU and ETR.
* tag 'juno-fixes-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: update definition for programmable replicator
ARM64 DT updates are fairly small this time, only two new SoCs and a handful
of new machines get added, all of them similar to other hardware we already
support.
New SoC:
- HiSilicon Kirin960/Hi3660 and HiKey960 development board
- NXP LS1012a with three reference boards
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A
New development board:
- Banana Pi M64, based on Allwinner A64
http://www.banana-pi.org/m64.html
- SolidRun MACCHIATOBin based on Marvell Armada 8K
https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/
- Broadcom BCM958712DxXMC NorthStar2 reference board (another one)
A lot of platforms improve support for existing machines by adding
extra devices for which a binding and driver is availabe:
Allwinner: MMC, USB
ARM Juno: Coresight, STM
Broadcom: NS2 GICv2m irqchip and PCIe
Marvell: Armada 3700 SPI, I2C, ethernet switch
Mediatek: MT8173 thermal
NXP i.MX: LS1046A thermal
Qualcomm: coresight on MSM8916, HDMI, WCNSS, SCM
Renesas: r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd
Rockchip: thermal, eDP, pinctrl enhancements
Samsung: TM2 touchkey, Exynos5433 HDMI and power management improvements
UniPhier: SD reset, eMMC controller
ZTE: oppv2 cpufreq
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIUAwUAWK9htWCrR//JCVInAQL5sg/40ehZk89xuReYHaOoL0jkEGxt7ogae2Q0
5SurlVNEjkr1A6KKcTKwy6c8E4GReq0ioVUxyYHlNo2MedtLQWssSvObfjt390E+
OYXhuHHyHFgut9jF6nq1IZbSqkhaDcoRFdK0EPzjdxTMMk59xqzG2t9Kbq0MFz0I
Fg0+xB44VAOwuM+45MjNzdpTzolkH3gxlK4TV/opbr2/9uEDCjFOLr1zqZuWqIDh
uyXXqHYUZ54kz2GvhfYPgcm+f+PjuV2fw/Jh5u3+jNvwMQvA70Erv52im1o1a3GV
UTjmBgccTKByrPk7gXP3lgRkHQGwPLNH0L+28AZ/BNuZbWqDrDe7uVfpq9nWb5Xl
IR0uleNBOuiOdqR6Ya4xosGSm6AOgQhCbE52trHdUhb03eqRbqHcLHEVmZXXea/i
EejGOciIvbV8ent9jjREw/kvGZ+Ws6v5notG4uPDwn+YZSJAyqvGh5Tul8WzZIxk
Wr1WZgbuwkI0KYiFzSINfgDX0Om2l6YoVZLnkjst5Exto+TGRSINJpVCXsuGIU7O
34qZD25yA8WlJTooBL0cvrW0NT2RewBqLogwhbwDnRW241SW5AnuzPsFPWldLzon
L5sFgsF60gWiIlbB2/BKdpF2jB/+brXNR6epnQYADigweg/4+pS8HPZRFj7g8wyE
s22+OYJ6Cg==
=glug
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Arnd Bergmann:
"ARM64 DT updates are fairly small this time, only two new SoCs and a
handful of new machines get added, all of them similar to other
hardware we already support.
New SoC:
- HiSilicon Kirin960/Hi3660 and HiKey960 development board
- NXP LS1012a with three reference boards:
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A
New development board:
- Banana Pi M64, based on Allwinner A64:
http://www.banana-pi.org/m64.html
- SolidRun MACCHIATOBin based on Marvell Armada 8K:
https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/
- Broadcom BCM958712DxXMC NorthStar2 reference board (another one)
A lot of platforms improve support for existing machines by adding
extra devices for which a binding and driver is availabe:
Allwinner:
- MMC, USB
ARM Juno:
- Coresight, STM
Broadcom:
- NS2 GICv2m irqchip and PCIe
Marvell:
- Armada 3700 SPI, I2C, ethernet switch
Mediatek:
- MT8173 thermal
NXP i.MX:
- LS1046A thermal
Qualcomm:
- coresight on MSM8916, HDMI, WCNSS, SCM
Renesas:
- r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd
Rockchip:
- thermal, eDP, pinctrl enhancements
Samsung:
- TM2 touchkey, Exynos5433 HDMI and power management improvements
UniPhier:
- SD reset, eMMC controller
ZTE:
- oppv2 cpufreq"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (110 commits)
arm64: dts: qcom: Add msm8916 CoreSight components
arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon
arm64: allwinner: add BananaPi-M64 support
arm64: allwinner: a64: add UART1 pin nodes
arm64: allwinner: pine64: add MMC support
arm64: allwinner: a64: Increase the MMC max frequency
arm64: allwinner: a64: Add MMC pinctrl nodes
arm64: allwinner: a64: Add MMC nodes
dt-bindings: clockgen: Add compatible string for LS1012A
Documentation: DT: add LS1012A compatible for SCFG and DCFG
Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards
arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
arm64: tegra: Use symbolic reset identifiers
arm64: dts: r8a7796: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: tidyup audma definition order
arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
arm64: dts: r8a7796: Add R-Car Gen3 thermal support
arm64: dts: r8a7795: Add R-Car Gen3 thermal support
...
Here is the big USB and PHY driver updates for 4.11-rc1.
Nothing major, just the normal amount of churn in the usb gadget and dwc
and xhci controllers, new device ids, new phy drivers, a new usb-serial
driver, and a few other minor changes in different USB drivers.
All have been in linux-next for a long time with no reported issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWK2lrg8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ykh7ACffotTJvB/gwpuSIWh6qhA8KQ9mH8AnjlxMafv
b5b3vfOXJ8/N0Go25VwI
=7fqN
-----END PGP SIGNATURE-----
Merge tag 'usb-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/PHY updates from Greg KH:
"Here is the big USB and PHY driver updates for 4.11-rc1.
Nothing major, just the normal amount of churn in the usb gadget and
dwc and xhci controllers, new device ids, new phy drivers, a new
usb-serial driver, and a few other minor changes in different USB
drivers.
All have been in linux-next for a long time with no reported issues"
* tag 'usb-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (265 commits)
usb: cdc-wdm: remove logically dead code
USB: serial: keyspan: drop header file
USB: serial: io_edgeport: drop io-tables header file
usb: musb: add code comment for clarification
usb: misc: add USB251xB/xBi Hi-Speed Hub Controller Driver
usb: misc: usbtest: remove redundant check on retval < 0
USB: serial: upd78f0730: sort device ids
USB: serial: upd78f0730: add ID for EVAL-ADXL362Z
ohci-hub: fix typo in dbg_port macro
usb: musb: dsps: Manage CPPI 4.1 DMA interrupt in DSPS
usb: musb: tusb6010: Clean up tusb_omap_dma structure
usb: musb: cppi_dma: Clean up cppi41_dma_controller structure
usb: musb: cppi_dma: Clean up cppi structure
usb: musb: cppi41: Detect aborted transfers in cppi41_dma_callback()
usb: musb: dma: Add a DMA completion platform callback
drivers: usb: usbip: Add missing break statement to switch
usb: mtu3: remove redundant dev_err call in get_ssusb_rscs()
USB: serial: mos7840: fix another NULL-deref at open
USB: serial: console: clean up sanity checks
USB: serial: console: fix uninitialised spinlock
...
Juno platforms have a programmable replicator splitting the trace output
to TPIU and ETR. Currently this is not being programmed as it is being
treated as a none-programmable replicator - which is the default
operational mode for these devices. The TPIU in the system is enabled by
default, and this combination is causing back-pressure in the trace
system resulting in overflows at the source.
Replaces the existing definition with one that defines the programmable
replicator, using the "qcom,coresight-replicator1x" driver that provides
the correct functionality for CoreSight programmable replicators.
Reviewed-and-Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
1. Add necessary initial configuration for clocks of display subsystem.
Till now it worked mostly thanks to bootloader.
2. Use macro definitions instead of hard-coded values for pinctrl on Exynos7.
3. Enable USB 3.0 (DWC3) on Exynos7.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYk3YaAAoJEME3ZuaGi4PXYwAP/2d7SiLymurXwmctrxm9Q5kI
ZD7xdTr5JWq/sbuGfDHLKUz4iPMBsdQqRwczZ+DSls+Iet1fNw4enmoU/p1SpZ/5
31EFB3uN28DSL4ZA3SzOrzPgcdMRxXOYhUMq9DTY5N8h0LlI2TwB3WBDgWTpGB6R
NXX3wKulH2hXJyOizOZh2yel5KvzLqug7j/V0u9K1OmUISmTy3XfDWaXIVk33MUw
IZ6qpgTzShw6sZj5VmR9CFPFbDjwExTVenIA9gwewJlQNQnqrsg0BdEF3ZvasW+V
eFeLV4ieZHKzEoVjwdxGgTLLwjjL/orsWQ5CYiQNeCKC85rgTVfijTe8s+QKOYAq
SiV1GghHACExpCULhtQiqioFsUAUPJ+iq/EZ9NfNh7QzE5Y05RJ7bRgRd2UdBlN8
BXhekgN5RepLwKWHK8oYivMMpIKzDve1ICRpQYBVxmmwg9nzRz6Nij2YUi4oEb5j
77FOuyKe5M+QCIoKVn2v/CDQMemGkI8OEsKubjDKcOZ2V2COw7Sr1L/GCGVCslLM
FyOjaTKeoIzkrx62qgqGFuNwEaZwW0dDacHrZrccEAn9P9G7O/cU8EE9F5nJqGG0
IeDaPH7BqQ0gOHbvrEkljSbJuuOMQmZJl6qh8MMJYB9P8u9Ft3OXUXJ1qBNZB4si
E5nFWGj0CMm0UfBWgkD/
=02Sx
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/late
Pull "Samsung DeviceTree ARM64 update for v4.11, third round" from Krzysztof Kozłowski:
1. Add necessary initial configuration for clocks of display subsystem.
Till now it worked mostly thanks to bootloader.
2. Use macro definitions instead of hard-coded values for pinctrl on Exynos7.
3. Enable USB 3.0 (DWC3) on Exynos7.
* tag 'samsung-dt64-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (27 commits)
arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost
arm64: dts: exynos: Add USB 3.0 controller node for Exynos7
arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7
pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e
clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates
clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
arm64: dts: exynos: Add clocks to Exynos5433 LPASS module
arm64: dts: exynos: set LDO7 regulator as always on
arm64: dts: exynos: configure TV path clocks for Ultra HD modes
arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitions
arm64: dts: exynos: Disable pull down for audio pins in Exynos5433 SoCs
arm64: dts: exynos: Add TM2 touchkey node
arm64: dts: exynos: Remove unneeded unit names in Exynos5433 nodes
arm64: dts: exynos: Enable HDMI/TV path on Exynos5433-TM2
arm64: dts: exynos: Add HDMI node to Exynos5433
arm64: dts: exynos: Add DECON_TV node to Exynos5433
arm64: dts: exynos: Fix addresses in node names on Exynos5433
arm64: dts: exynos: Make TM2 and TM2E independent from each other
arm64: dts: exynos: Fix wrong values for ldo23 and ldo25 on TM2/TM2E
...
adjust name of sd-mmc-gop clock in sysco for Armada 7K/8K
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWJCWUCMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71YLYAJsGQxfg30DY
invLPTtpT7c8xBx/7gCeKmbV8qgukU7rq9L1/T3OeLrPqTI=
=2tUY
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.11-3' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt for 4.11 (part 3)" from Gregory CLEMENT:
adjust name of sd-mmc-gop clock in sysco for Armada 7K/8K
* tag 'mvebu-dt64-4.11-3' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon
Some patches related the arm64 Allwinner SoCs, most notably:
- Support for the MMC
- Suport for the USB and mUSB controllers
- New boards: Bananapi M64
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYkFG4AAoJEBx+YmzsjxAg0VUP/iRp85fiUdNxr3I9gm1XpC7o
hUWIlp9/ZMaEvNfGKUxESeiX2awyASaSLpQBiicRvv2mG91+Za3IF4A9/kIJDruA
cGxB7O86siR8qc9SuiMIA7hzEgyS1ayie0KvIOx397jdYarK0GMoDrokkrzN15fz
nop8bSAG0hAGYHyOEUSefQ2Uo/f1uWtOiA0IwHoLEZxZCFfXerT/8MxSKVAV8/2v
BN8aEm31iGuF9J9Hmuh105qo4F6JJdC6vPAiJGWcpV2zqm99vYoNPDPeND18C4TI
ojk6cxzFWtf1QRT6zFmjKEazoRKlQnOw6ZFQ80yDsKJPpOr5CV/Bj2hNgDveQ2W3
ICTwmP6jfTH7q8Jp7MtZTJmYLoTb6qqMlOWGLTvD/utzj3sNvDPr74fk7lyLPUBQ
c86dG9Sm+lEJeqHZuBe9GiwdKYs3kKaiN6AQGYtTLu8EPVZvzq6hF8XEa7DCmKCZ
DT4fGCf64MIwLcYTPqR4A633qlopjDvCA66DJxfzQnmKFO6n5pTff7aj4HvH/uSk
gkQTCzPta+qyb3qWueBmiulLEEcb87EwBBcbt3hzs15rgDBxtl05LcKQ7HHdUM8Q
QZZTwzwH6EHqSefr0pAgJggKExin5YjTKB0UEsGe1yevgCYVca/2q8SQYypoDTJP
tuBg05IB2gj7zitwMK57
=//in
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt64-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt64
Pull "Allwinner arm64 changes for 4.11" from Maxime Ripard:
Some patches related the arm64 Allwinner SoCs, most notably:
- Support for the MMC
- Suport for the USB and mUSB controllers
- New boards: Bananapi M64
* tag 'sunxi-dt64-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm64: allwinner: add BananaPi-M64 support
arm64: allwinner: a64: add UART1 pin nodes
arm64: allwinner: pine64: add MMC support
arm64: allwinner: a64: Increase the MMC max frequency
arm64: allwinner: a64: Add MMC pinctrl nodes
arm64: allwinner: a64: Add MMC nodes
arm64: dts: allwinner: Remove no longer used pinctrl/sun4i-a10.h header
arm64: dts: enable the MUSB controller of Pine64 in host-only mode
arm64: dts: add MUSB node to Allwinner A64 dtsi
arm64: dts: allwinner: enable EHCI1, OHCI1 and USB PHY nodes in Pine64
arm64: dts: allwinner: sort the nodes in sun50i-a64-pine64.dts
arm64: dts: allwinner: add USB1-related nodes of Allwinner A64
Due to the reference clock comes from 26M oscillator directly
on mt8173, and it is a fixed-clock in DTS which always turned
on, we ignore it before. But on some platforms, it comes
from PLL, and need be controlled, so here add it, no matter
it is a fixed-clock or not.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Adding fixed voltage regulators for Vbus and Vbus-boost required
by USB 3.0 DRD controller on Exynos7-espresso board.
Signed-off-by: Vivek Gautam <gautamvivek1987@gmail.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add USB 3.0 DRD controller device node, with its clock
and phy information to enable the same on Exynos7.
Signed-off-by: Vivek Gautam <gautamvivek1987@gmail.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add initial set of CoreSight components found on Qualcomm msm8916 and
apq8016 based platforms, including the DragonBoard 410c board.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add initial clock configuration for display subsystem for Exynos5433
based TM2/TM2e boards in device tree in order to avoid dependency on the
configuration left by the bootloader. This initial configuration is also
needed to ensure that display subsystem is operational if display power
domain gets turned off before clock controller is probed and the inital
clock configuration left by the bootloader saved.
TM2 and TM2e uses different rate for DISP PLL clock, but for better
maintainability all 'assigned-clocks-*' properties for DISP CMU are
defines in each board dts instead of redefining the rates property.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit adjusts the names of gatable clock #18 of the Marvell Armada
CP110 system controller. This clock not only controls SD/MMC, but also
the GOP (Group Of Ports) used for networking. So the clock is renamed to
{cpm,cps}-sd-mmc-gop instead of {cpm,cps}-sd-mmc.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
1. Use proper drive strengths on Exynos7.
2. Fix significant current leak on Exynos5433-based TM2/TM2E due
to disabled regulator.
3. Add touchkey to TM2, set display clocks for Ultra HD modes.
4. Cleanups and minor fixes for Exynos5433, TM2 and TM2E.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYj31/AAoJEME3ZuaGi4PXXjEQAI3QSvZNYagIX1ph+mRvyw+W
GVBE7NGdkW8Cd3/2lIrLQ/+boqvM27u+4deJFG0Vx3+u2hHBbvoojjFTgQatO26I
Hrf8sAtQ8K7ta9mMQ+CnQl/CyWP7od9aG5XeTy02YQR6+nunWikPfN0xJ+X1+ufN
zvyGILuYlBZMS4aiQK5G4Ue5qqNU7DU0KGH0zDA/BiEJUESEaLvStOa+3YdXC8Qa
WVWCEJQugNswipMf4Y7fi8MiOBsnNgs/dbTFA+XLdHBn8+uxikeFi1CjKlgv4nzE
LegegLss7VZmRZY7IpPqme1ruqF1/YD7JDIuXnVMzQQxlNTkFACsd3ZlIQRQG4zp
QiuNkV1Ymu/FfrYtjjLYOYOrOwKuAFmhXr8m34tgxCXNTvac/hO5+/w65yC/3Uu4
qlYZvEmqZIsJwPFv1PU3LN4gcXiLXle8iWY8Tjad6y7MhIb46iT2MPrR4q/oSN5x
LP7N21VFCdobjxk+zFqvE2jb1BOQuUhrPnHx2zUpH7IrJU8jKVCa9gFx/U5w/tnU
40TYoO7aCk55xDsAWWQhKs6lxbdK/+OH+6vua5Q6dEZH5U9NsD2RgoQD8wPjNwmM
8Kpgmu9oCbyxfCfbBgXm787X5ZcEjU4IrKfp2iMcmwR+QQf+TwQSmEvEFKfKmbc7
rP8YPV0IhPRZRMP9+Nw+
=rfRv
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Samsung DeviceTree ARM64 update for v4.11, second round:
1. Use proper drive strengths on Exynos7.
2. Fix significant current leak on Exynos5433-based TM2/TM2E due
to disabled regulator.
3. Add touchkey to TM2, set display clocks for Ultra HD modes.
4. Cleanups and minor fixes for Exynos5433, TM2 and TM2E.
* tag 'samsung-dt64-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add clocks to Exynos5433 LPASS module
arm64: dts: exynos: set LDO7 regulator as always on
arm64: dts: exynos: configure TV path clocks for Ultra HD modes
arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitions
arm64: dts: exynos: Disable pull down for audio pins in Exynos5433 SoCs
arm64: dts: exynos: Add TM2 touchkey node
arm64: dts: exynos: Remove unneeded unit names in Exynos5433 nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the 5 buttons connected to a resistor laddered matrix and sampled
by the SAR ADC channel 0.
Only the p200 board has these buttons, the P201 doesn't.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the SAR ADC to meson-gxbb.dtsi and meson-gxl.dtsi. GXBB provides a
10-bit ADC while GXL and GXM provide a 12-bit ADC.
Some boards use resistor ladder buttons connected through one of the ADC
channels. On newer devices (GXL and GXM) some boards use pull-ups/downs
to change the resistance (and thus the ADC value) on one of the ADC
channels to indicate the board revision.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Banana Pi M64 board is a typical single board computer based on the
Allwinner A64 SoC. Aside from the usual peripherals it features eMMC
storage, which is connected to the 8-bit capable SDHC2 controller.
Also it has a soldered WiFi/Bluetooth chip, so we enable UART1 and SDHC1
as those two interfaces are connected to it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
On many boards UART1 connects to a Bluetooth chip, so add the pinctrl
nodes for the only pins providing access to that UART. That includes
those pins for hardware flow control (RTS/CTS).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
All Pine64 boards connect an micro-SD card slot to the first MMC
controller.
Enable the respective DT node and specify the (always-on) regulator
and card-detect pin.
As a micro-SD slot does not feature a write-protect switch, we disable
this feature.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The eMMC controller seem to have a maximum frequency of 200MHz, while the
regular MMC controllers are capped at 150MHz.
Since older SoCs cannot go that high, we cannot change the default maximum
frequency, but fortunately for us we have a property for that in the DT.
This also has the side effect of allowing to use the MMC HS200 and SD
SDR104 modes for the boards that support it (with either 1.2v or 1.8v IOs).
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The A64 only has a single set of pins for each MMC controller. Since we
already have boards that require all of them, let's add them to the DTSI.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The A64 has 3 MMC controllers, one of them being especially targeted to
eMMC. Among other things, it has a data strobe signal and a 8 bits data
width.
The two other are more usual controllers that will have a 4 bits width at
most and no data strobe signal, which limits it to more usual SD or MMC
peripherals.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Chen-Yu Tsai <wens@csie.org>
- Enable cpufreq support for zx296718 by using new operating-points-v2
bindings, so that it works with the generic cpufreq-dt driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYjW1hAAoJEFBXWFqHsHzOkYUH/RNoyrOb3+KWfy0pczLBj98F
SmF966hsGNPPKNZ+NFhqWdd1/iT9UzdIax09858HQzvyWSL7LSZNwbkHJU/2McKy
zFo71IAnMNiNti6USiKVNX0HGx9ndnCChzJBUAcum46fJ7Kt0g8zjfBZfGjRq1cQ
b3b1sJXt5P9+ebjUhrGXAykkS4zwpTHCdRAwmtKQEhU8Q5ri2+pqMtwvrt8XDfxl
vFbckTpA0byd60TGvl/HecmafpYhXvOU7QGQaknzOnlH2o5dmwf0/i7Cw0sqyQn7
JeBopKi7N2S2hN7ZlUYcEQ87FRGdf2u5WbQtcTRiYrZwvUf508hNMxGclMKUHNg=
=EYrK
-----END PGP SIGNATURE-----
Merge tag 'zte-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
ZTE arm64 device tree update for 4.11:
- Enable cpufreq support for zx296718 by using new operating-points-v2
bindings, so that it works with the generic cpufreq-dt driver.
* tag 'zte-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: zx: support cpu-freq for zx296718
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add support for LS1012A SoC which is an ARMv8 SoC with single
Cortex-A53 core, and the corresponding board support: FRDM, QDS
and RDB.
- Enable TMU (Thermal Monitoring Unit) support for LS1046A SoC.
- Enable PCA9547 device for ls2080a-rdb board by removing 'disabled'
status setting.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYjWZxAAoJEFBXWFqHsHzOvGQIAJpdglbg/r997PFL43gODNaU
RfF/userRtzsm3PZ9Uyf2EMg2Q66O92g9lqlr6+QNDSBuLl6iyyIomiCE3P9D/8A
IggNiTKYuEFqWQUCQL6VSoOK5Ha9sa4D23rrGoRGbfKeiiM8M/gn7gNjOAmbbZx6
VwVAAmkLObGmrkxq9IN++u7rIpTWLyOX+6wzQUYFfTD8OqGBrkpFpKOGTZXgzmeE
Q8EebPh/ti2lFjGw1lWECjI4kEXIz7TMnKFsS/fYf7o6s778JQ/uocUl2UtTon1E
aIIU72OMq6Mp/EoaMq3l9t1pgoEZMPVzyGiYPVypfEzkKTh26wb9POc6KiDO0JE=
=g8mg
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Freescale arm64 device tree updates for 4.11:
- Add support for LS1012A SoC which is an ARMv8 SoC with single
Cortex-A53 core, and the corresponding board support: FRDM, QDS
and RDB.
- Enable TMU (Thermal Monitoring Unit) support for LS1046A SoC.
- Enable PCA9547 device for ls2080a-rdb board by removing 'disabled'
status setting.
* tag 'imx-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: clockgen: Add compatible string for LS1012A
Documentation: DT: add LS1012A compatible for SCFG and DCFG
Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards
arm64: dts: ls1046a: Add TMU device tree support
arm64: dts: Add support for FSL's LS1012A SoC
arm64: dts: ls2080a-rdb: remove disable status of pca9547
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add a new Armada 8K based board: MACCHIATOBin
- Enable AHCI on the Armada 7K/8K SoCs
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWIt9MyMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71Zw/AJ9NEi6v2zy2
F16VJxKCgnhcJd++zwCfXA4/Z8eBtxXwsIPNLPMCTc9FtC0=
=JDKj
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.11-2' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu dt64 for 4.11 (part 2)
- Add a new Armada 8K based board: MACCHIATOBin
- Enable AHCI on the Armada 7K/8K SoCs
* tag 'mvebu-dt64-4.11-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
arm64: dts: marvell: Add DT for MACCHIATOBin board
Signed-off-by: Olof Johansson <olof@lixom.net>
This contains three patches that reintroduce symbolic identifiers for
clocks, resets and mailboxes. These had been converted to literals in
the v4.10 release to avoid complicated dependencies between branches.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAliLECQTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTa2EACD9/bu6s6tJopSAPBxKCI1voclTsXQ
du1TCe2PO6Vz4CFkmpCo8mAsAexr+pQ6b8yX/SVOr/8A5N1J7TtQTUfK7Mzggeh+
hI07xNDcE6LskOsEiLSApBpTwbCbpju7efIQWlnYByznfElnfLzuVUaXwezZTdG4
rdXl2tCJOAuHwaA0dhlgj3YerVnDADSqZGMAa8tfpp0tN3P1/H9k7Q8Ze8Xcm2ag
DZAo5XxL5XqcvEz1Rt8pTBHdtkGKeIO+3P6az2sCHMzqvB1Ejpa6sx6WIEQvJqxX
VuTX27fFepWhEHfQMktLobxYl9zfsP/XMzlAve4EDrtJMmNjZ3glPNOuoEzicgsQ
QpnYiF1HR/Q7BeZpGHDpSd3skTgtLvQZq9+CSQrOkXmhTnoHea5e1vHw6mR5Xi9V
jvitE7bLSW2cWxHZ51QNDygobF4Gqmk9DFuKBDv22QYqh2d67J5TqpSJ2xURDH58
GK5g32LAyoX8xehA1I+insyObKxe6QWOAg1Ukt1S0BgUHQhwBx/qh0ZVv0ktwcyF
fYcnJmvvAHiaYJvePoy0aBRN01JCnYwzbKlM+KjfT6juuSiPqaJNVErurTYc2Gfz
7/lT2EmhNbFnveflZGODpWTuygJZkmoGxADfyzP1D4U+6P35yaWVRTiGha4FWMEn
spltHyMXJ4tBpQ==
=eeee
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
arm64: tegra: Device tree changes for v4.11-rc1
This contains three patches that reintroduce symbolic identifiers for
clocks, resets and mailboxes. These had been converted to literals in
the v4.10 release to avoid complicated dependencies between branches.
* tag 'tegra-for-4.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Use symbolic reset identifiers
arm64: tegra: Use symbolic clock identifiers
arm64: tegra: Use symbolic HSP identifiers
Signed-off-by: Olof Johansson <olof@lixom.net>
r8a779[56] SoCs:
* Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
- They are enabled as appropriate in board DT files
* Link ARM GIC to clock and clock domain on r8a779[56] SoCs
* Add thermal support
r8a7795 SoC:
* Tidyup audma definition order on r8a7795 SoC
* Add missing power-domains property for SATA
r8a7795/h3ulcb board:
* Add MIX/CTU support as per support present in DT for r8a7796
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYiw5mAAoJENfPZGlqN0++SqEP/3vqRuXgL0dxMPWzgTO0OW1h
G0POAg9AN0gNSS0dgA8yaUOJvphYcM8HGEbyCh8iE4sQ29fel55H4MW2Be2XB1RI
v08wcx2dr4N/FgbZdyw2VtVF7mmskpU+NEuQenpm3Pa2hYY9RuGdM84Fnk8o+Ks8
npyoijNMxLdfuhtWnkPl+CDAs3Ney5CRUlBM3nxz89w0s/nTigVUToVQv1m43VDk
KWK2+zrFQZNikodw1d3AwrFj9NtL7DakBY41vHHGh8UjEmgItd1ae//JHAlT9Y1J
KmY/2kBBiI0xqYZXVfXl1g04Fxy4Hx8p07sThS1+MzIeBsPX4+2U3zffWns3Y3DK
8ijF/lHbxo70ElYuwKX4HxNOeGgjh+ZF8nTzguqywgpVKIxot8FzLNi00wYji5in
/gxE8+OORGiegy40/J8423l2IleN/DiBe6IIA3JB8zgZf4N61DsYDNcnlXb71WTA
klPrNXTScE3IVbhK41HgkX38rJE3agF1jG3YIhWCUin8lvNw2UCX2ScsV8J6nksB
OUSlA1Ls2ABdgEoDGh6Q1coyowHnOX8o5LtP+fZNH7V+LuDL01oyeCLoEeppPE+K
Y3yygtZ8QeGEiBKWqb0/y2LvsPl/78BIImxIBDyokXFDQpb3fjBXT7dpH78dsSjU
UiI9ZpMJ/nna0LOF43Pu
=KG8o
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64
Second Round of Renesas ARM64 Based SoC DT Updates for v4.11
r8a779[56] SoCs:
* Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
- They are enabled as appropriate in board DT files
* Link ARM GIC to clock and clock domain on r8a779[56] SoCs
* Add thermal support
r8a7795 SoC:
* Tidyup audma definition order on r8a7795 SoC
* Add missing power-domains property for SATA
r8a7795/h3ulcb board:
* Add MIX/CTU support as per support present in DT for r8a7796
* tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7796: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: tidyup audma definition order
arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
arm64: dts: r8a7796: Add R-Car Gen3 thermal support
arm64: dts: r8a7795: Add R-Car Gen3 thermal support
arm64: dts: r8a7795: Add missing power-domains property for sata
arm64: dts: h3ulcb: follow sound CTU/MIX supports
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add binding for Hi3660 SoC and HiKey960 Board
- Add binding for ARM Cortex-A73
- Add dts files for HiKey960 development board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYiNBNAAoJEAvIV27ZiWZcR4oQAJKZUqtZsOjKumrBU4wji/AS
le3PE8Ygy3O2lKsCtRhfeKkM9s1FVasvCbou3QsmbmKIKHCN3eS1PV1pJYEaINUD
MymbxkpG3jNnZkUXui/mzpDDsNSODXR7UkieKXfkVHtxkHJzFrBcRSqobQc71+/u
ACmiorYSqxZtABN0vGj00F4Jv9I7HneTNjBs591PF8dPQvzCIuL/duYyBAGQNWnR
hUseVgDa+DYm7nPWI30M+hjF4sL6oVvxODkubrB4Gfo+xzoXCoa2rT/qMrsDCuQJ
OHmSfaIMgvs76w7iCMBouwgemATv9/kHL470B3mEXaqUs7hxJrtNdDHR3ghks09b
1YKaO03DZJmRXe8Ym6Or/PWVPea9ZBMhptd4Coya8nEapR25XNXR90EQ2Sihh1O+
xTVZnLF7wVcEV61U+eEKaoUmQpf4bviO4EiaoSZvr9Qzdtsv4B3wPWKPDZIQg89D
49hSxtbP5RPWwX9K7Kn0ougV8USSPDkSpXgvUP50ynLab5dT4/uRbXZL65HThF2M
cJgd5nnlt/wZ5B4SA/P0sJp5T5QeZ0GsuENK5fmVAgpQMsGnbwGERPqBsj2Ds+8/
qVhoyp3PD3uqpN+bN0TsoU+VV3PUD5kV3v2cTV7OPQdaPvEiOVMV3b8aTv89jxvV
h09M1EtcPwk3Mo5NiGmF
=zJLi
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-for-4.11' of git://github.com/hisilicon/linux-hisi into next/dt64
ARM64: DT: Hisilicon SoC DT updates for 4.11
- Add binding for Hi3660 SoC and HiKey960 Board
- Add binding for ARM Cortex-A73
- Add dts files for HiKey960 development board
* tag 'hisi-arm64-dt-for-4.11' of git://github.com/hisilicon/linux-hisi:
arm64: dts: Add dts files for Hisilicon Hi3660 SoC
dt-bindings: Add a support cpu type for cortex-a73
document: dt: add binding for Hi3660 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
- set mm_sel clock to 400 MHz to support 4K HDMI
- adjust power efficiency between the little and big cores
- add a node for thermal calibration via e-fuse data
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAliIjQgXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00PWjg//WVJsbVGXUcHGHmSOTNGjdAYR
FB5ybdXDMyPhXLrUoY6xN0aCidXPTgv9gbLW37EWBlpGy+LAQN5ssMZMuEZeYJyb
xR8yKrU+bcgQlwQrn3F35nJx7Eoh8T47dW2+C0ftzQxl0ZQirkmm9QnMg3/7xQ89
LpA+Opqq3GkHG2Q2HTgpRqPaI3LZ/aZuWBtqhjxl0lYi+E2liA1cbvzIIeA3Uz+9
rR+vlfQEG4CW9GnHDaLtg4Ad68YNlTQ7kU1070uwlpELwPAOV0SgxL1q0IBwj1WB
FaTnfx5wFya8FZIPrnI+Dk1X1fDdkLZ16Cq+b3hBixiwLOs0XuLTAj/zMOoDLFcE
vcyfRgFVbYo3ju+iQAZ49vt+OwDLjrCEGxO8XONT2bUN+3MW6EB0rKQC/uhO4vp7
kEdJowUElvmDfnFqaAaWg8mrXzL+h/8y6SW1JT4pxTJpfXem3RnAiNywwrExdN5a
9bj7WhJtA9t39wXkmdIAVQbIkGLwrks1TXaGoDPuuj21+Jzm+3uGZL4EyQU6TUA1
jC04/5eBRVaA7JmU+/iegGdgaoyNs9PMhrjCUct6U3F2qvkRggAPnF9Eyj8stei6
+kzRjhAup8exKHYUXTxROutngW7K93RpbMtsIDiiib4mKm3HueVMJEY5cJPW/yap
4MttR/dH/W5PjTjkEVo=
=hboI
-----END PGP SIGNATURE-----
Merge tag 'v4.10-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt64
For mt8173:
- set mm_sel clock to 400 MHz to support 4K HDMI
- adjust power efficiency between the little and big cores
- add a node for thermal calibration via e-fuse data
* tag 'v4.10-next-dts' of https://github.com/mbgg/linux-mediatek:
arm64: dts: mt8173: add node for thermal calibration
arm64: dts: mt8173: Fix cpu_thermal cooling-maps contributions
arm64: dts: mt8173: add mmsel clocks for 4K support
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add Vol+ support for DB820C and APQ8016
* Add HDMI audio support for APQ8016
* Fix DB820C GPIO pinctrl name
* Enable WCNSS on MSM8916
* Add SCM node for MSM8996
* Use fixed XO clock on MSM8916
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYhvUBAAoJEFKiBbHx2RXVqnQQAK4xkBNoswr+afRkqOrEWZlc
Ed1lotQ3gA202Q8iddMtmRgb2BjBRe9bH01mPA5MlB+/1TpmdT9dm6oNXN31DJbn
L//om+669nzgPg2NhQAGfxfE97VzUTIksuVw1piCXK3eLlQCbccwifxITONbo+5Q
7818h2sb306sMet0LI+UkjLzJeU1dL1F6EKusErZatWBWuKMz3bFs/Ch0KUC1GRR
e7AU8i9f+jy2BSQFSOZbYkeInWvhee5IIp6dZMW0nINnaoVXafchvQzfkbi6t+Os
qv2nQUMco4ZlU9KbTWcNZQ0SlyVWLE9h2Khc8QF3uy9G6RxU8nSy25Mwi57enz3B
O+ousFAd79yUYyLZXA7OijAB+joSinl1OX6iFnq1H5Dx+XDRBXxmt97l5O0GanZn
CZQmGcdKMbbgV1nboM4NjUn2Nwn07EpaAbPPgsTJJBR519UV/TG82RE7TDbrxeUx
ABaylDX6rtgA+TdOP/wqqhEmEZ0xYko2TJBk6VqNfPAj/QVDS0lFbAzIjfqIM8q0
XyLIM+snIldu7qFgFwikUumFI7xVVghlmVJ0zPZEwKkLRZs0MJyt7TFPwDYmktXG
SDqq/E58YXFn4sbThFwGV3Ayaun4MjDHMTT1Xn95r+7O1WvLt3hu0LqW6b3AvqRO
/vNnTwmv0bwxV4fN6qs/
=UglA
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Qualcomm ARM64 Updates for v4.11
* Add Vol+ support for DB820C and APQ8016
* Add HDMI audio support for APQ8016
* Fix DB820C GPIO pinctrl name
* Enable WCNSS on MSM8916
* Add SCM node for MSM8996
* Use fixed XO clock on MSM8916
* tag 'qcom-arm64-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: db820c: add support to volume up key
arm64: dts: apq8016-sbc: Limit MPP4 high state to 1.8V
arm64: dts: apq8016-sbc: Add Volume Up key device node
arm64: dts: apq8016-sbc: add support to hdmi audio via adv7533
arm64: dts: db820c: fix gpio pinctrl name correctly
ARM: dts: msm8916: Add and enable wcnss node
arm64: dts: msm8996: Add SCM DT node
arm64: dts: qcom: msm8916: Use fixed factor xo clock
Signed-off-by: Olof Johansson <olof@lixom.net>
usb clocks, grf phandles for the rk3399 CRUs, epd pinctrl settings,
a phandle to the rk3399 tsadc and converting boards to use the
recently introduced pin constants.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAliBUMUQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgeszCAC0VNLtUhe6ksHGJzvgP1diZLPghPsKticu
tmpxFVJrZTYFmxacvO3w2rXNvwtWsay812m+wmpbCYe2rpE1WwRYEhDIVbQ0hIuD
I7fiG6wKaGVEu+5XmVi+6tGouGKSZA0zBlcOja4kFeBPsyDDL0SISu1iopfD/o0z
u/2EfcBRQFLUotLKLY8t//I+RJ4IsDMQ4zh1AJ1NDfUVCqthE7sJzoa8eJuHaKjj
YPKdfJlUIZAXJiXuDrjrkkbUQT0GuYha0CtWE2nUn4clfrIWivvgJCXFfEnKtM9+
OguqMChemOXL7SanHGKqM4RHL6Qq0F3Y162UODDX2AC3QYxxv8XK
=i0J0
-----END PGP SIGNATURE-----
Merge tag 'v4.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
64bit dts changes with some adjustments to the pcie controller,
usb clocks, grf phandles for the rk3399 CRUs, epd pinctrl settings,
a phandle to the rk3399 tsadc and converting boards to use the
recently introduced pin constants.
* tag 'v4.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add rockchip,grf property for RK3399 PMUCRU/CRU
arm64: dts: rockchip: add aspm-no-l0s for rk3399
arm64: dts: rockchip: add max-link-speed for rk3399
arm64: dts: rockchip: use pin constants to describe gpios
arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399
arm64: dts: rockchip: add rk3399 eDP HPD pinctrl
arm64: dts: rockchip: add rk3399 thermal_zones phandle
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the pwm_ao_b pin to allow boards which have an LED connected
to GPIOAO_9 to use the leds-pwm driver (by activating the pwm_AO_ab node
and passing the pwm_ao_b_pin pinctrl-reference).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
All Meson GX SoCs (GXBB, GXL and GXM) have a PWM controller within the
AO domain. When one of the board's LEDs is connected to one of the AO
PWM pins then this can be used to dim that LED (when the leds-pwm driver
is used).
Add the pwm_AO_ab to allow such devices to use the leds-pwm driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic Meson GXBB/GXL/GXM secure monitor uses part of the memory space,
this patch adds these reserved zones.
Without such reserved memory zones, running the following stress command :
$ stress-ng --vm 16 --vm-bytes 128M --timeout 10s
multiple times:
Could lead to the following kernel crashes :
[ 46.937975] Bad mode in Error handler detected on CPU1, code 0xbf000000 -- SError
...
[ 47.058536] Internal error: Attempting to execute userspace memory: 8600000f [#3] PREEMPT SMP
...
Instead of the OOM killer.
Fixes: 4f24eda840 ("ARM64: dts: Prepare configs for Amlogic Meson GXBaby")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
[khilman: added Fixes tag, added _reserved and unit addresses]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
OdroidC2 GbE link breaks under heavy tx transfer. This happens even if the
MAC does not enable Energy Efficient Ethernet (No Low Power state Idle on
the Tx path). The problem seems to come from the phy Rx path, entering the
LPI state.
Disabling EEE advertisement on the phy prevent this feature to be
negociated with the link partner and solve the issue.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Testing with an Armada 8040 board shows that adding the generic-ahci
compatible to the CP110 AHCI nodes gets us working AHCI on the board.
A previous patch series posted by Thomas Petazzoni was retracted when
it was realised that the IP was supposed to be, and is, compatible
with the standard register layout.
Add this compatible.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.
Fixes: 8e8b9eaef8 ("arm64: dts: renesas: r8a7796: Add EthernetAVB instance")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.
Fixes: a92843c8a6 ("arm64: dts: r8a7795: add EthernetAVB device node")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current r8a7795.dtsi defines audma -> ipmmu -> dma order.
Because of this order, dma can connect to ipmmu, but
audma can't connect to it.
This patch moves audma order as ipmmu -> dma -> audma.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This went unnoticed as the sata_rcar driver doesn't support Runtime PM
yet, but manages module clocks manually.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Exynos5433 LPASS module requires some clocks for proper operation with
power domain.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
All dts files for the sunxi platform have been switched to the generic
pinconf bindings. As a result, the sunxi specific pinctrl macros are
no longer used.
Remove the #include entry with the following command:
sed -i -e '/pinctrl\/sun4i-a10.h/D' \
arch/arm64/boot/dts/allwinner/*.dts?
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add initial dtsi file to support Hisilicon Hi3660 SoC with
support of Octal core CPUs in two clusters(4 * A53 & 4 * A73).
Also add dts file to support HiKey960 development board which
based on Hi3660 SoC.
The output console is earlycon "earlycon=pl011,0xfdf05000".
And the con_init uart5 with a fixed clock, which already
configured at bootloader.
When clock is available, the uart5 will be modified.
Tested on HiKey960 Board.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
LDO7 regulator beside DSI and HDMI provides power for core blocks in Exynos
5433 SoC. Disabling it causes serious current leak - about 200mA.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Since the GXL family has S905X and S905D SoCs, we're keeping the SoC
name in the DTS filename for clarity. Rename this file accordingly to
be consistent with the rest of the GXL DTS files.
Cc: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Adds support for the WeTek Hub and Play2 boards.
The Hub is an extremely small IPTv Set-Top-Box and the Play2 is a more
traditionnal Satellite or Terrestrial and IPTv Set-Top-Box.
Both are based on the p200 Reference Design and out-of-tree support is
based on LibreELEC kernel at [1].
[1] https://github.com/wetek-enigma/linux-amlogic
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Ultra HD modes requires clock ticking at increased rate.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The LD11 SoC is equipped with SD-ctrl (0x59810000) as well as
MIO-ctrl (0x5b3e0000). The SD-ctrl block on this SoC has just
one register for controlling RST_n pin of the eMMC device.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
As per Exynos7 datasheet FSYS1 pinctrl block does not support drive
strength value of 0x3. This patch fixes this and update the correct
drive strength for sd0_xxx pin definitions.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Common definition for I2S, PMC, SPDIF buses should not define any pull
control for the individual pins. Correct this by changing samsung,pin-pud
property to EXYNOS_PIN_PULL_NONE like it is defined for other Exynos SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add a cut-down version of the DTS file for the community board
MACCHIATOBin from SolidRun based on Marvell Armada 8040 SoC to suit
the current mainlined Armada 8040 state.
This brings support for mainly SATA, SPI flash and UART. The USB
descriptions are included but are not tested in this form due to the
lack of mainline GPIO.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Acked-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
In order to keep consistency naming with the Nexbox A1 DTS file, remove the
S912 SoC name in the GXM DT files.
Suggested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
4.11, please pull the following changes:
- Jon adds Device Tree nodes for the GICv2m and PAXB/PAXC PCIe interfaces on
the Northstar 2 SoCs, he also enables PAXC on the Northstar 2 SVK reference
board. He also updates the reserved memory entry for the Nitro firmware,
required to get the on-chip NICs to work. Finally he adds support for the
BCM958712DxXMC reference board which is a subset of existing boards.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYfsSQAAoJEIfQlpxEBwcEGDUP+gLIXb7EJ7rzNOYskYuf5blU
Uidfec5wbdu8Tnm4KbqWxopKdfvg13tx6YTwVjmtVwNP06iG9g9ytC3XA/YTYbLw
Gs8S0QhMpPn9mJ94ix0+DUT8NwTFLxPS/veCqpQLG/usOkXkt8xR36DfA63C+qK/
s6G87AZklsjUtkJn06FtrtvdyxRDHsl7Tj/7U+J9/mGoWdmZDbtooMP6GXDMS34N
XDMU1L18Kr74R5YUyTotzu2D0y/CG1edSTGPpHbrVKnI8YGTkLHyL9V1anbGS7v0
z+E+K6Lbe4M0xBqDVH/fOejwOxg30qDc4t9SDjMV813txZChwyVhNswNH6Nnn+3I
zcN5bRs9fT71B7H2Q+zkqRDf0nLx6fJt3rvQ/iPHOHil3wgpa1yckHnAi11BE1gp
hBEZPZkMw4ZPjtPc+CUoE9vWRzdJtoGYlE6dOxzz4UbP9QYmU0ai7F7OhxsQ+lKM
LpVM7jAf+E4lRBsOSkKuV/3uDzLqwIKdEBqjYaSe83MIO1uC1XIgN2lHU4Q3BITx
nyYdiJymr2AwXjyi8W7nN9neAmDiNlfi7fPZvYy0crd8GWn3uoROBLR7NoL+alPo
eBjiKJe6WJen+0VQR67a17kZ7WCkqCR0QUrXZTl8yVdzDZWaPHLXcCR8dulYwvMT
zvT+oFf7yA+DB3bCykd5
=JBHv
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.11/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
This pull request contains Broadcom ARM64-based SoC Device Tree changes for
4.11, please pull the following changes:
- Jon adds Device Tree nodes for the GICv2m and PAXB/PAXC PCIe interfaces on
the Northstar 2 SoCs, he also enables PAXC on the Northstar 2 SVK reference
board. He also updates the reserved memory entry for the Nitro firmware,
required to get the on-chip NICs to work. Finally he adds support for the
BCM958712DxXMC reference board which is a subset of existing boards.
* tag 'arm-soc/for-4.11/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2: add support for XMC form factor
arm64: dts: NS2: reserve memory for Nitro firmware
arm64: dts: NS2: enable PAXC on NS2 SVK
arm64: dts: NS2: enable GICv2m for PAXB/PAXC interfaces
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Addition of Coresight support on Juno R1 and R2 variants
2. Addition of STM(System Trace Macrocell) support on all Juno variants
3. Removed incorrect nesting of dtsi files
4. Removed untested USB hub only available on initial Juno R0 motherboard
5. Added ETR SMMU power domain and dma-ranges property
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJYf3YFAAoJEABBurwxfuKYq2YP/3Yknoe0K+h6c0N7yyQVWsbd
5qbY3xcbQDh7JsDz2AuTeRJtgP4V6cUqe9LbNF4Z0myOmrNSLhPNLKxm9OCsbxty
bL7rSIXjL3dPCm4MENFw3yNzgIukZGTyFrtDMbYcqxXlSo5JMWEn/yztBeP1onmn
aFiy1FBRtkuAe5gVMAwIz1oK/0eCBqlKfa9SXq9dmCXKv5fuq51aMr5dlAq8Q5ja
RvxDaNvh8P4Vh/DVZrRBAmhA5uw3dovgAQiSIg56TermEk64UOGksv1pGE4ycMFU
TOQ5YuxqT2J7HLUy2TqwZhaNcblGlG98fpqLCMWC1r4GkO0KwGimnXTGSiZxJIMk
0/quwCO6PguHacCGV+PUV7HH3WriH0REjbKEuZ0louYBtjHj1rvZJLC0fO6Mt2i7
EDdVqiPwfAAbHo6zrK1Axz1Q7FTEYRcvaZV5QXmz9rLjUFMFtzHg7r+L21TAtxoq
Q9l589/vO5f8t9B6notXV1hgg0RRI+jGH8KeDO2lvNfpXgGC3BkwnWcJlv2AkhgG
+TrpOtkXbdsKee6G0mW/W1vtooDh/w7IKU7ncaPp+9Sq/uvkKYnDS9ubfAkgIjwT
turauXHIeFS6AID+Y+O2/q/hDve0eNXKFV6CheZHgDKEXAp+LCQm7Wtd8HYNuG3S
FBnUYKVEswLaFDUUv8Wk
=VeiR
-----END PGP SIGNATURE-----
Merge tag 'juno-updates-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64
ARMv8 Vexpress/Juno DT updates for v4.11
1. Addition of Coresight support on Juno R1 and R2 variants
2. Addition of STM(System Trace Macrocell) support on all Juno variants
3. Removed incorrect nesting of dtsi files
4. Removed untested USB hub only available on initial Juno R0 motherboard
5. Added ETR SMMU power domain and dma-ranges property
* tag 'juno-updates-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: remove motherboard USB node
arm64: dts: juno: add ETR SMMU power domain
arm64: dts: juno: add dma-ranges property
arm64: dts: juno: add missing CoreSight STM component
arm64: dts: juno: add CoreSight support for Juno r1/r2 variants
arm64: dts: juno: refactor CoreSight support on Juno r0
arm64: dts: juno: remove dtsi nesting inside tree structure
Signed-off-by: Olof Johansson <olof@lixom.net>
Add pinctrl nodes for HDMI HPD and DDC pins modes for Amlogic Meson GXL
and GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There is one blue LED on the front of the device. Keep it lit and
configure it as panic indicator.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds pinctrl group nodes for the CTS and RTS pins of each serial
controller. This makes it possible to enable the CTS and RTS pins which
are controlled by the serial controller hardware (through the meson_uart
driver).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the missing node for the uart_AO_B port to the meson-gx.dtsi
(as this is supported by GXBB, GXL and GXM) along with the required
pinctrl pins. This is required as some boards are using it (the boards
from the Khadas VIM series for example have it exposed on the pin
headers).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The "samsung,exynos5433-mipi-video-phy" and "samsung,exynos5250-dwusb3"
DT bindings don't specify a reg property for these nodes, so having a
unit name leads to the following DTC warnings:
Node /soc/video-phy@105c0710 has a unit name, but no reg property
Node /soc/usb@15400000 has a unit name, but no reg property
Node /soc/usb@15a00000 has a unit name, but no reg property
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The first batch of Juno boards included a discrete USB controller chip
as a contingency in case of issues with the USB 2.0 IP integrated into
the SoC. As it turned out, the latter was fine, and to the best of my
knowledge the motherboard USB was never even brought up and validated.
Since this also isn't present on later boards, and uses a compatible
string undocumented and unmatched by any driver in the kernel, let's
just tidy it away for ever to avoid any confusion.
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
It is not at all clear from the documentation, but straightforward to
determine in practice, that the ETR SMMU is actually in the DEBUGSYS
power domain. Add that to the DT so that anyone brave enough to enable
said SMMU doesn't experience a system lockup on boot, especially a
sneaky one which goes away as soon as you connect an external debugger
to have a look at where it's stuck (thus powering up DEBUGSYS by other
means and allowing it to make progress again before actually halting...)
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The interconnects around Juno have a 40-bit address width, and DMA
masters have no restrictions beyond their own individual limitations.
Describe this to ensure that DT-based DMA masks get set up correctly
for all devices capable of 40-bit addressing.
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
This patch adds the missing CoreSight STM component definition to the
device tree of all the juno variants(r0,r1,r2)
STM component is connected to different funnels depending on Juno
platform variant.
Reviewed-and-tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
[sudeep.holla@arm.com: minor changelog update and reorganising the STM
node back into juno-base.dtsi to avoid duplication]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The CoreSight support added for Juno is valid for only Juno r0.
The Juno r1 and r2 variants have additional components and alternative
connection routes between trace source and sinks.
This patch builds on top of the existing r0 support and extends it to
Juno r1/r2 variants.
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
[sudeep.holla@arm.com: minor changelog update and major reorganisation of
the common coresight components back into juno-base.dtsi to avoid
duplication, also renamed funnel node names]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Currently the Coresight components are supported only on Juno r0
variant. In preparation to add support to Juno r1/r2 variants, this
patch refactors the existing coresight device nodes so that r1/r2
support can be added easily.
It also cleans up some of the device node names which were previously
named so as they were confused as the labels rather than the node names.
Reviewed-and-tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Currently juno-clock.dtsi and juno-base.dtsi are nested badly inside
the device tree structure. It's generally good practice to ensure that
individual dtsi stand by themselves at the top of the file.
This patch removes the nesting of the above mentioned dtsi files and
makes them independent.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The current hardware is not able to run with all cores enabled at a
cluster frequency superior at 1536MHz.
But the currently shipped u-boot for the platform still reports an OPP
table with possible DVFS frequency up to 2GHz, and will not change since
the off-tree linux tree supports limiting the OPPs with a kernel parameter.
A recent u-boot change reports the boot-time DVFS around 100MHz and
the default performance cpufreq governor sets the maximum frequency.
Previous version of u-boot reported to be already at the max OPP and
left the OPP as is.
Nevertheless, other governors like ondemand could setup the max frequency
and make the system crash.
This patch disables the DVFS clock and disables cpufreq.
Fixes: 70db166a2b ("ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Correct license text which was mangled when switching to dual license
- Add SPI and I2C nodes on Armada 3700(driver support had been already
merged)
- Add support for the ethernet switch on the EspressoBin board (driver
support not yet merged)
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWHkJzyMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71S01AKCYMJtp3ZYd
nWFez/9S2sUDbmEQRwCgiwEJ4cDIz68s5+EXJE4nXAKlhrg=
=HIbH
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.11-1' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu dt64 for 4.11 (part 1)
- Correct license text which was mangled when switching to dual license
- Add SPI and I2C nodes on Armada 3700(driver support had been already
merged)
- Add support for the ethernet switch on the EspressoBin board (driver
support not yet merged)
* tag 'mvebu-dt64-4.11-1' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: Correct license text
arm64: dts: marvell: Add I2C definitions for the Armada 3700
arm64: dts: marvell: Enable spi0 on the board Armada-3720-db
arm64: dts: marvell: Add definition of SPI controller for Armada 3700
arm64: dts: marvell: Add ethernet switch definition for the ESPRESSObin
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add bus frequency and voltage scalling on Exynos5433 TM2 device (along with
necessary bus nodes and Platform Performance Monitoring Unit on Exynos5433).
2. Use macros for pinctrl settings on Exynos5433.
This contains necessary header with bindings.
3. Minor cleanups in Exynos5433 DTSI and boards using it.
4. Create common DTSI betweem Exynos5433 TM2E and TM2E.
5. Add HDMI/TV to Exynos5433 TM2.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYeO01AAoJEME3ZuaGi4PXX7QP/0wlZmoUeBiAGuVDsOUqS5jT
FQd+lC4r1croSn8oFMKx6Ta8LxwI8XjmuCOvRjBxBtNxzq4wTCABlVOexWjAHCMz
KhYWcTBGIj+8Nk6BkBg8ga5iQAqQY6JhKKRBg0xbe8XqlkMThapJ3C90A4oWTeqm
D9SERXJzeJiBr2dqVORxt3d/XtLXXKEw+3/qK9iOu4uAZE7NECUD1EIOM6gGXkLM
55hOw7Qzh7g4L9umqVCj37gNK5nu4HLvvVA0FasMi6CL+EuHs5im9NOP3naN152f
/W4xPRS6hVYzvueWHILBmaxNbwYMthJ34gXIdMg4td/nO/nVRMCplnsjbm+1rQDQ
UoasRanobu+s+5nzRGybkM5Ni8QHZ/CsXK8DtSSlPC3tPMs5GywGIEfXqHqJzabs
WlmhD68LWFzh2Og8X2KzB+5Pkmvp3HuUVLqPtsPpjnHQOFDrbWTjH3tCSpF/oCZV
eWBrWoYZq4ZvzmiHWPrUsOuw0E1qpGg+QY169+/X8+4NBDglCGVN+d6Z83fb1qEA
Kcej1kdCvg47xg4l9x+OamlVBkspnG/n/uDX4zkv5Vo0VOmU6kfpA2/zI9UW2UMB
4rmol7Zw+MW8e5o49dgO9q1bEO2EqJj/7tVTVlhAYy8IS8G8i/FUK5zd2FKoqpzj
z1hky4Wc1Lof9sIiQfKY
=reZn
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Samsung DeviceTree ARM64 update for v4.11:
1. Add bus frequency and voltage scalling on Exynos5433 TM2 device (along with
necessary bus nodes and Platform Performance Monitoring Unit on Exynos5433).
2. Use macros for pinctrl settings on Exynos5433.
This contains necessary header with bindings.
3. Minor cleanups in Exynos5433 DTSI and boards using it.
4. Create common DTSI betweem Exynos5433 TM2E and TM2E.
5. Add HDMI/TV to Exynos5433 TM2.
* tag 'samsung-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Enable HDMI/TV path on Exynos5433-TM2
arm64: dts: exynos: Add HDMI node to Exynos5433
arm64: dts: exynos: Add DECON_TV node to Exynos5433
arm64: dts: exynos: Fix addresses in node names on Exynos5433
arm64: dts: exynos: Make TM2 and TM2E independent from each other
arm64: dts: exynos: Fix wrong values for ldo23 and ldo25 on TM2/TM2E
arm64: dts: exynos: Remove unsupported regulator-always-off property from TM2E
arm64: dts: exynos: Comply to the samsung pinctrl naming convention in TM2
arm64: dts: exynos: Use macros for pinctrl configuration on Exynos5433
pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
arm64: dts: exynos: Add support of bus frequency using VDD_INT on Exynos5433 TM2
arm64: dts: exynos: Add bus nodes using VDD_INT for Exynos5433
arm64: dts: exynos: Add PPMU node to Exynos5433
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds support to volume-up key found on the board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
96Boards specs require all GPIO signals to be at 1.8V.
Limit MPP4, which is PIN28 on J8, to 1.8V(L5).
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
VOL/ZOOM+ button on DB410c is connected to
SoC GPIO 104. Add support for it.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to hdmi audio via adv7533.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Fix typo in node name to reflect the correct pin name.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the wcnss remoteproc node the SMD edge and the wcnss ctrl, bluetooth
and wifi nodes specified and enable this on db410c.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The rpmcc driver is providing the XO clock, which is the parent of almost
all clocks. But during boot, this driver may probe later and leave most of
the clocks without parent. The common clock framework currently reports
invalid rate for orphan clocks and this may confuse drivers.
To resolve this, use fixed clocks registration until we have some support
to deal with the this issue. Removing the generic rpmcc compatible is
enough to switch back to fixed factor XO clock.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The structure rockchip_clk_provider needs to refer the GRF regmap
in somewhere, if the CRU node has not "rockchip,grf" property,
calling syscon_regmap_lookup_by_phandle will return an invalid GRF
regmap, and the MUXGRF type clock will be not supported.
Therefore, we need to add them.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
According to [0], the contribution field for each cooling-device express
their relative power efficiency. Higher weights express higher power
efficiency. Weighting is relative such that if each cooling device has a
weight of 1 they are considered equal. This is particularly useful in
heterogeneous systems where two cooling devices may perform the same kind
of compute, but with different efficiency.
[0] Documentation/thermal/power_allocator.txt
According to Mediatek IC designer, the power efficiency ratio between the
LITTLE core cluster (cooling-device cpu0) and big core cluster
(cooling-device cpu1) is around 3:1 (3072:1024).
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
To support HDMI 4K resolution, mmsys need clcok
mm_sel to be 400MHz.
The board .dts file should override the clock rate
property with the higher VENCPLL frequency the board
supports HDMI 4K resolution.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Per the discussion of bug fix[1], we now actually
leaves the default clock choice for pcie phy is
derived from 24MHz OSC to guarantee the least BER.
So let's add aspm-no-l0s here and folks could delete
this property from their dts.
[1] https://patchwork.kernel.org/patch/9470519/
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
HDMI converts RGB/I80 signal from DECON_TV to HDMI/TMDS video stream.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
DECON_TV is 2nd display controller on Exynos5433, used in HDMI path
or 2nd DSI path.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This adds the SCPI DVFS clock index and configures the CPU cores
accordingly.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
SCPI and SRAM are identical on GXBB and GXL. Moving the corresponding
nodes to meson-gx adds support for the thermal sensor on GXL based
devices.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: add scpi_clocks label]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Address should not contain 0x prefix.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* Add PWM, and sound MIX and CTU support to r8a7795 SoC
* Add CAN, CAN FD and all MSIOF nodes to r8a7796 SoC
* Use Gen 3 fallback binding for i2c, msiof, PCIE and USB2 phy
* Enable Ethernet and 4 GiB memory on r8a7796/salvator-x board
* Add r8a7796/salvator-x board part number to bindings
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYb3m2AAoJENfPZGlqN0++FXwP/RKem2QbPujn+OQLPZefMjnc
5ps9d/u739h8o26tYLm1nwWLi3Zajt6XPh3kbv1TQE9y6mI0ySGx2GOLvNKOySNs
Xqinkcjsz1WNujH7ICtAAmdEfoQCAU2vgxrcYMc5w9oeGPEdT/+xGMf7NCPXNgR5
S0qjK5Zc+XZ1lI3nMBS8EJX7D5jBV/X6dy8zyZbNnjfw1QUDNp1c0nBdx5FRMRmj
kUKO8LWo7/zhilLBBWhuNhmILTRa7iUULNr9O9sdq4BmobW7SwSOEJSGTEpvj3hH
6d/WL8b6mOhFUyO4CeAIajOqxhJj+w+7Xcppxwb9Khzi/FJLx71nJ4e0rkIXJrYG
HIqA6et+IWVtoyy0eP85qvKP12gqsoaTcuGGjcm158+UcYVFGE7pnK67IQzPqqkW
iy21gw3owmmuNdJbvNP+vjJKWR2gRCZpy3BAM/4jB8P1V3zqvlhCekMzE7mTF1Uk
V/pI8V0RnKbcE2SGZHOdJvnj1GLPkaBKBMFbkod9++20D21y7UQ19B4Mzq44aSDu
Aul0Igm60Hi+ncsbRWdNjOmChWQoBZzNBtU3UfO7mWjli2JgVzhzH0xK4gI06bGN
coLOBKBkC2z4oQv7eW2nCHX0Qp06f6USwcRQPazWnVPb0g8bNcwwB6iaahDm9zrY
7btgbO+iJv8HxFyOQIrI
=s00S
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64
Renesas ARM64 Based SoC DT Updates for v4.11
* Add PWM, and sound MIX and CTU support to r8a7795 SoC
* Add CAN, CAN FD and all MSIOF nodes to r8a7796 SoC
* Use Gen 3 fallback binding for i2c, msiof, PCIE and USB2 phy
* Enable Ethernet and 4 GiB memory on r8a7796/salvator-x board
* Add r8a7796/salvator-x board part number to bindings
* tag 'renesas-arm64-dt-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7795: Add PWM support
arm64: dts: r8a7796: Use R-Car Gen 3 fallback binding for msiof nodes
arm64: dts: r8a7796: salvator-x: Enable EthernetAVB
arm64: dts: renesas: r8a7796: Add EthernetAVB instance
arm64: dts: r8a7796: salvator-x: Update memory node to 4 GiB map
arm64: dts: r8a7796: Use R-Car Gen 3 fallback binding for i2c nodes
arm64: dts: r8a7795: Use R-Car Gen 3 fallback binding for i2c nodes
arm64: dts: r8a7795: Use Gen 3 fallback compat string for PCIE
arm64: dts: r8a7795: add sound MIX support
arm64: dts: r8a7795: add sound CTU support
arm64: dts: r8a7795: Use renesas,rcar-gen3-usb2-phy fallback binding
arm64: renesas: r8a7796/salvator-x: Add board part number to DT bindings
arm64: dts: r8a7796: Add CAN FD support
arm64: dts: r8a7796: Add CAN support
arm64: dts: r8a7796: Add CAN external clock support
arm64: dts: r8a7796: Add all MSIOF nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Tree-wide replacement was done by commit 2ef7d5f342 ("ARM, ARM64:
dts: drop "arm,amba-bus" in favor of "simple-bus"), then the 2nd
round by commit 15b7cc78f0 ("arm64: dts: drop "arm,amba-bus" in
favor of "simple-bus" part 2").
Here, some new users have appeared for Linux v4.10-rc1. Eliminate
them now.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
LS1012A features an advanced 64-bit ARM v8 CortexA53 processor
with 32 KB of parity protected L1-I cache, 32 KB of ECC protected
L1-D cache, as well as 256 KB of ECC protected L2 cache.
Features summary
One 64-bit ARM-v8 Cortex-A53 core with the following capabilities
- Arranged as a cluster of one core supporting a 256 KB L2 cache with ECC
protection
- Speed up to 800 MHz
- Parity-protected 32 KB L1 instruction cache and 32 KB L1 data cache
- Neon SIMD engine
- ARM v8 cryptography extensions
One 16-bit DDR3L SDRAM memory controller
ARM core-link CCI-400 cache coherent interconnect
Cryptography acceleration (SEC)
One Configurable x3 SerDes
One PCI Express Gen2 controller, supporting x1 operation
One serial ATA (SATA Gen 3.0) controller
One USB 3.0/2.0 controller with integrated PHY
Following levels of DTSI/DTS files have been created for the LS1012A
SoC family:
- fsl-ls1012a.dtsi:
DTS-Include file for FSL LS1012A SoC.
- fsl-ls1012a-frdm.dts:
DTS file for FSL LS1012A FRDM board.
- fsl-ls1012a-qds.dts:
DTS file for FSL LS1012A QDS board.
- fsl-ls1012a-rdb.dts:
DTS file for FSL LS1012A RDB board.
Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently TM2E dts includes TM2 but there are some differences
between the two boards and TM2 has some properties that TM2E
doesn't have.
That's why it's important to keep the two dts files independent
and put all the commonalities in a tm2-common.dtsi file.
At the current status the only two differences between the two
dts files (besides the board name) are ldo31 and ldo38.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch fixes wrong values assigned to ldo23 and ldo25 on both TM2 and TM2E.
Fixes: 01e5d23521 ("arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board")
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Per the errata of TRM, rk3399 won't support gen2 from
now on, so let's set max-link-speed to 1 in order not
to doing training for gen2.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change the PIN() macro definition so that it can use the macros
from pinctrl/samsung.h header file.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Use the macros defined in include/dt-bindings/pinctrl/samsung.h
instead of hardcoded values.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
A64 has a MUSB controller wired to the USB PHY 0, which is connected
to the upper USB Type-A port of Pine64.
As the port is a Type-A female port, enable it in host-only mode in the
device tree, which makes devices with USB Type-A male port can work on
this port (which is originally designed by Pine64 team).
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Allwinner A64 SoC has a MUSB controller like the one in A33, so add
a node for it, just use the compatible of A33 MUSB.
Host mode is tested to work properly on Pine64 and will be added into
the device tree of Pine64 in next patch.
Peripheral mode is also tested on Pine64, by changing dr_mode property
of usb_otg node and use a non-standard USB Type-A to Type-A cable.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Pine64 have two USB Type-A ports, which are wired to the two ports of
A64 USB PHY, and the lower port is the EHCI/OHCI1 port.
Enable the necessary nodes to enable the lower USB port to work.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In this dts file, uart0 node is put before i2c1.
Move the uart0 node to the end to satisfy alphebetical order.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Allwinner A64 have two HCI USB controllers, a OTG controller and a USB
PHY device which have two ports. One of the port is wired to both a HCI
USB controller and the OTG controller, which is currently not supported.
The another one is only wired to a HCI controller, and the device node of
OHCI/EHCI controller of the port can be added now.
Also the A64 USB PHY device node is also added for the HCI controllers to
work.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
- DT: GXL: fix GPIO include
- add DT and defconfig for newly merged DRM driver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJYbIZJAAoJEFk3GJrT+8ZlDb0P/1nnnbnxYP2IQzI+XggSLACq
DznCawJmzJaYtvq8LM/BqfIoQW2x32VG5G1a1FYbbv4hySOa5Q5hFwN4/eUSQJq8
nT5fFCwRFl4G2u6fdlBiNUxmN+iguCbY8uAYfVQcsWJ8CUtHjdZnpvopXM8nB0/x
tbOh8rhN042q5SMq74STeBR+YeJyVN9osa8lChL3rVqTuvEHYDScUgDjx2grXzVw
K9rqoEKL/qMN7HWpa/O2hEEvO0sR5UXbB5KIa3j47Vxf7dVRRvPE8fU4mAqqRgxo
NSpceF1YmB90AG+7x8z8ndxJXHbP4DwcJwvwSD+bvuKEBsbfCHuPqQE5lzFSM+Kn
j21NEH7x8tKmKWeoCX2o+mHjn4B3y4SpDnot8CQ/l9nqQxrgxF7u05PckBauprGL
7K/txdS1xYAJ42pBymtgwXzZajaHfLu1i5PA+Fuq80g8VBCgTopv+syAZfSwU/xn
vF8bASfwQYYnVfF05z2K7chyHJiVLdCnIrRQzaHb7QcCMYnhTm9YrVyQ5UXsOaIz
WI2u5ptZUFYs2HGLm3M78IZtN9Ash3XAnrPAR+0R2DF2tyE2686scn/uakcFhVJt
oojrtkmHUbQih48yzI41EtLlviJ41hzykMknzqVfUs4eQayYBayGNAUefFBOwFZb
4JgW2I/SwficH0zKHK/Y
=7ngo
-----END PGP SIGNATURE-----
Merge tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into fixes
Pull "Amlogic fixes for v4.10" from Kevin Hilman:
- DT: GXL: fix GPIO include
- add DT and defconfig for newly merged DRM driver
This pull has one real fix, as a couple non-critical ones. The DRM
DT/defconfig patches are coming now because I didn't expect the new
driver to make it for the v4.10 merge window, but since it did[1], the
DT and defconfig should go into the same release.
[1] bbbe775ec5 drm: Add support for Amlogic Meson Graphic Controller
* tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: defconfig: enable DRM_MESON as module
ARM64: dts: meson-gx: Add Graphic Controller nodes
ARM64: dts: meson-gxl: fix GPIO include
A simple fix to extend GICv2 CPU interface registers from 4K to 8K
on AEMv8 FVP/RTSM models in order to support split priority drop and
interrupt deactivation.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJYZn50AAoJEABBurwxfuKYlUYQAJ4qNonGGnzErQE7bdYS2M+A
fB2R14lhDmCx9HZ7K3ld00x1gaKMJsh1uEU+WXpAt+AFEtJWEaEvWrxcBAY7fQRU
HWs/127+AQgpvKEgVMyOCoc+jj80HipoRMCCzfTZYpbI3LxfvQ7OwV47JpnKmo92
KO/4KZRvODBkupEkMF27ZtrScipLvHsgaYo2H2M2V/AatZ2e1XwGa6r0dxSqauuR
ZEc0C6i3ln8HGOikPwaf5o11MA+m4GHKPQJ55tRjjvn0dIxrh4rshvt+Fiu4h/eX
ImYAtsJS0PhZhRoqamWcfpzKhHQyQF6K05lX2AGBpKEuYjURqSppnndi43oGPIXw
WMe2uS6Ay6Xs9X/viBEJY5B4Cs6STVBVKERJGglHktHn2RGlzLS47XINH/yvOjiv
cbMqTe/PMYgh13QwpQjcuVkgDqhG2LlxueHaptEmJAW0X+juJQVgvSdmb359pn3O
sq+4omo3Z7KnHjBAwDOHVOB9fqTMLNJ/E9MIqEjZ1JrbMmI6C+JUxHBYJ9+Rm9jc
iSkgW1B9I/0lr5kNFLdsvvi9o5yPouZZvOB7DQoj8wnY0NqvmEVNLSRiCsuU4BkT
SFIxo+BK+jLrlAf6imB7jPpl8pM3KL0/BpsvBFRdq7iI7KNUxlPneQNKXYQO1sii
Gh1HgcgTCylRbPqYXhDD
=BoKJ
-----END PGP SIGNATURE-----
Merge tag 'juno-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into fixes
Pull "ARMv8 Juno/VExpress fixes for v4.10" from Sudeep Holla:
A simple fix to extend GICv2 CPU interface registers from 4K to 8K
on AEMv8 FVP/RTSM models in order to support split priority drop and
interrupt deactivation.
* tag 'juno-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: vexpress: Support GICC_DIR operations
* Provide sd0_uhs node
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYTl4ZAAoJENfPZGlqN0++vTQP/0hIiDC3Jeb7bkpAX+ZuzHq6
XG/TK5cHaho7Xep/eitlc8gxmO8kL/j5UJIExb0WoBW31QmPhymZnrBiKGHand3Q
OjpmVhK9FeWXcQs4QvL9Lp82Z7qWMaTMhaYDucpd2b4P4GUfpAd3zccsbvqP156k
tG71mYAPIRmXFZgJ+ih57ytwNklSlEm4/84/7oklmNU4Pi0EMyC2eB9DJInMUeyq
QH+8KEx5TBaimHBeGvgYnihIyk3WwoB1ULrZlaOQ/FfjnnK7TZdWhWt4gZUys7qi
GCmbhWR6qoovKxEg9j3cBO1wgWg6AXLrNxs/F1IUBDRViVUFzxJS/14/eW5SfRG3
b7VWm0xpC8RkOaA8yHD4nkpuqXlROVHr0EUkZ9ny6QflEDL8/Pg2SUJCZr7xCFUN
vVyWM1Do/R1ogSmR+Z1RO8omgJEoztFnzNc7d4q9fRAB4o8512oJ1xJFHpv6y3XW
wYRA/SiksEFoYnDXcSkBd2ZMZTiKNvhPWv3yPbP6nJxOpEF6/OWS7VBpGRisLjVk
EksoLn+WliC+1nRrc/S0Nf1YmY8tc62Pg1FwwniS8uTYQFrPNEbc/V/mNU2Sfv/y
ZPnhv6Km33q9xwB0Q94vHLIXMXuaaM90XCT9fSemIoUiDj8lcjE+WYQLxn6WG8ii
a0JlaFlvVkfqYqQFC/cX
=XZkS
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes-for-v4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Renesas ARM Based SoC Fixes for v4.10
* Provide sd0_uhs node
* tag 'renesas-fixes-for-v4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: h3ulcb: Provide sd0_uhs node
Add the 7 PWM channels to the r8a7795 device tree, in the disabled
state.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The BCM958712DxXMC board is a smaller form factor typically used as
controller boards for switches. This smaller board has less devices
pinned out, so only a few need be populated in the device tree.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Nitro firmware is loaded into memory by the bootloader at a specific
location. Set this memory range aside to prevent the kernel from using
it.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This enables the PAXC based PCIe root complex on NS2 SVK. The PAXC based
root complex is connected to internally emulated PCIe endpoints
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
PAXB and PAXC PCIe interfaces on NS2 have been using the iProc event
queue to handle MSI. With the gicv2m support ready, we should now switch
to gicv2m for MSI handling
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add Video Processing Unit and CVBS Output nodes, and enable CVBS on selected
boards.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The license text has been mangled at some point then copy pasted across
multiple files. Restore it to what it should be.
Note that this is not intended as a license change.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 3700 has two i2c bus interface units, this commit adds the
definitions of the corresponding device nodes. It also enables the node
on the development board for this SoC.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit enables the device node spi0 on the official development
board for the Marvell Armada 3700. It also adds sub-node for the 128Mb
SPI-NOR present on the board.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Armada 3700 SoC has an SPI Controller, this commit adds the definition
of the SPI device node at the SoC level.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This defines and enables the Marvell ethernet switch MVE886341 on the
Marvell ESPRESSObin board.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Use recently added R-Car Gen 3 fallback binding for msiof nodes in
DT for r8a7796 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7796 and the
fallback binding for R-Car Gen 3.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
This patch updates memory region:
- After changes, the new map of the Salvator-X board on R8A7796 SoC
Bank0: 2GiB RAM : 0x000048000000 -> 0x000bfffffff
Bank1: 2GiB RAM : 0x000600000000 -> 0x0067fffffff
- Before changes, the old map looked like this:
Bank0: 2GiB RAM : 0x000048000000 -> 0x000bfffffff
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Correct size of old map]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use recently added R-Car Gen 3 fallback binding for i2c nodes in
DT for r8a7796 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7796 and the
fallback binding for R-Car Gen 3.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use recently added R-Car Gen 3 fallback binding for i2c nodes in
DT for r8a7795 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7795 and the
fallback binding for R-Car Gen 3.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use recently added en 3 fallback compat string for PCIE
in r8a7795 DT.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
This patch adds CTU (= Channel Transfer Unit) support which is needed
to sound mixing.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
A fallback binding for the Renesas R-Car Gen3 for USB2.0 PHY driver was
added by commit cde7bc367f ("phy: rcar-gen3-usb2: add fallback binding").
This patch makes use of this binding in the DT for the r8a7795 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Adds CAN FD controller node for r8a7796.
Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds CAN controller nodes for r8a7796.
Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds external CAN clock node for r8a7796. This clock can be used as
fCAN clock of CAN and CAN FD controller.
Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the device nodes for all MSIOF SPI controllers.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds the CPU clock phandle in CPU's node
and uses operating-points-v2 to register operating points.
So it can be used by cpufreq-dt driver.
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
pca9547 won't probed since its status property is disabled.
while there are devices connected to it, we need remove status
property to let ds3232 and adt7461 probed correctly.
Signed-off-by: Meng Yi <meng.yi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the bus Device-tree nodes for INT (Internal) block
and enables the bus frequency scaling.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds the AMBA AXI bus nodes using VDD_INT for Exynos5433 SoC.
Following list specify the detailed correlation between sub-block and clock:
- CLK_ACLK_G2D_{400|266} : Bus clock for G2D (2D graphic engine)
- CLK_ACLK_MSCL_400 : Bus clock for MSCL (Memory to memory Scaler)
- CLK_ACLK_GSCL_333 : Bus clock for GSCL (General Scaler)
- CLK_SCLK_JPEG_MSCL : Bus clock for JPEG
- CLK_ACLK_MFC_400 : Bus clock for MFC (Multi Format Codec)
- CLK_ACLK_HEVC_400 : Bus clock for HEVC (High Efficient Video Codec)
- CLK_ACLK_BUS0_400 : NoC's (Network On Chip) bus clock for PERIC/PERIS/FSYS/MSCL
- CLK_ACLK_BUS1_400 : NoC's bus clock for MFC/HEVC/G3D
- CLK_ACLK_BUS2_400 : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
to measure the utilization of each IP in Exynos SoC.
- PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
block with VDD_MIF power source.
- PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
block with VDD_INT power source.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Use macros to describe gpios will make the dts easier to
read and write.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
[converted interrupt-gpios and new rk3399-evb backlight]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We found that the suspend process was blocked when it run into
ehci/ohci module due to clk-480m of usb2-phy was disabled.
The root cause is that usb2-phy suspended earlier than ehci/ohci
(usb2-phy will be auto suspended if no devices plug-in). and the
clk-480m provided by it was disabled if no module used. However,
some suspend process related ehci/ohci are base on this clock,
so we should refer it into ehci/ohci driver to prevent this case.
The u2phy clock flow like this:
===
u2phy ________________
| | |-----> UTMI_CLK ---------> | EHCI |
OSC_24M ---|---> PHY_PLL----|----|
|________^_______| |-----> 480M_CLK ---|G|---> | USBPHY_480M_SRC| ----> USBPHY_480M for SoC
|
|
GRF
===
Signed-off-by: William wu <wulf@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We haven't enabled eDP support yet, but we might as well describe the
pin now.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We're going to need to amend this table in board files.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core
which fixes some silicon bugs that needed software workarounds
in Version 1.0 that was used on Zynq systems.
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Sören Brinkmann <soren.brinkmann@xilinx.com>
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The patch removes these warnings reported by dtc 1.4:
Warning (unit_address_vs_reg): Node /amba_apu has a reg or ranges
property, but no unit name
Warning (unit_address_vs_reg): Node /memory has a reg or ranges
property, but no unit name
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The GICv2 CPU interface registers span across 8K, not 4K as indicated in
the DT. Only the GICC_DIR register is located after the initial 4K
boundary, leaving a functional system but without support for separately
EOI'ing and deactivating interrupts.
After this change the system supports split priority drop and interrupt
deactivation. This patch is based on similar one from Christoffer Dall:
commit 368400e242 ("ARM: dts: vexpress: Support GICC_DIR operations")
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
This patch adds required memory carveouts so that the kernel does not
access memory that is in use or has been reserved for use by other remote
processors.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJYUnMLAAoJEAhfPr2O5OEV+qMP/3Bg+j/rF7v//uIoPwAxPZeV
DGffdrBGViZsurYtVYBNTzD6HXHNakfeZvVS8bDZYKHNQ9L/5ezUctgVuoVa98vZ
crQg9NspSwSMQkiruRto3ueZhMaDSaax/nRtLo6MIA5rL9n1z1hqgCq2/WbIilJf
etpWnEdhYZQZ7OMOgbum1nfYbcvHhw9ZlJAbPBjZyaaVxNOOtePbSU3jV0PLmMc0
d8KSvHcCMZYGx6PA0aNj8TZ2kdkTCcuL83Ub8VzaBXMdxfORsFTM5CQfZGVmTGhD
aDCVBFo3mfyCQaarE4T0LQvb9vw91Qud6VJrAlg6k5dptGSRuryS9uyKjPjQ88ae
98uiOQP8Pr8n1C0luNtaZzzm9D8BTcROvQne1HUo2hpOHu1AWsYPoUqPSdnU77Ms
B7zlfvAfmRj/tGDK49ItEjRGGjV7V2uLGWzDdd2QqWPId9Qwk7NQmD0jGCipzICi
ioxjagnL96JkNSuZUhMiuVPZkVMITREM24BGe8+1sjJY80dnSjZfYv1eo7jchD1v
cclN8BC+gQYGmsVEOZY1oH69rITvAa8ksX231CvWEIetStrFqUqqM5NuQIyMdKGH
hn6MyfZNm+XeEvpBmYLGDy50pyox2N149o1DXxV5AOsmzoxFUVCfMU96J3MPooW/
qLl/FLatHI1bQ2RW6bUV
=ADpU
-----END PGP SIGNATURE-----
Merge tag 'media/v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media updates from Mauro Carvalho Chehab:
- new Mediatek drivers: mtk-mdp and mtk-vcodec
- some additions at the media documentation
- the CEC core and drivers were promoted from staging to mainstream
- some cleanups at the DVB core
- the LIRC serial driver got promoted from staging to mainstream
- added a driver for Renesas R-Car FDP1 driver
- add DVBv5 statistics support to mn88473 driver
- several fixes related to printk continuation lines
- add support for HSV encoding formats
- lots of other cleanups, fixups and driver improvements.
* tag 'media/v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (496 commits)
[media] v4l: tvp5150: Add missing break in set control handler
[media] v4l: tvp5150: Don't inline the tvp5150_selmux() function
[media] v4l: tvp5150: Compile tvp5150_link_setup out if !CONFIG_MEDIA_CONTROLLER
[media] em28xx: don't store usb_device at struct em28xx
[media] em28xx: use usb_interface for dev_foo() calls
[media] em28xx: don't change the device's name
[media] mn88472: fix chip id check on probe
[media] mn88473: fix chip id check on probe
[media] lirc: fix error paths in lirc_cdev_add()
[media] s5p-mfc: Add support for MFC v8 available in Exynos 5433 SoCs
[media] s5p-mfc: Rework clock handling
[media] s5p-mfc: Don't keep clock prepared all the time
[media] s5p-mfc: Kill all IS_ERR_OR_NULL in clocks management code
[media] s5p-mfc: Remove dead conditional code
[media] s5p-mfc: Ensure that clock is disabled before turning power off
[media] s5p-mfc: Remove special clock rate management
[media] s5p-mfc: Use printk_ratelimited for reporting ioctl errors
[media] s5p-mfc: Set DMA_ATTR_ALLOC_SINGLE_PAGES
[media] vivid: Set color_enc on HSV formats
[media] v4l2-tpg: Init hv_enc field with a valid value
...
A couple of interesting new SoC platforms are now supported, these are
the respective DTS sources:
- Samsung Exynos5433 mobile phone platform, including an (almost) fully
supported phone reference board.
- Hisilicon Hip07 server platform and D05 board, the latest iteration
of their product line, now with 64 Cortex-A72 cores across two
sockets.
- Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product
line, used in Android tablets and ultra-cheap development boards
- NXP LS1046A Communication processor, improving on the earlier LS1043A
with faster CPU cores
- Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810)
mobile phone SoCs
- Early support for the Nvidia Tegra Tegra186 SoC
- Amlogic S905D is a minor variant of their existing Android consumer
product line
- Rockchip PX5 automotive platform, a close relative of their popular
rk3368 Android tablet chips
Aside from the respective evaluation platforms for the above
chips, there are only a few consumer devices and boards added
this time:
- Huawei Nexus 6P (Angler) mobile phone
- LG Nexus 5x (Bullhead) mobile phone
- Nexbox A1 and A95X Android TV boxes
- Pine64 development board based on Allwinner A64
- Globalscale Marvell ESPRESSOBin community board based on Armada 3700
- Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive board
For the existing platforms, we get bug fixes and new peripheral support
for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom, Rockchip, Berlin,
and ZTE.
Conflicts:
- Documentation/devicetree/bindings/arm/shmobile.txt: a
rename/add conflict, keep both modifications and maintain
alphabetical ordering.
- arch/arm64/boot/dts/*/*.dtsi: nodes were added in netdev,
mmc and clk, keep both sides in each case.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWFMYq2CrR//JCVInAQJ38BAAzKC2AmZw2U5t8de1RuC7OOefHnWxzXaI
hpH5sLLIF10D52VrztqG2EauQWa2K0OYpkO5Up+d8WVdRm6dL2Y9wTMOhdadqWmb
zPthdGuSpI6yRiST51Umr1pvt5rm/0KYMAiP1B1ySIWCeOyxFmm9er6ZU3By6kbx
bbXEzY2vs22GJ3+rNxYOVGm1hlhgBaoYnkth2AIXwiGt5OUn4yDs/17+WqNZlg7S
Bj9vdvn+A/IeiaGZGRUn8J2HxUCeIxJzwntKJyoRfVu6BH+qlrPLhFh/N3Ttzb+3
Xjh+uQgikEp/2pkaq6oNJLATOXCAL8+UIAL+ZMJ1jiVI7Q1WBQITj14QgNgbkupX
1Bg25eS3I3HSmOg1tnUeEzF3N3hK8jlb9lA0HZm9m6RuegFsVIGHfte7xOdRbZki
dHAVy0xAoBPoXWnUfoekc1/L4AfsBh57GfbIBhf+xZs2eKp7Jw22eVwc9YsdDpc1
3s6aEbAsQWU7IgSWWEOJMi/q7Z6By7db3dIGLqtwszVvqzjkcszXQZSxjaOHlseK
j6Ci6yQ3UeG05QviySFyVsOxfHrL5SczYexsbkKE/kXfQZXR7x+GQzjm/BwYvEkO
Q+gHAbGBI5IM6hTBDLnHkn+WkXYk3EhyTcFykxs2ykJhWsOd9ReBuCTxr4Wey40U
Q80HYHv/leY=
=geT0
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Arnd Bergmann:
"A couple of interesting new SoC platforms are now supported, these are
the respective DTS sources:
- Samsung Exynos5433 mobile phone platform, including an (almost)
fully supported phone reference board.
- Hisilicon Hip07 server platform and D05 board, the latest iteration
of their product line, now with 64 Cortex-A72 cores across two
sockets.
- Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product
line, used in Android tablets and ultra-cheap development boards
- NXP LS1046A Communication processor, improving on the earlier
LS1043A with faster CPU cores
- Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810)
mobile phone SoCs
- Early support for the Nvidia Tegra Tegra186 SoC
- Amlogic S905D is a minor variant of their existing Android consumer
product line
- Rockchip PX5 automotive platform, a close relative of their popular
rk3368 Android tablet chips
Aside from the respective evaluation platforms for the above chips,
there are only a few consumer devices and boards added this time:
- Huawei Nexus 6P (Angler) mobile phone
- LG Nexus 5x (Bullhead) mobile phone
- Nexbox A1 and A95X Android TV boxes
- Pine64 development board based on Allwinner A64
- Globalscale Marvell ESPRESSOBin community board based on Armada 3700
- Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive board
For the existing platforms, we get bug fixes and new peripheral
support for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom,
Rockchip, Berlin, and ZTE"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (168 commits)
arm64: dts: fix build errors from missing dependencies
ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible
ARM64: dts: meson-gxl: Add support for Nexbox A95X
ARM64: dts: meson-gxm: Add support for the Nexbox A1
ARM: dts: artpec: add pcie support
arm64: dts: berlin4ct-dmp: add missing unit name to /memory node
arm64: dts: berlin4ct-stb: add missing unit name to /memory node
arm64: dts: berlin4ct: add missing unit name to /soc node
arm64: dts: qcom: msm8916: Add ddr support to sdhc1
arm64: dts: exynos: Enable HS400 mode for eMMC for TM2
ARM: dts: Add xo to sdhc clock node on qcom platforms
ARM64: dts: Add support for Meson GXM
dt-bindings: add rockchip RK1108 Evaluation board
arm64: dts: NS2: Add PCI PHYs
arm64: dts: NS2: enable sdio1
arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash
arm64: tegra: Add NVIDIA P2771 board support
arm64: tegra: Enable PSCI on P3310
arm64: tegra: Add NVIDIA P3310 processor module support
arm64: tegra: Add GPIO controllers on Tegra186
...
Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where things
come together.
We get a DT descriptions for a couple of new SoCs, all of them variants
of other chips we already support, and usually coming with a new
evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers
or industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on
Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it into
products and have served their purpose in the kernel as a template
for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree
Conflicts:
arch/arm/boot/dts/r8a*.dtsi: a node was added
the clk tree, keep both sides and watch out for git
dropping the required '};' at the end of each side.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWFMZHGCrR//JCVInAQKQ6A/+Og42qy1rhL3cfHiSsT7e5giQNVSFY7Cm
Z06R83AEv6HDMTNzyiJr5udRGOhm40qIoe92fhVJSRF7F6o/GbCQ7YOyU4KdQELg
caqRCe1Nq6RT0RYU0m6xVyv/ox0JTNEaB+TcvD1x4pgUQNo9sSBfiXpTzOKhLhqs
zmsfpNpj8v188Iofoju3WtwN26riJ7P4QdYIaNaH4qNQgoQbMbQICDwnpSsNJY+x
MSlNrbtYqfz6vc5fqa0mtfhF6wIFxuRnTgSLi9skWZ2l/fkn4ljF3RhN1Z86TYPv
CYsqDu+DF0YNxFrht3BAK6WTe2PdCnMNLNnMhYC6NDQ8YG1tbwvXQFM1KVanRvxx
hXP4Nt2sZYiqA4v8joFPgp9gnyBMdhtJEtWSmHwCY0RFObySJR4I1GY7igh02HUJ
gxlmOYcmklzLiyXvfjdDvg0sCV1tBhaBKTLYxF7lVCzG2QaR22Le+p3o+SWm+e+V
Ruc9l/iwHaeasNnbAkDEiEyi1FobtuEeTSZnKaXfKX8WuKVZLJrCEm7WiRIsj0Ww
vJ9ABVft7PEv/Ov3fbKBWON4vxKTBBgHuEDcbIsp19w4BSH1WJf5bGXIm7QeA3Z9
aD+DtA5W5ExIjMQR2+qgz/BBIzVVVVvG8DEcdcCtc3JGRJll5PadShLdqKjVIerc
SpsxqCKoRCI=
=wJt3
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where
things come together.
We get a DT descriptions for a couple of new SoCs, all of them
variants of other chips we already support, and usually coming with a
new evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers or
industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it
into products and have served their purpose in the kernel as a
template for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
arm: dts: zynq: Add MicroZed board support
ARM: dts: da850: enable high speed for mmc
ARM: dts: da850: Add node for pullup/pulldown pinconf
ARM: dts: da850: enable memctrl and mstpri nodes per board
ARM: dts: da850-lcdk: Add ethernet0 alias to DT
ARM: dts: artpec: add pcie support
ARM: dts: add support for Turris Omnia
devicetree: Add vendor prefix for CZ.NIC
ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
ARM: dts: berlin2q-marvell-dmp: fix regulators' name
ARM: dts: Add xo to sdhc clock node on qcom platforms
ARM: dts: r8a7794: Add device node for PRR
ARM: dts: r8a7793: Add device node for PRR
ARM: dts: r8a7792: Add device node for PRR
ARM: dts: r8a7791: Add device node for PRR
ARM: dts: r8a7790: Add device node for PRR
ARM: dts: r8a7779: Add device node for PRR
ARM: dts: r8a73a4: Add device node for PRR
ARM: dts: sk-rzg1e: add Ether support
ARM: dts: sk-rzg1e: initial device tree
...
As usual, we queue up a few fixes that don't seem urgent enough to go in
through -rc, or that just came a little too late given their size.
The zx fixes make the platform finally boot on real hardware, the
davinci and imx31 get the DT support working better for some of
the machines that are still normally used with classic board files.
One tegra fix is important for new bootloader versions, but the
bug has been around for a while without anyone noticing.
The other changes are mostly cosmetic.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWFLum2CrR//JCVInAQJTJhAAmLTsJE0O9akmxytLzlMsy+xhIHvXBfkx
mCDr0sVwHFVm2vcH0bPlK4sNrjGYjIV0Qfsh4Br9NzohCxe6s8xFvPA78aYk5AZp
kiHRv8Gap3dYTV2p6P2loeQ3o0zN7kl9/gUPOy6v4La84kUyZi9RRpyhA+HlEuwW
loQQ6LaSVQb8dMo8Lz5GdOk4YfWyy1DSoZ1uNwD/2bqgfIDQ5MPdjwQzHeK259xE
8WfVKtS4RXl54Psj26BfHRrH8VE8cMxfZ3eZwGykiXpOusrjNVbIEPJK8nKHuGHJ
Ui/nAMzvCD23bsVX2JCYAKa/zRWjXqpvrHEzLJsaWq1VqtmWFS7g9wi1DjZmBBoC
eJZI8Sg/7qL8Rkc69XSzyRUdMxdS6JfWQ6HrM/qzouja6MoRdFdbzl1WiPyYaVGd
gBa7Lx6hQJgSWkeu0mvERdDAzjf4weeZyMFOFov0CwzMZ4VTKCR6Rk4lc8I1A/Hz
0QcCmUj7uXC+gA6U+ZBlvDkG+e1u0Me5i+0gCCphd3UaReB5WaEriNubEwEMitci
QI9BGIMzG974UXU9CCIwcnpFvJKSRwuZsQmPpulP1vbfIb8ajZXQ779PW5szE6qI
h9VMtnKlDbOUEzdj6l/sCs2mWrobCr8/44cWOz7R8b31ZhBZxyJRWhIE/YvZFEvF
Dq5OzaCNLxM=
=i2l2
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-urgent fixes from Arnd Bergmann:
"As usual, we queue up a few fixes that don't seem urgent enough to go
in through -rc, or that just came a little too late given their size.
The zx fixes make the platform finally boot on real hardware, the
davinci and imx31 get the DT support working better for some of the
machines that are still normally used with classic board files. One
tegra fix is important for new bootloader versions, but the bug has
been around for a while without anyone noticing.
The other changes are mostly cosmetic"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
arm64: tegra: Add missing Smaug revision
arm64: tegra: Add VDD_GPU regulator to Jetson TX1
arm64: dts: zte: clean up gic-v3 redistributor properties
arm64: dts: zx: Fix gic GICR property
bus: vexpress-config: fix device reference leak
soc: ti: qmss: fix the case when !SMP
ARM: lpc32xx: drop duplicate header device.h
ARM: ixp4xx: drop duplicate header gpio.h
ARM: socfpga: fix spelling mistake in error message
ARM: dts: imx6q-cm-fx6: fix fec pinctrl
ARM: dts: imx7d-pinfunc: fix UART pinmux defines
ARM: dts: imx6qp: correct LDB clock inputs
ARM: OMAP2+: pm-debug: Use seq_putc() in two functions
ARM: OMAP2+: Remove the omapdss_early_init_of() function
mfd: tps65217: Fix mismatched interrupt number
ARM: zx: Fix error handling
ARM: spear: Fix error handling
ARM: davinci: da850: Fix pwm name matching
ARM: clk: imx31: properly init clocks for machines with DT
clk: imx31: fix rewritten input argument of mx31_clocks_init()
...
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYUt1vAAoJEFmIoMA60/r8abgP/3R+5Lsk5/kfAHk5/2Mtqbvg
mZ0eDUpY9GbUeMjSq84Nr2H8u7d+1AJCCu8KtDJYZCmjZpnSp2SuE2PS5JoGC7zC
fintD24jlIF4/J5+HeVXXmbfr3xATxvpTuiSLEi8sLBRJ3KRIswhMSwoPwOyeTQw
v/EclWKPGYcI5Zp0oigY9/Jd3q3lQ17KXppi/0dDoLh7PNOFvEHItXWzmf++u/NP
iYT9R1xmzEsy0/HRd6hiwPT2xA8YsAXxgobhHooUgh1FWmZ02Tg1WjgDemOW4lVh
kNIUcsLczh7wZCceogrrJ+pwb9+NyyIyKuHPv6OG3ieyz1IZdznaj1fAE5HJYiPo
eVS7cP1S6DyV3Y5qFj5F2dSRS7T4GXdXG5mNhmeCpUHs0vfzSCG36jLmhTy8UIxs
1rCf5oFa+uU9q0okfH8VtcGOXqWjGgyxTSGGfF71HUMLnPbsci2fxC2cO6svzIX7
wDY0uxOzpyMIYMuQR6iz7VqvAwEaZ+7pfMIrWWdDcQ9/5tCNJ49cLuKaThPL4bVu
juiGBQtnTLg8tjrhjDL9tQiJpuVIweVXyyQ1fvZoVXkMLlhVCF2ttirvwFUit2PB
84OlevQZ+9QdE/qalrWbv4qzhesuiwu0avkzjGoqg6tWTF0epu2AHI2vqy6UBYEG
tcfJPEcz1019PKZNSvWy
=ut0k
-----END PGP SIGNATURE-----
Merge tag 'pci-v4.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"PCI changes:
- add support for PCI on ARM64 boxes with ACPI. We already had this
for theoretical spec-compliant hardware; now we're adding quirks
for the actual hardware (Cavium, HiSilicon, Qualcomm, X-Gene)
- add runtime PM support for hotplug ports
- enable runtime suspend for Intel UHCI that uses platform-specific
wakeup signaling
- add yet another host bridge registration interface. We hope this is
extensible enough to subsume the others
- expose device revision in sysfs for DRM
- to avoid device conflicts, make sure any VF BAR updates are done
before enabling the VF
- avoid unnecessary link retrains for ASPM
- allow INTx masking on Mellanox devices that support it
- allow access to non-standard VPD for Chelsio devices
- update Broadcom iProc support for PAXB v2, PAXC v2, inbound DMA,
etc
- update Rockchip support for max-link-speed
- add NVIDIA Tegra210 support
- add Layerscape LS1046a support
- update R-Car compatibility strings
- add Qualcomm MSM8996 support
- remove some uninformative bootup messages"
* tag 'pci-v4.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (115 commits)
PCI: Enable access to non-standard VPD for Chelsio devices (cxgb3)
PCI: Expand "VPD access disabled" quirk message
PCI: pciehp: Remove loading message
PCI: hotplug: Remove hotplug core message
PCI: Remove service driver load/unload messages
PCI/AER: Log AER IRQ when claiming Root Port
PCI/AER: Log errors with PCI device, not PCIe service device
PCI/AER: Remove unused version macros
PCI/PME: Log PME IRQ when claiming Root Port
PCI/PME: Drop unused support for PMEs from Root Complex Event Collectors
PCI: Move config space size macros to pci_regs.h
x86/platform/intel-mid: Constify mid_pci_platform_pm
PCI/ASPM: Don't retrain link if ASPM not possible
PCI: iproc: Skip check for legacy IRQ on PAXC buses
PCI: pciehp: Leave power indicator on when enabling already-enabled slot
PCI: pciehp: Prioritize data-link event over presence detect
PCI: rcar: Add gen3 fallback compatibility string for pcie-rcar
PCI: rcar: Use gen2 fallback compatibility last
PCI: rcar-gen2: Use gen2 fallback compatibility last
PCI: rockchip: Move the deassert of pm/aclk/pclk after phy_init()
..
* patchwork: (496 commits)
[media] v4l: tvp5150: Add missing break in set control handler
[media] v4l: tvp5150: Don't inline the tvp5150_selmux() function
[media] v4l: tvp5150: Compile tvp5150_link_setup out if !CONFIG_MEDIA_CONTROLLER
[media] em28xx: don't store usb_device at struct em28xx
[media] em28xx: use usb_interface for dev_foo() calls
[media] em28xx: don't change the device's name
[media] mn88472: fix chip id check on probe
[media] mn88473: fix chip id check on probe
[media] lirc: fix error paths in lirc_cdev_add()
[media] s5p-mfc: Add support for MFC v8 available in Exynos 5433 SoCs
[media] s5p-mfc: Rework clock handling
[media] s5p-mfc: Don't keep clock prepared all the time
[media] s5p-mfc: Kill all IS_ERR_OR_NULL in clocks management code
[media] s5p-mfc: Remove dead conditional code
[media] s5p-mfc: Ensure that clock is disabled before turning power off
[media] s5p-mfc: Remove special clock rate management
[media] s5p-mfc: Use printk_ratelimited for reporting ioctl errors
[media] s5p-mfc: Set DMA_ATTR_ALLOC_SINGLE_PAGES
[media] vivid: Set color_enc on HSV formats
[media] v4l2-tpg: Init hv_enc field with a valid value
...
Pull crypto updates from Herbert Xu:
"Here is the crypto update for 4.10:
API:
- add skcipher walk interface
- add asynchronous compression (acomp) interface
- fix algif_aed AIO handling of zero buffer
Algorithms:
- fix unaligned access in poly1305
- fix DRBG output to large buffers
Drivers:
- add support for iMX6UL to caam
- fix givenc descriptors (used by IPsec) in caam
- accelerated SHA256/SHA512 for ARM64 from OpenSSL
- add SSE CRCT10DIF and CRC32 to ARM/ARM64
- add AEAD support to Chelsio chcr
- add Armada 8K support to omap-rng"
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (148 commits)
crypto: testmgr - fix overlap in chunked tests again
crypto: arm/crc32 - accelerated support based on x86 SSE implementation
crypto: arm64/crc32 - accelerated support based on x86 SSE implementation
crypto: arm/crct10dif - port x86 SSE implementation to ARM
crypto: arm64/crct10dif - port x86 SSE implementation to arm64
crypto: testmgr - add/enhance test cases for CRC-T10DIF
crypto: testmgr - avoid overlap in chunked tests
crypto: chcr - checking for IS_ERR() instead of NULL
crypto: caam - check caam_emi_slow instead of re-lookup platform
crypto: algif_aead - fix AIO handling of zero buffer
crypto: aes-ce - Make aes_simd_algs static
crypto: algif_skcipher - set error code when kcalloc fails
crypto: caam - make aamalg_desc a proper module
crypto: caam - pass key buffers with typesafe pointers
crypto: arm64/aes-ce-ccm - Fix AEAD decryption length
MAINTAINERS: add crypto headers to crypto entry
crypt: doc - remove misleading mention of async API
crypto: doc - fix header file name
crypto: api - fix comment typo
crypto: skcipher - Add separate walker for AEAD decryption
..
Here's the big set of USB/PHY patches for 4.10-rc1.
A number of new drivers are here in this set of changes. We have a new
USB controller type "mtu3", a new usb-serial driver, and the usual churn
in the gadget subsystem and the xhci host controller driver, along with
a few other new small drivers added. And lots of little other changes
all over the USB and PHY driver tree. Full details are in the shortlog
All of these have been in linux-next for a while with no reported
issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWFAxRg8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ynuLgCgsHgM/oba6UaVm1kmyN9V5e3PVjEAn34tRLht
R4enLi8Yv1bOWPdlrpzN
=3MGJ
-----END PGP SIGNATURE-----
Merge tag 'usb-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/PHY updates from Greg KH:
"Here's the big set of USB/PHY patches for 4.10-rc1.
A number of new drivers are here in this set of changes. We have a new
USB controller type "mtu3", a new usb-serial driver, and the usual
churn in the gadget subsystem and the xhci host controller driver,
along with a few other new small drivers added. And lots of little
other changes all over the USB and PHY driver tree. Full details are
in the shortlog
All of these have been in linux-next for a while with no reported
issues"
* tag 'usb-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (309 commits)
USB: serial: option: add dlink dwm-158
USB: serial: option: add support for Telit LE922A PIDs 0x1040, 0x1041
USB: OHCI: nxp: fix code warnings
USB: OHCI: nxp: remove useless extern declaration
USB: OHCI: at91: remove useless extern declaration
usb: misc: rio500: fix result type for error message
usb: mtu3: fix U3 port link issue
usb: mtu3: enable auto switch from U3 to U2
usbip: fix warning in vhci_hcd_probe/lockdep_init_map
usb: core: usbport: Use proper LED API to fix potential crash
usbip: add missing compile time generated files to .gitignore
usb: hcd.h: construct hub class request constants from simpler constants
USB: OHCI: ohci-pxa27x: remove useless functions
USB: OHCI: omap: remove useless extern declaration
USB: OHCI: ohci-omap: remove useless functions
USB: OHCI: ohci-s3c2410: remove useless functions
USB: cdc-acm: add device id for GW Instek AFG-125
fsl/usb: Workarourd for USB erratum-A005697
usb: hub: Wait for connection to be reestablished after port reset
usbip: vudc: Refactor init_vudc_hw() to be more obvious
...
framework. The only patch that can even be considered "core" adds another
clk_get() variant. The rest of the changes are in drivers for various SoCs, and
we have a few bits for ARM shmobile architecture code (dts and mach) due to the
dependency we're breaking between shmobile architecture code and its clk
driver. Those shmobile bits have also been pulled into arm-soc tree. Here's the
summary:
Core:
- Support for devm_get_clk_from_child() used with DT bindings that have
subnodes with the 'clocks' property
New Drivers:
- Allwinner A64 (sun50i)
- i.MX imx6ull
- Socionext's UniPhier SoC CPUs
- Mediatek MT2701 SoCs
- Rockchip rk1108 SoCs
- Qualcomm MSM8994/MSM8992 SoCS
- Qualcomm RPM Clocks
- Hisilicon Hi3516CV300 and Hi3798CV200 CRG
- Oxford Semiconductor OX820 and OX810SE SoCs
- Renesas RZ/G1M and RZ/GIE SoCs
- Renesas R-Car RST driver for mode pin states
Updates:
- Four Allwinner SoCs are migrated to the new style clk driver
- Rockchip rk3399,rk3066 PLL optimizations
- i.MX LVDS display glitch fixes and AV PLL precision improvements
- Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL support
- Explicit demodularization of always builtin drivers
- Freescale Qoriq ls1012a and ls1046a support
- Exynos 5433 parent typo fix and critical clock tagging
- Renesas r8a7743/r8a7745 CPG
- Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
- stm32f4* LSI, LSE, RTC, and QSPI clocks
- pxa27x and pxa25x cpufreq as clks
- TI omap36xx sprz319 advisory 2.1 workaround
- Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABCAAGBQJYT1GXAAoJEK0CiJfG5JUlQ1QP/iOaWnE8TBLK/lOKPte2rw8U
1rw2SDQ8gEJBGIVbZZsnOq6Pp1sVKrJ/7S9ybBeSHoOVb5iTCVAB4wG5uqdLLUGs
4cHj4Vtge7xSxPLCh6YzawS0SjbtbYp1KXHBygGB2COIF53zphkmuM74gZ+l3dcz
TMkfbIvwm8ISvNjc7tRpjhzf6+XUTIVRJ6UZPMnir08lTmDqHz7mouY7nUxlbWOy
lOlF725RoBSa4LcBt+nZcNZ7Cu8eajFneeE87YiLdM4aS/VYm1Ajs9KzZYIRM3R6
mznmiSDwCWTOzU4CsPSdcxGXePzyPrkDvRGWED2qHXNwWQ7Asbtm5pxDKEJ+rj8L
LoB60z20d5PP0zJeiSwnr3XOgp95gW6vduAngu094O7FDZV7yY90wENIphQqgHaU
5nVEPYWTK3lrxAShadpHvnyZI5A621QbNYzAoCAM/jf5xa3JW+AbkERmO/RyEsTO
s6gAKX9H4WiQsEHrmBpJ+VsVVmlT5fhCtqskohaEqFg9CaVaxXvTPzN2fO9KtbDC
M6JPycE9qgu08TWTyJr9xGDGBh0mKP+7ffxpj1x1gVT59HmCLAGTMEvMuHAfKCfW
vz6qPjWW4KnqwAY0JvDZy1y37YQMytA5PVidV/XsEM7WLnmbutTCEbmwIx8eUNGv
NaEpc4l2hvKLwCo4w0J+
=RXZr
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This is a fairly quiet release. We don't have any patches to the core
framework. The only patch that can even be considered "core" adds
another clk_get() variant. The rest of the changes are in drivers for
various SoCs, and we have a few bits for ARM shmobile architecture
code (dts and mach) due to the dependency we're breaking between
shmobile architecture code and its clk driver. Those shmobile bits
have also been pulled into arm-soc tree. Here's the summary:
Core:
- Support for devm_get_clk_from_child() used with DT bindings that
have subnodes with the 'clocks' property
New Drivers:
- Allwinner A64 (sun50i)
- i.MX imx6ull
- Socionext's UniPhier SoC CPUs
- Mediatek MT2701 SoCs
- Rockchip rk1108 SoCs
- Qualcomm MSM8994/MSM8992 SoCS
- Qualcomm RPM Clocks
- Hisilicon Hi3516CV300 and Hi3798CV200 CRG
- Oxford Semiconductor OX820 and OX810SE SoCs
- Renesas RZ/G1M and RZ/GIE SoCs
- Renesas R-Car RST driver for mode pin states
Updates:
- Four Allwinner SoCs are migrated to the new style clk driver
- Rockchip rk3399,rk3066 PLL optimizations
- i.MX LVDS display glitch fixes and AV PLL precision improvements
- Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL
support
- Explicit demodularization of always builtin drivers
- Freescale Qoriq ls1012a and ls1046a support
- Exynos 5433 parent typo fix and critical clock tagging
- Renesas r8a7743/r8a7745 CPG
- Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
- stm32f4* LSI, LSE, RTC, and QSPI clocks
- pxa27x and pxa25x cpufreq as clks
- TI omap36xx sprz319 advisory 2.1 workaround
- Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_prate()
clk: add devm_get_clk_from_child() API
clk: st: clk-flexgen: Unmap region obtained by of_iomap
clk: keystone: pll: Unmap region obtained by of_iomap
clk:mmp:clk-of-mmp2: Free memory and Unmap region obtained by kzalloc and of_iomap
clk:mmp:clk-of-pxa910: Free memory and Unmap region obtained by kzmalloc and of_iomap
clk: mmp: clk-of-pxa1928: Free memory obtained by kzalloc
clk: cdce925: Fix limit check
clk: bcm: Make COMMON_CLK_IPROC into a library
clk: qoriq: added ls1012a clock configuration
clk: ti: dra7: fix "failed to lookup clock node gmac_gmii_ref_clk_div" boot message
clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock
clk: bcm: Support rate change propagation on bcm2835 clocks
clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
clk: ti: omap36xx: Work around sprz319 advisory 2.1
clk: clk-wm831x: fix a logic error
clk: uniphier: add cpufreq data for LD11, LD20 SoCs
clk: uniphier: add CPU-gear change (cpufreq) support
clk: qcom: Put venus core0/1 gdscs to hw control mode
clk: qcom: gdsc: Add support for gdscs with HW control
...
mmc host drivers, some existing drivers being extended to support new IP
versions and lots of other updates.
MMC core:
- Delete eMMC packed command support
- Introduce mmc_abort_tuning() to enable eMMC tuning to fail gracefully
- Introduce mmc_can_retune() to see if a host can be retuned
- Re-work and improve the sequence when sending a CMD6 for mmc
- Enable CDM13 polling when switching to HS and HS DDR mode for mmc
- Relax checking for CMD6 errors after switch to HS200
- Re-factoring the code dealing with the mmc block queue
- Recognize whether the eMMC card supports CMDQ
- Fix 4K native sector check
- Don't power off the card when starting the host
- Increase MMC_IOC_MAX_BYTES to support bigger firmware binaries
- Improve error handling and drop meaningless BUG_ONs()
- Lots of clean-ups and changes to improve the quality of the code
MMC host:
- sdhci: Fix tuning sequence and clean-up the related code
- sdhci: Add support to via DT override broken SDHCI cap register bits
- sdhci-cadence: Add new driver for Cadence SD4HC SDHCI variant
- sdhci-msm: Update clock management
- sdhci-msm: Add support for eMMC HS400 mode
- sdhci-msm: Deploy runtime/system PM support
- sdhci-iproc: Extend driver support to newer IP versions
- sdhci-pci: Add support for Intel GLK
- sdhci-pci: Add support for Intel NI byt sdio
- sdhci-acpi: Add support for 80860F14 UID 2 SDIO bus
- sdhci: Lots of various small improvements and clean-ups
- tmio: Add support for tuning
- sh_mobile_sdhi: Add support for tuning
- sh_mobile_sdhi: Extend driver to support SDHI IP on R7S72100 SoC
- sh_mobile_sdhi: remove support for sh7372
- davinci: Use mmc_of_parse() to enable generic mmc DT bindings
- meson: Add new driver to support GX platforms
- dw_mmc: Deploy generic runtime/system PM support
- dw_mmc: Lots of various small improvements
As a part of the mmc changes this time, I have also pulled in an immutable
branch/tag (soc-device-match-tag1) hosted by Geert Uytterhoeven, to share the
implementation of the new soc_device_match() interface. This is needed by the
below mmc related changes:
- mmc: sdhci-of-esdhc: Get correct IP version for T4240-R1.0-R2.0
- soc: fsl: add GUTS driver for QorIQ platforms
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYTrzGAAoJEP4mhCVzWIwp7QsP/A4n3Vs0zkMW9RzYj+jo6JjN
7fjLvyLcWXsW6RkZjeKUtuuZgLswdiw94zJJld5fZj5+Gm4sZjFcCr2oPquaUTY8
7MxSHqU95b7wl2tkwrT8Zo9J3i3recgBFqJPc1lv9AC812/TYoyQn/im8XQSL69Q
S5RgmhLdsoJRrMEbvXP9kht1f3vbZgr5RFTHkcWg1d9nnZ033DBP91QrJUMltyc1
7xGSnfod2uY81VudU/I5z1vhqJ4E/uorsjzdJusp/T9yJ2B/1pqxKoYTXXm64ff+
juW7QdQRA3jg4n8B3Pf//cwp0vHE9GZsD5Pgu+qSQwwycqxYKpKx88rmuI0eXCmB
4+FGnfma6c1rgb3X1z4YGelrzcRRzugc959BFqQNfZdk5VY2JbsOWRQ3CUVwj/Lx
uqL+h91m/ex2WpHe55mtGtLT0v6hcCuYh8PFoCSGCWXOkam/aNdh856RVh1ZfLCh
H6eHooGZmk+qKKuYTK0dWxAcuqqjD9MjyoUtFh1AXwrlgXZQp6el5x1pRBWj2XRD
fGBUTHdJSQPGBsO1ucm0f3S3CIekR4hbUJc/KSXMOtHeysrYR97BRA6AUXW9s15V
uwPUspiiSGxJWFyF6JaYzRaossanQmewNy7EAGUl/5n4agJcMTBINdEpc+BeMqkU
Tr2iw8zwOWClMQ0S6BDb
=wGE2
-----END PGP SIGNATURE-----
Merge tag 'mmc-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"It's been an busy period for mmc. Quite some changes in the mmc core,
two new mmc host drivers, some existing drivers being extended to
support new IP versions and lots of other updates.
MMC core:
- Delete eMMC packed command support
- Introduce mmc_abort_tuning() to enable eMMC tuning to fail
gracefully
- Introduce mmc_can_retune() to see if a host can be retuned
- Re-work and improve the sequence when sending a CMD6 for mmc
- Enable CDM13 polling when switching to HS and HS DDR mode for mmc
- Relax checking for CMD6 errors after switch to HS200
- Re-factoring the code dealing with the mmc block queue
- Recognize whether the eMMC card supports CMDQ
- Fix 4K native sector check
- Don't power off the card when starting the host
- Increase MMC_IOC_MAX_BYTES to support bigger firmware binaries
- Improve error handling and drop meaningless BUG_ONs()
- Lots of clean-ups and changes to improve the quality of the code
MMC host:
- sdhci: Fix tuning sequence and clean-up the related code
- sdhci: Add support to via DT override broken SDHCI cap register
bits
- sdhci-cadence: Add new driver for Cadence SD4HC SDHCI variant
- sdhci-msm: Update clock management
- sdhci-msm: Add support for eMMC HS400 mode
- sdhci-msm: Deploy runtime/system PM support
- sdhci-iproc: Extend driver support to newer IP versions
- sdhci-pci: Add support for Intel GLK
- sdhci-pci: Add support for Intel NI byt sdio
- sdhci-acpi: Add support for 80860F14 UID 2 SDIO bus
- sdhci: Lots of various small improvements and clean-ups
- tmio: Add support for tuning
- sh_mobile_sdhi: Add support for tuning
- sh_mobile_sdhi: Extend driver to support SDHI IP on R7S72100 SoC
- sh_mobile_sdhi: remove support for sh7372
- davinci: Use mmc_of_parse() to enable generic mmc DT bindings
- meson: Add new driver to support GX platforms
- dw_mmc: Deploy generic runtime/system PM support
- dw_mmc: Lots of various small improvements
As a part of the mmc changes this time, I have also pulled in an
immutable branch/tag (soc-device-match-tag1) hosted by Geert
Uytterhoeven, to share the implementation of the new
soc_device_match() interface. This is needed by these mmc related
changes:
- mmc: sdhci-of-esdhc: Get correct IP version for T4240-R1.0-R2.0
- soc: fsl: add GUTS driver for QorIQ platforms"
* tag 'mmc-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (136 commits)
mmc: sdhci-cadence: add Cadence SD4HC support
mmc: sdhci: export sdhci_execute_tuning()
mmc: sdhci: Tidy tuning loop
mmc: sdhci: Simplify tuning block size logic
mmc: sdhci: Factor out tuning helper functions
mmc: sdhci: Use mmc_abort_tuning()
mmc: mmc: Introduce mmc_abort_tuning()
mmc: sdhci: Always allow tuning to fall back to fixed sampling
mmc: sdhci: Fix tuning reset after exhausting the maximum number of loops
mmc: sdhci: Fix recovery from tuning timeout
Revert "mmc: sdhci: Reset cmd and data circuits after tuning failure"
mmc: mmc: Relax checking for switch errors after HS200 switch
mmc: sdhci-acpi: support 80860F14 UID 2 SDIO bus
mmc: sdhci-of-at91: remove bogus MMC_SDHCI_IO_ACCESSORS select
mmc: sdhci-pci: Use ACPI to get max frequency for Intel NI byt sdio
mmc: sdhci-pci: Add PCI ID for Intel NI byt sdio
mmc: sdhci-s3c: add spin_unlock_irq() before calling clk_round_rate
mmc: dw_mmc: display the clock message only one time when card is polling
mmc: dw_mmc: add the debug message for polling and non-removable
mmc: dw_mmc: check the "present" variable before checking flags
...
Pull timer updates from Thomas Gleixner:
"The time/timekeeping/timer folks deliver with this update:
- Fix a reintroduced signed/unsigned issue and cleanup the whole
signed/unsigned mess in the timekeeping core so this wont happen
accidentaly again.
- Add a new trace clock based on boot time
- Prevent injection of random sleep times when PM tracing abuses the
RTC for storage
- Make posix timers configurable for real tiny systems
- Add tracepoints for the alarm timer subsystem so timer based
suspend wakeups can be instrumented
- The usual pile of fixes and updates to core and drivers"
* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits)
timekeeping: Use mul_u64_u32_shr() instead of open coding it
timekeeping: Get rid of pointless typecasts
timekeeping: Make the conversion call chain consistently unsigned
timekeeping_Force_unsigned_clocksource_to_nanoseconds_conversion
alarmtimer: Add tracepoints for alarm timers
trace: Update documentation for mono, mono_raw and boot clock
trace: Add an option for boot clock as trace clock
timekeeping: Add a fast and NMI safe boot clock
timekeeping/clocksource_cyc2ns: Document intended range limitation
timekeeping: Ignore the bogus sleep time if pm_trace is enabled
selftests/timers: Fix spelling mistake "Asyncrhonous" -> "Asynchronous"
clocksource/drivers/bcm2835_timer: Unmap region obtained by of_iomap
clocksource/drivers/arm_arch_timer: Map frame with of_io_request_and_map()
arm64: dts: rockchip: Arch counter doesn't tick in system suspend
clocksource/drivers/arm_arch_timer: Don't assume clock runs in suspend
posix-timers: Make them configurable
posix_cpu_timers: Move the add_device_randomness() call to a proper place
timer: Move sys_alarm from timer.c to itimer.c
ptp_clock: Allow for it to be optional
Kconfig: Regenerate *.c_shipped files after previous changes
...
Provide separaate sd0 and sd0_uhs nodes rather than duplicate sd0 nodes.
Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Fixes: 93373c309a ("arm64: dts: h3ulcb: rename SDHI0 pins")
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The "google,smaug-rev2" string is missing from the compatible list of
Smaug's DT. The differences of rev2 are not relevant at our current
level of support and it boots just fine, so add it.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the VDD_GPU regulator (a GPIO-enabled PWM regulator) to the Jetson
TX1 board. This addition allows the GPU to be used provided the
bootloader properly enabled the GPU node.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
[as pointed out by Thierry on IRC, nobody has reported a bug
in the field, but using a new bootloader with a .dtb that
has the incorrect data, it will crash on boot]
Fixes: 336f79c7b6 ("arm64: tegra: Add NVIDIA Jetson TX1 Developer Kit support")
Cc: stable@vger.kernel.org #v4.5+
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The gic-v3 property redistributor-stride is only meant as a workaround
for broken platforms that have a redistributor stride deviating what the
architecture defines, i.e. 128KiB for GICv3, 256KiB for GICv4. This is
not the case for ZX296718, and redistributor-stride is not really
necessary. Let's drop it.
Also, #redistributor-regions is only required when there is more than
one such region is present. Let's remove it as well.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
GICR for multiple CPU can be described with start address and stride,
or with multiple address. Current multiple address and stride are
both used. Fix it.
vmalloc patch 727a7f5a9 triggered this bug:
[ 0.097146] Unable to handle kernel paging request at virtual address ffff000008060008
[ 0.097150] pgd = ffff000008602000
[ 0.097160] [ffff000008060008] *pgd=000000007fffe003, *pud=000000007fffd003, *pmd=000000007fffc003, *pte=0000000000000000
[ 0.097165] Internal error: Oops: 96000007 [#1] PREEMPT SMP
[ 0.097170] Modules linked in:
[ 0.097177] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.8.0+ #1474
[ 0.097179] Hardware name: ZTE zx296718 evaluation board (DT)
[ 0.097183] task: ffff80003e8c8b80 task.stack: ffff80003e8d0000
[ 0.097197] PC is at gic_populate_rdist+0x74/0x15c
[ 0.097202] LR is at gic_starting_cpu+0xc/0x20
[ 0.097206] pc : [<ffff0000082b1b18>] lr : [<ffff0000082b26e0>] pstate: 600001c5
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable the x4 PCIe and M.2 Key E slots on Jetson TX1. The Key E slot is
currently untested due to lack of hardware.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Add the PCIe host bridge found on Tegra X1. It implements two root ports
that support x4 and x1 configurations, respectively.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Couple conflicts resolved here:
1) In the MACB driver, a bug fix to properly initialize the
RX tail pointer properly overlapped with some changes
to support variable sized rings.
2) In XGBE we had a "CONFIG_PM" --> "CONFIG_PM_SLEEP" fix
overlapping with a reorganization of the driver to support
ACPI, OF, as well as PCI variants of the chip.
3) In 'net' we had several probe error path bug fixes to the
stmmac driver, meanwhile a lot of this code was cleaned up
and reorganized in 'net-next'.
4) The cls_flower classifier obtained a helper function in
'net-next' called __fl_delete() and this overlapped with
Daniel Borkamann's bug fix to use RCU for object destruction
in 'net'. It also overlapped with Jiri's change to guard
the rhashtable_remove_fast() call with a check against
tc_skip_sw().
5) In mlx4, a revert bug fix in 'net' overlapped with some
unrelated changes in 'net-next'.
6) In geneve, a stale header pointer after pskb_expand_head()
bug fix in 'net' overlapped with a large reorganization of
the same code in 'net-next'. Since the 'net-next' code no
longer had the bug in question, there was nothing to do
other than to simply take the 'net-next' hunks.
Signed-off-by: David S. Miller <davem@davemloft.net>
Add neta nodes for network support both in device tree for the SoC and
the board.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The core and the cluster sleep state entry latencies can't be same as
cluster sleep involves more work compared to core level e.g. shared
cache maintenance.
Experiments have shown on an average about 100us more latency for the
cluster sleep state compared to the core level sleep. This patch fixes
the entry latency for the cluster sleep state.
Fixes: 28e10a8f3a ("arm64: dts: juno: Add idle-states to device tree")
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "Jon Medhurst (Tixy)" <tixy@linaro.org>
Reviewed-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The PCIe root complex on Juno translates the MMIO mapped
at 0x5f800000 to the PIO address range starting at 0
(which is common because PIO addresses are generally < 64k).
Correct the DT to reflect this.
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- new SoC support: S912/GXM series (8x A53)
- new boards: Nexbox A1 (S912), Nexbox A95X (S905X)
- resets for 2nd USB PHY
- update SCPI compatible for pre-v1.0 devices
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJYPI60AAoJEFk3GJrT+8ZlaaQQAJPdYxPKy00y6tM/adzqMsUY
/+HPHM6JgmMKkntHDMB0YRTtejYEhrgdWSHMlRnVhpPHeY/EU7a0+XAy6KIqnYzv
hWqHQFC4LVshh7/EwfN81iPYW8GXpZxXogREvYSWxJrxf7ISH4plEN4aq8JyWpmZ
ojAZOzc3nV9MvCdElfPqzo+tyCW8SDw5LDL8YdhF4huL/x3BC8wnqDV51yZvx1Re
CW3s8waEv94/DsoQhNc8ALZVwu2g94ygLWYUIZSNvPc3JpW73QO26qhf04FVLWO+
clBsjsejtJcPICTmeMeiBq7+awyigoPZOc+cP4LUhtRjPLUBlecPlb53jHukTrT7
0ahSAVH3NxBfXbeafkHHlXoy96SFdXsv6tl61XPBjrF/yn8z8BV0et0zI9mfrqq5
GjbZZegrfLodPYfI4VLbgGiBtYJQFU+i54e3jjYT1X1/bLVaYB4U9Dr4yMq53h5J
FL003w9jBO4BB/KsxGMyF3gGmBXrrR1UycOflzGwdiIkgpcx9zLxdUn4xDnkEmWD
peW+Qd3NeYRMW+8Xi8RzOOaXMkAubHr2lh2LPTUpGZ+RYmZ3qGACM5D7szIGgPWA
7vzuzcEeEzD8QVo5pnvlLIkSRmNV7b4YQMAv39fXrG34RGmN/oFLR/SFoYiPKLMI
jm+/R1hO7SUa0FNzoFry
=kgDs
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt64-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64
Pull "Amlogic 64-bit DT updates for v4.10, round 2" from Kevin Hilman:
- new SoC support: S912/GXM series (8x A53)
- new boards: Nexbox A1 (S912), Nexbox A95X (S905X)
- resets for 2nd USB PHY
- update SCPI compatible for pre-v1.0 devices
* tag 'amlogic-dt64-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible
ARM64: dts: meson-gxl: Add support for Nexbox A95X
ARM64: dts: meson-gxm: Add support for the Nexbox A1
ARM64: dts: Add support for Meson GXM
ARM64: dts: meson-gxbb: add the USB reset also to the second USB PHY
Add clock controller device nodes, including one top clock controller,
two low speed clock controllers and one audio clock controller.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYPDsqAAoJEFBXWFqHsHzOl5cH/iifyZ+RRLVuZBKRFM2TEq6T
0DFYvL+wQFQG74b3W8zT50r9ej5NLDvz7yMoqm2Njd/Qn2zM+WA8vxyhTES3JsqF
PIzbaYMaYfxMesGIfdCDFQ85g4TdKISCqEMiMrgNFynol6Yk3VHzjT7ODYPAzR/k
DZ7tRx1WW7dGLH4EsGZDo1dwC8zbWWoi0J8epbq3qgOXAZ5r5o8TZ4JCIMciqaXc
VaQVx/+3qK5rmW+b5BkPk8lFNHEPfi27m/NeHTebWg0YZ+VzvuoS3tAvJl5f1170
d21LvukXnrquLdj1KaD0LQOKP38oSGFp/1l9QsYfHHKnyIZPk17RNrW0wvRg5Zg=
=+8XT
-----END PGP SIGNATURE-----
Merge tag 'zte-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Pull "ZTE arm64 device tree update for 4.10" from Shawn Guo:
Add clock controller device nodes, including one top clock controller,
two low speed clock controllers and one audio clock controller.
* tag 'zte-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: zx: Add clock controller nodes
- fix some dtc compiler warnings
-----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE2MW6uuYZ+0zBfpF41kg+k28NbwgFAlg4AYgUHGpzemhhbmdA
bWFydmVsbC5jb20ACgkQ1kg+k28Nbwgagw//V2xn6tlMIniGrEFjeePy3EQs3EpJ
AKzJ4/XvJItN5cheNbg4aoCLMa6LZuz7P0LhwcIxm1v9pIgx0qBhsElS6UuDpUs8
XszCryYtpkFmT3MHsRX5qU2zPjHsQn5MqIi0V4SQeEc/ELSZAaroqiC85bjo8Qoy
jYccHVPxwmdFZbIuNQNyg+GalpEyHo3jbOumc07dcf7z9zup3y2oknBJ+19v9Cs2
7zl9/i4SOlRQfXBTyYqmz5aAsAvffMSEYDmXdwLirZHr3W5ZCbg791NLG72MxeKl
iuLKvNbNUyumiUxVAKey4V1Yqa75w2JyDMNpy0yrmbgukD1zR48MLg3Zak9wvuJH
i9F3Iwd4+WiwihA+ulVwDYLICf/xofV+6CcxXSveHKnn8UFHK8qpdjTX0NAxTi94
61epxAmubpQ/mbLtrH0nJiJP6RvghvZHjz7gDRFvPapSefSU8hEM/RI39o9U20hR
vYDFLb0m9WYhJvuBXgXVM7gbDQPrErQwyL+/SEtIrjnnHt74V4iPhECm7m8fTgL7
1zFj4Vq2iwsNyy0vEPINzxc0hlmYVzwpKKaMof5HdyR5a7vqm6KsmozDBavyLOar
dYTrZeIUqmtwozBUHdpVQv/DKRs1IcjNuMM3uKEurQMfgIj2gRKCKOJghVgs9xSu
fgqkBWEkW6ad3yM=
=JqjI
-----END PGP SIGNATURE-----
Merge tag 'berlin64-dt-for-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin into next/dt64
Pull "Berlin64 DT changes for v4.10" from Jisheng Zhang:
- fix some dtc compiler warnings
* tag 'berlin64-dt-for-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin:
arm64: dts: berlin4ct-dmp: add missing unit name to /memory node
arm64: dts: berlin4ct-stb: add missing unit name to /memory node
arm64: dts: berlin4ct: add missing unit name to /soc node
as the binding doc for the 32bit rk1108 eval board to prevent it
from conflicting with the recently added 64bit px5 board.
-----BEGIN PGP SIGNATURE-----
iQEtBAABCAAXBQJYNj30EBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYEoJQf/
WaANx7eR9cLkinPv6H123jeHAtMdvLFHmwb9kr2DwwNs6C9UxIsp9VddpG7XMSpI
bQLES0o0MALAAzIJH1oBb2wOWfDRWB/oXa/bSWXScbRXML+fH9ew1i1FaQQRDPHP
0/nm6GMbRZfMEraZHzTEY9duobLhbBH2va9GBv7M453D65B26c+ECvgbjULkI6My
qAdy5nN4Fb2YhxlZJz+WQQt59MNBT6nw8ObNPgKmSI18vB8BnQxqIEfo1gCuW+Iz
Sz+367EhVDtSW8cMWLttK6wB2iiiYGD0TOYfEeZS1zWavQlqDpFxFgZ66AKXdTxA
OYuAB8AKkTfa8NmejAUR2Q==
=PZ7U
-----END PGP SIGNATURE-----
Merge tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Pull "Rockchip dts64 changes for 4.10" from Heiko Stübner:
Some more powerdomains and usb2-otg support for the rk3399 as well
as the binding doc for the 32bit rk1108 eval board to prevent it
from conflicting with the recently added 64bit px5 board.
* tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: add rockchip RK1108 Evaluation board
arm64: dts: rockchip: add usb2-phy otg-port support for rk3399
arm64: dts: rockchip: add pd_sd power-domain node for rk3399
arm64: dts: rockchip: add eMMC's power domain support for rk3399
arm64: dts: rockchip: add backlight support for rk3399 evb board
arm64: dts: rockchip: add gmac needed pclk for rk3399 pd
* Add SDHC xo clk and 1.8V DDR support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYNos9AAoJEFKiBbHx2RXVWO8P/iSHtUP5UwiaX3+G86zkazvV
CIhufAArFxIRvMtRcbk1qIhrfA5c43aBoYx6ibcL6V2T2fWnJRBBJVvNZq4+htgR
U6lbiwF38E/e9zqmbseUtdfUo6Lh7KGvOHevxcu9sKa8rOiinmZ8jjRE2o5ypQhZ
jMEL7ScWFmwSL/nszD1UOiPBDuuBQyIqy+440oeRlIfRzJzonQVKTH+MJ92xqMx2
lfIzEutW33uK9Wz3rbwnz/FeaOubhj7S6kKBjJEvOrOOuSQcuuQty4bvn12ZNdyJ
cvb8HyrU8R9YOk6A1XrObpeP/z8WVydP6QlaGdxJ3t5Ma04JoQBaNeKcKV25AmS5
Row6++5E2Uijs5BTjdipqLGYjlHssH74i1BzyeWb5kiVIUMYG+aAZd1EUOkAaV6g
LqpUA9HWGKkHORpYq6EP3etYyZWQt7VXfIGtyiVWKNXAaKdQseMRSfOZve6kI/jY
VVb0mNQ29mYfWZV7Y1VP9UtrTtZ8gdrJArsNqsasu9Z6gQFsXUVbEVgliZjlFAUC
04VCuahZXMNKNNn3v1BDpN9j8UokTOOPij0UyWr6URwGc7tAdlMNEJOV6WL+PRZL
3JPcwP5As9lEQePhKH1Icc07OYg+WexpSPe8vhc5EOKTC7+GSrWnU2VIK71vtwSx
YrTqj/5ypJuOpGkkdySO
=EDYb
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Pull "Qualcomm ARM64 Updates for v4.10 - Part 2" from Andy Gross:
* Add SDHC xo clk and 1.8V DDR support
* tag 'qcom-arm64-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: qcom: msm8916: Add ddr support to sdhc1
ARM: dts: Add xo to sdhc clock node on qcom platforms
1. Add Performance Monitor Unit to Exynos7.
2. Add MFC, JPEG and Gscaler to Exynos5433 based TM2 board.
3. Cleanups and fixes for recently added TM2 and TM2E boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYNoEFAAoJEME3ZuaGi4PX90MP/2EWyj7J4a6vw3MpGkxtSbeO
tTWBdTgw8+9+MINW2HsGRn6WjzlFObF5Xl1LHyL2dBhVoJlLatWn0pjXqbo60u23
dQZ7jskBPlI3jH54rpKPUmd+Tk99dAYz7o6HCeqCLbBQT3bGHCxlueh5qZwRUcv3
EFFFsdpWtH97jI44olBKc/STzMWdRv5HOrpqtep+bNJINoEzEaWdIQNfpoEMrbs2
zcl5THbaHOl5cums67h1DHKxQOXQCtO4C6gon/MkELVvV4QzAhg4yj2mJLvEJieQ
AJnKDt+5X2XyIA1+EWAmilan3uUhxVPVkgFHRHZbuxSimL/5BQcMkvLDeMhG/ghr
ot5Rt0JmsY20hirCnApgk2yfor95TqmxhelMSqQ2T3IZjA4EvPovNR8xclBfKYAC
ctTT8yic15dkTcLxhiaq+DS993sKXKxbEBsu3jeIWRqKe8UrBe6+Eydsit/0rFt+
+6GkBRLMnJvVzoTsrcyYWflMh5eSKu4bma/MPtw8jQ/aMJX+XZ6yhLvXXM5OC7P1
GCmZlf5OZBIxbi9OjctB+iuQzgsBaiuVJbcYQu5HqYEtd7DLgqerjYmY4i0aGdWO
f2ZaKHfbFJjAVa8jduqo1HulTJTLagaXT1GABUtB/1YxTz6wpU8iB2i20ipMjm4w
dGbiLoGpCsl6QSSCo5hv
=/AE/
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Pull "Samsung DeviceTree arm64 second update for v4.10" from Krzysztof Kozłowski:
1. Add Performance Monitor Unit to Exynos7.
2. Add MFC, JPEG and Gscaler to Exynos5433 based TM2 board.
3. Cleanups and fixes for recently added TM2 and TM2E boards.
* tag 'samsung-dt64-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Enable HS400 mode for eMMC for TM2
arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash
arm64: dts: exynos: TM2 - add support for MFC video codec device
arm64: dts: exynos: TM2 - add support for JPEG codec device
arm64: dts: exynos: TM2 - add support for GScaler devices
arm64: dts: exynos: TM2 - remove unused UART3 and set clocks directly on CMU
arm64: dts: exynos: Assign parent clock of the clkout clock for TM2 board
arm64: dts: exynos: Move FSYS CMU configuration from Exynos5433 dtsi to TM2 dts
arm64: dts: exynos: Add missing parent clocks to audio block in Exynos5433 SoC
arm64: dts: exynos: Fix FSYS CMU parent clocks in Exynos5433 SoC
arm64: dts: exynos: Fix IRQ type flags for Exynos5433 SoC
arm64: dts: Add ARM PMU node for exynos7
4.10, please pull the following:
- Robin updates the Northstart 2 DTS to use the generic IOMMU binding
- Scott renames the Broadcom Northstar 2 binding document to use a standard name
including the brcm vendor prefix
- Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the
Northstar 2 SVK reference board DTS file with it enabled.
- Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the
Northstar 2 SoC
- Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the
Northstar 2 SoC
- Ray adds required properties NAND controller properties to make NAND work on
the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included
here to resolve DTS file merges
- Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS
- Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3)
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also uses the proper DTSI file to define the USB host mode
for the USB Device Tree nodes
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYM9SvAAoJEIfQlpxEBwcE80YQAOfjCKEXNSWJEAMpgsCo1oEf
6peBNi+y6AZCkNa+B1L9G2RY1B63OJKb+0HzAzj07cqbfu6r9UGhJEncnvuTnt6Q
iLZqoxDAKINNDT4tQBvPfdI8mF7ChNQ1RaJEKRh5/eaz9feKbp0QP216oNyzdOTX
4fUCBfgAxl6q1aNv4f4tcTdy30NllQddulLumYq5W7ElAP3CYeUGszoJ6npDqX6Z
p2p42OMczOoU0xDH/a5BJBQW/ZbylCgFOSnGtQp6RnzOB6iBxKYDOCkMRfVLIPSg
uC+7XSEpYAxNPRAHE5JxtADEdDKZ4zdKne8SpadixBPY8vAWguEhiOAFRqTKYpXr
UY8itk9NMx8BnI6Fl4hU6tFs3Yx9+6PdHX0nWeR1OE2gzYpnVKOdeeS3+nWHctWm
Z2wyglSvEpzMpaCzr2/rgDXW30BUTGtRCD7rYJ7MhwItkXm4yIN8pkLw83Zxss4d
3J30QQoQ5s9Fye0Or4Z/PQiw3AtUJnH1u59BAE2GmrHVgs4pUaxuU4lt+LYBZtoM
hA+pzFDeNmK/fOumjFhmvZwrCG1AON2cJRExMG6l3x9sxV2FDw1Awr4sina7ZFcO
pbkvHmTXcGHNh7kqHeEU51r4tkkA97ZHeKGrntRSfsMNyu74xzOSsjEEf5MKMm5s
2xX2RhehADTDa5xPDJwG
=a4fP
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.10/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom devicetree-arm64 changes for 4.10" from Florian Fainelli:
This pull request contains Broadcom ARM64 based SoC Device Tree changes for
4.10, please pull the following:
- Robin updates the Northstart 2 DTS to use the generic IOMMU binding
- Scott renames the Broadcom Northstar 2 binding document to use a standard name
including the brcm vendor prefix
- Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the
Northstar 2 SVK reference board DTS file with it enabled.
- Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the
Northstar 2 SoC
- Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the
Northstar 2 SoC
- Ray adds required properties NAND controller properties to make NAND work on
the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included
here to resolve DTS file merges
- Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS
- Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3)
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also uses the proper DTSI file to define the USB host mode
for the USB Device Tree nodes
* tag 'arm-soc/for-4.10/devicetree-arm64' of http://github.com/Broadcom/stblinux: (23 commits)
arm64: dts: NS2: Add PCI PHYs
arm64: dts: NS2: enable sdio1
ARM64: dts: bcm2837-rpi-3-b: remove incorrect pwr LED
ARM64: bcm2835: dts: add thermal node to device-tree of bcm2837
ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
dt: bindings: add thermal device driver for bcm2835
arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver.
ARM: dts: bcm283x: fix typo in mailbox address
DT: binding: bcm2835-mbox: fix address typo in example
ARM64: dts: bcm2835: Fix bcm2837 compatible string
arm64: dts: Update Broadcom NS2 to generic IOMMU binding
arm64: dts: Updated NAND DT properties for NS2 SVK
arm64: dts: rename ns2.txt to brcm,ns2.txt
ARM64: dts: Add QSPI Device Tree node for NS2
ARM64: dts: bcm283x: Use dtsi for USB host mode
ARM: dts: bcm283x: drop alt3 from &gpio
ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
...
This adds initial support for Tegra186, the P3310 processor module as
well as the P2771 development board. Not much is functional, but there
is enough to boot to an initial ramdisk with debug serial output.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYMsltExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6HY
8g/7Bf5ieQkhnW4fHAicTnX+5zXJEiQZrlCYfOzNq1nyGi/NBrcAVajQTRhL1g/k
cSKESq7OrjmhAlhHUWEaHHicnzax6jLwrUaj/ozcAti5m8iXOz+JnD184fE3CqcJ
5DGp26k0vrPcc47u2SIWjx1u4coUssYxLjsyoR2NJPZkWYMKpPL7rK969PizlAID
ajbixuLgd4N6utWPz2o3j+23hXf03rXaPrZ6d9khsAvGQBkQx4QJAIbsKJrBbGR9
UbZbTDPgJGmvpa12IK0tblTKbHahhAkxRj5dX8F4eCwZBVmYp9fx+qLLKKdzoO5R
pZmMQiT24j0RNlC4CTPRI7wVBr6x5m1UtcuEq9exipsdocC1/AAm9iD5U09gX41T
7kBcQ/mIl62CSxoaNNjSoHi+hK+HRyqIcR2tjWe+HhkJONCcPi7zUZvtSkM85n7v
8z26KxFJpjpXd+Bg8oC3eIBbYxZOBoa5YzK4zDCA5znrGD0HSxUHtetYFru5LX7u
sVLc+wXfAuqKS/uh8FzVtk/tTrjib82OngQkD5ofGn3IkXEuIueLU4o4C8VhNt1n
7bH3MwWoahcUWQiH1/GwXglw1X6J2wE6isvF9u08pYg0nIfZsSPvbRjRriZzgk1v
dyBsZxnLpWGJPxly5H+3u9+XUetKPuZZs2EQxzwauoUNIjo=
=iXdy
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-arm64-dt-numeric-ids' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
Pull "arm64: tegra: Device tree changes for v4.10-rc1" from Thierry Reding:
This adds initial support for Tegra186, the P3310 processor module as
well as the P2771 development board. Not much is functional, but there
is enough to boot to an initial ramdisk with debug serial output.
* tag 'tegra-for-4.10-arm64-dt-numeric-ids' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add NVIDIA P2771 board support
arm64: tegra: Enable PSCI on P3310
arm64: tegra: Add NVIDIA P3310 processor module support
arm64: tegra: Add GPIO controllers on Tegra186
arm64: tegra: Add SDHCI controllers on Tegra186
arm64: tegra: Add I2C controllers on Tegra186
arm64: tegra: Add serial ports on Tegra186
arm64: tegra: Add CPU nodes for Tegra186
arm64: tegra: Add Tegra186 support
Two branches were incorrectly sent without having the necessary
header file changes. Rather than back those out now, I'm replacing
the symbolic names for the clks and resets with the numeric
values to get 'make allmodconfig dtbs' back to work.
After the header file changes are merged, we can revert this
patch.
Fixes: 6bc37fa ("arm64: dts: add Allwinner A64 SoC .dtsi")
Fixes: 50784e6 ("dts: arm64: db820c: add pmic pins specific dts file")
Acked-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the dts node for device configuration unit that provides
general purpose configuration and status for the device.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Scott Wood <oss@buserror.net>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The SCPI driver has an updated compatible to indicate the pre-released
(pre v1.0) status of the driver. Since Amlogic used a pre-1.0
version, add that compatible as well.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Nexbox A95X exists with a Meson GXBB (S905) Soc or a Meson GXL SoC (S905X).
Add the S905X variant which uses the internal PHY instead of an external PHY.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add support for the Nexbox A1 board based on the Amlogic S912 SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: replace '_' in node-names with '-']
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Fix DTC warning on Armada 37xx and 7K/8K
-----BEGIN PGP SIGNATURE-----
iGkEABECACoFAlgwEHAjHGdyZWdvcnkuY2xlbWVudEBmcmVlLWVsZWN0cm9ucy5j
b20ACgkQCwYYjhRyO9VIzACgpB+IM/uM1EMD3IUQM3Wk8TodfwQAmLUWZdt1at2+
VU9vmax2KRbR00I=
=K7yX
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.10-2' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt64 for 4.10 (part 2)" from Gregory CLEMENT:
Fix DTC warning on Armada 37xx and 7K/8K
* tag 'mvebu-dt64-4.10-2' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: Fixup memory DT warning for Armada 37xx
arm64: dts: marvell: Fixup config-space DT warning For Armada 7K/8K
arm64: dts: marvell: Fixup internal-regs DT warning for Armada 37xx
This patch fixes the following DTC warning with W=1:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
This patch fixes the following DTC warning with W=1:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
This patch fixes the following DTC warning with W=1:
"Node /soc has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
This adds mmc-ddr-1_8v support to DT for sdhc1 of msm8916.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
TM2 can support the HS400 mode, but eMMC is working in the lowest mode.
This patch adds the properties for HS400 and other modes.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add xo entry to sdhc clock node on all qcom platforms.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Following the Amlogic Linux kernel, it seem the only differences
between the GXL and GXM SoCs are the CPU Clusters.
This commit renames the gxl-s905d-p23x DTSI in a common file for
S905D p23x and S912 q20x boards.
Then adds a meson-gxm dtsi and reproduce the P23x to Q20x boards
dts files since the S905D and S912 SoCs shares the same pinout
and the P23x and Q20x boards are identical.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
All conflicts were simple overlapping changes except perhaps
for the Thunder driver.
That driver has a change_mtu method explicitly for sending
a message to the hardware. If that fails it returns an
error.
Normally a driver doesn't need an ndo_change_mtu method becuase those
are usually just range changes, which are now handled generically.
But since this extra operation is needed in the Thunder driver, it has
to stay.
However, if the message send fails we have to restore the original
MTU before the change because the entire call chain expects that if
an error is thrown by ndo_change_mtu then the MTU did not change.
Therefore code is added to nicvf_change_mtu to remember the original
MTU, and to restore it upon nicvf_update_hw_max_frs() failue.
Signed-off-by: David S. Miller <davem@davemloft.net>
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJYMhsfAAoJEHm+PkMAQRiGbZMH/AnSgpvWgJQGr/NsovAJsDM9
aJZPNQnjVD+6dBZLudCJOeKoZ8hd0vI/FNPxDrAJxt0L4PCX6Hxnmt+qsLAhodiU
uGOpLK7dwgE5OH3xEKzbEHJBitEZ5nmKBG1oEZNurL9kTFxyL78j7YnlMz/DpjsH
RwDfV4tD5vyVv8vcmHzo6OBWja+78Njo6+OVaMq/fw8+LqS2uq1ajsLWlkUMGo4b
3CDziy6lMLjHy5LlrWkxYvIK2ldB8o+3EDnp/KOwrQ/L9qNaBillUxwDI8qodqHV
NTUjBi51oqG06YwplJa7Qr9SVFD28SlNjVIv/PRgHm6kPfzNUvlp97WnWUn8R/8=
=SoWG
-----END PGP SIGNATURE-----
Merge tag 'v4.9-rc6' into patchwork
Linux 4.9-rc6
* tag 'v4.9-rc6': (305 commits)
Linux 4.9-rc6
ext4: sanity check the block and cluster size at mount time
fscrypto: don't use on-stack buffer for key derivation
fscrypto: don't use on-stack buffer for filename encryption
i2c: i2c-mux-pca954x: fix deselect enabling for device-tree
kvm: x86: merge kvm_arch_set_irq and kvm_arch_set_irq_inatomic
KVM: x86: fix missed SRCU usage in kvm_lapic_set_vapic_addr
KVM: async_pf: avoid recursive flushing of work items
kvm: kvmclock: let KVM_GET_CLOCK return whether the master clock is in use
KVM: Disable irq while unregistering user notifier
KVM: x86: do not go through vcpu in __get_kvmclock_ns
MAINTAINERS: Add LED subsystem co-maintainer
crypto: algif_hash - Fix NULL hash crash with shash
powerpc/mm: Fix missing update of HID register on secondary CPUs
KVM: arm64: Fix the issues when guest PMCCFILTR is configured
arm64: KVM: pmu: Fix AArch32 cycle counter access
powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1
i2c: digicolor: use clk_disable_unprepare instead of clk_unprepare
ipmi/bt-bmc: change compatible node to 'aspeed, ast2400-ibt-bmc'
Revert "drm/mediatek: set vblank_disable_allowed to true"
...
other fixes.
In order to get the thermal node that we're adjusting the compatible
string on, we have to merge in the bcm2835-dt-next branch.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCgAGBQJYL0q9AAoJELXWKTbR/J7o+wwQAKaYPlaBJPDTkPkKbvg7C2Xl
1EzOP2oDgHp7r7Ntk5u2NOJD7GVIpKL8LVYQu94pCCUMGz36kiES4kNL+h6VlxPn
dsla8GcasDFDzaXSVM7G68vH3p0WLmnQ2RVO6bD3O71twJeGuHfmLF4kmtj4ba7+
m+jP9AlG9nt3K3LKblGyv0grklTP8Kuxg4CEEwpSw5kNQUdrobItkbTmK1RE/hgm
u8mx6J4mZmTJBhZD+nRLN53YJig/ZYMvVpygxoTZb+hr9T/yb+sOJ144ajyiLDUO
tOAvPutJbNHOFQobNb8FQftLJ1awojJFOlRAF2xpjMOvesICO4YTxB6t1zsxTFI9
qJFXiX/962qpbkLDALQnoOQDuIz7Kkk8JdD/8/54XudcYUvutM/sc1WSR43T9gzu
n1MJUD169p24XzACUs1hEe/kiZ64Z4mD2BSkelxk3EfWd9/vxzIkDw/8084cm+zh
RNHcXpf2vHgIqlPcj5+Kcq8jNhi7c2nwVR1cdDnF+tcJjAuRWn4LR702mIXzdNRR
EG74X9PbNuQ+HzAW7u+1rgQGOqblTGYpviN8We6jwVQO5BICQwEGfqjVbXrByxdq
+gwR0xlSsMqae1J5Bg8X22pSAQicGiAJxsGrGHE+xZ9iJmrSyXebt604idvEvkc8
Nbkh07jgaxneG+nrU2ww
=zVOm
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYM9MLAAoJEIfQlpxEBwcEMo0QAKPVSHV/0zsWBg2MDaFG0MWM
tUm9G4U3iVR/isTyLTogTQ1JrxR+lb4psgUsri/DkfvMdlDL3V+640BS/nA2M7Mj
ZclG3vTjUg9sUUelw1zbKv8Ow53y1xaSJFA5XlWL9zMTxoIq0J8B8zjxZp+nYaTe
Yo/OJKbM8NNLTw9tbE3gZhQ371iQ/nxEyu7ZIWvrWtsmgSeaZ2g0BUhiKLkUx3ta
zQPqEHA5yVveSxK/9iTxrsNndnqWEqsN+/qkTGTH0yJDqdQwd3AAjVmlVsDKLllW
eWX10KC2hoHPY438hP1zVa0Pwss2/HRSBKF/UatRf4mVqsdy8q5WMtROT/+Vn4qx
SEazhRnMAPPBI+FpnbZKFycdzvlOf4tFXQdpn7fwk1jhy2gbQFnGRFwdUeoVDrSN
AsPAhtqgSGcRvy8eLtutzOpXwkRfHlkuYOm1hxeD/7tADW17rNjGrXvqUhudcJkl
1cCAHABS7lAV/f22anx9Y+mOSL+Zp7yZ4vZ1FHFLS52XvyWbyibxYn+/goMD/Pv9
pJeYFSopCOHb4Cid94Jbs2qh5/lfdr4EOf+6Qq9ZcPDKXfkinFOC+JCRy20T+iXZ
bQvpNWKk0T8y0vg7kyFjW772od06Yd+OBNKXculdstjRTJY2G8Nd0LJ4iOCF/mFX
e39X2qPoEEQh/M1RiOZv
=GHAx
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-dt-64-next-2016-11-18' into devicetree-arm64/next
This pull request brings thermal support to the BCM2837 DT, and a few
other fixes.
In order to get the thermal node that we're adjusting the compatible
string on, we have to merge in the bcm2835-dt-next branch.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
PCI PHYs are missing from the Northstar2 DT entries for the 2 PCI buses.
Add them so that PCI devices can be discovered.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Enable sdio1 in the Northstar2 SVK device tree file
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the mshc_2 node for supporting T-Flash.
Also add the "mshc*" aliases. dwmmc driver should be assigned to
"ctrl_id" after parsing to "mshc". If there are no aliases for mshc,
then it might be set to the wrong capabilities.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The "arm,no-tick-in-suspend" property was introduced to note
implementations where the system counter does not quite follow the ARM
specification that it "must be implemented in an always-on power
domain".
Particularly, RK3399's counter stops ticking when we switch from the
24MHz clock to the 32KHz clock in low-power suspend, so let's mark it as
such.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The NVIDIA P2771 is composed of a P3310 processor module that connects
to the P2597 I/O board. It comes with a 1200x1920 MIPI DSI panel that is
connected via the P2597's display connector and has several connectors
such as HDMI, USB 3.0, PCIe and ethernet.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The P3310 processor module comes ships with a firmware that implements
PSCI 1.0. Enable and use it to bring up all CPUs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The NVIDIA P3310 is a processor module used in several reference designs
that features a Tegra186 SoC, 8 GiB of LPDDR4 RAM, 32 GiB eMMC and other
essentials such as ethernet, WiFi and a PMIC. It is typically connected
to an I/O board (such as the P2597) that provides the connecters needed
to hook it up to the outside world.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 has two GPIO controllers that are no longer compatible with the
controller found on earlier generations. One of these controllers exists
in an always-on partition of the SoC whereas the other can be clock- and
powergated.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 has a total of four SDHCI controllers that each support SD 4.2
(up to UHS-I speed), SDIO 4.1 (up to UHS-I speed), eSD 2.1, eMMC 5.1 and
SDHOST 4.1 (up to UHS-I speed).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 has a total of nine I2C controllers that are compatible with
the I2C controllers introduced in Tegra114. Two of these controllers
share pads with two DPAUX controllers (for AUX transactions).
Signed-off-by: Thierry Reding <treding@nvidia.com>
The initial patch only added UARTA, but there's no reason we shouldn't
be adding all of them. While at it, also specify the missing clocks and
resets for UARTA.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 has six CPUs: two CPUs are second generation Denver CPUs that
support ARMv8 and four CPUs are Cortex-A57 CPUs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds the initial support of Tegra186 SoC. It provides enough to
enable the serial console and boot from an initial ramdisk.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
[treding@nvidia.com: remove leading 0 from unit-addresses]
[treding@nvidia.com: remove unused nvidia,bpmp property]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This changes SDHI0 pin names for H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports SDHI2 for H3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports SDHI2 for M3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports SDHI0 on M3ULCB board SD card slot
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports watchdog timer for M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables EXTALR clock that can be used for the watchdog.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports GPIO keys on M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports GPIO leds on M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7796 SoC based M3ULCB low cost
board (R-Car Starter Kit Pro)
This commit supports the following peripherals:
- SCIF (console)
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This updates H3ULCB device tree header with official board name
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC
interrupts. Although this was working but with error messages like:
genirq: Setting trigger mode 0 for irq 16 failed
Use level high interrupt instead of type none. The choice of level high was
rather an arbitrary decision hoping it will work on each platform. Tests shown
no issues so far.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYLvZEAAoJEME3ZuaGi4PXtDoQAIRly22e50cqCTabUukeWjgy
GfOL1aDuH6+iFApTMvUJEsvlMiEQANsGaIREeNsJhHcPbAXFClYIBSG/e24ZSULz
PfiADjpi2EaUdhoyEHjiMnYR4jZ/Oj4lo4iWmgQWIcBRqzlrCr35EvXfQ9deEj9K
TR71X0oawz4krphSaqn7+VWTBlAN24QDZtPyFi6XWgbxtQTpGHddNYZGyF/LWCSp
AOmE3rm556rKF+VZpNtYCKfRmP9SkXwm7q/voAuqjABGf+rKWE6P1B7e+jlN82HY
7fLZzHS7lzM80OK3fExRNCPdmQ13NVBiyNQDIMxyF460/ObPwGfCjOW9bam5dErr
DcIMDq83lTUXEwdhSgMuI/Orm2VFpla2G0AptKfbu1NkAbLaK1PtH212Lcwvti5a
NV2Vu9wF8PIDR/7ctZw2M3HunTaCzQQQMJiwJbSKjCguhhUDye1+ZiYdfMdIXCoG
b3V40gbm0PdKqZwC/J9uygT9lWro4LBSR8HUJWbBtBU3qpmECuGOtX8sHgB3JDbV
Adv7p5DjIPdS/ELkFxhdupx9fZHzl3w95CD8T27jNZLx9PKNHb9r9e7tdnJ8amDd
JCwe78V+vOAfuyM6cwJntHlY6WCkkC0YU5QgOCo5+uuTDm3ulCsoG5b6b6LEdKD1
dRNqOTXx8uHPV4I0jaUR
=j/xt
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Topic branch with DT arm64 changes for v4.10.
Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC
interrupts. Although this was working but with error messages like:
genirq: Setting trigger mode 0 for irq 16 failed
Use level high interrupt instead of type none. The choice of level high was
rather an arbitrary decision hoping it will work on each platform. Tests shown
no issues so far.
* tag 'samsung-dt64-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Use human-friendly symbols for interrupt properties in exynos7
arm64: dts: exynos: Fix invalid GIC interrupt flags in exynos7
Signed-off-by: Olof Johansson <olof@lixom.net>
Adding the new "community" board for Armada 3700
-----BEGIN PGP SIGNATURE-----
iGoEABECACoFAlguJU8jHGdyZWdvcnkuY2xlbWVudEBmcmVlLWVsZWN0cm9ucy5j
b20ACgkQCwYYjhRyO9VNGQCfRB3BbnBCIgpu0n9wWumR7LsDmJYAoIafat62MwuH
gRsYSdrm1VVhMHwQ
=LnOL
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.10-1' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu dt64 for 4.10 (part 1)
Adding the new "community" board for Armada 3700
* tag 'mvebu-dt64-4.10-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: Add definition for the Globalscale Marvell ESPRESSOBin Board
Signed-off-by: Olof Johansson <olof@lixom.net>
Support for the Allwinner A64, their first armv8 SoC.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYK3ohAAoJEBx+YmzsjxAgQ0cP/AtC7KSWnQ2afcEeIRxii9X+
QbiyQqPvmRF/mBtZN/49wKwRdh1qtsGk29UxMf06hrk2oA/Kc9KoPed+5Q0qG2ac
2m1KWN6G+qNk8bbd26A4sXRBsWUH7Gp7kCUjIBoRRUup6YQFySxIEjSU7dfmPHzi
Rxbq5fo9JMpar8bjVr1mVeIL/0p4Uz2LYt4miqARlztGJaUEZtBTrWDncLM0TqTV
hzeP1lKwelwkVDcrrSgZ5nBCcdmXFvIK6S3pNHcy11NCt7Qnf4pEn2heFs0Xh0/3
3nTcr7TEEeEc1oVc6UyM6GCgV3SrBlLTXIhvULQoU0sdhjTQxUo1zpDCO81p0UfQ
Qu7KxjhvXOjRYZLBQfXWN4VwOURrP9Bw2VwxN4vACUpQpQX/9eovIT8XVH9Jd8kO
bnbmzWLJq+arnE81CVrL7oqTK0r6O1/D+6kOLbvP9o6+Pt/2oJ8kHrJQCLXzfOnE
nhuZE489fTLeKtgloR5wez/Vu1JwaIhhHsfWkskljmi7Xx4XUJdu6XtBoS67qJE5
xDg/ujD3S9TT0AhZ5XWn1f6fCPI4N+E8HvHUJNLZSi1iPnW4c2wZ9tBBEOu7hh2X
7ZiZ6k+FOg+ZyY/jdChJ0SWvIzcutIbkP/0pKgLLPozEImv6ARqfyJbWauxbt/Hl
JKw9pE7Uo7ztdAz/52DL
=JkJ+
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt64-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt64
Allwinner arm64 DT changes for 4.10
Support for the Allwinner A64, their first armv8 SoC.
* tag 'sunxi-dt64-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm64: dts: add Pine64 support
Documentation: devicetree: add vendor prefix for Pine64
arm64: dts: add Allwinner A64 SoC .dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
- Correct the hardware pin number of the usb node on the Hip06
- Add the Hisilicon Hip07 D05 board dts binding
- Add the initial dts for the Hip07 D05 board
- Fix the warning for the node without reg propery on the Hip06
- Fix the sas am max transmissions quirk property on the Hip06
- Disable the sas0 and sas2 on D03 board
- Add refclk node for SAS on the Hip06
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYKvD8AAoJEAvIV27ZiWZcIdgP/RXYCWB8yztd3K74qSJ8xydr
SBKY77zXwQBHzmDEbB881pJOaaBKzO9uTHo6nbkWRoE/cMYONohc+cO7WkkY4Lav
gMEJ9Ss7ckwCAjQAkzh4hHV4V8EMA1+aMDNbNR/slw+neQnzBuTMd4EERmve3Wzg
d4exeYgXVWGZLWhfFxp9xwyDt8fn03LoYYgqkM6wFKKpCXFx6dDVvjZw/V7W5vn0
GVBSxgam2BW4ug4/Q6ZlnBrNU1db8DzhGUfqXOd8569v8QUxBq19Gy1DP1eTEtCl
5WvnOIUSDQ+1MEFIaybq9CIWcM792XoQEpV9OI1EouAOYN4JeAiutGPQY0seyEIF
X1jIPBteetqLtXSf3uQdYf8hVmTMNZp+/f/jRWK6K/BPgeVts0N9t1jqhcSMzOaH
cneUkCuXsN4crBzBszhSsSPNMg7vvuprJNJCepESdiA4lBpn/KKFRj3aDNOw+ev3
dpC6Rn0htzeg4wWWez9MptlXnMhRoL01FR+0nNy4R3FB4OEphzzMZuTWEAe7EyKA
wwPG0u2WqR8nqFgk7iphHcoI1/NevSr0HbxRl0dWZ2UDZtESvSseZl0AEQRTU2ES
/rg9S6ShNQvQI9bHhITIXixZ07gpyM/TPbJlAUp6PHtxwiVpLoDsCQEzCYnktFl+
S/4pvu6yetne9bIPz59s
=MVHS
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi into next/dt64
ARM64: DT: Hisilicon SoC DT updates for 4.10
- Correct the hardware pin number of the usb node on the Hip06
- Add the Hisilicon Hip07 D05 board dts binding
- Add the initial dts for the Hip07 D05 board
- Fix the warning for the node without reg propery on the Hip06
- Fix the sas am max transmissions quirk property on the Hip06
- Disable the sas0 and sas2 on D03 board
- Add refclk node for SAS on the Hip06
* tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisi: add refclk node to hip06 dts files for SAS
arm64: dts: hisi: disable sas0 and sas2 for d03
arm64: dts: hisi: fix hip06 sas am-max-trans quirk
arm64: dts: hip06: Fix no reg property warning
arm64: dts: hisilicon: Add initial dts for Hip07 D05 board
Documentation: arm64: Add Hisilicon Hip07 D05 dts binding
arm64: dts: hip06: Correct hardware pin number of usb node
Signed-off-by: Olof Johansson <olof@lixom.net>
