Commit Graph

60409 Commits

Author SHA1 Message Date
Suman Anna
c6df655726 ARM: dts: DRA74x: Add aliases for rproc nodes
Add aliases for all the IPU and DSP remoteproc processor
nodes common to all DRA74x/DRA76x/AM572x/AM574x boards.
The aliases uses the stem "rproc". The aliases are defined
in the order of the most common processors on the DRA74x
family.

The aliases can be overridden, if needed, in the respective
derivative board dts files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05 11:13:21 -07:00
Suman Anna
78aae49a23 ARM: dts: DRA74x: Add DSP2 processor device node
The DRA7xx family of SoCs can contain upto two identical DSP
processor subsystems. The second DSP processor subsystem is
present only on the DRA74x/DRA76x variants. The processor
device DT node has therefore been added in disabled state for
this processor subsystem in the DRA74x specific DTS file.

NOTE:
1. The node does not have any mailboxes, timers or CMA region
   assigned, they should be added in the respective board dts
   files.
2. The node should also be enabled as per the individual product
   configuration in the corresponding board dts files.

Signed-off-by: Suman Anna <s-anna@ti.com>
[t-kristo@ti.com: converted to support ti-sysc from legacy hwmod]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05 11:13:21 -07:00
Suman Anna
46ab8238e3 ARM: dts: DRA7: Add common IPU and DSP nodes
The DRA7xx family of SOCs have two IPUs and upto two DSP
processor subsystems in general. The IPU processor subsystem
contains dual-core ARM Cortex-M4 processors, while the DSP
processor subsystem is based on the TI's standard TMS320C66x
DSP CorePac core. The IPUs are very similar to those on OMAP5.

Two IPUs and one DSP processor subsystems is the most common
configuration. The processor device DT nodes have been added
for these processor subsystems, with the internal memories
added through 'reg' and 'reg-names' properties. The IPUs only
have an L2 RAM, whereas the DSPs have L1P, L1D and L2 RAM
memories.

NOTE:
1. The nodes do not have any mailboxes, timers or CMA regions
   assigned, they should be added in the respective board dts
   files.
2. The nodes haven been disabled by default and the enabling
   of these nodes is also left to the respective board dts
   files.

Signed-off-by: Suman Anna <s-anna@ti.com>
[t-kristo@ti.com: convert to ti-sysc support from legacy hwmod]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05 11:13:20 -07:00
Tero Kristo
5390130f3b ARM: dts: dra7: add timer_sys_ck entries for IPU/DSP timers
With this, the clocksource driver can setup the timers properly.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05 11:13:19 -07:00
Tony Lindgren
7cf0bb804d Merge branch 'omap-for-v5.8/dt-timer' into omap-for-v5.8/dt 2020-05-05 11:09:38 -07:00
Lokesh Vutla
ac819eda7c ARM: dts: Add 32KHz clock as default clock source
Clocksource to timer configured in pwm mode can be selected using the DT
property ti,clock-source. There are few pwm timers which are not
selecting the clock source and relying on default value in hardware or
selected by driver. Instead of relying on default value, always select
the clock source from DT.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05 10:56:42 -07:00
Pascal Paillet
b5a087139d ARM: dts: stm32: Enable thermal sensor support on stm32mp15xx-dkx
Enable STM32 Digital Thermal Sensor driver for stm32mp15xx-dkx boards.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-05 13:48:03 +02:00
Yann Gautier
2f9306969a ARM: dts: stm32: add sd-uhs properties in SD-card node for stm32mp157c-ed1
The sdmmc1 peripheral is connected on SD-card on STM32MP1-ED1 board.
Add the UHS features the controller is able to manage.
Those features require a level shifter on the board, and the support of
the voltage switch in driver, which is done in Linux v5.7.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-05 13:48:03 +02:00
Lad Prabhakar
48ad3c4a33 ARM: dts: r8a7742-iwg21d-q7: Add iWave G21D-Q7 board based on RZ/G1H
Add support for iWave RainboW-G21D-Qseven board based on RZ/G1H.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1588542414-14826-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-05 09:44:49 +02:00
Lad Prabhakar
269785eaba ARM: dts: r8a7742-iwg21m: Add iWave RZ/G1H Qseven SOM
Add support for iWave RZ/G1H Qseven System On Module.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1588542414-14826-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-05 09:44:49 +02:00
Lad Prabhakar
eb4cdda7a3 ARM: dts: r8a7742: Initial SoC device tree
The initial R8A7742 SoC device tree including CPU[0-8], PMU, PFC,
CPG, RST, SYSC, ICRAM[0-2], SCIFA2, MMC1, DMAC[0-1], GIC, PRR, timer
and the required clock descriptions.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1588542414-14826-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-05 09:44:49 +02:00
Andrew Jeffery
fa4c8ec6fe ARM: dts: aspeed: Change KCS nodes to v2 binding
Fixes the following warnings for both g5 and g6 SoCs:

    arch/arm/boot/dts/aspeed-g5.dtsi:376.19-381.8: Warning
    (unit_address_vs_reg): /ahb/apb/lpc@1e789000/lpc-bmc@0/kcs1@0: node
    has a unit name, but no reg property

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:17 +09:30
Eddie James
f90fe8d3b2 ARM: dts: Aspeed: AST2600: Add XDMA PCI-E root control reset
The AST2600 XDMA engine requires the PCI-E root control reset be cleared
as well, so add a phandle to that syscon reset.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:17 +09:30
Eddie James
e7d1ed849f ARM: dts: aspeed: ast2600: Add XDMA Engine
Add a node for the XDMA engine with all the necessary information.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:17 +09:30
Eddie James
910f65c556 ARM: dts: aspeed: ast2500: Add XDMA Engine
Add a node for the XDMA engine with all the necessary information.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:17 +09:30
Manikandan Elumalai
266056d3c6 ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC
The Yosemite V2 is a facebook multi-node server
platform that host four OCP server. The BMC
in the Yosemite V2 platform based on AST2500 SoC.

This patch adds linux device tree entry related to
Yosemite V2 specific devices connected to BMC SoC.

Signed-off-by: Manikandan Elumalai <manikandan.hcl.ers.epl@gmail.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Vijay Khemka <vkhemka@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:17 +09:30
Alexander Filippov
697538bd65 ARM: dts: aspeed: Add YADRO Nicole BMC
Nicole is an OpenPower machine with an Aspeed 2500 BMC SoC manufactured
by YADRO.

Signed-off-by: Alexander Filippov <a.filippov@yadro.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:17 +09:30
Ben Pai
6456bc88c9 ARM: dts: aspeed: mihawk: add aliases for i2c
Set the bus id for each mux channel to avoid switching channels
multiple times

Signed-off-by: Ben Pai <Ben_Pai@wistron.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Eddie James
39d8a73c53 ARM: dts: aspeed: tacoma: Add TPM
Add the Nuvoton NPCT75X to the appropriate i2c bus.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Andrew Jeffery
d2718f5e30 ARM: dts: aspeed: tacoma: Enable the second VUART
Used by some POWER hypervisors.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Eddie James
bf6c99f3ae ARM: dts: aspeed: tacoma: Add iio-hwmon nodes for IIO devices
Connect the BMP280 and DPS310 to the hwmon subsystem with iio-hwmon
nodes.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Joel Stanley
3208f3a513 ARM: dts: aspeed: rainier: Add VGA reserved memory region
The BMC uses reserves the top 16MB of memory for the host to use for VGA
or PCIe communication.

Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Andrew Geissler
e9b24b55ca ARM: dts: aspeed: rainier: Add gpio line names
Name the GPIOs to help userspace work with them. The names describe the
functionality the lines provide, not the net or ball name. This makes it
easier to share userspace code across different systems and makes the
use of the lines more obvious.

Signed-off-by: Andrew Geissler <geisonator@yahoo.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Joel Stanley
2f68e4e7df ARM: dts: aspeed: tacoma: Add gpio line names
Add names for some of the GPIOs that are used in Tacoma.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Andrew Geissler
fa09a28ca3 ARM: dts: aspeed: zaius: Add gpio line names
Name the GPIOs to help userspace work with them. The names describe the
functionality the lines provide, not the net or ball name. This makes it
easier to share userspace code across different systems and makes the
use of the lines more obvious.

Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Andrew Geissler
1f2c9d31e4 ARM: dts: aspeed: romulus: Add gpio line names
Name the GPIOs to help userspace work with them. The names describe the
functionality the lines provide, not the net or ball name. This makes it
easier to share userspace code across different systems and makes the
use of the lines more obvious.

Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Andrew Geissler
d5ece55c18 ARM: dts: aspeed: witherspoon: Add gpio line names
Name the GPIOs to help userspace work with them. The names describe the
functionality the lines provide, not the net or ball name. This makes it
easier to share userspace code across different systems and makes the
use of the lines more obvious.

Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Eddie James
c998f40f2a ARM: dts: aspeed: ast2600: Set arch timer always-on
According to ASPEED, FTTMR010 is not intended to be used in the AST2600.
The arch timer should be used, but Linux doesn't enable high-res timers
without being assured that the arch timer is always on, so set that
property in the devicetree.

The FTTMR010 device is described by set to disabled.

This fixes highres timer support for AST2600.

Fixes: 2ca5646b5c ("ARM: dts: aspeed: Add AST2600 and EVB")
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Joel Stanley
977f7e0028 ARM: dts: aspeed: tacoma: Add GPIOs for FSI
GPIO Q7 is no longer used for air/water. It is repurposed on Tacoma to
indicate internal FSI (low) vs cabled (high).

GPIO B0 controls the muxing of FSI to the cable (low) or internal pins
(high).

Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Ben Pai
c87f739459 ARM: dts: aspeed: mihawk: Change the name of leds
Change the name of power, fault and rear-id.
Remove the two leds.

Signed-off-by: Ben Pai <Ben_Pai@wistron.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Matthew Barth
fbb6f3e068 ARM: dts: aspeed: rainier: Remove regulators
Regulators will be dynamically configured and monitored from userspace.

Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Jim Wright <wrightj@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:16 +09:30
Joel Stanley
156fbb12f1 ARM: dts: aspeed: rainier: Add host FSI description
This adds the description of the Power CPUs that are attached to the
BMC.

Without this userspace will see the '/dev/scom66' style layout.

Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:15 +09:30
Joel Stanley
b2fa526ca2 ARM: dts: aspeed: ast2600evb: Enable FSI master
Use the first FSI master.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:15 +09:30
Eddie James
d0ba4f581e ARM: dts: aspeed: tacoma: Add gpio-key definitions
Add gpio-keys for various signals on Tacoma.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:15 +09:30
Matthew Barth
3ad7e45820 ARM: dts: aspeed: rainier: Set PCA9552 pin types
All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type
GPIO.

Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:15 +09:30
Andrew Jeffery
b19dad68c9 ARM: dts: aspeed: rainier: Enable VUART2
The second VUART is used to expose multiplexed, non-hypervisor consoles.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:15 +09:30
Alexander Filippov
4aca6812d2 ARM: dts: aspeed: ast2400: Add video engine support
Add a node to describe the video engine on AST2400.

These changes were copied from aspeed-g5.dtsi

Signed-off-by: Alexander Filippov <a.filippov@yadro.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:04 +09:30
Guenter Roeck
7f9dad6bdc ARM: dts: aspeed: tacoma: Enable eMMC controller
Enabling emmc without enabling its controller doesn't do any good.
Enable its controller as well to make it work.

Cc: Andrew Jeffery <andrew@aj.id.au>
Cc: Joel Stanley <joel@jms.id.au>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:04 +09:30
Vijay Khemka
d85fa6c6f3 ARM: dts: aspeed: tiogapass: Add gpio line names
Added GPIO line names for all gpio used in tiogapass platform,
these line names will be used by libgpiod to control GPIOs

Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:04 +09:30
Vijay Khemka
3dcfff96f1 ARM: dts: aspeed: tiogapass: Add IPMB device
Adding IPMB devices for facebook tiogapass platform.

Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:37:04 +09:30
Jae Hyun Yoo
bcee38919f ARM: dts: aspeed: ast2600: Add Video Engine node
The AST2600 has Video Engine so add it.

Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Acked-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 16:36:57 +09:30
Eddie James
f9950ad272 ARM: dts: aspeed: ast2600: Add SCU interrupt controllers
Add nodes for the interrupt controllers provided by the SCU.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 15:35:51 +09:30
Eddie James
d1f3f68f55 ARM: dts: aspeed: ast2500: Add SCU interrupt controller
Add a node for the interrupt controller provided by the SCU.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05 15:35:43 +09:30
Jonathan Bakker
c9ed436fd6 ARM: dts: s5pv210: Set MAX8998 GPIO pulls on Aries boards
Make sure that the GPIOs are configured correctly
for the interrupt (otherwise it won't fire) and disable the
pulls on the DVS GPIOs which are outputs.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
18c41a634e ARM: dts: s5pv210: Correct FIMC definitions
The extended mainscaler is only available on FIMC1 and there
are minimum pixel alignments that differ from the default.
Additionally, the cam-if interface is available on all three
while FIMC2 has no rotators.  The lcd-wb interface is supported
on FIMC1.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
44a390fb43 ARM: dts: s5pv210: Assign clocks to MMC devices on Aries boards
The SHDCI controller on Aries devices is a little bit peculiar about
the clocks and with a slightly off clock can run into errors such as:

    mmc2: ADMA error: 0x02000000
    mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
    mmc2: sdhci: Sys addr: 0x347e4cc4 | Version: 0x00002401
    mmc2: sdhci: Blk size: 0x00007004 | Blk cnt: 0x0000fffc
    mmc2: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013
    mmc2: sdhci: Present: 0x01fa0000 | Host ctl: 0x00000012
    mmc2: sdhci: Power: 0x00000000 | Blk gap: 0x00000000
    mmc2: sdhci: Wake-up: 0x00000000 | Clock: 0x0000010f
    mmc2: sdhci: Timeout: 0x0000000a | Int stat: 0x00000003
    mmc2: sdhci: Int enab: 0x03ff004b | Sig enab: 0x03ff004b
    mmc2: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000001
    mmc2: sdhci: Caps: 0x05e80080 | Caps_1: 0x00000000
    mmc2: sdhci: Cmd: 0x0000163a | Max curr: 0x00000000
    mmc2: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x00000000
    mmc2: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000
    mmc2: sdhci: Host ctl2: 0x00000000
    mmc2: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x349a3208
    mmc2: sdhci: ============================================
    mmc2: sdhci: 349a3200: DMA 0x347e4cc0, LEN 0x0004, Attr=0x23

Specifically assign the MMC sclks to be parented from MPLL with specific
rates that match the vendor kernel.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
07297ea732 ARM: dts: s5pv210: Enable ADC on Aries boards
On Aries boards, the ADC is used for things such as jack detection
and battery temperature monitoring.  It is supplied by LDO4 of max8998,
so only enable that regulator when we are actually using the ADC.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
e39d3a4b23 ARM: dts: s5pv210: Add an ADC node
The exynos-adc driver now supports the S5PV210, so add the DT
node so that devices can use it.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
04568cb58a ARM: dts: s5pv210: Disable pull for vibrator enable GPIO on Aries boards
The enable GPIO for the fixed vibrator regulator shouldn't be
pulled in one direction or the other.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Paweł Chmiel
94f3c8132c ARM: dts: s5pv210: Add si470x FM radio to Galaxy S
Add support for the Silicon Labs si4709 FM radio, which can be found
on Galaxy S GT-i9000 (but not on most of other Aries variants).

Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
e619c4ef38 ARM: dts: s5pv210: Add remaining i2c-gpio adapters to Aries boards
The remaining i2c-gpio adapters that are common to all Aries boards
have devices without mainline bindings attachted to them.  Add them
here for documentation.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
ecd7a47382 ARM: dts: s5pv210: Add panel support to Aries boards
Aries boards have an s6e63m0 AMOLED panel connected over i2c-spi.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
849994778e ARM: dts: s5pv210: Add touchkey support to Aries boards
Aries boards have soft touchkeys, manufactured by Cypress,
attached over i2c-gpio.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
3a4e7635d1 ARM: dts: s5pv210: Add FSA9480 support to Aries boards
The Fairchild FSA9480 is a USB mux connected over i2c-gpio.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
aa2146416d ARM: dts: s5pv210: Add WM8994 support to Aries boards
Aries boards have a Wolfson WM8994 sound card attached over gpio-i2c.

There is currently no ASoC Machine Driver.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
09b39f60ee ARM: dts: s5pv210: Disable pulls on GPIO I2C adapters for Aries
The bitbanged GPIO I2C adapters have external pull-ups attached
so the internal pulls should be disabled for lower power usage.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
869d42e6eb ARM: dts: s5pv210: Set keep-power-in-suspend for SDHCI1 on Aries
SDHCI1 is connected to a BCM4329 WiFi/BT chip which requires
power to be kept over suspend.  As the surrounding hardware supports
this, mark it as such.  This fixes WiFi after a suspend/resume cycle.

Fixes: 170642468a ("ARM: dts: s5pv210: Add initial DTS for Samsung Aries based phones")
Cc: <stable@vger.kernel.org>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
386c7b372d ARM: dts: s5pv210: Correct gpi pinctrl node name
The node name was gpgi, but the pinctrl driver was registering the pins
as just gpi and the "samsung,pins" i2s0 pinctrl entries refer to gpi.
The public S5PC110 datasheet also refers to these pins as just gpi,
so let's make sure everything is in sync and rename the node to gpi.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 17:13:04 +02:00
Jonathan Bakker
e4e5f69508 ARM: dts: s5pv210: Add sleep GPIO configuration for Galaxy S
In order to minimize leakage current during sleep, set a config
for sleep GPIOs.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 16:51:36 +02:00
Jonathan Bakker
d7d155a769 ARM: dts: s5pv210: Add sleep GPIO configuration for Fascinate4G
In order to minimize leakage current during sleep, set a config
for sleep GPIOs.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 16:50:10 +02:00
Jonathan Bakker
6a52e305f2 ARM: dts: s5pv210: Add helper define for sleep gpio config
To simplify writing of sleep gpio configs, add a common helper
similar to what is present for other Samsung CPUs.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-04 16:46:27 +02:00
Marek Vasut
878b0ba5c4 ARM: dts: stm32: Rename LEDs to match silkscreen on AV96
The LED labels do not match the silkscreen on the board, fix it.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:51:44 +02:00
Marek Vasut
e74ef3823b ARM: dts: stm32: Add bindings for USB on AV96
Fill in the bindings for USB host and gadget on AV96.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:51:44 +02:00
Marek Vasut
e027da3427 ARM: dts: stm32: Add bindings for audio on AV96
Fill in the bindings for HDMI audio on AV96, this permits audio playback
via attached HDMI device if such device supports it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:51:44 +02:00
Marek Vasut
dcf185ca81 ARM: dts: stm32: Add alternate pinmux for SAI2 pins on stm32mp15
Add new mux option for SAI2 pins, this is used on AV96 board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:51:28 +02:00
Marek Vasut
64e86752d7 ARM: dts: stm32: Add bindings for HDMI video on AV96
Fill in the HDMI video pipeline from AV96 into the DT.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:51:23 +02:00
Marek Vasut
0752cc4c66 ARM: dts: stm32: Add alternate pinmux for LTDC pins on stm32mp15
Add new mux option for LTDC pins, this is used on AV96 board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:51:04 +02:00
Marek Vasut
224771c947 ARM: dts: stm32: Enable Bluetooth on AV96
The WiFi/Bluetooth chip is attached to USART2 on AV96 as well, describe
it in DT to make it available. Remove BT LED and turn it into a shutdown
GPIO, because the GPIO line controls the BT_REG_ON signal. The LED is just
an indicator connected to the same line, but not the primary function.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:51:02 +02:00
Marek Vasut
077e0638fc ARM: dts: stm32: Add alternate pinmux for USART2 pins on stm32mp15
Add mux option for USART2 pins, this is used on AV96 board.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:50:43 +02:00
Marek Vasut
7dd5cbba42 ARM: dts: stm32: Enable WiFi on AV96
The WiFi/Bluetooth SDIO chip is attached to SDMMC3 on AV96, describe it
in DT to make it available. Remove WiFi LED and turn it into a regulator,
because it is a GPIO controlling the WL_REG_ON input of the WiFi chip.
The LED is just an indicator connected to the same line, but not the
primary function.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:50:39 +02:00
Marek Vasut
84faf29b2d ARM: dts: stm32: Add configuration EEPROM on AV96
The board has an EEPROM on the same I2C bus as PMIC, at address 0x53.
The EEPROM contains the board MAC address.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:50:39 +02:00
Marek Vasut
76045bc457 ARM: dts: stm32: Add QSPI NOR on AV96
The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it
into the DT.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:50:39 +02:00
Marek Vasut
611325f681 ARM: dts: stm32: Add eMMC attached to SDMMC2 on AV96
Add DT node describing the eMMC attached to SDMMC2 controller
of the STM32MP1 on DHCOR SoM, which is the SoM soldered on AV96.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:50:39 +02:00
Marek Vasut
e1ea5c1721 ARM: dts: stm32: Repair SDMMC1 operation on AV96
The SD uses different pinmux for the D123DIRline, use such a pinmux,
otherwise there is a pinmux collision on the AV96. Add missing SD
voltage regulator switch.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:50:39 +02:00
Marek Vasut
e88cee3787 ARM: dts: stm32: Add alternate pinmux for SDMMC pins on stm32mp15
Add another mux option for SDMMC1_D123DIR direction pins, SDMMC2 pins 4..7,
and SDMMC3 pins PD5_SDMMC3_D2 and PD0_SDMMC3_CMD, this is used on AV96 board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:50:19 +02:00
Marek Vasut
701f9e65e5 ARM: dts: stm32: Add missing ethernet PHY skews on AV96
The KS9031 PHY supports configurable PHY skews to compensate for
the board routing. Fill in the correct values.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:50:15 +02:00
Marek Vasut
010ca9fe50 ARM: dts: stm32: Add missing ethernet PHY reset on AV96
Add PHY reset GPIO on AV96 ethernet PHY.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:50:15 +02:00
Marek Vasut
3ed6bd31ba ARM: dts: stm32: Repair ethernet operation on AV96
The AV96 RGMII uses different pinmux for ETH_RGMII_TXD0, ETH_RGMII_RXD2
and ETH_RGMII_TX_CTL. Use the correct pinmux to make ethernet operational.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:50:15 +02:00
Marek Vasut
7354ba62fa ARM: dts: stm32: Add alternate pinmux for ethernet RGMII on stm32mp15
Add another mux option for DWMAC RGMII, this is used on AV96 board.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:49:43 +02:00
Marek Vasut
f3aa3bc3a5 ARM: dts: stm32: Repair PMIC interrupt on AV96
The PMIC interrupt line is connected to PA0 on the DHCOR SoM, fix it.
This makes the POWER button on the AV96 working, and also all the other
PMIC interrupts. Furthermore, scrub the bogus interrupt-parent props.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:43:53 +02:00
Marek Vasut
dff503ab76 ARM: dts: stm32: Repair PMIC configuration on AV96
The vdd PMIC buck regulator was misconfigured, which caused instability
of the board and malfunction of high-speed interfaces, like the RGMII.
Configure the PMIC correctly to repair these problems. Also add missing
Enpirion regulator for the IO voltage into the DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-29 09:43:53 +02:00
Linus Walleij
d67ef24adf ARM: dts: Add devicetree for Integrator/AP with IM-PD1
This adds a device tree for the Integrator/AP with the
IM-PD1 logic module mounted, using the new logic
module bindings.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 21:59:38 +02:00
Alain Volmat
ea6318dc5a ARM: dts: stm32: add Fast Mode Plus info in I2C nodes of stm32mp151
Add the syscfg-fmp property in each i2c node in order to allow
Fast Mode Plus speed if clock-frequency >= 1MHz is indicated.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-28 18:23:59 +02:00
Alain Volmat
06a933aaef ARM: dts: stm32: use st,stm32mp15-i2c compatible for stm32mp151
Replace previous st,stm32f7-i2c compatible with st,stm32mp15-i2c
for the platform stm32mp151.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-28 18:23:59 +02:00
Arnaud Pouliquen
dda8304316 ARM: dts: stm32: add cortex-M4 pdds management in Cortex-M4 node
Add declarations related to the syscon pdds for deep sleep management.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-28 17:14:07 +02:00
Yoshihiro Shimoda
ae990a1de0 ARM: dts: renesas: Fix IOMMU device node names
Fix IOMMU device node names as "iommu@".

Fixes: bbb44da0b5 ("ARM: dts: r8a7743: Add IPMMU DT nodes")
Fixes: 0dcba3de58 ("ARM: dts: r8a7745: Add IPMMU DT nodes")
Fixes: 350ae49b97 ("ARM: dts: r8a7744: Add IPMMU DT nodes")
Fixes: 70496727c0 ("ARM: shmobile: r8a7790: Add IPMMU DT nodes")
Fixes: f1951852ed ("ARM: shmobile: r8a7791: Add IPMMU DT nodes")
Fixes: 098cb3a601 ("ARM: shmobile: r8a7793: Add IPMMU nodes")
Fixes: 1cb2794f60 ("ARM: shmobile: r8a7794: Add IPMMU DT nodes")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1587461756-13317-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-27 12:01:52 +02:00
Geert Uytterhoeven
fea89b265f ARM: dts: shmobile: Update CMT1 compatible values
New compatible values were introduced for the 48-bit CMT devices on
SH-Mobile AG5 and R-Mobile A1, and the old "cmt-48"-based values were
deprecated.  However, the actual DTS files were never updated.

See also commits:
  - 81b604c399 ("dt-bindings: timer: renesas, cmt: Update CMT1 on
    sh73a0 and r8a7740"),
  - 8c1afba285 ("clocksource/drivers/sh_cmt: r8a7740 and sh73a0
    SoC-specific match"),
  - 19d608458f ("clocksource/drivers/sh_cmt: Document "cmt-48" as
    deprecated").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200420151553.22975-1-geert+renesas@glider.be
2020-04-27 11:59:23 +02:00
Linus Torvalds
b9916af776 Kbuild fixes for v5.7
- fix scripts/config to properly handle ':' in string type CONFIG options
 
  - fix unneeded rebuilds of DT schema check rule
 
  - git rid of ordering dependency between <linux/vermagic.h> and
    <linux/module.h> to fix build errors in some network drivers
 
  - clean up generated headers of host arch with 'make ARCH=um mrproper'
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Merge tag 'kbuild-fixes-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild

Pull Kbuild fixes from Masahiro Yamada:

 - fix scripts/config to properly handle ':' in string type CONFIG
   options

 - fix unneeded rebuilds of DT schema check rule

 - git rid of ordering dependency between <linux/vermagic.h> and
   <linux/module.h> to fix build errors in some network drivers

 - clean up generated headers of host arch with 'make ARCH=um mrproper'

* tag 'kbuild-fixes-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
  h8300: ignore vmlinux.lds
  Documentation: kbuild: fix the section title format
  um: ensure `make ARCH=um mrproper` removes arch/$(SUBARCH)/include/generated/
  arch: split MODULE_ARCH_VERMAGIC definitions out to <asm/vermagic.h>
  kbuild: fix DT binding schema rule again to avoid needless rebuilds
  scripts/config: allow colons in option strings for sed
2020-04-24 10:39:32 -07:00
Linus Torvalds
7adc4b3999 ARM: SoC fixes
A few smaller fixes for v5.7-rc3: The majority are fixes for bugs I found
 after restarting my randconfig build testing that had been dormant for
 a while.
 
 On the Nokia N950/N9 phone, a DT fix is required to address a boot
 regression.
 
 For the bcm283x (Raspberry Pi), two DT fixes address minor issues.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A few smaller fixes for v5.7-rc3: The majority are fixes for bugs I
  found after restarting my randconfig build testing that had been
  dormant for a while.

  On the Nokia N950/N9 phone, a DT fix is required to address a boot
  regression.

  For the bcm283x (Raspberry Pi), two DT fixes address minor issues"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  soc: imx8: select SOC_BUS
  soc: tegra: fix tegra_pmc_get_suspend_mode definition
  soc: fsl: dpio: avoid stack usage warning
  soc: fsl: dpio: fix incorrect pointer conversions
  ARM: imx: provide v7_cpu_resume() only on ARM_CPU_SUSPEND=y
  ARM: dts: bcm283x: Disable dsi0 node
  firmware: xilinx: make firmware_debugfs_root static
  drivers: soc: xilinx: fix firmware driver Kconfig dependency
  ARM: dts: bcm283x: Add cells encoding format to firmware bus
  ARM: dts: OMAP3: disable RNG on N950/N9
2020-04-23 09:36:40 -07:00
Arnd Bergmann
f42ae4cd4c This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.7, please pull the following:
 
 - Nicolas provides a fix for 55c7c06210 ("ARM: dts: bcm283x: Fix vc4's
   firmware bus DMA limitations") which missed adding proper
   #address-cells and #size-cells properties and he also disables the DSI
   node which should have been disabled by default but was not.
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Merge tag 'arm-soc/for-5.7/devicetree-fixes' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.7, please pull the following:

- Nicolas provides a fix for 55c7c06210 ("ARM: dts: bcm283x: Fix vc4's
  firmware bus DMA limitations") which missed adding proper
  #address-cells and #size-cells properties and he also disables the DSI
  node which should have been disabled by default but was not.

* tag 'arm-soc/for-5.7/devicetree-fixes' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcm283x: Disable dsi0 node
  ARM: dts: bcm283x: Add cells encoding format to firmware bus

Link: https://lore.kernel.org/r/20200417171725.1084-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-04-23 17:12:48 +02:00
Masahiro Yamada
62d0fd591d arch: split MODULE_ARCH_VERMAGIC definitions out to <asm/vermagic.h>
As the bug report [1] pointed out, <linux/vermagic.h> must be included
after <linux/module.h>.

I believe we should not impose any include order restriction. We often
sort include directives alphabetically, but it is just coding style
convention. Technically, we can include header files in any order by
making every header self-contained.

Currently, arch-specific MODULE_ARCH_VERMAGIC is defined in
<asm/module.h>, which is not included from <linux/vermagic.h>.

Hence, the straight-forward fix-up would be as follows:

|--- a/include/linux/vermagic.h
|+++ b/include/linux/vermagic.h
|@@ -1,5 +1,6 @@
| /* SPDX-License-Identifier: GPL-2.0 */
| #include <generated/utsrelease.h>
|+#include <linux/module.h>
|
| /* Simply sanity version stamp for modules. */
| #ifdef CONFIG_SMP

This works enough, but for further cleanups, I split MODULE_ARCH_VERMAGIC
definitions into <asm/vermagic.h>.

With this, <linux/module.h> and <linux/vermagic.h> will be orthogonal,
and the location of MODULE_ARCH_VERMAGIC definitions will be consistent.

For arc and ia64, MODULE_PROC_FAMILY is only used for defining
MODULE_ARCH_VERMAGIC. I squashed it.

For hexagon, nds32, and xtensa, I removed <asm/modules.h> entirely
because they contained nothing but MODULE_ARCH_VERMAGIC definition.
Kbuild will automatically generate <asm/modules.h> at build-time,
wrapping <asm-generic/module.h>.

[1] https://lore.kernel.org/lkml/20200411155623.GA22175@zn.tnic

Reported-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Acked-by: Jessica Yu <jeyu@kernel.org>
2020-04-23 10:50:26 +09:00
Tomi Valkeinen
441ba630ac ARM: dts: am57xx-idk-common: add tc358778 bridge
AM5 IDK boards have TC358778 DPI-to-DSI bridge. Two different DSI panel
models are used with the AM5 IDKs, and these panels are added with DT
overlays. The AM5 IDKs can also be used without any panel.

Add TC358778 data to the am57xx-idk-common.dtsi, but set the status to
disabled.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-04-21 09:46:27 -07:00
Jason Kridner
520557d485 ARM: dts: am5729: beaglebone-ai: adding device tree
BeagleBoard.org BeagleBone AI is an open source hardware single
board computer based on the Texas Instruments AM5729 SoC featuring
dual-core 1.5GHz Arm Cortex-A15 processor, dual-core C66 digital
signal processor (DSP), quad-core embedded vision engine (EVE),
Arm Cortex-M4 processors, dual programmable realtime unit
industrial control subsystems and more. The board features 1GB
DDR3L, USB3.0 Type-C, USB HS Type-A, microHDMI, 16GB eMMC flash,
1G Ethernet, 802.11ac 2/5GHz, Bluetooth, and BeagleBone expansion
headers.

For more information, refer to:
https://beaglebone.ai

This patch introduces the BeagleBone AI device tree.

Note that the device use the "ti,tpd12s016" component which is
software compatible with "ti,tpd12s015". Thus we only use the
latter driver.

Signed-off-by: Jason Kridner <jdk@ti.com>
Signed-off-by: Caleb Robey <c-robey@ti.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-04-21 09:43:25 -07:00
Arnd Bergmann
d6b0a5b3ab Boot regression fix for N950/N9
We need to tag RNG as disabled for N950/N9 as it blocked by the secure
 mode. We have a similar change done for N900, but I missed adding it
 for N950/N9 with the recent RNG changes.
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Merge tag 'omap-for-v5.6/fixes-rc7-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Boot regression fix for N950/N9

We need to tag RNG as disabled for N950/N9 as it blocked by the secure
mode. We have a similar change done for N900, but I missed adding it
for N950/N9 with the recent RNG changes.

* tag 'omap-for-v5.6/fixes-rc7-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: OMAP3: disable RNG on N950/N9

Link: https://lore.kernel.org/r/pull-1585340588-558327@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-04-20 21:42:20 +02:00
Marek Vasut
a49e244797 ARM: dts: stm32: Enable I2C2 on DHCOM PDK2 carrier board
The I2C2 is routed out to header X21, enable it to make it available.
Add a comment to I2C5, which is routed to header X22 right next to it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20 12:15:23 +02:00
Ahmad Fatoum
666b5ca85c ARM: dts: stm32: add STM32MP1-based Linux Automation MC-1 board
The Linux Automation MC-1 is a SBC built around the Octavo Systems
OSD32MP15x SiP. The SiP features up to 1 GB DDR3 RAM, EEPROM and
a PMIC. The board has eMMC and a SD slot for storage and GbE
for both connectivity and power.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20 12:15:23 +02:00
Ahmad Fatoum
c19e7f7496 ARM: dts: stm32: use uniform node names for sleep pinctrl groups
While all sleep pinctrl group labels now follow a fixed naming scheme,
node _names_ for these groups don't:

- Some use ${dev}-[0-9], where the suffix is the normal group suffix + 1
- Some use ${dev}-sleep-[0-9], where suffix is the normal group suffix
- The &ltdc node uses ${dev}-[a-z]-[0-9], where the letter matches the
  phandle and the number suffix is the normal group's suffix + 1

For uniformity, standardize on using ${dev}-[0-9]+ for all normal
pinctrl groups and ${dev}-sleep-[0-9]+ for all sleep pinctrl groups.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20 12:15:23 +02:00
Ahmad Fatoum
6ddf19e09f ARM: dts: stm32: use uniform label names for sleep pinctrl phandles
Some labels follow the *_sleep_pins_* naming scheme, but some also use
*_pins_sleep_*. Because most labels use the former and for uniformity
with variants like sdmmc1_b4_pins_a and sdmmc1_dir_pins_a, adopt the
*_sleep_pins_* scheme throughout.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20 12:15:23 +02:00
Ahmad Fatoum
276bd3f003 ARM: dts: stm32: remove now redundant STM32MP15x video cell sizes
With the cell sizes specified in the SoC DTSIs in a previous commit,
individual boards no longer need to specify them, thus drop them.

No functional change.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20 12:15:23 +02:00
Ahmad Fatoum
9c32f980d9 ARM: dts: stm32: preset stm32mp15x video #address- and #size-cells
The cell count for address and size is defined by the binding and not
something a board would change. Avoid each board adding this
boilerplate by having the cell size specification in the SoC DTSI.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20 12:15:23 +02:00