Commit Graph

19266 Commits

Author SHA1 Message Date
Thomas Daniel
b07da53c79 drm/i915: Shift driver's HWSP usage out of reserved range
As of Gen6, the general purpose area of the hardware status page has shrunk and
now begins at dword 0x30.  i915 driver uses dword 0x20 to store the seqno which
is now reserved.  So shift our HWSP dwords up into the general purpose range
before this bites us.

Note that all available documentation just says this is reserved
without going into details about what it's used for.

Signed-off-by: Thomas Daniel <thomas.daniel@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
[danvet: Add clarification from Thomas that unfortunately Bspec is
silent on what "reserverd" precisely means.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-24 11:50:32 +01:00
Boris Brezillon
0f2cfa8116 drm: atmel-hlcdc: remove useless pm_runtime_put_sync in probe
Remove a useless pm_runtime_put_sync leading to unbalanced
usage_count.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reported-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
2015-02-24 11:45:11 +01:00
Boris Brezillon
bd4248bb5e drm: atmel-hlcdc: reset layer A2Q and UPDATE bits when disabling it
The A2Q (Add To Queue) and UPDATE bits are left in their previous state
when resetting the layer.
This lead to weird behavior when enabling the plane again: the framebuffer
previously queued is dequeued and we end up with access to an old memory
region.

Reset those bits when resetting the channel.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-02-24 11:45:11 +01:00
Sylvain Rochet
16e6004eb7 drm: atmel-hlcdc: Add pinctrl PM select sleep,default state in CRTC suspend/resume
Some LCD panels have back-powering issue when un-powered, allows users
to use an alternate pinctrl "sleep" in order to clamp outputs to a
wanted state at suspend.

Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-02-24 11:24:38 +01:00
Sylvain Rochet
5848698258 drm: atmel-hlcdc: Add PM suspend/resume support
On suspend: switch off CRTC if not already suspended with runtime PM

On resume: switch on CRTC if we were not already suspended from runtime
PM while suspending.

Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-02-24 11:23:07 +01:00
Dave Airlie
5b49afd60a Merge tag 'drm-amdkfd-fixes-2015-02-23' of git://people.freedesktop.org/~gabbayo/linux into drm-fixes
- Fix a bug that caused 15% CPU performance drop in Kaveri. This was caused
  because we overwritten the initialization of the first pipe (out of eight),
  which is dedicated to radeon operation. The fix was tested by Michel Dänzer.
  This bug was introduced by a patch I prepared (yeah, my bad) and was merged
  to 3.19-rc6. Therefore, I also marked it as Cc:stable.

- Fix sparse warning
* tag 'drm-amdkfd-fixes-2015-02-23' of git://people.freedesktop.org/~gabbayo/linux:
  drm/amdkfd: don't set get_pipes_num() as inline
  drm/amdkfd: Initialize only amdkfd's assigned pipelines
2015-02-24 11:10:14 +10:00
Dave Airlie
8ee351625e drm/tegra: Fixes for v3.20-rc1
This fixes a bit of fallout that was caused by the atomic modesetting
 driver conversion and some last-minute changes in the DRM atomic core.
 It also fixes a bug exposed by recent changes in the clock framework
 which results in non-working HDMI.
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Merge tag 'drm/tegra/for-3.20-rc1-fixes' of git://anongit.freedesktop.org/tegra/linux into drm-fixes

drm/tegra: Fixes for v3.20-rc1

This fixes a bit of fallout that was caused by the atomic modesetting
driver conversion and some last-minute changes in the DRM atomic core.
It also fixes a bug exposed by recent changes in the clock framework
which results in non-working HDMI.

* tag 'drm/tegra/for-3.20-rc1-fixes' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: dc: Move more code into ->init()
  drm/tegra: dc: Wire up CRTC parent of atomic state
  drm/tegra: dc: Reset state's active_changed field
  drm/tegra: hdmi: Explicitly set clock rate
2015-02-24 11:08:47 +10:00
Daniel Vetter
2caa80e72b drm: Fix deadlock due to getconnector locking changes
In commit ccfc08655d
Author: Rob Clark <robdclark@gmail.com>
Date:   Thu Dec 18 16:01:48 2014 -0500

    drm: tweak getconnector locking

We need to extend the locking to cover connector->state reading for
atomic drivers, but the above commit was a bit too eager and also
included the fill_modes callback. Which on i915 on old platforms using
load detection needs to acquire modeset locks, resulting in a deadlock
on output probing.

Reported-by: Marc Finet <m.dreadlock@gmail.com>
Cc: Marc Finet <m.dreadlock@gmail.com>
Cc: robdclark@gmail.com
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-24 11:05:20 +10:00
Daniel Vetter
c982bd90f5 drm/atomic-helpers: make mode_set hooks optional
With runtime PM the hw might still be off while doing the ->mode_set
callbacks - runtime PM get/put should only happen in the
enable/disable hooks to properly support DPMS. Which essentially makes
these callbacks useless for drivers support runtime PM, so make them
optional. Again motivated by discussions with Laurent.

Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-24 01:58:15 +01:00
Daniel Vetter
1af434a928 drm/atomic-helper: Rename commmit_post/pre_planes
These names only make sense because of backwards compatability with
the order used by the crtc helper library. There's not really any real
requirement in the ordering here.

So rename them to something more descriptive and update the kerneldoc
a bit. Motivated in a discussion with Laurent about how to restore
plane state for dpms for drivers with runtime pm.

v2: Squash in fixup from Stephen Rothwell to fix a conflict with
tegra.

Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-24 01:57:46 +01:00
Thomas Daniel
3e5b6f05a2 drm/i915: Reset logical ring contexts' head and tail during GPU reset
Work was getting left behind in LRC contexts during reset.  This causes a hang
if the GPU is reset when HEAD==TAIL because the context's ringbuffer head and
tail don't get reset and retiring a request doesn't alter them, so the ring
still appears full.

Added a function intel_lr_context_reset() to reset head and tail on a LRC and
its ringbuffer.

Call intel_lr_context_reset() for each context in i915_gem_context_reset() when
in execlists mode.

Testcase: igt/pm_rps --run-subtest reset #bdw
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88096
Signed-off-by: Thomas Daniel <thomas.daniel@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
[danvet: Flatten control flow in the lrc reset code a notch.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-24 00:19:37 +01:00
Damien Lespiau
b766879106 drm/i915/skl: Tune IZ hashing when subslices are unbalanced
When one EU is disabled in a particular subslice, we can tune how the
work is spread between subslices to improve EU utilization.

v2: - Use a bitfield to record which subslice(s) has(have) 7 EUs. That
      will also make the machinery work if several sublices have 7 EUs.
      (Jeff Mcgee)
    - Only apply the different hashing algorithm if the slice is
      effectively unbalanced by checking there's a single subslice with
      7 EUs. (Jeff Mcgee)

v3: Fix typo in comment (Jeff Mcgee)

Issue: VIZ-3845
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Reviewed-by: Jeff Mcgee <jeff.mcgee@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-24 00:07:05 +01:00
Paulo Zanoni
cb0a08c1ed drm/i915: don't reallocate the compressed FB at every frame
With the current code we just reallocate the compressed FB at every
FBC update: we have X in one frame, then in the other frame we need X
again, but we check "needed < have" instead of "needed <= have".

v2: Rebase after Jani addressed the other problems described in v1.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-24 00:02:20 +01:00
Paulo Zanoni
e489e38e3f drm/i915: gen5+ can have FBC with multiple pipes
So allow it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 23:59:57 +01:00
Paulo Zanoni
68b92147d5 drm/i915: HSW+ FBC is tied to pipe A
So add code to consider this case.

v2: Reorder the series, so drop the possible_framebuffer_bits chunk.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 23:59:39 +01:00
Paulo Zanoni
9510675387 drm/i915: extract intel_fbc_find_crtc()
I want to make this code a little more complicated, so let's extract
the function first.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 23:59:28 +01:00
Jeff McGee
0cea6502bf drm/i915: Request full SSEU enablement on Gen9
On Gen9 the render power gating can leave slice/subslice/EU in
a partially enabled state. We must make an explicit request for
full SSEU enablement through the Render Power Clock State
register when resuming render work. This register is save/
restored in the logical ring context image for execlist
submission mode. Initialize its value in each LRC image to
request full enablement according to the device SSEU config.

Thanks to Sharma Ankitprasad and Akash Goel for highlighting the
issue and proposing the initial fix on which this patch is based.

v2: Adjusted the names of the power gating support flags to fit
    update of an earlier patch.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: "Akash Goel <akash.goel@intel.com>"
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 23:57:13 +01:00
Jeff McGee
7f992aba1e drm/i915/skl: Add SKL HW status to SSEU status
Add a new section to the 'i915_sseu_status' debugfs entry to
report the currently enabled counts of slice, subslice, and
execution units on the device. The count of enabled subslice
per slice represents the most enabled subslice on any one
slice for devices where imbalances may exist. Similarly, the
count of enabled EU per subslice represents the most enabled
EU on any one subslice.

Collect this device status for Skylake by reading the Gen9
power gate control ack message registers. Power gate control
operates on EU in pairs, therefore our reported counts of
enabled EU can be overestimated by one for each pair in which
one EU is fused-off.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 23:57:08 +01:00
Jeff McGee
3873218f35 drm/i915/skl: Determine SKL slice/subslice/EU info
Read fuse registers to determine the available slice total,
subslice total, subslice per slice, EU total, and EU per subslice
counts of the SKL device. The EU per subslice attribute is more
precisely defined as the maximum EU available on any one subslice,
since available EU counts may vary across subslices due to fusing.
Set flags indicating the SKL device's slice/subslice/EU (SSEU)
power gating capability. Make all values available via debugfs
entry 'i915_sseu_status'.

v2: Several small clean-ups suggested by Damien. Most notably,
    used smaller types for the new device info fields to reduce
    memory usage and improved the clarity/readability of the
    method used to extract attribute values from the fuse
    registers.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 23:56:59 +01:00
Damien Lespiau
d0bbbc4faf drm/i915/skl: Implement WaDisablePowerCompilerClockGating
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 17:31:15 +01:00
Liu Ying
d70e96ae05 DRM: i.MX: parallel display: Support probe deferral for finding DRM panel
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-02-23 17:19:25 +01:00
Philipp Zabel
51dac94e80 drm/imx: imx-ldb: enable DI clock in encoder_mode_set
Commit eb10d63555 ("imx-drm: encoder prepare/mode_set must use adjusted mode")
broke the first LVDS modeset by using crtc->hwmode before crtc mode_set is
called. In fact, encoder prepare is not supposed to prepare the display clock
at all. Rather encoder mode_set should be used to set the DI clock rate, before
it is enabled by crtc commit.

Reported-by: Liu Ying <Ying.Liu@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-02-23 17:19:01 +01:00
Philipp Zabel
6e8958ec0e drm/imx: dw_hdmi-imx: add end of array element to current control array
The loop iterating over curr_ctrl in dw_hdmi terminates on mpixelclock == ~0UL,
so there needs to be an end of list element here in case a mode with a pixel
clock larger than 216 MHz is set.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-02-23 17:19:01 +01:00
Philipp Zabel
081c80e85f drm/imx: dw_hdmi-imx: add mode_valid callback prune unsupported modes
This patch limits the pixel clock to 13.4 MHz - 266 MHz for i.MX6Q
and 13.5 MHz - 270 MHz for i.MX6DL, which is the range documented
in the HDMI Transmitter chapter of the respective reference manuals.

Without this patch, when connected to a monitor capable of 2160p60
modes, dw_hdmi will happily report this mode and the IPU code will
cause a division by zero in ipu_di_config_clock when trying to figure
out how to divide the 264 MHz HSP clock down to ~600 MHz.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-02-23 17:19:00 +01:00
Vijay Purushothaman
9505e01acd drm/i915: Limit max VCO supported in CHV to 6.48GHz
As per the recommendation from PHY team, limit the max vco supported in CHV to 6.48 GHz

Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@linux.intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 17:12:13 +01:00
Vijay Purushothaman
d3eee4baa0 drm/i915: Add new PHY reg definitions for lock threshold
Added new PHY register definitions to control TDC buffer calibration and
digital lock threshold.

Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 17:10:51 +01:00
Chris Wilson
17cabf571e drm/i915: Trim the command parser allocations
Currently, the command parser tries to create a secondary batch exactly
as large as the original, and vmap both. This is open to abuse by
userspace using extremely large batch objects, but only executing very
short batches. For example, this would be if userspace were to implement
a command submission ringbuffer. However, we only need to allocate pages
for just the contents of the command sequence in the batch - all
relocations copied to the secondary batch will reference the original
batch and so there can be no access to the secondary batch outside of
the explicit execution region.

Testcase: igt/gem_exec_big #ivb,byt,hsw
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88308
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 17:07:40 +01:00
Dave Gordon
c32e3788ec drm/i915: FIFO space query code refactor
When querying the GTFIFOCTL register to check the FIFO space, the read value
must be masked. The operation is repeated explicitly in several places. This
change refactors the read-and-mask code into a function call.

v2: rebased on top of Mika's forcewake patch set, specifically:
	[PATCH 8/8] drm/i915: Enum forcewake domains and domain identifiers

Change-Id: Id1a9f3785cb20b82d4caa330c37b31e4e384a3ef
Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 16:45:16 +01:00
Jani Nikula
cf6f0af9fb drm/i915: Dell Chromebook 11 has PWM backlight
Add quirk for Dell Chromebook 11 backlight.

Reported-and-tested-by: Owen Garland <garland.owen@gmail.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=93451
Acked-by: Damien Lespiau <damien.lespiau@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-23 15:12:49 +02:00
Jani Nikula
f75fb42a61 drm/i915/skl: handle all pixel formats in skylake_update_primary_plane()
skylake_update_primary_plane() did not handle all pixel formats returned
by skl_format_to_fourcc(). Handle alpha similar to skl_update_plane().

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89052
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-23 15:07:11 +02:00
Laurent Pinchart
a072f809b6 drm/atomic: Rename drm_atomic_helper_commit_pre_planes() state argument
The argument contains a pointer to the old state, rename it to old_state
like in all other commit helper functions.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 11:20:26 +01:00
Daniel Vetter
31c946e85c drm: If available use atomic state in getcrtc ioctl
This way drivers fully converted to atomic don't need to update these
legacy state variables in their modeset code any more.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-23 11:20:11 +01:00
Daniel Vetter
17a38d9c25 drm: Add DRM_DEBUG_ATOMIC
Atomic state handling adds a lot of indirection and complexity between
simple updates and drivers. For easier debugging the diagnostic output
is therefore rather chatty. Which is great for tracking down atomic
issues, but really annoying otherwise.

Add a new DRM_DEBUG_ATOMIC to be able to filter this out.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-23 11:19:49 +01:00
Laurent Pinchart
7f50002fc6 drm/atomic-helpers: Fix documentation typos and wrong copy&paste
The kerneldoc blocks for the drm_atomic_helper_*_set_property()
functions seem to have been copied from the plane disable handler
without being properly updated. Fix them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 11:19:36 +01:00
Damien Lespiau
30b79f062e drm: Fix drm_crtc_vblank_get() documentation
drm_crtc_vblank_get() is the new drm_vblank_get(), not the new
drm_vblank_off().

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-23 11:19:34 +01:00
Daniel Vetter
ee3c7795e5 drm: WARN if drm_handle_vblank is called errornously
KMS drivers are in full control of their irq and vblank handling, if
they get a vblank interrupt before drm_vblank_init or after
drm_vblank_cleanup that's just a driver bug.

For ums driver there's only r128 and radeon which support vblank, and
they call drm_vblank_init in their driver load functions. Which again
means that userspace can do whatever it wants with interrupt, vblank
structures will always be there.

So this should never happen, let's catch driver issues with a WARN_ON.
Motivated by some discussions with Imre.

v2: Use WARN_ON_ONCE as suggested by Imre.

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-23 10:54:29 +01:00
Daniel Vetter
3bff93d64c drm/irq: Don't call ->get_vblank_counter directly from irq_uninstall/cleanup
The pipe might already have been shut down, and then it's not a good
idea to call hw accessor functions. Instead use the same logic as
drm_vblank_off which has all the necessary checks to avoid troubles or
inconsistency.

Noticed by Imre while reviewing my patches to remove some sanity
checks from ->get_vblank_counter.

v2: Try harder. disable_and_save can still access the vblank stuff
when vblank->enabled isn't set. It has to, since vlbank irq could be
disable but the pipe is still on when being called from
drm_vblank_off. But we still want to use that code for more code
sharing. So add a check for vblank->enabled on top - if that's not set
we shouldn't have anyone waiting for the vblank. If we have that's a
pretty serious bug.

The other issue that Imre spotted is drm_vblank_cleanup. That code
again calls disable_and_save and so suffers from the same issues. But
really drm_irq_uninstall should have cleaned that all up, so replace
the code with WARN_ON. Note that we can't delete the timer cleanup
since drivers aren't required to use drm_irq_install/uninstall, but
can do their own irq handling.

v3: Make it clear that all that gunk in drm_irq_uninstall is really
just bandaids for UMS races between the irq/vblank code. In UMS
userspace is in control of enabling/disabling interrupts in general
and vblanks specifically.

v4: Imre observed that KMS drivers all call drm_vblank_cleanup before
drm_irq_uninstall (as they should), so again the code in there is dead
for KMS (due to dev->num_crtcs == 0 after drm_vblank_cleanup). Or
should be, so only WARN for KMS - with UMS userspace could try to do
evil things.

v5: After more discussion on irc we've gone back to v3: the
del_timer_sync is required in all cases in drm_vblank_cleanup, but
let's restrict the WARN_ON to kms drivers only. Imre was also
concerned that bad things could happen without the disable_and_save
call. But we immediately free vblank structures afterwards which makes
the save useless. And drm_handle_vblank has a check for dev->num_crtcs
to avoid surprises with ums.

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-23 10:54:28 +01:00
Daniel Vetter
1e3feefd5a drm/i915: Switch to drm_crtc variants of vblank functions
Where possible right now. Just a small step towards nirvana ...

v2: git add. Uggh. Noticed by Imre.

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-23 10:54:28 +01:00
Daniel Vetter
f3a5c3f62f drm/i915: Flatten DRIVER_MODESET checks in i915_irq.c
UMS is no more!

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-23 10:54:27 +01:00
Daniel Vetter
1efa2e357e drm/i915: Drop pipe_enable checks in vblank funcs
With Ville's rework to use drm_crtc_vblank_on/off the core will take
care of rejecting drm_vblank_get calls when the pipe is off. Also the
core won't call the get_vblank_counter hooks in that case either. And
since we've dropped ums support recently we can now remove these
hacks, yay!

Noticed while trying to answer questions Laurent had about how the new
atomic helpers work.

Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-23 10:54:27 +01:00
Daniel Vetter
9625604ceb drm/irq: Add drm_crtc_vblank_reset
At driver load we need to tell the vblank code about the state of the
pipes, so that the logic around reject vblank_get when the pipe is off
works correctly.

Thus far i915 used drm_vblank_off, but one of the side-effects of it
is that it also saves the vblank counter. And for that it calls down
into the ->get_vblank_counter hook. Which isn't really a good idea
when the pipe is off for a few reasons:
- With runtime pm the register might not respond.
- If the pipe is off some datastructures might not be around or
  unitialized.

The later is what blew up on gen3: We look at intel_crtc->config to
compute the vblank counter, and for a disabled pipe at boot-up that's
just not there. Thus far this was papered over by a check for
intel_crtc->active, but I want to get rid of that (since it's fairly
race, vblank hooks are called from all kinds of places).

So prep for that by adding a _reset functions which only does what we
really need to be done at driver load: Mark the vblank pipe as off,
but don't do any vblank counter saving or event flushing - neither of
that is required.

v2: Clarify the code flow slightly as suggested by Ville.

v3: Fix kerneldoc spelling, spotted by Laurent.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com> (v2)
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-23 10:53:38 +01:00
Rodrigo Vivi
0dc6f20b98 drm/i915/bdw: PCI IDs ending in 0xb are ULT.
When reviewing patch that fixes VGA on BDW Halo Jani noticed that
we also had other ULT IDs that weren't listed there.

So this follow-up patch add these pci-ids as halo and fix comments
on i915_pciids.h

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-23 11:31:18 +02:00
Oded Gabbay
64ea8f4af5 drm/amdkfd: don't set get_pipes_num() as inline
get_pipes_num() calls BUG_ON so we can't set it as inline because it produces a
warning as BUG_ON() uses static variables when it is expanded.

Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
2015-02-23 10:48:02 +02:00
Oded Gabbay
1365aa6266 drm/amdkfd: Initialize only amdkfd's assigned pipelines
This patch fixes a bug in the initialization of the pipelines. The
init_pipelines() function was called with a constant value of 0 in the
first_pipe argument. This is an error because amdkfd doesn't handle pipe 0.

The correct way is to pass the value that get_first_pipe() returns as the
argument for first_pipe.

This bug appeared in 3.19 (first version with amdkfd) and it causes around 15%
drop in CPU performance of Kaveri (A10-7850).

v2: Don't set get_first_pipe() as inline because it calls BUG_ON()

Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
Cc: stable@vger.kernel.org
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-23 10:47:56 +02:00
Boris Brezillon
5957017db0 drm: atmel-hlcdc: add discard area support
The HLCDC IP provides a way to discard a specific area on the primary
plane (in case at least one of the overlay is activated and alpha
blending is disabled).
Doing this will reduce the amount of data to transfer from the main
memory to the Display Controller, and thus alleviate the load on the
memory bus (since this link is quite limited on such hardware,
this kind of optimization is really important).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-22 21:00:06 +01:00
Boris Brezillon
2389fc1305 drm: atmel-hlcdc: Atomic mode-setting conversion
Convert the HLCDC driver to atomic mode-setting.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-22 21:00:06 +01:00
Thierry Reding
07d05cbf60 drm/tegra: dc: Move more code into ->init()
The code in tegra_crtc_prepare() really belongs in tegra_dc_init(), or
at least most of it. This fixes an issue with VBLANK handling because
tegra_crtc_prepare() would overwrite the interrupt mask register that
tegra_crtc_enable_vblank() had written to to enable VBLANK interrupts.

Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-02-19 14:21:51 +01:00
Thierry Reding
332bbe7003 drm/tegra: dc: Wire up CRTC parent of atomic state
Store a pointer to the CRTC in its atomic state to make it easy for
state handling code to get at the CRTC.

Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-02-19 14:21:47 +01:00
Thierry Reding
567a3cd1d7 drm/tegra: dc: Reset state's active_changed field
Commit eab3bbeffd ("drm/atomic: Add drm_crtc_state->active") added the
field to track the DPMS state. However, the Tegra driver was in modified
in parallel and subclasses the CRTC atomic state, so needed to duplicate
the code in the atomic helpers. After the addition of the active_changed
field it became out of sync and doesn't reset it when duplicating state.

This causes a full modeset on things like page-flips, which will in turn
cause warnings due to the VBLANK machinery being disabled when it really
should remain on.

Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-02-19 14:21:43 +01:00
Thierry Reding
c03bf1bfd3 drm/tegra: hdmi: Explicitly set clock rate
Recent changes in the clock framework have caused a behavioural change
in that clocks that have not had their rate set explicitly will now be
reset to their initial rate (or 0) when the clock is released. This is
triggered in the deferred probing path, resulting in the clock running
at a wrong frequency after the successful probe.

This can be easily fixed by setting the rate explicitly rather than by
relying on the implicit rate inherited by the parent.

Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-02-19 14:21:25 +01:00
Linus Torvalds
796e1c5571 Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
 "This is the main drm pull, it has a shared branch with some alsa
  crossover but everything should be acked by relevant people.

  New drivers:
     - ATMEL HLCDC driver
     - designware HDMI core support (used in multiple SoCs).

  core:
     - lots more atomic modesetting work, properties and atomic ioctl
       (hidden under option)
     - bridge rework allows support for Samsung exynos chromebooks to
       work finally.
     - some more panels supported

  i915:
     - atomic plane update support
     - DSI uses shared DSI infrastructure
     - Skylake basic support is all merged now
     - component framework used for i915/snd-hda interactions
     - write-combine cpu memory mappings
     - engine init code refactored
     - full ppgtt enabled where execlists are enabled.
     - cherryview rps/gpu turbo and pipe CRC support.

  radeon:
     - indirect draw support for evergreen/cayman
     - SMC and manual fan control for SI/CI
     - Displayport audio support

  amdkfd:
     - SDMA usermode queue support
     - replace suballocator usage with more suitable one
     - rework for allowing interfacing to more than radeon

  nouveau:
     - major renaming in prep for later splitting work
     - merge arm platform driver into nouveau
     - GK20A reclocking support

  msm:
     - conversion to atomic modesetting
     - YUV support for mdp4/5
     - eDP support
     - hw cursor for mdp5

  tegra:
     - conversion to atomic modesetting
     - better suspend/resume support for child devices

  rcar-du:
     - interlaced support

  imx:
     - move to using dw_hdmi shared support
     - mode_fixup support

  sti:
     - DVO support
     - HDMI infoframe support

  exynos:
     - refactoring and cleanup, removed lots of internal unnecessary
       abstraction
     - exynos7 DECON display controller support

  Along with the usual bunch of fixes, cleanups etc"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (724 commits)
  drm/radeon: fix voltage setup on hawaii
  drm/radeon/dp: Set EDP_CONFIGURATION_SET for bridge chips if necessary
  drm/radeon: only enable kv/kb dpm interrupts once v3
  drm/radeon: workaround for CP HW bug on CIK
  drm/radeon: Don't try to enable write-combining without PAT
  drm/radeon: use 0-255 rather than 0-100 for pwm fan range
  drm/i915: Clamp efficient frequency to valid range
  drm/i915: Really ignore long HPD pulses on eDP
  drm/exynos: Add DECON driver
  drm/i915: Correct the base value while updating LP_OUTPUT_HOLD in MIPI_PORT_CTRL
  drm/i915: Insert a command barrier on BLT/BSD cache flushes
  drm/i915: Drop vblank wait from intel_dp_link_down
  drm/exynos: fix NULL pointer reference
  drm/exynos: remove exynos_plane_dpms
  drm/exynos: remove mode property of exynos crtc
  drm/exynos: Remove exynos_plane_dpms() call with no effect
  drm/i915: Squelch overzealous uncore reset WARN_ON
  drm/i915: Take runtime pm reference on hangcheck_info
  drm/i915: Correct the IOSF Dev_FN field for IOSF transfers
  drm/exynos: fix DMA_ATTR_NO_KERNEL_MAPPING usage
  ...
2015-02-16 15:48:00 -08:00
Dave Airlie
45ee2dbc65 Merge branch 'drm-next-3.20' of git://people.freedesktop.org/~agd5f/linux into drm-next
two important bug fixes for radeon

* 'drm-next-3.20' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: fix voltage setup on hawaii
  drm/radeon/dp: Set EDP_CONFIGURATION_SET for bridge chips if necessary
2015-02-16 13:55:49 +10:00
Daniel Vetter
d4495cbaa5 drm/i915: Update DRIVER_DATE to 20150214
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-14 00:41:35 +01:00
Andreas Ruprecht
cd5956c913 drm/i915: Remove references to previously removed UMS config option
Commit 03dae59c72 ("drm/i915: Ditch UMS config option") removed
CONFIG_DRM_I915_UMS from the Kconfig file, but i915_drv.c still
references this option in two #ifndef statements.

As an undefined config option will always be 'false', we can drop
the #ifndefs alltogether and adapt the printed error message.

This inconsistency was found with the undertaker tool.

Signed-off-by: Andreas Ruprecht <rupran@einserver.de>
[danvet: Undo logging change as requested by Jani.]
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:40 +01:00
Damien Lespiau
a86eb582e3 drm/i915/skl: Use a LRI for WaDisableDgMirrorFixInHalfSliceChicken5
I have no idea how that crept in, but we need to do the write from the
ring and this is a masked register. Two fixes in 1!

Cc: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:39 +01:00
Damien Lespiau
35c8ce6ac5 drm/i915/skl: Fix always true comparison in a revision id check
It's always a good idea to keep static analysis happy (also because it
prompts doing the check like I proposed :), this time smatch complains:

drivers/gpu/drm/i915/intel_ringbuffer.c:891 gen9_init_workarounds() warn:
  always true condition '((->dev->pdev->revision) >= (0)) => (0-255 >= 0)'

That's because revision is a u8. Tweak a bit the condition then.

Cc: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:39 +01:00
Damien Lespiau
77719d28ae drm/i915/skl: Implement WaEnableLbsSlaRetryTimerDecrement
This W/A is put in a gen9 specific function because it may well be
needed on other gen9 platforms.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:38 +01:00
Damien Lespiau
183c6daceb drm/i915/skl: Implement WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:38 +01:00
Mika Kuoppala
071c92de1d drm/i915: Add process identifier to requests
We use the pid of the process which opened our device when
we track which was the culprit of the gpu hang. But as that
file descriptor might get inherited, we might blame the
wrong process when we record the error state.

Track process identifiers in requests to always find
the correct offender.

v2: Track only user processes (Chris)

Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
[danvet: drop NULL check before put_pid as suggested by Chris.]
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:37 +01:00
Damien Lespiau
65ca7514e2 drm/i915/skl: Implement WaBarrierPerformanceFixDisable
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:37 +01:00
Damien Lespiau
e2db7071f1 drm/i915/skl: Implement WaCcsTlbPrefetchDisable:skl
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:36 +01:00
Damien Lespiau
2caa3b260a drm/i915/skl: Implement WaDisableChickenBitTSGBarrierAckForFFSliceCS
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:36 +01:00
Damien Lespiau
81e231afe7 drm/i915/skl: Implement WaDisableHDCInvalidation
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:35 +01:00
Damien Lespiau
8bc0ccf6b1 drm/i915/skl: Implement WaDisableLSQCROPERFforOCL
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:35 +01:00
Damien Lespiau
9370cd987e drm/i915/skl: Implement WaDisablePartialResolveInVc
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:34 +01:00
Damien Lespiau
8d20549410 drm/i915/skl: Introduce a SKL specific init_workarounds()
This function will host SKL-only W/As.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:34 +01:00
Damien Lespiau
8543747ce5 drm/i915/skl: Document that we implement WaRsClearFWBitsAtReset
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:33 +01:00
Damien Lespiau
9253c2e56b drm/i915/skl: Implement WaSetGAPSunitClckGateDisable
Let's also take the opportunity the remove the comment telling it's a
pre-prod W/A, it should be obvious from the stepping test.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:33 +01:00
Damien Lespiau
45db2194ac drm/i915/skl: Make the init clock gating function skylake specific
We'll gather cross-gen9 W/A in a separate function later.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:32 +01:00
Damien Lespiau
82ef822e65 drm/i915/skl: Provide a gen9 specific init_render_ring()
WaDisableAsyncFlipPerfMode isn't listed for SKL and
INSTPM_FORCE_ORDERING is MBZ so let's make a gen9 specific render init
function.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:32 +01:00
Damien Lespiau
6f97235b8b drm/i915/skl: Document the WM read latency W/A with its name
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:31 +01:00
Damien Lespiau
e25dca8613 drm/i915/skl: Also detect eDRAM on SKL
Suggested-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:31 +01:00
Damien Lespiau
2db59d5307 drm/i915: Detect eDRAM with the enabled bit only
At the moment we compare the whole EDRAM_PRESENT/EDRAMCAP register value
to 1 while EDRAM_PRESENT is only bit 0 (the rest may be used to describe
eDRAM capabilities).

To be more future proof, only look at bit 0 to detect eDRAM presence.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:30 +01:00
Damien Lespiau
72603ec0e2 drm/i915: Remove the IS_SNB_GT1 define
The last (only?) user of this was removed in:

  commit 2208d655a9
  Author: Daniel Vetter <daniel.vetter@ffwll.ch>
  Date:   Fri Nov 14 09:25:29 2014 +0100

    drm/i915: drop WaSetupGtModeTdRowDispatch:snb

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:30 +01:00
Damien Lespiau
f63bdb5f09 drm/i915: Make intel_unpin_fb_obj() static
This function is not used outside of intel_display.c since;

  commit cf4c7c1225
  Author: Matt Roper <matthew.d.roper@intel.com>
  Date:   Thu Dec 4 10:27:42 2014 -0800

      drm/i915: Make all plane disables use 'update_plane' (v5)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:29 +01:00
Damien Lespiau
c2af70e2c9 drm/i915: Make intel_dp_unpack_aux() static
This was introduced in:

  commit 0bc12bcb1b
  Author: Rodrigo Vivi <rodrigo.vivi@intel.com>
  Date:   Fri Nov 14 08:52:28 2014 -0800

      drm/i915: Introduce intel_psr.c

But the unpack function is unused at this date.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:29 +01:00
Damien Lespiau
a51462004d drm/i915: Make intel_dp_check_link_status() static
This function is only used in intel_dp.c since:

  commit 0e32b39cee
  Author: Dave Airlie <airlied@redhat.com>
  Date:   Fri May 2 14:02:48 2014 +1000

      drm/i915: add DP 1.2 MST support (v0.7)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:29 +01:00
Damien Lespiau
183c990673 drm/i915: Make intel_logical_ring_advance_and_submit() static
This function is only used in intel_lrc.c, so restrict it to that file. The
function was moved around to avoid a forward declaration and group it with its
user.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:28 +01:00
Damien Lespiau
cef437ad22 drm/i915: Make intel_lr_context_render_state_init() static
This function is only used in intel_lrc.c, so restrict it to that file. The
function was moved around to avoid a forward declaration and group it with its
user.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:28 +01:00
Damien Lespiau
a01c7162ca drm/i915: Remove intel_dsi_cmd.h
This header has been unusued since:

  commit 063c86f60a
  Author: Jani Nikula <jani.nikula@intel.com>
  Date:   Fri Jan 16 14:27:27 2015 +0200

      drm/i915/dsi: remove intel_dsi_cmd.c and the unused functions therein

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:27 +01:00
Damien Lespiau
af75f26918 drm/i915: Make intel_ring_setup_status_page() static
This function is only used in intel_ringbuffer.c, so restrict it to that
file. The function was moved around to avoid a forward declaration and
group it with its user.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Squash in fixup from Wu Fengguang.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:27 +01:00
Damien Lespiau
a2f8aeb328 drm/i915: Garbage collect orphaned prototypes
There have been quite a bit of development lately, leaving behing lonely
protypes. Time to bid them farewell.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:26 +01:00
Yu Zhang
71ba2d6432 drm/i915: Support alias ppgtt in VM if ppgtt is enabled
The current Intel GVT-g only supports alias ppgtt. And the
emulation is done in the host by first trapping PP_DIR_BASE
mmio accesses. Updating PP_DIR_BASE by using instructions such
as MI_LOAD_REGISTER_IMM are hard to detect and are not supported
in current code. Therefore this patch also adds a new callback
routine - vgpu_mm_switch() to set the PP_DIR_BASE by mmio writes.

v2:
take Chris' comments:
        - move the code into sanitize_enable_ppgtt()
v4:
take Tvrtko's comments:
        - fix the parenthesis alignment warning

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:26 +01:00
Yu Zhang
3be0bf5acc drm/i915: Create vGPU specific MMIO operations to reduce traps
In the virtualized environment, forcewake operations are not
necessary for the driver, because mmio accesses will be trapped
and emulated by the host side, and real forcewake operations are
also done in the host. New mmio access handlers are added to directly
call the __raw_i915_read/write, therefore will reduce many traps and
increase the overall performance for drivers running in the VM with
Intel GVT-g enhancement.

v2:
take Chris' comments:
        - register the mmio hooks in intel_uncore_init()
v3:
take Daniel's comments:
        - use macros to assign mmio write functions for vGPU
v4:
take Tvrtko's comments:
        - also use mmio hooks for read operations

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Kevin Tian <kevin.tian@intel.com>k
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:25 +01:00
Yu Zhang
f61018b1fe drm/i915: Disable power management for i915 driver in VM
With Intel GVT-g, GPU power management is controlled by
host driver, so there is no need to provide virtualized
GPU PM support. In the future it might be useful to gather
VM input for freq boost, but now let's disable it simply.

v2:
take Chris' comments:
        - do not special case this to gen6+

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:25 +01:00
Yu Zhang
e21fd552ff drm/i915: Add the display switch logic for vGPU in i915 driver
Display switch logic is added to notify the host side that
current vGPU have a valid surface to show. It does so by
writing the display_ready field in PV INFO page, and then
will be handled in the host side. This is useful to avoid
trickiness when the VM's framebuffer is being accessed in
the middle of VM modesetting, e.g. compositing the framebuffer
in the host side.

v2:
        - move the notification code outside the 'else' in load sequence
        - remove the notification code in intel_crtc_set_config()

v4:
        - code rebase, no need to define another dev_priv
        - use #define instead of enum for display readiness

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhiyuan Lv <zhiyuan.lv@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:24 +01:00
Yu Zhang
bd49234b6a drm/i915: Disable framebuffer compression for i915 driver in VM
Framebuffer compression is disabled when driver detects it's
running in a Intel GVT-g enlightened VM, because FBC is not
emulated and there is no stolen memory for a vGPU.

v2:
take Chris' comments:
        - move the code into intel_update_fbc()

v4:
take Tvrtko's comments:
        - rebase the code into intel_fbc_update()

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhiyuan Lv <zhiyuan.lv@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:24 +01:00
Yu Zhang
eb82289a1f drm/i915: Partition the fence registers for vGPU in i915 driver
With Intel GVT-g, the fence registers are partitioned by multiple
vGPU instances in different VMs. Routine i915_gem_load() is modified
to reset the num_fence_regs, when the driver detects it's running in
a VM. Accesses to the fence registers from vGPU will be trapped and
remapped by the host side. And the allocated fence number is provided
in PV INFO page structure. By now, the value of fence number is fixed,
but in the future we can relax this limitation, to allocate the fence
registers dynamically from host side.

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:23 +01:00
Yu Zhang
5dda8fa356 drm/i915: Adds graphic address space ballooning logic
With Intel GVT-g, the global graphic memory space is partitioned by
multiple vGPU instances in different VMs. The ballooning code is called
in i915_gem_setup_global_gtt(), utilizing the drm mm allocator APIs to
mark the graphic address space which are partitioned out to other vGPUs
as reserved. With ballooning, host side does not need to translate a
grahpic address from guest view to host view. By now, current implementation
only support the static ballooning, but in the future, with more cooperation
from guest driver, the same interfaces can be extended to grow/shrink the
guest graphic memory dynamically.

v2:
take Chris and Daniel's comments:
	- no guard page between different VMs
	- use drm_mm_reserve_node() to do the reservation for ballooning,
	instead of the previous drm_mm_insert_node_in_range_generic()

v3:
take Daniel's comments:
	- move ballooning functions into i915_vgpu.c
	- add kerneldoc to ballooning functions

v4:
take Tvrtko's comments:
	- more accurate comments and commit message

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:23 +01:00
Yu Zhang
cf9d2890da drm/i915: Introduce a PV INFO page structure for Intel GVT-g.
Introduce a PV INFO structure, to facilitate the Intel GVT-g
technology, which is a GPU virtualization solution with mediated
pass-through. This page contains the shared information between
i915 driver and the host emulator. For now, this structure utilizes
an area of 4K bytes on HSW GPU's unused MMIO space. Future hardware
will have the reserved window architecturally defined, and layout
of the page will be added in future BSpec.

The i915 driver load routine detects if it is running in a VM by
reading the contents of this PV INFO page. Thereafter a flag,
vgpu.active is set, and intel_vgpu_active() is used by checking
this flag to conclude if GPU is virtualized with Intel GVT-g. By
now, intel_vgpu_active() will return true, only when the driver
is running as a guest in the Intel GVT-g enhanced environment on
HSW platform.

v2:
take Chris' comments:
        - call the i915_check_vgpu() in intel_uncore_init()
        - sanitize i915_check_vgpu() by adding BUILD_BUG_ON() and debug info
take Daniel's comments:
        - put the definition of PV INFO into a new header - i915_vgt_if.h
other changes:
        - access mmio regs by readq/readw in i915_check_vgpu()

v3:
take Daniel's comments:
        - move the i915/vgt interfaces into a new i915_vgpu.c
        - update makefile
        - add kerneldoc to functions which are non-static
        - add a DOC: section describing some of the high-level design
        - update drm docbook
other changes:
        - rename i915_vgt_if.h to i915_vgpu.h

v4:
take Tvrtko's comments:
        - fix a typo in commit message
        - add debug message when vgt version mismatches
        - rename low_gmadr/high_gmadr to mappable/non-mappable in PV INFO
          structure

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:22 +01:00
Zhi Wang
5baa22c59f drm/i915: Introduce bit definitions of CTXT_SR_CTRL register.
This patch introduces 2 bit definitions of context save/restore
control register.

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Suggested-by: Dave Gordon <david.s.gordon@intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:22 +01:00
Tvrtko Ursulin
25bab385a0 drm/i915: Announce support for framebuffer modifiers
Let the DRM core know we can handle it.

v2: Change to boolean true. (Daniel Vetter)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:21 +01:00
Tvrtko Ursulin
7b911adc92 drm/i915: Use fb modifiers in intel_pin_and_fence_fb_obj
And at the same time replace BUG() with a warning and handle it gracefuly.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:21 +01:00
Tvrtko Ursulin
6a418fcd84 drm/i915: Use fb modifiers in intel_check_cursor_plane
Also drop the mutex since with universal planes there is always a
proper framebuffer around which wraps the underlying bo. Which means
tiling is locked down. This was different in the old code which
directly took gem handles. The looking though was always cargo-cult
since races where not prevented in any way.

v2: Unconditionally enforce untiled, because cursors are always
untiled. The check for physical or gtt cursor is irrelevant. Also
clarify the commit message a bit

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:20 +01:00
Tvrtko Ursulin
66ebf56714 drm/i915/skl: Use fb modifiers for sprites
While at it just outright remove the tiling check in
intel_check_sprite_plane because it's impossible: We only allow
untiled and X-tiled. This essentially reverts

commit 94c6419ed8
Author: Damien Lespiau <damien.lespiau@intel.com>
Date:   Mon Oct 29 15:14:51 2012 +0000

    drm/i915: Error out when trying to set a y-tiled as a sprite

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
[danvet: Drop the hunk in check_sprite, it's impossible.]
Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:20 +01:00
Tvrtko Ursulin
ba343e029e drm/i915/skl: CS flips are not supported with execlists
And skl only works in execlist mode, not in legacy ring submission.

Therefore remove dead code.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:19 +01:00
Daniel Vetter
30af77c4c8 drm/i915: Use fb format modifiers in skylake_update_primary_plane
Just a little demo really. We probably need to introduce skl specific
functions for a lot of the format validation stuff, or at least
helpers. Specifically I think intel_framebuffer_init and
intel_fb_align_height must be adjusted to have an i915_ and a skl_
variant. And only shared code should be converted to fb modifiers,
platform code (like the plane config readout can keep on using old
tiling_mode defines to avoid some churn).

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-13 23:28:19 +01:00
Daniel Vetter
091df6cbf2 drm/i915: Switch intel_fb_align_height to fb format modifiers
With this we can treat the fb format modifier completely independently
from the fencing mode in obj->tiling_mode in the initial plane code.
Which means new tiling modes without any gtt fence are now fully
support in the core i915 driver code.

v2: Also add pixel_format while at it, we need this to compute the
height for the new tiling formats.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-13 23:28:18 +01:00
Daniel Vetter
18c5247e1e drm/i915: Set up fb format modifier for initial plane config
No functional changes yet since intel_framebuffer_init would have
fixed this up for us. But this is prep work to be able to handle new
tiling layouts in the initial plane config code.

Follow-up patches will start to make use of this and switch over to fb
modifiers where needed.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-13 23:28:18 +01:00
Tvrtko Ursulin
c1ca506d17 drm/i915: Show frame buffer modifier in debug info
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:17 +01:00
Daniel Vetter
2a80eada32 drm/i915: Add fb format modifier support
Currently we don't support anything but X tiled. And for an easier
transition it makes a lot of sense to just keep requiring that X tiled
is properly fenced.

Which means we need to do absolutely nothing in old code to support fb
modifiers, yay!

v2: Fix the Y tiling check, noticed by Tvrtko.

v3: Catch Y-tiled fb for legacy addfb again (Tvrtko) and explain why
we want X tiling to match in the comment.

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-13 23:28:17 +01:00
Tvrtko Ursulin
93b81f5102 drm/i915: Add tiled framebuffer modifiers
To be used from the new addfb2 extension.

v2:
- Drop Intel-specific untiled modfier.
- Move to drm_fourcc.h.
- Document layouts a bit and denote them as platform-specific and not
  useable for cross-driver sharing.
- Add Y-tiling for completeness.
- Drop special docstring markers to avoid confusing kerneldoc.

v3: Give Y-tiling a unique idea, noticed by Tvrtko.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v1)
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:16 +01:00
Damien Lespiau
35cb6f3b4e drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent
v2: Reorder defines (Ben)
v3: More bikesheds, this time re-ordering comments! (Chris)

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Resolve conflict.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:16 +01:00
Damien Lespiau
c57e355122 drm/i915: Support not having an init clock gating function defined
When enabling new platforms, we may not have any W/A to apply,
especially that, now, a bunch of them have to be done from the ring.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:15 +01:00
Paulo Zanoni
e35fef211b drm/i915: change dev_priv->fbc.plane to dev_priv->fbc.crtc
Since the mapping from CRTCs to planes is fixed, looking at the CRTC
is essentially the same as looking at the plane. Also, the next
patches wil start using the frontbuffer_bits macros, and they take the
pipe as the parameter instead of the plane, and this could differ on
gens 2 and 3.

Another nice thing is that we don't risk accidentally initializing
things to PLANE_A if we don't set the value before it is used for the
first time. But this shouldn't be a problem with the current code.

V2: Rebase.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:15 +01:00
Paulo Zanoni
104618b336 drm/i915: don't keep reassigning FBC_UNSUPPORTED
This may save a few picoseconds on !HAS_FBC platforms. And it also
satisfies my OCD.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:14 +01:00
Paulo Zanoni
7cc6574600 drm/i915: don't try to find crtcs for FBC if it's disabled
.. because it would be a waste of time, so move the place where the
check is done. Also, with this we won't risk printing "more than one
pipe active, disabling compression" or "no output, disabling" when FBC
is actually disabled.

This patch also represents a small behavior difference when using
i915.powersave=0: it is now exactly the same as i915.enable_fbc=0 on
this part of the code.

V2: Rebase.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:14 +01:00
Nick Hoath
203a571b21 drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS)
Add:
WaEnableForceRestoreInCtxtDescForVCS

v2: Add stepping check.

v3: Fixed stepping check direction. Cleaned up indentation.

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:13 +01:00
Nick Hoath
e90fff154e drm/i915: gen 9 h/w w/a Fix stepping check
Fixed the stepping check on WaDisableDgMirrorFixInHalfSliceChicken5
to be for the correct SOC (Skylake)

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:13 +01:00
Rob Clark
e3eb3250d8 drm: add support for tiled/compressed/etc modifier in addfb2
In DRM/KMS we are lacking a good way to deal with tiled/compressed
formats.  Especially in the case of dmabuf/prime buffer sharing, where
we cannot always rely on under-the-hood flags passed to driver specific
gem-create ioctl to pass around these extra flags.

The proposal is to add a per-plane format modifier.  This allows to, if
necessary, use different tiling patters for sub-sampled planes, etc.
The format modifiers are added at the end of the ioctl struct, so for
legacy userspace it will be zero padded.

v1: original
v1.5: increase modifier to 64b

v2: Incorporate review comments from the big thread, plus a few more.

- Add a getcap so that userspace doesn't have to jump through hoops.
- Allow modifiers only when a flag is set. That way drivers know when
  they're dealing with old userspace and need to fish out e.g. tiling
  from other information.
- After rolling out checks for ->modifier to all drivers I've decided
  that this is way too fragile and needs an explicit opt-in flag. So
  do that instead.
- Add a define (just for documentation really) for the "NONE"
  modifier. Imo we don't need to add mask #defines since drivers
  really should only do exact matches against values defined with
  fourcc_mod_code.
- Drop the Samsung tiling modifier on Rob's request since he's not yet
  sure whether that one is accurate.

v3:
- Also add a new ->modifier[] array to struct drm_framebuffer and fill
  it in drm_helper_mode_fill_fb_struct. Requested by Tvrkto Uruslin.
- Remove TODO in comment and add code comment that modifiers should be
  properly documented, requested by Rob.

Cc: Rob Clark <robdclark@gmail.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Daniel Stone <daniel@fooishbar.org>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Michel Dänzer <michel@daenzer.net>
Signed-off-by: Rob Clark <robdclark@gmail.com> (v1.5)
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-13 23:28:12 +01:00
Ben Widawsky
17d5538d54 drm/i915/gen8: Un-hardcode number of page directories
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:12 +01:00
Ben Widawsky
c8c26622ae drm/i915: Setup less PPGTT on failed page_directory
The current code will both potentially print a WARN, and setup part of
the PPGTT structure. Neither of these harm the current code, it is
simply for clarity, and to perhaps prevent later bugs, or weird
debug messages.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:12 +01:00
Ben Widawsky
766436004b drm/i915: Rename to GEN8_LEGACY_PDPES
In gen8, 32b PPGTT has always had one "pdp" (it doesn't actually have
one, but it resembles having one). The #define was confusing as is, and
using "PDPE" is a much better description.

sed -i 's/GEN8_LEGACY_PDPS/GEN8_LEGACY_PDPES/' drivers/gpu/drm/i915/*.[ch]

It also matches the x86 pagetable terminology:
PTE  = Page Table Entry - pagetable level 1 page
PDE  = Page Directory Entry - pagetable level 2 page
PDPE = Page Directory Pointer Entry - pagetable level 3 page

And in the near future (for 48b addressing):
PML4E = Page Map Level 4 Entry

v2: Expanded information about Page Directory/Table nomenclature.

Cc: Daniel Vetter <daniel@ffwll.ch>
CC: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2)
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:11 +01:00
Ben Widawsky
3393871441 drm/i915/trace: Fix offsets for 64b
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:11 +01:00
Hoath, Nicholas
13bea49c8b drm/i915/gen9: Implement WaForceEnableNonCoherent
v2: Don't add WaHdcDisableFetchWhenMasked. Add stepping check for
WaForceEnableNonCoherent

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:10 +01:00
Hoath, Nicholas
1840481f53 drm/i915/gen9: Implement Wa4x4STCOptimizationDisable
Move Wa4x4STCOptimizationDisable to gen9_init_workarounds

v2: rebase

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:10 +01:00
Nick Hoath
cac23df48a drm/i915/gen9: Implement WaEnableYV12BugFixInHalfSliceChicken7
Move WaEnableYV12BugFixInHalfSliceChicken7 to gen9_init_workarounds

v2: Add stepping check.

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:09 +01:00
Hoath, Nicholas
3dcd020a8e drm/i915/gen9: Implement WaDisableSDEUnitClockGating
v2: Add stepping check for WaDisableSDEUnitClockGating.

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Rebase.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:09 +01:00
Nick Hoath
8424171e13 drm/i915/gen9: h/w w/a: syncing dependencies between camera and graphics
This one doesn't have one of these nice cryptic names unfortunately.

v2: Added missing register bitmap

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:08 +01:00
Nick Hoath
1de4582f98 drm/i915/gen9: Implement WaDisableDgMirrorFixInHalfSliceChicken5
Move WaDisableDgMirrorFixInHalfSliceChicken5 to gen9_init_workarounds

v2: Added stepping check

v3: Removed unused register bitmap

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
[danvet: Bikesheds.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:08 +01:00
Hoath, Nicholas
ab0dfafefd drm/i915/gen9: Implement WaDisablePartialInstShootdown
v2: Dont add WaDisableThreadStallDopClockGating as not SKL WA. (Found
by Damien Lespiau)

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Bikeshed commit message a bit as per Damien's suggestions.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:07 +01:00
Hoath, Nicholas
e90a21d45d drm/i915: ring w/a gen 9 revision definitions
Add Skylake stepping Revision IDs definitions.

v1: Use existing revision id.

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Use magic __I915__ and bikeshed #defines as suggested by
Damien.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:07 +01:00
Hoath, Nicholas
3b10653178 drm/i915: ring w/a initialisation for gen 9
Add framework for gen 9 HW WAs

v1: Changed SOC specific WA function to gen 9 common function (Req: Damien Lespiau)

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:06 +01:00
Damien Lespiau
42a7b08812 drm/i915: Make sure the primary plane is enabled before reading out the fb state
We don't want to end up in a state where we track that the pipe has its
primary plane enabled when primary plane registers are programmed with
values that look possible but the plane actually disabled.

Refuse to read out the fb state when the primary plane isn't enabled.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Suggested-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:06 +01:00
Damien Lespiau
fb9981aa67 drm/i915: Fix atomic state when reusing the firmware fb
Right now, we get a warning when taking over the firmware fb:

  [drm:drm_atomic_plane_check] FB set but no CRTC

with the following backtrace:

  [<ffffffffa010339d>] drm_atomic_check_only+0x35d/0x510 [drm]
  [<ffffffffa0103567>] drm_atomic_commit+0x17/0x60 [drm]
  [<ffffffffa00a6ccd>] drm_atomic_helper_plane_set_property+0x8d/0xd0 [drm_kms_helper]
  [<ffffffffa00f1fed>] drm_mode_plane_set_obj_prop+0x2d/0x90 [drm]
  [<ffffffffa00a8a1b>] restore_fbdev_mode+0x6b/0xf0 [drm_kms_helper]
  [<ffffffffa00aa969>] drm_fb_helper_restore_fbdev_mode_unlocked+0x29/0x80 [drm_kms_helper]
  [<ffffffffa00aa9e2>] drm_fb_helper_set_par+0x22/0x50 [drm_kms_helper]
  [<ffffffffa050a71a>] intel_fbdev_set_par+0x1a/0x60 [i915]
  [<ffffffff813ad444>] fbcon_init+0x4f4/0x580

That's because we update the plane state with the fb from the firmware, but we
never associate the plane to that CRTC.

We don't quite have the full DRM take over from HW state just yet, so
fake enough of the plane atomic state to pass the checks.

v2: Fix the state on which we set the CRTC in the case we're sharing the
    initial fb with another pipe. (Matt)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:05 +01:00
Damien Lespiau
2d14030b1a drm/i915: Store the initial framebuffer in initial_plane_config
At the moment we use crtc->base.primary->fb to hold the initial
framebuffer allocation, disregarding if it's valid or not.

This lead to believe we were actually updating the fb at this point, but
it's not true and we haven't even called drm_framebuffer_init() on this
fb.

Instead, let's store the state in struct intel_initial_plane_config
until we know we can reuse that framebuffer.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:05 +01:00
Damien Lespiau
f55548b5af drm/i915: Don't try to reference the fb in get_initial_plane_config()
Tvrtko noticed a new warning on boot:

  WARNING: CPU: 1 PID: 353 at include/linux/kref.h:47 drm_framebuffer_reference+0x6c/0x80 [drm]()
  Call Trace:
  [<ffffffff8161f10c>] dump_stack+0x4f/0x7b
  [<ffffffff81052caa>] warn_slowpath_common+0xaa/0xd0
  [<ffffffff81052d8a>] warn_slowpath_null+0x1a/0x20
  [<ffffffffa00d035c>] drm_framebuffer_reference+0x6c/0x80 [drm]
  [<ffffffffa01c0df7>] update_state_fb.isra.54+0x47/0x50 [i915]
  [<ffffffffa01ccd5c>] skylake_get_initial_plane_config+0x93c/0x950 [i915]
  [<ffffffffa01e8721>] intel_modeset_init+0x1551/0x17c0 [i915]
  [<ffffffffa02476e0>] i915_driver_load+0xed0/0x11e0 [i915]
  [<ffffffff81627aa1>] ? _raw_spin_unlock_irqrestore+0x51/0x70
  [<ffffffffa00ca8b7>] drm_dev_register+0x77/0x110 [drm]
  [<ffffffffa00cda3b>] drm_get_pci_dev+0x11b/0x1f0 [drm]
  [<ffffffff81098e3d>] ? trace_hardirqs_on+0xd/0x10
  [<ffffffff81627aa1>] ? _raw_spin_unlock_irqrestore+0x51/0x70
  [<ffffffffa0145276>] i915_pci_probe+0x56/0x60 [i915]
  [<ffffffff813ad59c>] pci_device_probe+0x7c/0x100
  [<ffffffff81466aad>] driver_probe_device+0x16d/0x380

We cannot take a reference at this point, not before
intel_framebuffer_init() and the underlying drm_framebuffer_init().

Introduced in:

  commit 706dc7b549175e47f23e913b7f1e52874a7d0f56
  Author: Matt Roper <matthew.d.roper@intel.com>
  Date:   Tue Feb 3 13:10:04 2015 -0800

      drm/i915: Ensure plane->state->fb stays in sync with plane->fb

v2: Don't move update_state_fb(). It was moved around because I
    originally put update_state_fb() in intel_alloc_plane_obj() before
    finding a better place. (Matt)

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:04 +01:00
Damien Lespiau
6bf129df6f drm/i915: Use an intermediate variable to avoid repeating ourselves
The code look slightly better this way and will ease the next commit,
changing where we take the fb pointer from.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:04 +01:00
Damien Lespiau
5ba76c41e5 drm/i915: Put update_state_fb() next to the fb update
update_state_fb() at the end of intel_find_plane_obj() is misleading as
it leads us to believe the update is done for all code path.

A successful call to intel_alloc_plane_obj() will return and
update_state_fb() is then only needed when we share a fb from another
CRTC. Put the update() function there then.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:03 +01:00
Jani Nikula
60ee5cd24c drm/i915/fbc: fix the check for already reserved fbc size
The check for previously reserved stolen space size for FBC in
i915_gem_stolen_setup_compression() did not take the compression
threshold into account. Fix this by storing and comparing to
uncompressed size instead.

The bug has been introduced in

commit 5e59f7175f
Author: Ben Widawsky <benjamin.widawsky@intel.com>
Date:   Mon Jun 30 10:41:24 2014 -0700

    drm/i915: Try harder to get FBC

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88975
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:03 +01:00
Damien Lespiau
719388e146 drm/i915/skl: Declare that GT3 has a second VCS
v2: leave intel_skylake_info alone (Rodrigo, Daniel)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:02 +01:00
Satheeshakrishna M
94dd5138c5 drm/i915/skl: Implementation of SKL display power well support
This patch implements core logic of SKL display power well.

v2: Addressed Imre's comments
	- Added respective DDIs under power well #1 and #2
	- Simplified repetitive code in power well programming

v3: Implemented Imre's comments
	- Further simplified power well programming
	- Made sure that PW 1 is enabled prior to PW 2

v4: Fix minor conflict with the the cherryview support (Damien)

v5: Add the PLL power domain to the always on power well (Damien)

v6: Disable BIOS power well (Imre)
    Use power well data for comparison (Imre)
    Put the PLL power domain into PW1 as its needed for CDCLK (Satheesh,
    Damien)

v7: Addressed Imre's comments
  - Lowered the time out to 1ms
  - Added parantheses in macro
  - Moved debug message and fixed wait_for interval

v8:
  - Add a WARN() when swiching on an unknown power well (Imre, done by Damien)
  - Whitespace fixes (spaces instead of tabs) (Damien)

v9: (Imre, done by Damien)
  - Merge the register definitions with this patch
  - Merge the MISC IO power well in this patch

v10: (Imre, done by Damien)

  - Define the Misc I/O power domains to be the power well 1 ones as Misc I/O
    needs to be enabled with PW1
  - Added Transcoder A and VGA domains to PW 2
  - Remove the MISC_IO power domains as well in the the always on
    domains definition
  - Move Misc I/O power well at the top of the power well list so it's turned
    on right after PW1.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v3,v6,v7)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:01 +01:00
Matt Roper
afd65eb4cc drm/i915: Ensure plane->state->fb stays in sync with plane->fb
plane->state->fb and plane->fb should always reference the same FB so
that atomic and legacy codepaths have the same view of display state.
In commit

        commit db068420560511de80ac59222644f2bdf278c3d5
        Author: Matt Roper <matthew.d.roper@intel.com>
        Date:   Fri Jan 30 16:22:36 2015 -0800

            drm/i915: Keep plane->state updated on pageflip

we already fixed one case where these two pointers could get out of
sync.  However it turns out there are a few other places (mainly dealing
with initial FB setup at boot) that directly set plane->fb and neglect
to update plane->state->fb.  If we never do a successful update through
the atomic pipeline, the RmFB cleanup code will look at the
plane->state->fb pointer, which has never actually been set to a
legitimate value, and try to clean it up, leading to BUG's.

Add a quick helper function to synchronize plane->state->fb with
plane->fb (and update reference counts accordingly) and call it
everywhere the driver tries to manually set plane->fb outside of the
atomic pipeline.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88909
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:01 +01:00
Damien Lespiau
62659920cf drm/i915/skl: Remove the check enforcing VCS2 to be gen8 only
We already track this in the intel_info struct.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
[danvet: Make the commit message a bit less terse.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:00 +01:00
Shobhit Kumar
87c54d0ee6 drm/i915: Correct the variable holding the value for EOT to write
This isuue got introduced in -

commit 24ee0e6490
Author: Gaurav K Singh <gaurav.k.singh@intel.com>
Date:   Fri Dec 5 14:24:21 2014 +0530

    drm/i915: Update the DSI enable path to support dual

Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:28:00 +01:00
Ville Syrjälä
ffe02b403d drm/i915: Introduce intel_set_rps()
Replace the valleyview_set_rps() and gen6_set_rps() calls with
intel_set_rps() which itself does the IS_VALLEYVIEW() check. The
code becomes simpler since the callers don't have to do this check
themselves.

Most of the change was performe with the following semantic patch:
@@
expression E1, E2, E3;
@@
- if (IS_VALLEYVIEW(E1)) {
-  valleyview_set_rps(E2, E3);
- } else {
-  gen6_set_rps(E2, E3);
- }
+ intel_set_rps(E2, E3);

Adding intel_set_rps() and making valleyview_set_rps() and gen6_set_rps()
static was done manually. Also valleyview_set_rps() had to be moved a
bit avoid a forward declaration.

v2: Use a less greedy semantic patch

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:27:59 +01:00
Tvrtko Ursulin
ab8d66752a drm/i915: Track old framebuffer instead of object
Daniel Vetter spotted a bug while reviewing some of my refactoring in this
are of the code. I'll quote:

"""
> @@ -9764,6 +9768,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>  	work->event = event;
>  	work->crtc = crtc;
>  	work->old_fb_obj = intel_fb_obj(old_fb);
> +	work->old_tiling_mode = to_intel_framebuffer(old_fb)->tiling_mode;

Hm, that's actually an interesting bugfix - currently userspace could be
sneaky and destroy the old fb immediately after the flip completes and the
change the tiling of the underlying object before the unpin work had a
chance to run (needs some fudgin with rt prios to starve workers to make
this work though).

Imo the right fix is to hold a reference onto the fb and not the
underlying gem object. With that tiling is guaranteed not to change.
"""

This patch tries to implement the above proposed change.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:27:59 +01:00
Matt Roper
3f678c96ab drm/i915: Switch planes from transitional helpers to full atomic helpers
There are two sets of helper functions provided by the DRM core that can
implement the .update_plane() and .disable_plane() hooks in terms of a
driver's atomic entrypoints.  The transitional helpers (which we have
been using so far) create a plane state and then use the plane's atomic
entrypoints to perform the atomic begin/check/prepare/commit/finish
sequence on that single plane only.  The full atomic helpers create a
top-level atomic state (which is capable of holding multiple object
states for planes, crtc's, and/or connectors) and then passes the
top-level atomic state through the full "atomic modeset" pipeline.

Switching from the transitional to full helpers here shouldn't result in
any functional change, but will enable us to exercise/test more of the
internal atomic pipeline with the legacy API's used by existing
applications.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:27:58 +01:00
Matt Roper
1ed1f968b6 drm/i915: Keep plane->state updated on pageflip
Until all drivers have transitioned to atomic, the framebuffer
associated with a plane is tracked in both plane->fb (for legacy) and
plane->state->fb (for all the new atomic codeflow).  All of our modeset
and plane updates use drm_plane->update_plane(), so in theory plane->fb
and plane->state->fb should always stay in sync and point at the same
thing for i915.  However we forgot about the pageflip ioctl case, which
currently only updates plane->fb and leaves plane->state->fb at a stale
value.

Surprisingly, this doesn't cause any real problems at the moment since
internally we use the plane->fb pointer in most of the places that
matter, and on the next .update_plane() call, we use plane->fb to figure
out which framebuffer to cleanup.  However when we switch to the full
atomic helpers for update_plane()/disable_plane(), those helpers use
plane->state->fb to figure out which framebuffer to cleanup, so not
having updated the plane->state->fb pointer causes things to blow up
following a pageflip ioctl.

The fix here is to just make sure we update plane->state->fb at the same
time we update plane->fb in the pageflip ioctl.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-13 23:27:58 +01:00
Alex Deucher
09b6e85fc8 drm/radeon: fix voltage setup on hawaii
Missing parameter when fetching the real voltage values
from atom.  Fixes problems with dynamic clocking on
certain boards.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=87457

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-02-13 10:03:48 -05:00
Alex Deucher
66c2b84ba6 drm/radeon/dp: Set EDP_CONFIGURATION_SET for bridge chips if necessary
Don't restrict it to just eDP panels.  Some LVDS bridge chips require
this.  Fixes blank panels on resume on certain laptops.  Noticed
by mrnuke on IRC.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=42960

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-02-13 10:03:33 -05:00
Dave Airlie
ab07881a2a Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next
Summary:
- Add code cleanups and bug fixups.
- Add a new display controller dirver, DECON which is a new display
  controller of Exynos7 SoC. This device is much different from
  FIMD of Exynos4 and Exynos4 SoC series.

* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
  drm/exynos: Add DECON driver
  drm/exynos: fix NULL pointer reference
  drm/exynos: remove exynos_plane_dpms
  drm/exynos: remove mode property of exynos crtc
  drm/exynos: Remove exynos_plane_dpms() call with no effect
  drm/exynos: fix DMA_ATTR_NO_KERNEL_MAPPING usage
  drm/exynos: hdmi: replace fb size with mode size from win commit
  drm/exynos: fix no hdmi output
  drm/exynos: use driver internal struct
  drm/exynos: fix wrong pipe calculation for crtc
  drm/exynos: remove to use unnecessary MODULE_xxx macro
  drm/exynos: remove DRM_EXYNOS_DMABUF config
  drm/exynos: IOMMU support should not be selectable by user
  drm/exynos: add support for 'hdmi' clock
2015-02-13 13:02:49 +10:00
Dave Airlie
96abd10ecc Merge branch 'drm-next-3.20' of git://people.freedesktop.org/~agd5f/linux into drm-next
Some radeon fixes for 3.20.

* 'drm-next-3.20' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: only enable kv/kb dpm interrupts once v3
  drm/radeon: workaround for CP HW bug on CIK
  drm/radeon: Don't try to enable write-combining without PAT
  drm/radeon: use 0-255 rather than 0-100 for pwm fan range
2015-02-12 10:01:51 +10:00
Dave Airlie
64aa7e342a Merge tag 'drm-intel-next-fixes-2015-02-11' of git://anongit.freedesktop.org/drm-intel into drm-next
Here's a batch of i915 fixes for drm-next, with more cc: stable material
than fixes specific to drm-next.

* tag 'drm-intel-next-fixes-2015-02-11' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Clamp efficient frequency to valid range
  drm/i915: Really ignore long HPD pulses on eDP
  drm/i915: Correct the base value while updating LP_OUTPUT_HOLD in MIPI_PORT_CTRL
  drm/i915: Insert a command barrier on BLT/BSD cache flushes
  drm/i915: Drop vblank wait from intel_dp_link_down
  drm/i915: Squelch overzealous uncore reset WARN_ON
  drm/i915: Take runtime pm reference on hangcheck_info
  drm/i915: Correct the IOSF Dev_FN field for IOSF transfers
  drm/i915: Prevent use-after-free in invalidate_range_start callback
2015-02-12 09:16:23 +10:00
Alex Deucher
410af8d728 drm/radeon: only enable kv/kb dpm interrupts once v3
Enable at init and disable on fini. Workaround for hardware problems.

v2 (chk): extend commit message
v3: add new function

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com> (v2)
Cc: stable@vger.kernel.org
2015-02-11 12:01:35 -05:00
Christian König
a9c73a0e02 drm/radeon: workaround for CP HW bug on CIK
Emit the EOP twice to avoid cache flushing problems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-11 12:01:34 -05:00
Michel Dänzer
a53fa43873 drm/radeon: Don't try to enable write-combining without PAT
Doing so can cause things to become slow.

Print a warning at compile time and an informative message at runtime in
that case.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88758
Cc: stable@vger.kernel.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-11 12:01:33 -05:00
Alex Deucher
082452e125 drm/radeon: use 0-255 rather than 0-100 for pwm fan range
0-255 seems to be the preferred range for the pwm interface.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-11 12:01:33 -05:00
Linus Torvalds
a323ae93a7 sound updates for 3.20-rc1
In this batch, you can find lots of cleanups through the whole
 subsystem, as our good New Year's resolution.  Lots of LOCs and
 commits are about LINE6 driver that was promoted finally from staging
 tree, and as usual, there've been widely spread ASoC changes.
 
 Here some highlights:
 
 ALSA core changes
   - Embedding struct device into ALSA core structures
   - sequencer core cleanups / fixes
   - PCM msbits constraints cleanups / fixes
   - New SNDRV_PCM_TRIGGER_DRAIN command
   - PCM kerneldoc fixes, header cleanups
   - PCM code cleanups using more standard codes
   - Control notification ID fixes
 
 Driver cleanups
   - Cleanups of PCI PM callbacks
   - Timer helper usages cleanups
   - Simplification (e.g. argument reduction) of many driver codes
 
 HD-audio
   - Hotkey and LED support on HP laptops with Realtek codecs
   - Dock station support on HP laptops
   - Toshiba Satellite S50D fixup
   - Enhanced wallclock timestamp handling for HD-audio
   - Componentization to simplify the linkage between i915 and hd-audio
     drivers for Intel HDMI/DP
 
 USB-audio
   - Akai MPC Element support
   - Enhanced timestamp handling
 
 ASoC
   - Lots of refactoringin ASoC core, moving drivers to more data
     driven initialization and rationalizing a lot of DAPM usage
   - Much improved handling of CDCLK clocks on Samsung I2S controllers
   - Lots of driver specific cleanups and feature improvements
   - CODEC support for TI PCM514x and TLV320AIC3104 devices
   - Board support for Tegra systems with Realtek RT5677
   - New driver for Maxim max98357a
   - More enhancements / fixes for Intel SST driver
 
 Others
   - Promotion of LINE6 driver from staging along with lots of rewrites
     and cleanups
   - DT support for old non-ASoC atmel driver
   - oxygen cleanups, XIO2001 init, Studio Evolution SE6x support
   - Emu8000 DRAM size detection fix on ISA(!!) AWE64 boards
   - A few more ak411x fixes for ice1724 boards
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Merge tag 'sound-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "In this batch, you can find lots of cleanups through the whole
  subsystem, as our good New Year's resolution.  Lots of LOCs and
  commits are about LINE6 driver that was promoted finally from staging
  tree, and as usual, there've been widely spread ASoC changes.

  Here some highlights:

  ALSA core changes
   - Embedding struct device into ALSA core structures
   - sequencer core cleanups / fixes
   - PCM msbits constraints cleanups / fixes
   - New SNDRV_PCM_TRIGGER_DRAIN command
   - PCM kerneldoc fixes, header cleanups
   - PCM code cleanups using more standard codes
   - Control notification ID fixes

  Driver cleanups
   - Cleanups of PCI PM callbacks
   - Timer helper usages cleanups
   - Simplification (e.g. argument reduction) of many driver codes

  HD-audio
   - Hotkey and LED support on HP laptops with Realtek codecs
   - Dock station support on HP laptops
   - Toshiba Satellite S50D fixup
   - Enhanced wallclock timestamp handling for HD-audio
   - Componentization to simplify the linkage between i915 and hd-audio
     drivers for Intel HDMI/DP

  USB-audio
   - Akai MPC Element support
   - Enhanced timestamp handling

  ASoC
   - Lots of refactoringin ASoC core, moving drivers to more data driven
     initialization and rationalizing a lot of DAPM usage
   - Much improved handling of CDCLK clocks on Samsung I2S controllers
   - Lots of driver specific cleanups and feature improvements
   - CODEC support for TI PCM514x and TLV320AIC3104 devices
   - Board support for Tegra systems with Realtek RT5677
   - New driver for Maxim max98357a
   - More enhancements / fixes for Intel SST driver

  Others
   - Promotion of LINE6 driver from staging along with lots of rewrites
     and cleanups
   - DT support for old non-ASoC atmel driver
   - oxygen cleanups, XIO2001 init, Studio Evolution SE6x support
   - Emu8000 DRAM size detection fix on ISA(!!) AWE64 boards
   - A few more ak411x fixes for ice1724 boards"

* tag 'sound-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (542 commits)
  ALSA: line6: toneport: Use explicit type for firmware version
  ALSA: line6: Use explicit type for serial number
  ALSA: line6: Return EIO if read/write not successful
  ALSA: line6: Return error if device not responding
  ALSA: line6: Add delay before reading status
  ASoC: Intel: Clean data after SST fw fetch
  ALSA: hda - Add docking station support for another HP machine
  ALSA: control: fix failure to return new numerical ID in 'replace' event data
  ALSA: usb: update trigger timestamp on first non-zero URB submitted
  ALSA: hda: read trigger_timestamp immediately after starting DMA
  ALSA: pcm: allow for trigger_tstamp snapshot in .trigger
  ALSA: pcm: don't override timestamp unconditionally
  ALSA: off by one bug in snd_riptide_joystick_probe()
  ASoC: rt5670: Set use_single_rw flag for regmap
  ASoC: rt286: Add rt288 codec support
  ASoC: max98357a: Fix build in !CONFIG_OF case
  ASoC: Intel: fix platform_no_drv_owner.cocci warnings
  ARM: dts: Switch Odroid X2/U2 to simple-audio-card
  ARM: dts: Exynos4 and Odroid X2/U3 sound device nodes update
  ALSA: control: fix failure to return numerical ID in 'add' event
  ...
2015-02-11 08:51:59 -08:00
Tom O'Rourke
46efa4abe5 drm/i915: Clamp efficient frequency to valid range
The efficient frequency (RPe) should stay in the range
RPn <= RPe <= RP0.  The pcode clamps the returned value
internally on Broadwell but not on Haswell.

Fix for missing range check in
commit 93ee29203f
Author: Tom O'Rourke <Tom.O'Rourke@intel.com>
Date:   Wed Nov 19 14:21:52 2014 -0800

    drm/i915: Use efficient frequency for HSW/BDW

Reference: http://lists.freedesktop.org/archives/intel-gfx/2015-February/059802.html
Reported-by: Michael Auchter <a@phire.org>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org # v3.19
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-11 14:09:51 +02:00
Ville Syrjälä
a8b3d52f8b drm/i915: Really ignore long HPD pulses on eDP
Return IRQ_HANDLED from intel_dp_hpd_pulse() to properly
ignore the long HPD pulse on eDP to avoid the never ending
VDD off->HPD->VDD on->VDD off->HPD... cycle.

This fixes a regression intoduced by
 commit b2c5c181ed
 Author: Daniel Vetter <daniel.vetter@ffwll.ch>
 Date:   Fri Jan 23 06:00:31 2015 +0100

    drm/i915: Use symbolic irqreturn for ->hpd_pulse

Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-11 14:09:51 +02:00
Ajay Kumar
96976c3d9a drm/exynos: Add DECON driver
This patch is based on exynos-drm-next branch of Inki Dae's tree at:
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git

DECON(Display and Enhancement Controller) is the new IP
in exynos7 SOC for generating video signals using pixel data.

DECON driver can be used to drive 2 different interfaces on Exynos7:
DECON-INT(video controller) and DECON-EXT(Mixer for HDMI)

The existing FIMD driver code was used as a template to create
DECON driver. Only DECON-INT is supported as of now, and
DECON-EXT support will be added later.

The current version of the driver supports video mode displays.

Changelog v2:
- Change config name, DRM_EXYNOS_DECON to DRM_EXYNOS7_DECON.

Signed-off-by: Akshu Agrawal <akshua@gmail.com>
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-11 20:27:08 +09:00
Dave Airlie
85840c76d8 imx-drm fixes for IPUv3 DC and i.MX5 IPUv3 IC and TVE
- Corrected handling of wait_for_completion_timeout return value
   when disabling IPUv3 DC channels
 - Fixed error return value propagation in TVE mode_set
 - Fixed IPUv3 register offsets for IC module on i.MX51 and i.MX53
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Merge tag 'imx-drm-fixes-2015-01-28' of git://git.pengutronix.de/git/pza/linux into drm-next

imx-drm fixes for IPUv3 DC and i.MX5 IPUv3 IC and TVE

- Corrected handling of wait_for_completion_timeout return value
  when disabling IPUv3 DC channels
- Fixed error return value propagation in TVE mode_set
- Fixed IPUv3 register offsets for IC module on i.MX51 and i.MX53

* tag 'imx-drm-fixes-2015-01-28' of git://git.pengutronix.de/git/pza/linux:
  gpu: ipu-v3: Fix IC control register offset
  drm: imx: imx-tve: Check and propagate the errors
  gpu: ipu-v3: wait_for_completion_timeout does not return negative status
2015-02-11 15:35:26 +10:00
Dave Airlie
79a44c16b1 Merge branch 'drm-sti-next-2015-02-04' of git://git.linaro.org/people/benjamin.gaignard/kernel into drm-next
Those patches improve audio info frame management, add pixel formats
support and fix minor issues.

* 'drm-sti-next-2015-02-04' of git://git.linaro.org/people/benjamin.gaignard/kernel:
  drm: sti: HDMI add audio infoframe
  drm: sti: add support of XBGR8888 for gdp plane
  drm: sti: add support of ABGR8888 for gdp plane
  drm: sti: fix static checker warning in sti_awg_utils
  drm: sti: fix check for clk_pix_main
2015-02-11 15:34:02 +10:00
Dave Airlie
ae6d57d12a Merge tag 'topic/drm-misc-2015-02-06' of git://anongit.freedesktop.org/drm-intel into drm-next
Flushing out my drm-misc queue with a few oddball things all over.

* tag 'topic/drm-misc-2015-02-06' of git://anongit.freedesktop.org/drm-intel:
  drm: Use static attribute groups for managing connector sysfs entries
  drm: remove DRM_FORMAT_NV12MT
  drm/modes: Print the mode status in human readable form
  drm/irq: Don't disable vblank interrupts when already disabled
2015-02-11 15:33:02 +10:00
Kirill A. Shutemov
0661a33611 mm: remove rest usage of VM_NONLINEAR and pte_file()
One bit in ->vm_flags is unused now!

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Michal Hocko <mhocko@suse.cz>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-02-10 14:30:31 -08:00
Shobhit Kumar
4ba7d93afe drm/i915: Correct the base value while updating LP_OUTPUT_HOLD in MIPI_PORT_CTRL
LP_OUTPUT_HOLD is only in MIPI_PORT_CTRL(PORT_A) even for PORT_C in case
of dual link. In the dual link implementation, the bit is correctly set
or unset for hardcoded PORT_A, but for bit update the register base value
is read by using MIPI_PORT_CTRL(port) in a loop. The second iteration will
read base value from PORT_C and program for PORT_A. Mostly in case of dual
link all other bit values should be same, but logically we should read from
PORT_A. So hardcode to read initial value from PORT_A as well.

Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-09 20:21:08 +02:00
Chris Wilson
f0a1fb10e5 drm/i915: Insert a command barrier on BLT/BSD cache flushes
This looked like an odd regression from

commit ec5cc0f9b0
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Thu Jun 12 10:28:55 2014 +0100

    drm/i915: Restrict GPU boost to the RCS engine

but in reality it undercovered a much older coherency bug. The issue that
boosting the GPU frequency on the BCS ring was masking was that we could
wake the CPU up after completion of a BCS batch and inspect memory prior
to the write cache being fully evicted. In order to serialise the
breadcrumb interrupt (and so ensure that the CPU's view of memory is
coherent) we need to perform a post-sync operation in the MI_FLUSH_DW.

v2: Fix all the MI_FLUSH_DW (bsd plus the duplication in execlists).

Also fix the invalidate_domains mask in gen8_emit_flush() for ring !=
VCS.

Testcase: gpuX-rcs-gpu-read-after-write
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org
Acked-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-09 20:03:15 +02:00
Daniel Vetter
0ca0968554 drm/i915: Drop vblank wait from intel_dp_link_down
Nothing in Bspec seems to indicate that we actually needs this, and it
looks like can't work since by this point the pipe is off and so
vblanks won't really happen any more.

Note that Bspec mentions that it takes a vblank for this bit to
change, but _only_ when enabling.

Dropping this code quenches an annoying backtrace introduced by the
more anal checking since

commit 51e31d49c8
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Mon Sep 15 12:36:02 2014 +0200

    drm/i915: Use generic vblank wait

Note: This fixes the fallout from the above commit, but does not address
the shortcomings of the IBX transcoder select workaround implementation
discussed during review [1].

[1] http://mid.gmane.org/87y4o7usxf.fsf@intel.com

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86095
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: stable@vger.kernel.org # 3.19
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-09 18:52:12 +02:00
Joonyoung Shim
936ce5cce6 drm/exynos: fix NULL pointer reference
There is a case called disable_plane callback function even if
plane->crtc is NULL from exynos_drm_encoder_disable and it will cause
NULL pointer reference error.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-09 23:56:36 +09:00
Joonyoung Shim
d9ea62566d drm/exynos: remove exynos_plane_dpms
The exynos_plane_dpms function handles enabled flag of exynos plane and
calls internal hw driver callback function for hw overlay on/off. But
it causes state disharmory problem currently and is will be obstacle to
apply atomic operation later to keep non-standard per-plane dpms state
like enabled flag.

Let's remove enabled flag, it just stop to recall internal callback
function but hw drivers can handle it properly. And call internal
callback function directly then we can remove unnecessary
exynos_plane_dpms function

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-09 23:56:35 +09:00
Joonyoung Shim
f27829a184 drm/exynos: remove mode property of exynos crtc
This was added by commit 3b8d1cf818 ("drm/exynos: add property for
crtc mode"). Currently we can control a plane used for crtc using
primary plane by universal plane feature. Stop to use non-standard
property to control primary plane.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-09 23:56:34 +09:00
Gustavo Padovan
30b39f0488 drm/exynos: Remove exynos_plane_dpms() call with no effect
exynos_plane_dpms(DRM_MODE_DPMS_ON) calls the win_enable()'s callback
from the underlying layer. However neither one of these layers implement
win_enable() - FIMD, Mixer and VIDI. Thus the call to exynos_plane_dpms()
is pointless.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-09 23:56:22 +09:00
Mika Kuoppala
3225b2f95d drm/i915: Squelch overzealous uncore reset WARN_ON
We added this WARN_ON to guard against using uninitialized
forcewake domains. But forgot blissfully that not all
gens have forcewake domains in the first place.

v2: Move WARN_ON to fw_domains_init (Chris)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88911
Tested-by: Ding Heng <hengx.ding@intel.com> (v1)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
[Jani: add comment above WARN_ON as suggested by Chris]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-09 14:35:49 +02:00
Mika Kuoppala
ebbc7546d2 drm/i915: Take runtime pm reference on hangcheck_info
We read the coherent current seqno and actual head from ring.
For hardware access we need to take runtime_pm reference.

Get hardware specific values with runtime reference held
and print them first to emphasize hw state vs bookkeepping.

v2: Reorder output according to hw access (Chris)
    remove superfluous locking (Daniel)

Testcase: igt/pm_rpm/debugfs-read
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88910
Tested-by: Ding Heng <hengx.ding@intel.com> (v1)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-09 14:29:36 +02:00
Shobhit Kumar
d180d2bbb6 drm/i915: Correct the IOSF Dev_FN field for IOSF transfers
As per the specififcation, the SB_DevFn is the PCI_DEVFN of the target
device and not the source. So PCI_DEVFN(2,0) is not correct. Further the
port ID should be enough to identify devices unless they are MFD. The
SB_DevFn was intended to remove ambiguity in case of these MFD devices.

For non MFD devices the recommendation for the target device IP was to
ignore these fields, but not all of them followed the recommendation.
Some like CCK ignore these fields and hence PCI_DEVFN(2, 0) works and so
does PCI_DEVFN(0, 0) as it works for DPIO. The issue came to light because
of GPIONC which was not getting programmed correctly with PCI_DEVFN(2, 0).
It turned out that this did not follow the recommendation and expected 0
in this field.

In general the recommendation is to use SB_DevFn as PCI_DEVFN(0, 0) for
all devices except target PCI devices.

Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-09 14:26:19 +02:00
Carlo Caione
a5d7ac30fa drm/exynos: fix DMA_ATTR_NO_KERNEL_MAPPING usage
The Exynos DRM driver doesn't follow the correct API when dealing with
dma_{alloc, mmap, free}_attrs functions and the
DMA_ATTR_NO_KERNEL_MAPPING attribute.

When a IOMMU is not available and the DMA_ATTR_NO_KERNEL_MAPPING is
used, the driver should use the pointer returned by dma_alloc_attr() as
a cookie.

The Exynos DRM driver directly uses the non-requested virtual kernel
address returned by the DMA mapping subsystem. This just works now
because the non-IOMMU codepath doesn't obey DMA_ATTR_NO_KERNEL_MAPPING
but we need to fix it before fixing the DMA layer.

Signed-off-by: Carlo Caione <carlo@caione.org>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-07 16:38:41 +09:00
Seung-Woo Kim
129046c6ec drm/exynos: hdmi: replace fb size with mode size from win commit
For default graphic window, mixer_win_commit() sets display size
register as fb size. Calling setplane with smaller fb size than
mode size to default window causes distorted display result. So
this patch replaces fb size with mode size for display size from
the mixer_win_commit().

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-07 16:38:41 +09:00
Alban Browaeys
e2dc3f72ee drm/exynos: fix no hdmi output
The hdmi outputs black screen only even though under the hood Xorg and
framebuffer console  are fine : devices found and initialized, but
not a pixel out.

Commit 93bca243ec ("drm/exynos: remove struct exynos_drm_manager")
changed the call order of mixer_initialize with regards to
 exynos_drm_crtc_create.

This changes breaks hdmi out on Odroid U2 (linux-next with added
 Marek Szyprowski v4 hdmi patchset from linux-samsung-soc ML).

Restore the previous call ordering get hdmi to ouput proper pixels:
ie call mixer_initialize first then exynos_drm_crtc_create.

Fixes: 93bca243ec ("drm/exynos: remove struct exynos_drm_manager")
Signed-off-by: Alban Browaeys <prahal@yahoo.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-07 16:38:41 +09:00
Joonyoung Shim
92dc7a047b drm/exynos: use driver internal struct
Use driver internal struct as argument instead of struct exynos_drm_crtc
except functions of exynos_drm_crtc_ops and instead of struct
exynos_drm_display except functions of exynos_drm_display_ops.

It can reduce unnecessary variable declaration.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-07 16:38:41 +09:00
Joonyoung Shim
0f04cf8df0 drm/exynos: fix wrong pipe calculation for crtc
We get wrong pipe value for crtc since commit 93bca243ec ("drm/exynos:
remove struct exynos_drm_manager"). We should should increase pipe value
before call exynos_drm_crtc_create.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-07 16:38:40 +09:00
Joonyoung Shim
9865df4d76 drm/exynos: remove to use unnecessary MODULE_xxx macro
The exynos_drm_dmabuf.c file doesn't include any module feature and it
isn't built to module.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-07 16:38:40 +09:00
Joonyoung Shim
b74ea6a97e drm/exynos: remove DRM_EXYNOS_DMABUF config
The exynos drm driver has DRIVER_PRIME capability, then it's reasonable
to support dmabuf as default. Remove DRM_EXYNOS_DMABUF config, it will
prevent that user selects the option unnecessarily.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-07 16:38:40 +09:00
Marek Szyprowski
8dcc14f82f drm/exynos: IOMMU support should not be selectable by user
If system provides IOMMU feature, Exynos DRM should use it by default,
because the Exynos DRM subdrivers don't work correctly when Exynos IOMMU
driver has been enabled and no IOMMU support has been compiled into Exynos
DRM driver.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-07 16:38:40 +09:00
Marek Szyprowski
04427ec574 drm/exynos: add support for 'hdmi' clock
Mixed need to have hdmi clock enabled to properly perform power on/off
sequences, so add handling of this clock directly to the mixer driver.
Dependency between hdmi clock and mixer module has been observed on
Exynos4 based boards.

Suggested-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-02-07 16:38:40 +09:00
Arnaud Pouliquen
cffe1e89dc drm: sti: HDMI add audio infoframe
Add a default audio infoframe for HDMI compliance

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2015-02-05 16:21:19 +01:00
Michał Winiarski
460822b0b1 drm/i915: Prevent use-after-free in invalidate_range_start callback
It's possible for invalidate_range_start mmu notifier callback to race
against userptr object release. If the gem object was released prior to
obtaining the spinlock in invalidate_range_start we're hitting null
pointer dereference.

Testcase: igt/gem_userptr_blits/stress-mm-invalidate-close
Testcase: igt/gem_userptr_blits/stress-mm-invalidate-close-overlap
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org
[Jani: added code comment suggested by Chris]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-02-05 16:31:30 +02:00
Fabien Dessenne
8adb57763e drm: sti: add support of XBGR8888 for gdp plane
Use GDP capabilities to support DRM_FORMAT_XBGR8888 (XB24)

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
2015-02-05 10:27:32 +01:00
Dave Airlie
2f8997902e Merge tag 'drm-amdkfd-next-fixes-2015-02-03' of git://people.freedesktop.org/~gabbayo/linux into drm-next
- Fixing accounting of active queues
- Preserving a register internal state

* tag 'drm-amdkfd-next-fixes-2015-02-03' of git://people.freedesktop.org/~gabbayo/linux:
  drm/amdkfd: Preserve CP_MQD_IQ_RPTR internal state
  drm/amdkfd: Fix dqm->queue_count tracking
2015-02-05 10:40:10 +10:00
Takashi Iwai
7f551b1eee drm/cirrus: Limit modes depending on bpp option
The commit [8975626ea3: drm/cirrus: allow 32bpp framebuffers for
cirrus drm] broke X modesetting driver because cirrus driver still
provides the full list of modes up to 1280x1024 while the 32bpp can
support only up to 800x600.

We might be able to filter out the invalid modes in mode_valid
callback, but unfortunately the bpp in question can't be referred
there for now (let me know if there is a better way to retrieve the
bpp for the probed fb).

So, instead, this patch adds the bpp module option to specify the
maximal bpp explicitly and limits the resolutions in get_modes
depending on its value.

The default value is set to 24 so that the existing stuff keeps
working.  If you need a new 32bpp feature, specify cirrus.bpp=32
option explicitly.

Fixes: 8975626ea3 ('drm/cirrus: allow 32bpp framebuffers for cirrus drm')
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-05 10:39:00 +10:00
Dave Airlie
225963dd3e Merge branch 'drm-intel-next' of git://anongit.freedesktop.org/drm-intel into drm-next
drm-intel-next-2015-01-30:
- chv rps improvements from Ville
- atomic state handling prep work from Ander
- execlist request tracking refactoring from Nick Hoath
- forcewake code consolidation from Chris&Mika
- fastboot plane config refactoring and skl support from Damien
- some more skl pm patches all over (Damien)
- refactor dsi code to use drm dsi helpers and drm_panel infrastructure (Jani)
- first cut at experimental atomic plane updates (Matt Roper)
- piles of smaller things all over, as usual

* 'drm-intel-next' of git://anongit.freedesktop.org/drm-intel: (102 commits)
  drm/i915: Remove bogus locking check in the hangcheck code
  drm/i915: Update DRIVER_DATE to 20150130
  drm/i915: Use pipe_config's cpu_transcoder for reading encoder hw state
  drm/i915: Fix a use-after-free in intel_execlists_retire_requests
  drm/i915: Split shared dpll setup out of __intel_set_mode()
  drm/i915: Don't do posting reads on getting forcewake
  drm/i915: Do uncore early sanitize after domain init
  drm/i915: Handle CHV in vlv_set_rps_idle()
  drm/i915: Remove nested work in gpu error handling
  drm/i915/documentation: Add intel_uncore.c to drm.tmpl
  drm/i915/dsi: remove intel_dsi_cmd.c and the unused functions therein
  drm/i915/dsi: move dpi_send_cmd() to intel_dsi.c and make it static
  drm/i915/dsi: remove old read/write functions in favor of new stuff
  drm/i915/dsi: make the vbt panel driver use mipi_dsi_device for transfers
  drm/i915/dsi: add drm mipi dsi host support
  drm/i915/dsi: switch to drm_panel interface
  drm/i915/skl: Enabling PSR on Skylake
  Revert "drm/i915: Fix mutex->owner inspection race under DEBUG_MUTEXES"
  drm/i915: Be consistent on printing seqnos
  drm/i915: Display current hangcheck status in debugfs
  ...
2015-02-05 10:32:44 +10:00
Benjamin Gaignard
4af6b12ad5 drm: sti: add support of ABGR8888 for gdp plane
Use GDP capabilities to support DRM_FORMAT_ABGR8888 (AB24)

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
2015-02-04 17:58:11 +01:00
Vincent Abriou
17ba9810ec drm: sti: fix static checker warning in sti_awg_utils
The shift and the mask done on arg value is useless
since arg is null.

Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
2015-02-04 17:52:28 +01:00
Jassi Brar
6dfca6b37f drm: sti: fix check for clk_pix_main
copy-paste wasn't followed by editing, do it.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2015-02-04 17:52:07 +01:00
Takashi Iwai
335f1a62c5 drm: Use static attribute groups for managing connector sysfs entries
Instead of manual calls of device_create_file() and
device_remove_file(), assign the static attribute groups to the device
with device_create_with_groups().  The conditionally built sysfs
entries are handled via is_visible callback.

This simplifies the code and also avoids the possible races.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-04 15:02:00 +01:00
Daniel Vetter
083500baef drm: remove DRM_FORMAT_NV12MT
So this has been merged originally in

commit 83052d4d5c
Author: Seung-Woo Kim <sw0312.kim@samsung.com>
Date:   Thu Dec 15 15:40:55 2011 +0900

    drm: Add multi buffer plane pixel formats

which hasn't seen a lot of review really. The problem is that it's not
a real pixel format, but just a different way to lay out NV12 pixels
in macroblocks, i.e. a tiling format.

The new way of doing this is with the soon-to-be-merged fb modifiers.

This was brough up in some long irc discussion around the entire
topic, as an example of where things have gone wrong. Luckily we can
correct the mistake:
- The kms side support for NV12MT is all dead code because
  format_check in drm_crtc.c never accepted NV12MT.
- The gem side for the gsc support doesn't look better: The code
  forgets to set the pixel format and makes a big mess with the tiling
  mode bits, inadvertedly setting them all.

Conclusion: This never really worked (at least not in upstream) and
hence we can safely correct our mistake here.

Cc: Seung-Woo Kim <sw0312.kim@samsung.com>
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Rob Clark <robclark@freedesktop.org>
Cc: Daniel Stone <daniel@fooishbar.org>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Acked-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-04 10:10:05 +01:00
Takashi Iwai
3fe9cf390f Merge branch 'topic/snd-device' into for-next 2015-02-03 17:57:16 +01:00
Daniel Vetter
b838cbee0d drm/i915: Remove bogus locking check in the hangcheck code
You can _never_ assert that a lock is not held, except in some very
restricted corner cases where it's guranteed that your code is running
single-threade (e.g. driver load before you've published any pointers
leading to that lock).

In addition the early return breaks a bunch of testcases since with
highly concurrent hangcheck stress tests the reset fails to work and
the test doesn't recover and time out.

This regression has been introduced in

commit b8d24a0656
Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Date:   Wed Jan 28 17:03:14 2015 +0200

    drm/i915: Remove nested work in gpu error handling

Aside: It is possible to check whether a given task doesn't hold a
lock, but only when lockdep is enabled, using the lockdep_assert_held
stuff.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88908
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-03 17:13:04 +01:00
Ville Syrjälä
f79d1548b0 drm/modes: Print the mode status in human readable form
Currently when a mode is rejected the reason is printed as a raw number.
Having to manually decode that to a enum drm_mode_status value is
tiresome. Have the code do the decoding instead and print the result
in a human readable format.

Just having an array of strings indexed with the mode status doesn't
work since the enum includes negative values. So we offset the status
by +3 which makes all the indexes non-negative. Also add a bit of
paranoia into the code to catch out of bounds accesses in case
someone adds more enum values but forgets to update the code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-03 09:09:22 +01:00
Dave Airlie
86640966f6 Merge tag 'drm-amdkfd-fixes-2015-02-02' of git://people.freedesktop.org/~gabbayo/linux into drm-fixes
Three small fixes that came up during last week, nothing scary:

- Accidently incremented a counter instead of decrementing it (copy-paste error)
- Module parameter of max num of queues must be at least 1 and not 0
- Don't do BUG() as a result from wrong user input

* tag 'drm-amdkfd-fixes-2015-02-02' of git://people.freedesktop.org/~gabbayo/linux:
  drm/amdkfd: Don't create BUG due to incorrect user parameter
  drm/amdkfd: max num of queues can't be 0
  drm/amdkfd: Fix bug in accounting of queues
2015-02-03 11:21:11 +10:00
Ville Syrjälä
e4bf44b3b5 drm/modes: Print the mode status in human readable form
Currently when a mode is rejected the reason is printed as a raw number.
Having to manually decode that to a enum drm_mode_status value is
tiresome. Have the code do the decoding instead and print the result
in a human readable format.

Just having an array of strings indexed with the mode status doesn't
work since the enum includes negative values. So we offset the status
by +3 which makes all the indexes non-negative. Also add a bit of
paranoia into the code to catch out of bounds accesses in case
someone adds more enum values but forgets to update the code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-03 11:13:27 +10:00
Chen Gang S
db88c8f4e7 drm: Kconfig: Let all DRM_GEM_CMA_HELPER related macros depend on HAVE_DMA_ATTRS
DRM_GEM_CMA_HELPER is depend on HAVE_DMA_ATTRS, or it will break the
building. The related error (with allmodconfig under xtensa):

    CC [M]  drivers/gpu/drm/drm_gem_cma_helper.o
  drivers/gpu/drm/drm_gem_cma_helper.c: In function 'drm_gem_cma_create':
  drivers/gpu/drm/drm_gem_cma_helper.c:110:19: error: implicit declaration of function 'dma_alloc_writecombine' [-Werror=implicit-function-declaration]
    cma_obj->vaddr = dma_alloc_writecombine(drm->dev, size,
                     ^
  drivers/gpu/drm/drm_gem_cma_helper.c:110:17: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
    cma_obj->vaddr = dma_alloc_writecombine(drm->dev, size,
                   ^
  drivers/gpu/drm/drm_gem_cma_helper.c: In function 'drm_gem_cma_free_object':
  drivers/gpu/drm/drm_gem_cma_helper.c:193:3: error: implicit declaration of function 'dma_free_writecombine' [-Werror=implicit-function-declaration]
     dma_free_writecombine(gem_obj->dev->dev, cma_obj->base.size,
     ^
  drivers/gpu/drm/drm_gem_cma_helper.c: In function 'drm_gem_cma_mmap_obj':
  drivers/gpu/drm/drm_gem_cma_helper.c:330:8: error: implicit declaration of function 'dma_mmap_writecombine' [-Werror=implicit-function-declaration]
    ret = dma_mmap_writecombine(cma_obj->base.dev->dev, vma,
          ^

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-03 11:12:37 +10:00
Ilija Hadzic
92b712b739 drm/radeon: fix the crash in test functions
radeon_copy_dma and radeon_copy_blit must be called with
a valid reservation object. Otherwise a crash will be provoked.
We borrow the object from vram BO.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=88464

Cc: stable@vger.kernel.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-02 11:39:36 -05:00
Ilija Hadzic
3f5e1b4f58 drm/radeon: fix the crash in benchmark functions
radeon_copy_dma and radeon_copy_blit must be called with
a valid reservation object. Otherwise a crash will be provoked.
We borrow the object from destination BO.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=88464

Cc: stable@vger.kernel.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-02 11:39:35 -05:00
Alex Deucher
a124d068bf drm/radeon: properly set vm fragment size for TN/RL
Should be the same as cayman.  We don't use VM by default
on NI parts so this isn't critical.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-02-02 11:39:34 -05:00
Alex Deucher
544143f9e0 drm/radeon: don't init gpuvm if accel is disabled (v3)
If acceleration is disabled, it does not make sense
to init gpuvm since nothing will use it.  Moreover,
if radeon_vm_init() gets called it uses accel to try
and clear the pde tables, etc. which results in a bug.

v2: handle vm_fini as well
v3: handle bo_open/close as well

Bug:
https://bugs.freedesktop.org/show_bug.cgi?id=88786

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-02-02 11:39:33 -05:00
Christian König
72edd83cc9 drm/radeon: fix PLLs on RS880 and older v2
This is a workaround for RS880 and older chips which seem to have
an additional limit on the minimum PLL input frequency.

v2: fix signed/unsigned warning

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=91861
https://bugzilla.kernel.org/show_bug.cgi?id=83461

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-02-02 11:39:33 -05:00
Oded Gabbay
b9dce23ddc drm/amdkfd: Don't create BUG due to incorrect user parameter
This patch changes a BUG_ON() statement to pr_debug, in case the user tries to
update a non-existing queue.

Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
Reviewed-by: Ben Goz <ben.goz@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-02 09:45:24 +02:00
Oded Gabbay
ca400b2a1a drm/amdkfd: max num of queues can't be 0
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-02 09:45:24 +02:00
Oded Gabbay
8b58f26111 drm/amdkfd: Fix bug in accounting of queues
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-02 09:45:24 +02:00