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drm/i915: Set up fb format modifier for initial plane config
No functional changes yet since intel_framebuffer_init would have fixed this up for us. But this is prep work to be able to handle new tiling layouts in the initial plane config code. Follow-up patches will start to make use of this and switch over to fb modifiers where needed. Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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@ -2390,6 +2390,8 @@ intel_alloc_plane_obj(struct intel_crtc *crtc,
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mode_cmd.width = fb->width;
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mode_cmd.height = fb->height;
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mode_cmd.pitches[0] = fb->pitches[0];
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mode_cmd.modifier[0] = fb->modifier[0];
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mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
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mutex_lock(&dev->struct_mutex);
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@ -6624,9 +6626,12 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
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fb = &intel_fb->base;
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if (INTEL_INFO(dev)->gen >= 4)
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if (val & DISPPLANE_TILED)
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if (INTEL_INFO(dev)->gen >= 4) {
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if (val & DISPPLANE_TILED) {
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plane_config->tiling = I915_TILING_X;
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fb->modifier[0] = I915_FORMAT_MOD_X_TILED;
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}
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}
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pixel_format = val & DISPPLANE_PIXFORMAT_MASK;
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fourcc = i9xx_format_to_fourcc(pixel_format);
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@ -7658,8 +7663,10 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
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if (!(val & PLANE_CTL_ENABLE))
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goto error;
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if (val & PLANE_CTL_TILED_MASK)
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if (val & PLANE_CTL_TILED_MASK) {
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plane_config->tiling = I915_TILING_X;
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fb->modifier[0] = I915_FORMAT_MOD_X_TILED;
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}
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pixel_format = val & PLANE_CTL_FORMAT_MASK;
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fourcc = skl_format_to_fourcc(pixel_format,
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@ -7757,9 +7764,12 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
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fb = &intel_fb->base;
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if (INTEL_INFO(dev)->gen >= 4)
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if (val & DISPPLANE_TILED)
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if (INTEL_INFO(dev)->gen >= 4) {
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if (val & DISPPLANE_TILED) {
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plane_config->tiling = I915_TILING_X;
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fb->modifier[0] = I915_FORMAT_MOD_X_TILED;
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}
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}
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pixel_format = val & DISPPLANE_PIXFORMAT_MASK;
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fourcc = i9xx_format_to_fourcc(pixel_format);
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