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drm/i915: Switch intel_fb_align_height to fb format modifiers

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With this we can treat the fb format modifier completely independently
from the fencing mode in obj->tiling_mode in the initial plane code.
Which means new tiling modes without any gtt fence are now fully
support in the core i915 driver code.

v2: Also add pixel_format while at it, we need this to compute the
height for the new tiling formats.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
This commit is contained in:
Daniel Vetter 2015-02-10 17:16:10 +00:00
parent 18c5247e1e
commit 091df6cbf2
3 changed files with 18 additions and 8 deletions
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20
drivers/gpu/drm/i915/intel_display.c
View File

@ -2190,11 +2190,15 @@ static bool need_vtd_wa(struct drm_device *dev)
}
int
intel_fb_align_height(struct drm_device *dev, int height, unsigned int tiling)
intel_fb_align_height(struct drm_device *dev, int height,
uint32_t pixel_format,
uint64_t fb_format_modifier)
{
int tile_height;
tile_height = tiling ? (IS_GEN2(dev) ? 16 : 8) : 1;
tile_height = fb_format_modifier == I915_FORMAT_MOD_X_TILED ?
(IS_GEN2(dev) ? 16 : 8) : 1;
return ALIGN(height, tile_height);
}
@ -6657,7 +6661,8 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
fb->pitches[0] = val & 0xffffffc0;
aligned_height = intel_fb_align_height(dev, fb->height,
plane_config->tiling);
fb->pixel_format,
fb->modifier[0]);
plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
@ -7699,7 +7704,8 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
fb->pitches[0] = (val & 0x3ff) * stride_mult;
aligned_height = intel_fb_align_height(dev, fb->height,
plane_config->tiling);
fb->pixel_format,
fb->modifier[0]);
plane_config->size = ALIGN(fb->pitches[0] * aligned_height, PAGE_SIZE);
@ -7795,7 +7801,8 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
fb->pitches[0] = val & 0xffffffc0;
aligned_height = intel_fb_align_height(dev, fb->height,
plane_config->tiling);
fb->pixel_format,
fb->modifier[0]);
plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
@ -12823,7 +12830,8 @@ static int intel_framebuffer_init(struct drm_device *dev,
return -EINVAL;
aligned_height = intel_fb_align_height(dev, mode_cmd->height,
obj->tiling_mode);
mode_cmd->pixel_format,
mode_cmd->modifier[0]);
/* FIXME drm helper for size checks (especially planar formats)? */
if (obj->base.size < aligned_height * mode_cmd->pitches[0])
return -EINVAL;

3
drivers/gpu/drm/i915/intel_drv.h
View File

@ -879,7 +879,8 @@ void intel_frontbuffer_flip(struct drm_device *dev,
}
int intel_fb_align_height(struct drm_device *dev, int height,
unsigned int tiling);
uint32_t pixel_format,
uint64_t fb_format_modifier);
void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire);

3
drivers/gpu/drm/i915/intel_fbdev.c
View File

@ -594,7 +594,8 @@ static bool intel_fbdev_init_bios(struct drm_device *dev,
cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay;
cur_size = intel_fb_align_height(dev, cur_size,
plane_config->tiling);
fb->base.pixel_format,
fb->base.modifier[0]);
cur_size *= fb->base.pitches[0];
DRM_DEBUG_KMS("pipe %c area: %dx%d, bpp: %d, size: %d\n",
pipe_name(intel_crtc->pipe),