Commit Graph

28 Commits

Author SHA1 Message Date
Ran Wang
1000ae68e0 arm64: dts: layerscape: Add incr-burst-type-adjustment property to USB3 node
Add this property to all layerscape platforms to improve USB read write performance.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-12 09:41:53 +08:00
Nipun Gupta
859873fb12 arm64: dts: ls1088: add missing dma-coherent property in fsl-mc
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-11 16:04:35 +08:00
Nipun Gupta
83c58a55ce arm64: dts: ls1088: add smmu device node
This patch also adds the iommu-map property in fsl-mc node, so
that fsl-mc can use iommu.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-11 16:04:24 +08:00
Hou Zhiqiang
881e90d27a arm64: dts: layerscape: add num-viewport property for PCIe DT nodes
Add num-viewport property for PCIe DT nodes to specify how many
viewports are implemented.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-11 15:28:55 +08:00
Ioana Ciocoi Radulescu
d9a71ef086 arm64: dts: ls1088a: Add missing dma-ranges property
LS1088A has a 48-bit address size so make sure that the
dma-ranges property reflects this.

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-08 10:28:38 +08:00
Ioana Ciocoi Radulescu
a2468676cc arm64: dts: ls1088a: Move fsl-mc node
The fsl-mc node should sit under the soc node, so move it to
its proper location.

Fixes: ac7c9ff741 ("arm64: dts: ls1088a: add fsl-mc hardware resource manager node")
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-08 10:28:38 +08:00
Viresh Kumar
c9a1f24304 arm64: dts: fsl: Add all CPUs in cooling maps
Each CPU can (and does) participate in cooling down the system but the
DT only captures a handful of them, normally CPU0, in the cooling maps.
Things work by chance currently as under normal circumstances its the
first CPU of each cluster which is used by the operating systems to
probe the cooling devices. But as soon as this CPU ordering changes and
any other CPU is used to bring up the cooling device, we will start
seeing failures.

Also the DT is rather incomplete when we list only one CPU in the
cooling maps, as the hardware doesn't have any such limitations.

Update cooling maps to include all devices affected by individual trip
points.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-08 10:28:38 +08:00
Hou Zhiqiang
1fa35bc09d arm64: dts: layerscape: removed compatible string "snps,dw-pcie"
Removed the wrong compatible string "snps,dw-pcie", in case
match incorrect driver.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-08 10:28:38 +08:00
Bao Xiaowei
aa2aa88847 arm64: dts: fsl: Add the status property disable PCIe
Add the status property disable the PCIe, the property will be enable
by bootloader.

Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-08 10:28:37 +08:00
Viresh Kumar
346f5976cc arm64: dts: freescale: Add missing cooling device properties for CPUs
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.

Add such missing properties.

Do minor rearrangement as well to keep ordering consistent.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-03 15:01:09 +08:00
Li Yang
7a2aeb9175 arm64: dts: freescale: Update to use SPDX identifiers
Replace license text with corresponding SPDX identifiers and update the
format of existing SPDX identifiers to follow the new guideline
Documentation/process/license-rules.rst.

Note that some of the files mentioned X11 license previously but the
license text actually matches MIT license.

Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-06-19 11:07:47 +08:00
Yuantian Tang
69ea29b033 arm64: dts: fsl: update the cpu idle node
According to PSCI standard v0.2, for CPU_SUSPEND call, which is
used by cpu idle framework, bit[16] of state parameter must be 0.
So update bit[16] of property 'arm,psci-suspend-param', which is
used as state parameter, to 0.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-24 15:10:05 +08:00
Fabio Estevam
85530a7a76 arm64: dts: ls1088a: Move cpu_thermal out of bus node
Move cpu_thermal node from soc node to root node.

cpu_thermal node does not have any register properties and thus
shouldn't be placed on the bus.

This fixes the following build warnings with W=1:

arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-12 13:11:03 +08:00
Zhang Ying-22455
cc223282a4 arm64: dts: ls1088a: add DT node of watchdog
There are eight cores in ls1088a and each core has an watchdog,
ls1088a can use sp805-wdt driver, so we just add DT node for it.

Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-12 13:11:02 +08:00
yinbo.zhu
df063a1fad arm64: dts: ls1088a: Add USB support
Add USB support on ls1088ardb

Signed-off-by: yinbo zhu <yinbo.zhu@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-12-26 16:58:01 +08:00
Ioana Ciornei
ac7c9ff741 arm64: dts: ls1088a: add fsl-mc hardware resource manager node
Add the fsl-mc node in the LS1088A device tree.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-12-26 16:27:54 +08:00
Ashish Kumar
88b64bb1aa arm64: dts: ls1088a: Added dcfg node in ls1088a dtsi
Add debug configuration node(DCFG) in dtsi, helps guts driver to
print the following information in kernel boot log

[    0.526649] Machine: LS1088A RDB Board
[    0.530430] SoC family: QorIQ LS1088A
[    0.534115] SoC ID: svr:0x87030010, Revision: 1.0

Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-12-26 16:27:54 +08:00
Hou Zhiqiang
647911c85a arm64: dts: ls1088a: add PCIe controller DT nodes
The LS1088a implements 3 PCIe 3.0 controllers.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-09-22 15:10:03 +08:00
Hou Zhiqiang
a3bbf4c584 arm64: dts: ls1088a: add gicv3 ITS DT node
Add ITS device tree node, which will be used by PCIe controller.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-09-22 15:10:01 +08:00
Sumit Garg
51b29445cb arm64: dts: ls: Add optee node
Add optee device tree node on ls1012a, ls1043a, ls1046a, ls1088a
and ls208xa.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-09-22 13:42:38 +08:00
Yuantian Tang
5334e1a249 arm64: dts: ls1088a: add cpu idle support
ls1088a supports another cpu idle state which is ph20 which saves
more power when cpu is idle.
It was implemented through psci firmware.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-08-14 09:14:14 +08:00
Horia Geantă
1e09dec932 arm64: dts: freescale: ls1088a: add crypto node
LS1088A has a SEC v5.3 security engine.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-08-05 09:55:16 +08:00
Yuantian Tang
375b6755a5 arm64: dts: ls1088a: update sata node
1. Remove ls1043a compatible string from node
2. Fix the sata ecc register address error

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 22:42:42 +08:00
Yuantian Tang
e4990b4448 arm64: dts: ls1088a: Add TMU device tree support
Add nodes and properties for thermal management support.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-05-15 10:24:46 +08:00
Yuantian Tang
83d0c69711 arm64: dts: ls1088a: update the sata node
1. Sata ecc should be disabled due to a erratum.
Provide the ecc register address for driver to use.
2. Enable dma coherence operation

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-05-15 09:34:53 +08:00
Prabhakar Kushwaha
f9a14b3f86 arm64: dts: Add flash node for ls1088a qds and rdb
LS1088AQDS consist of NOR, NAND and FPGA connected over IFC
LS1088ARDB consist of NAND and FPGA connected over IFC.

So add flash information in ifc node of device tree.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-05-15 09:34:53 +08:00
Yangbo Lu
e56ae17838 arm64: dts: ls1088a: add esdhc node
Add esdhc node for ls1088a and enable it on both RDB and QDS boards.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-05-15 09:34:52 +08:00
Harninder Rai
7a5d73479f arm64: dts: Add support for FSL's LS1088A SoC
LS1088A contains eight ARM v8 CortexA53 processor cores
with 32 KB L1-D cache and 32 KB L1-I cache

Features summary
 Eight 32-bit / 64-bit ARM v8 Cortex-A53 CPUs
  - Arranged as two clusters of four cores sharing a 1 MB L2 cache
  - Speed Up to 1.5 GHz
  - Support for cluster power-gating.
 Cache coherent interconnect (CCI-400)
  - Hardware-managed data coherency
  - Up to 700 MHz
 One 64-bit DDR4 SDRAM memory controller with ECC
 Data path acceleration architecture 2.0 (DPAA2)
 Three PCIe 3.0 controllers
 One serial ATA (SATA 3.0) controller
 Three high-speed USB 3.0 controllers with integrated PHY

 Following levels of DTSI/DTS files have been created for the LS1088A
  SoC family:

         - fsl-ls1088a.dtsi:
                 DTS-Include file for NXP LS1088A SoC.

         - fsl-ls1088a-qds.dts:
                 DTS file for NXP LS1088A QDS board.

         - fsl-ls1088a-rdb.dts:
                 DTS file for NXP LS1088A RDB board

Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>`
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-29 11:53:19 +08:00