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arm64: dts: layerscape: add num-viewport property for PCIe DT nodes
Add num-viewport property for PCIe DT nodes to specify how many viewports are implemented. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -486,6 +486,7 @@ pcie@3400000 {
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#size-cells = <2>;
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device_type = "pci";
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num-lanes = <4>;
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num-viewport = <2>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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@ -675,6 +675,7 @@ pcie@3400000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <4>;
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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@ -701,6 +702,7 @@ pcie@3500000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <2>;
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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@ -727,6 +729,7 @@ pcie@3600000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <2>;
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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@ -644,6 +644,7 @@ pcie@3400000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <4>;
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num-viewport = <8>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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@ -670,6 +671,7 @@ pcie@3500000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <2>;
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num-viewport = <8>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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@ -696,6 +698,7 @@ pcie@3600000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <2>;
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num-viewport = <8>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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@ -452,6 +452,7 @@ pcie@3400000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <4>;
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num-viewport = <256>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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@ -477,6 +478,7 @@ pcie@3500000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <4>;
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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@ -502,6 +504,7 @@ pcie@3600000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <8>;
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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@ -627,6 +627,7 @@ pcie1: pcie@3400000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <4>;
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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msi-parent = <&its>;
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#interrupt-cells = <1>;
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@ -648,6 +649,7 @@ pcie2: pcie@3500000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <4>;
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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msi-parent = <&its>;
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#interrupt-cells = <1>;
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@ -669,6 +671,7 @@ pcie3: pcie@3600000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <8>;
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num-viewport = <256>;
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bus-range = <0x0 0xff>;
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msi-parent = <&its>;
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#interrupt-cells = <1>;
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@ -690,6 +693,7 @@ pcie4: pcie@3700000 {
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device_type = "pci";
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dma-coherent;
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num-lanes = <4>;
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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msi-parent = <&its>;
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#interrupt-cells = <1>;
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