arm64: dts: layerscape: add num-viewport property for PCIe DT nodes

Add num-viewport property for PCIe DT nodes to specify how many
viewports are implemented.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Hou Zhiqiang 2018-12-18 04:19:32 +00:00 committed by Shawn Guo
parent a2b91efd30
commit 881e90d27a
5 changed files with 14 additions and 0 deletions

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@ -486,6 +486,7 @@ pcie@3400000 {
#size-cells = <2>;
device_type = "pci";
num-lanes = <4>;
num-viewport = <2>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */

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@ -675,6 +675,7 @@ pcie@3400000 {
device_type = "pci";
dma-coherent;
num-lanes = <4>;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
@ -701,6 +702,7 @@ pcie@3500000 {
device_type = "pci";
dma-coherent;
num-lanes = <2>;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
@ -727,6 +729,7 @@ pcie@3600000 {
device_type = "pci";
dma-coherent;
num-lanes = <2>;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */

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@ -644,6 +644,7 @@ pcie@3400000 {
device_type = "pci";
dma-coherent;
num-lanes = <4>;
num-viewport = <8>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
@ -670,6 +671,7 @@ pcie@3500000 {
device_type = "pci";
dma-coherent;
num-lanes = <2>;
num-viewport = <8>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
@ -696,6 +698,7 @@ pcie@3600000 {
device_type = "pci";
dma-coherent;
num-lanes = <2>;
num-viewport = <8>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */

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@ -452,6 +452,7 @@ pcie@3400000 {
device_type = "pci";
dma-coherent;
num-lanes = <4>;
num-viewport = <256>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
@ -477,6 +478,7 @@ pcie@3500000 {
device_type = "pci";
dma-coherent;
num-lanes = <4>;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
@ -502,6 +504,7 @@ pcie@3600000 {
device_type = "pci";
dma-coherent;
num-lanes = <8>;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */

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@ -627,6 +627,7 @@ pcie1: pcie@3400000 {
device_type = "pci";
dma-coherent;
num-lanes = <4>;
num-viewport = <6>;
bus-range = <0x0 0xff>;
msi-parent = <&its>;
#interrupt-cells = <1>;
@ -648,6 +649,7 @@ pcie2: pcie@3500000 {
device_type = "pci";
dma-coherent;
num-lanes = <4>;
num-viewport = <6>;
bus-range = <0x0 0xff>;
msi-parent = <&its>;
#interrupt-cells = <1>;
@ -669,6 +671,7 @@ pcie3: pcie@3600000 {
device_type = "pci";
dma-coherent;
num-lanes = <8>;
num-viewport = <256>;
bus-range = <0x0 0xff>;
msi-parent = <&its>;
#interrupt-cells = <1>;
@ -690,6 +693,7 @@ pcie4: pcie@3700000 {
device_type = "pci";
dma-coherent;
num-lanes = <4>;
num-viewport = <6>;
bus-range = <0x0 0xff>;
msi-parent = <&its>;
#interrupt-cells = <1>;