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arm64: dts: freescale: ls1088a: add crypto node
LS1088A has a SEC v5.3 security engine. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -52,6 +52,10 @@ / {
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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crypto = &crypto;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -369,6 +373,45 @@ sata: sata@3200000 {
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dma-coherent;
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status = "disabled";
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};
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crypto: crypto@8000000 {
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compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
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fsl,sec-era = <8>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x00 0x8000000 0x100000>;
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reg = <0x00 0x8000000 0x0 0x100000>;
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interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
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dma-coherent;
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sec_jr0: jr@10000 {
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compatible = "fsl,sec-v5.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x10000 0x10000>;
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interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
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};
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sec_jr1: jr@20000 {
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compatible = "fsl,sec-v5.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x20000 0x10000>;
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interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
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};
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sec_jr2: jr@30000 {
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compatible = "fsl,sec-v5.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x30000 0x10000>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
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};
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sec_jr3: jr@40000 {
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compatible = "fsl,sec-v5.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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reg = <0x40000 0x10000>;
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interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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};
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