Use the new EBI/NAND bindings to declare NAND chips and remove old NAND
nodes along the way.
Note that we keep using old bindings in at91rm9200.dtsi because this
SoC is not supported by the EBI driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Declare new nodes for the EBI and NAND controllers embedded in various
at91/sama5 SoCs.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Remove pullup on dbgu DTXD signal, it is a push-pull output thus the
pullup is pointless.
Add pullup on dbgu DRXD signal, it prevents the DRXD signal to be left
floating and so consuming a useless extra amount of power in crowbarred
state if nothing is externally connected to dbgu.
Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
i2c-gpio doesn't need a reg property. Change the node names to i2c-gpio-x
as used in other dts to remove the unit-address.
Solves:
Warning (unit_address_vs_reg): Node /i2c@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c@2 has a unit name, but no reg property
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Endpoint nodes have a reg property. Add their mandatory unit-address.
This solves:
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep0 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep1 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep2 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep3 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep4 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep5 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep6 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep7 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep8 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep9 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep10 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep11 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep12 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep13 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep14 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep15 has a reg or ranges property, but no unit name
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The triggers don't need a reg property, remove it when prenset. Also remove
the unit-address from their name.
This solves:
Warning (unit_address_vs_reg): Node /ahb/apb/adc@fc034000/trigger@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /ahb/apb/adc@fc034000/trigger@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /ahb/apb/adc@fc034000/trigger@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /ahb/apb/adc@fc034000/trigger@3 has a unit name, but no reg property
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The PMC is not only used to drive the clocks but also has some registers
related to other functions. One of those is for example the USB gadget
bias.
Using a syscon allows to properly separate those functions.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The watchdog, the reset controller, the RTC, the real-time timer, the
shutdown controller and the timer counter need the slow clock, add it where
necessary.
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The RTC lives at 0xfffffe00. Also reorder the node properly.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The DBGU is not a simple UART and we need to be able to distinguish it from the
other UARTs, in particular to get its address and check the chip id.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add nodes for the SRAM available on atmel SoCs
For the at91sam9260 and the at91sam9g20, address mirroring is used to create a
single contiguous SRAM range instead of declaring two separate banks.
Also remove leftover TODOs in the sam9g45 file
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[nicolas.ferre@atmel.com: correct at91sam9rl sram size => 0x10000]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
at91sam926x, at91sam9g45 and at91sam9rl SoCs all have at least one RTT
block.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add rtc support to the at91sam9rl dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
As the SSC integrate in at91sam9rl support frame sync length
extension, so switch compatible string to support this feature.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add the "atmel,nand-has-dma" property to NAND node
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Having clocks grouped in a subnode is common practice, so move the crystals
under a clocks node for the at91sam9rl SoC and at91sam9rl based boards.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Argument 3 (OUT) and 4 (ICPLL) of the atmel,pll-clk-output-ranges were missing.
Also, the at91sam9rl doesn't really have a by 3 divisor.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Move at91sam9rl SoC to the new main/slow clock model.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
CC: Rob Landley <rob@landley.net>
CC: Andrew Victor <linux@maxim.org.za>
CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Acked-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
[nicolas.ferre@atmel.com: add new at91sam9261 & at91sam9rl]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch adds support for the ADC, LCD, USB gadget and PWM controllers to the
at91sam9rl. It also reorders the pinctrl_spi0 as it was not correctly sorted.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This adds preliminary DT support for the at91sam9rl.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
