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ARM: at91/dt: introduce atmel,<chip>-dbgu
The DBGU is not a simple UART and we need to be able to distinguish it from the other UARTs, in particular to get its address and check the chip id. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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@ -1,9 +1,10 @@
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* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
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Required properties:
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- compatible: Should be "atmel,<chip>-usart"
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- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
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The compatible <chip> indicated will be the first SoC to support an
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additional mode or an USART new feature.
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For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt
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- clock-names: tuple listing input clock names.
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@ -830,7 +830,7 @@ pioD: gpio@fffffa00 {
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91rm9200-usart";
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compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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@ -753,7 +753,7 @@ pioC: gpio@fffff800 {
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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@ -276,7 +276,7 @@ aic: interrupt-controller@fffff000 {
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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@ -762,7 +762,7 @@ pioE: gpio@fffffa00 {
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};
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dbgu: serial@ffffee00 {
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compatible = "atmel,at91sam9260-usart";
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compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
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reg = <0xffffee00 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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@ -893,7 +893,7 @@ pioE: gpio@fffffa00 {
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};
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dbgu: serial@ffffee00 {
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compatible = "atmel,at91sam9260-usart";
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compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
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reg = <0xffffee00 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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@ -757,7 +757,7 @@ pioD: gpio@fffffa00 {
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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@ -377,7 +377,7 @@ aic: interrupt-controller@fffff000 {
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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@ -860,7 +860,7 @@ mmc1: mmc@f000c000 {
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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@ -439,7 +439,7 @@ ramc0: ramc@ffffea00 {
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};
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dbgu: serial@ffffee00 {
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compatible = "atmel,at91sam9260-usart";
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compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
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reg = <0xffffee00 0x200>;
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
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dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
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@ -1064,7 +1064,7 @@ rtc@fc0686b0 {
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};
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dbgu: serial@fc069000 {
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compatible = "atmel,at91sam9260-usart";
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compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
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reg = <0xfc069000 0x200>;
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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