mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 17:50:52 +07:00
3.16 third DT series:
- move of both at91sam9n12 and at91sam9x5 to CCF -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJTfiDHAAoJEAf03oE53VmQvwwIAIH1xvudF1FqO9D9gj2SAHON n9dEhlvWUmmA2xUiDuNwEgmycsJnWW69VIWZT38SKD68Mu09hgsPhVbw4c27KIBy izcbC70v/lHpSIYOHEy2kJXuViQM0iuMCvsFuIGuxr9BMJLyY4yJpfqgW3635xMS FDAzM6+F6QZ7bd6BwkJHMkXcYXb5lh1v8bio9O8e4gM/p7O+7ei212nRUp9WaV+6 elp9Ki3KpAMFBBntBQPLoZ1Qpxu1GqGuCk8fmVypP+t4PO0pJWycpN2tAb/dwAZ1 /MqtLy9+vAd3lnPl/ch8uNnTafOeVuQI8rvrSW+/BtNMC8TakghfC10U2CcwLPM= =7Ccm -----END PGP SIGNATURE----- Merge tag 'at91-dt3' of git://github.com/at91linux/linux-at91 into next/dt 3.16 third DT series: - move of both at91sam9n12 and at91sam9x5 to CCF * tag 'at91-dt3' of git://github.com/at91linux/linux-at91: ARM: at91: move sam9n12 SoC to the CCF ARM: at91/dt: define sam9n12ek crystal frequencies ARM: at91/dt: define sam9n12 clocks ARM: at91: prepare common clk transition for sam9n12 SoC ARM: at91: move sam9x5 SoCs to the CCF ARM: at91/dt: define sam9x5ek's crystal frequencies ARM: at91/dt: define sam9x5 clocks ARM: at91: prepare common clk transition for sam9x5 SoCs dt-bindings: clock: Move at91.h to dt-bindigs/clock ARM: at91: fix spi cs on sama5d3 Xplained board Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
77579afc35
@ -139,7 +139,7 @@ Required properties for PMC node:
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- interrupt-controller : tell that the PMC is an interrupt controller.
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- #interrupt-cells : must be set to 1. The first cell encodes the interrupt id,
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and reflect the bit position in the PMC_ER/DR/SR registers.
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You can use the dt macros defined in dt-bindings/clk/at91.h.
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You can use the dt macros defined in dt-bindings/clock/at91.h.
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0 (AT91_PMC_MOSCS) -> main oscillator ready
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1 (AT91_PMC_LOCKA) -> PLL A ready
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2 (AT91_PMC_LOCKB) -> PLL B ready
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@ -42,7 +42,7 @@ slot@0 {
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};
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spi0: spi@f0004000 {
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cs-gpios = <&pioD 13 0>;
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cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
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status = "okay";
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};
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@ -136,7 +136,7 @@ slot@0 {
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};
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spi1: spi@f8008000 {
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cs-gpios = <&pioC 25 0>, <0>, <0>, <&pioD 16 0>;
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cs-gpios = <&pioC 25 0>;
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status = "okay";
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};
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@ -10,7 +10,7 @@
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clk/at91.h>
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#include <dt-bindings/clock/at91.h>
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/ {
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model = "Atmel AT91SAM9261 family SoC";
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@ -12,6 +12,7 @@
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/at91.h>
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/ {
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model = "Atmel AT91SAM9N12 SoC";
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@ -49,6 +50,18 @@ memory {
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reg = <0x20000000 0x10000000>;
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};
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slow_xtal: slow_xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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main_xtal: main_xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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@ -75,8 +88,280 @@ ramc0: ramc@ffffe800 {
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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compatible = "atmel,at91sam9n12-pmc";
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reg = <0xfffffc00 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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interrupt-controller;
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#address-cells = <1>;
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#size-cells = <0>;
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#interrupt-cells = <1>;
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main_rc_osc: main_rc_osc {
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compatible = "atmel,at91sam9x5-clk-main-rc-osc";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
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clock-frequency = <12000000>;
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clock-accuracy = <50000000>;
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};
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main_osc: main_osc {
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compatible = "atmel,at91rm9200-clk-main-osc";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_MOSCS>;
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clocks = <&main_xtal>;
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};
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main: mainck {
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compatible = "atmel,at91sam9x5-clk-main";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
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clocks = <&main_rc_osc>, <&main_osc>;
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};
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plla: pllack {
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compatible = "atmel,at91rm9200-clk-pll";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_LOCKA>;
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clocks = <&main>;
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reg = <0>;
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atmel,clk-input-range = <2000000 32000000>;
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#atmel,pll-clk-output-range-cells = <4>;
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atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
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<695000000 750000000 1 0>,
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<645000000 700000000 2 0>,
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<595000000 650000000 3 0>,
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<545000000 600000000 0 1>,
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<495000000 555000000 1 1>,
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<445000000 500000000 1 2>,
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<400000000 450000000 1 3>;
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};
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plladiv: plladivck {
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compatible = "atmel,at91sam9x5-clk-plldiv";
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#clock-cells = <0>;
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clocks = <&plla>;
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};
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pllb: pllbck {
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compatible = "atmel,at91rm9200-clk-pll";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_LOCKB>;
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clocks = <&main>;
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reg = <1>;
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atmel,clk-input-range = <2000000 32000000>;
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#atmel,pll-clk-output-range-cells = <3>;
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atmel,pll-clk-output-ranges = <30000000 100000000 0>;
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};
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mck: masterck {
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compatible = "atmel,at91sam9x5-clk-master";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
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clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
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atmel,clk-output-range = <0 133333333>;
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atmel,clk-divisors = <1 2 4 3>;
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atmel,master-clk-have-div3-pres;
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};
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usb: usbck {
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compatible = "atmel,at91sam9n12-clk-usb";
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#clock-cells = <0>;
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clocks = <&pllb>;
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};
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prog: progck {
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compatible = "atmel,at91sam9x5-clk-programmable";
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&pmc>;
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clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
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prog0: prog0 {
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#clock-cells = <0>;
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reg = <0>;
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interrupts = <AT91_PMC_PCKRDY(0)>;
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};
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prog1: prog1 {
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#clock-cells = <0>;
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reg = <1>;
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interrupts = <AT91_PMC_PCKRDY(1)>;
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};
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};
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systemck {
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compatible = "atmel,at91rm9200-clk-system";
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#address-cells = <1>;
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#size-cells = <0>;
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ddrck: ddrck {
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#clock-cells = <0>;
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reg = <2>;
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clocks = <&mck>;
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};
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lcdck: lcdck {
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#clock-cells = <0>;
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reg = <3>;
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clocks = <&mck>;
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};
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uhpck: uhpck {
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#clock-cells = <0>;
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reg = <6>;
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clocks = <&usb>;
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};
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udpck: udpck {
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#clock-cells = <0>;
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reg = <7>;
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clocks = <&usb>;
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};
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pck0: pck0 {
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#clock-cells = <0>;
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reg = <8>;
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clocks = <&prog0>;
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};
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pck1: pck1 {
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#clock-cells = <0>;
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reg = <9>;
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clocks = <&prog1>;
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};
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};
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periphck {
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compatible = "atmel,at91sam9x5-clk-peripheral";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&mck>;
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pioAB_clk: pioAB_clk {
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#clock-cells = <0>;
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reg = <2>;
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};
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pioCD_clk: pioCD_clk {
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#clock-cells = <0>;
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reg = <3>;
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};
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fuse_clk: fuse_clk {
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#clock-cells = <0>;
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reg = <4>;
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};
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usart0_clk: usart0_clk {
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#clock-cells = <0>;
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reg = <5>;
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};
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usart1_clk: usart1_clk {
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#clock-cells = <0>;
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reg = <6>;
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};
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usart2_clk: usart2_clk {
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#clock-cells = <0>;
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reg = <7>;
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};
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usart3_clk: usart3_clk {
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#clock-cells = <0>;
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reg = <8>;
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};
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twi0_clk: twi0_clk {
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reg = <9>;
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#clock-cells = <0>;
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};
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twi1_clk: twi1_clk {
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#clock-cells = <0>;
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reg = <10>;
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};
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mci0_clk: mci0_clk {
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#clock-cells = <0>;
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reg = <12>;
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};
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spi0_clk: spi0_clk {
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#clock-cells = <0>;
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reg = <13>;
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};
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spi1_clk: spi1_clk {
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#clock-cells = <0>;
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reg = <14>;
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};
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uart0_clk: uart0_clk {
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#clock-cells = <0>;
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reg = <15>;
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};
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uart1_clk: uart1_clk {
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#clock-cells = <0>;
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reg = <16>;
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};
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tcb_clk: tcb_clk {
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#clock-cells = <0>;
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reg = <17>;
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};
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pwm_clk: pwm_clk {
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#clock-cells = <0>;
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reg = <18>;
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};
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adc_clk: adc_clk {
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#clock-cells = <0>;
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reg = <19>;
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};
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dma0_clk: dma0_clk {
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#clock-cells = <0>;
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reg = <20>;
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};
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uhphs_clk: uhphs_clk {
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#clock-cells = <0>;
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reg = <22>;
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};
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udphs_clk: udphs_clk {
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#clock-cells = <0>;
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reg = <23>;
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};
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lcdc_clk: lcdc_clk {
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#clock-cells = <0>;
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reg = <25>;
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};
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sha_clk: sha_clk {
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#clock-cells = <0>;
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reg = <27>;
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};
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ssc0_clk: ssc0_clk {
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#clock-cells = <0>;
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reg = <28>;
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};
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aes_clk: aes_clk {
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#clock-cells = <0>;
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reg = <29>;
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};
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trng_clk: trng_clk {
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#clock-cells = <0>;
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reg = <30>;
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};
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};
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};
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rstc@fffffe00 {
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@ -88,6 +373,7 @@ pit: timer@fffffe30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffe30 0xf>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&mck>;
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};
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shdwc@fffffe10 {
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@ -95,12 +381,38 @@ shdwc@fffffe10 {
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reg = <0xfffffe10 0x10>;
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};
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sckc@fffffe50 {
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compatible = "atmel,at91sam9x5-sckc";
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reg = <0xfffffe50 0x4>;
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slow_osc: slow_osc {
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compatible = "atmel,at91sam9x5-clk-slow-osc";
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#clock-cells = <0>;
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clocks = <&slow_xtal>;
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};
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slow_rc_osc: slow_rc_osc {
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compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-accuracy = <50000000>;
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};
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clk32k: slck {
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compatible = "atmel,at91sam9x5-clk-slow";
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#clock-cells = <0>;
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clocks = <&slow_rc_osc>, <&slow_osc>;
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};
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};
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mmc0: mmc@f0008000 {
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compatible = "atmel,hsmci";
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reg = <0xf0008000 0x600>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
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dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
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dma-names = "rxtx";
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clocks = <&mci0_clk>;
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clock-names = "mci_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -110,12 +422,16 @@ tcb0: timer@f8008000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf8008000 0x100>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&tcb_clk>;
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clock-names = "t0_clk";
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};
|
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tcb1: timer@f800c000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf800c000 0x100>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&tcb_clk>;
|
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clock-names = "t0_clk";
|
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};
|
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|
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dma: dma-controller@ffffec00 {
|
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@ -123,6 +439,8 @@ dma: dma-controller@ffffec00 {
|
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reg = <0xffffec00 0x200>;
|
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interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
|
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#dma-cells = <2>;
|
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clocks = <&dma0_clk>;
|
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clock-names = "dma_clk";
|
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};
|
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|
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pinctrl@fffff400 {
|
||||
@ -392,6 +710,7 @@ pioA: gpio@fffff400 {
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioAB_clk>;
|
||||
};
|
||||
|
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pioB: gpio@fffff600 {
|
||||
@ -402,6 +721,7 @@ pioB: gpio@fffff600 {
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
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clocks = <&pioAB_clk>;
|
||||
};
|
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|
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pioC: gpio@fffff800 {
|
||||
@ -412,6 +732,7 @@ pioC: gpio@fffff800 {
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
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#interrupt-cells = <2>;
|
||||
clocks = <&pioCD_clk>;
|
||||
};
|
||||
|
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pioD: gpio@fffffa00 {
|
||||
@ -422,6 +743,7 @@ pioD: gpio@fffffa00 {
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioCD_clk>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -431,6 +753,8 @@ dbgu: serial@fffff200 {
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
clocks = <&mck>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -443,6 +767,8 @@ ssc0: ssc@f0010000 {
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
clocks = <&ssc0_clk>;
|
||||
clock-names = "pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -452,6 +778,8 @@ usart0: serial@f801c000 {
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
clocks = <&usart0_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -461,6 +789,8 @@ usart1: serial@f8020000 {
|
||||
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
clocks = <&usart1_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -470,6 +800,8 @@ usart2: serial@f8024000 {
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
clocks = <&usart2_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -479,6 +811,8 @@ usart3: serial@f8028000 {
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
clocks = <&usart3_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -493,6 +827,7 @@ i2c0: i2c@f8010000 {
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
clocks = <&twi0_clk>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -507,6 +842,7 @@ i2c1: i2c@f8014000 {
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
clocks = <&twi1_clk>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -521,6 +857,8 @@ spi0: spi@f0000000 {
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&spi0_clk>;
|
||||
clock-names = "spi_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -535,6 +873,8 @@ spi1: spi@f0004000 {
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
clocks = <&spi1_clk>;
|
||||
clock-names = "spi_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -554,6 +894,7 @@ pwm0: pwm@f8034000 {
|
||||
reg = <0xf8034000 0x300>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
|
||||
#pwm-cells = <3>;
|
||||
clocks = <&pwm_clk>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@ -584,6 +925,9 @@ usb0: ohci@00500000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x00100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
|
||||
<&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@ -21,6 +21,14 @@ memory {
|
||||
reg = <0x20000000 0x8000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <16000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/clk/at91.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
@ -14,6 +14,7 @@
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9x5 family SoC";
|
||||
@ -51,6 +52,24 @@ memory {
|
||||
reg = <0x20000000 0x10000000>;
|
||||
};
|
||||
|
||||
slow_xtal: slow_xtal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
main_xtal: main_xtal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
adc_op_clk: adc_op_clk{
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <5000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
@ -77,8 +96,272 @@ ramc0: ramc@ffffe800 {
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91rm9200-pmc";
|
||||
compatible = "atmel,at91sam9x5-pmc";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
interrupt-controller;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
main_rc_osc: main_rc_osc {
|
||||
compatible = "atmel,at91sam9x5-clk-main-rc-osc";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
|
||||
clock-frequency = <12000000>;
|
||||
clock-accuracy = <50000000>;
|
||||
};
|
||||
|
||||
main_osc: main_osc {
|
||||
compatible = "atmel,at91rm9200-clk-main-osc";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
|
||||
clocks = <&main_xtal>;
|
||||
};
|
||||
|
||||
main: mainck {
|
||||
compatible = "atmel,at91sam9x5-clk-main";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
|
||||
clocks = <&main_rc_osc>, <&main_osc>;
|
||||
};
|
||||
|
||||
plla: pllack {
|
||||
compatible = "atmel,at91rm9200-clk-pll";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
|
||||
clocks = <&main>;
|
||||
reg = <0>;
|
||||
atmel,clk-input-range = <2000000 32000000>;
|
||||
#atmel,pll-clk-output-range-cells = <4>;
|
||||
atmel,pll-clk-output-ranges = <745000000 800000000 0 0
|
||||
695000000 750000000 1 0
|
||||
645000000 700000000 2 0
|
||||
595000000 650000000 3 0
|
||||
545000000 600000000 0 1
|
||||
495000000 555000000 1 1
|
||||
445000000 500000000 1 2
|
||||
400000000 450000000 1 3>;
|
||||
};
|
||||
|
||||
plladiv: plladivck {
|
||||
compatible = "atmel,at91sam9x5-clk-plldiv";
|
||||
#clock-cells = <0>;
|
||||
clocks = <&plla>;
|
||||
};
|
||||
|
||||
utmi: utmick {
|
||||
compatible = "atmel,at91sam9x5-clk-utmi";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_LOCKU>;
|
||||
clocks = <&main>;
|
||||
};
|
||||
|
||||
mck: masterck {
|
||||
compatible = "atmel,at91sam9x5-clk-master";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
|
||||
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
|
||||
atmel,clk-output-range = <0 133333333>;
|
||||
atmel,clk-divisors = <1 2 4 3>;
|
||||
atmel,master-clk-have-div3-pres;
|
||||
};
|
||||
|
||||
usb: usbck {
|
||||
compatible = "atmel,at91sam9x5-clk-usb";
|
||||
#clock-cells = <0>;
|
||||
clocks = <&plladiv>, <&utmi>;
|
||||
};
|
||||
|
||||
prog: progck {
|
||||
compatible = "atmel,at91sam9x5-clk-programmable";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&pmc>;
|
||||
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
|
||||
|
||||
prog0: prog0 {
|
||||
#clock-cells = <0>;
|
||||
reg = <0>;
|
||||
interrupts = <AT91_PMC_PCKRDY(0)>;
|
||||
};
|
||||
|
||||
prog1: prog1 {
|
||||
#clock-cells = <0>;
|
||||
reg = <1>;
|
||||
interrupts = <AT91_PMC_PCKRDY(1)>;
|
||||
};
|
||||
};
|
||||
|
||||
smd: smdclk {
|
||||
compatible = "atmel,at91sam9x5-clk-smd";
|
||||
#clock-cells = <0>;
|
||||
clocks = <&plladiv>, <&utmi>;
|
||||
};
|
||||
|
||||
systemck {
|
||||
compatible = "atmel,at91rm9200-clk-system";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ddrck: ddrck {
|
||||
#clock-cells = <0>;
|
||||
reg = <2>;
|
||||
clocks = <&mck>;
|
||||
};
|
||||
|
||||
smdck: smdck {
|
||||
#clock-cells = <0>;
|
||||
reg = <4>;
|
||||
clocks = <&smd>;
|
||||
};
|
||||
|
||||
uhpck: uhpck {
|
||||
#clock-cells = <0>;
|
||||
reg = <6>;
|
||||
clocks = <&usb>;
|
||||
};
|
||||
|
||||
udpck: udpck {
|
||||
#clock-cells = <0>;
|
||||
reg = <7>;
|
||||
clocks = <&usb>;
|
||||
};
|
||||
|
||||
pck0: pck0 {
|
||||
#clock-cells = <0>;
|
||||
reg = <8>;
|
||||
clocks = <&prog0>;
|
||||
};
|
||||
|
||||
pck1: pck1 {
|
||||
#clock-cells = <0>;
|
||||
reg = <9>;
|
||||
clocks = <&prog1>;
|
||||
};
|
||||
};
|
||||
|
||||
periphck {
|
||||
compatible = "atmel,at91sam9x5-clk-peripheral";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&mck>;
|
||||
|
||||
pioAB_clk: pioAB_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
pioCD_clk: pioCD_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <3>;
|
||||
};
|
||||
|
||||
smd_clk: smd_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <4>;
|
||||
};
|
||||
|
||||
usart0_clk: usart0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <5>;
|
||||
};
|
||||
|
||||
usart1_clk: usart1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <6>;
|
||||
};
|
||||
|
||||
usart2_clk: usart2_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <7>;
|
||||
};
|
||||
|
||||
twi0_clk: twi0_clk {
|
||||
reg = <9>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
twi1_clk: twi1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <10>;
|
||||
};
|
||||
|
||||
twi2_clk: twi2_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <11>;
|
||||
};
|
||||
|
||||
mci0_clk: mci0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <12>;
|
||||
};
|
||||
|
||||
spi0_clk: spi0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <13>;
|
||||
};
|
||||
|
||||
spi1_clk: spi1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <14>;
|
||||
};
|
||||
|
||||
uart0_clk: uart0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <15>;
|
||||
};
|
||||
|
||||
uart1_clk: uart1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <16>;
|
||||
};
|
||||
|
||||
tcb0_clk: tcb0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <17>;
|
||||
};
|
||||
|
||||
pwm_clk: pwm_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <18>;
|
||||
};
|
||||
|
||||
adc_clk: adc_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <19>;
|
||||
};
|
||||
|
||||
dma0_clk: dma0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <20>;
|
||||
};
|
||||
|
||||
dma1_clk: dma1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <21>;
|
||||
};
|
||||
|
||||
uhphs_clk: uhphs_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <22>;
|
||||
};
|
||||
|
||||
udphs_clk: udphs_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <23>;
|
||||
};
|
||||
|
||||
mci1_clk: mci1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <26>;
|
||||
};
|
||||
|
||||
ssc0_clk: ssc0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <28>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rstc@fffffe00 {
|
||||
@ -95,18 +378,47 @@ pit: timer@fffffe30 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfffffe30 0xf>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
clocks = <&mck>;
|
||||
};
|
||||
|
||||
sckc@fffffe50 {
|
||||
compatible = "atmel,at91sam9x5-sckc";
|
||||
reg = <0xfffffe50 0x4>;
|
||||
|
||||
slow_osc: slow_osc {
|
||||
compatible = "atmel,at91sam9x5-clk-slow-osc";
|
||||
#clock-cells = <0>;
|
||||
clocks = <&slow_xtal>;
|
||||
};
|
||||
|
||||
slow_rc_osc: slow_rc_osc {
|
||||
compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
clock-accuracy = <50000000>;
|
||||
};
|
||||
|
||||
clk32k: slck {
|
||||
compatible = "atmel,at91sam9x5-clk-slow";
|
||||
#clock-cells = <0>;
|
||||
clocks = <&slow_rc_osc>, <&slow_osc>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb0: timer@f8008000 {
|
||||
compatible = "atmel,at91sam9x5-tcb";
|
||||
reg = <0xf8008000 0x100>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&tcb0_clk>;
|
||||
clock-names = "t0_clk";
|
||||
};
|
||||
|
||||
tcb1: timer@f800c000 {
|
||||
compatible = "atmel,at91sam9x5-tcb";
|
||||
reg = <0xf800c000 0x100>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&tcb0_clk>;
|
||||
clock-names = "t0_clk";
|
||||
};
|
||||
|
||||
dma0: dma-controller@ffffec00 {
|
||||
@ -114,6 +426,8 @@ dma0: dma-controller@ffffec00 {
|
||||
reg = <0xffffec00 0x200>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#dma-cells = <2>;
|
||||
clocks = <&dma0_clk>;
|
||||
clock-names = "dma_clk";
|
||||
};
|
||||
|
||||
dma1: dma-controller@ffffee00 {
|
||||
@ -121,6 +435,8 @@ dma1: dma-controller@ffffee00 {
|
||||
reg = <0xffffee00 0x200>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#dma-cells = <2>;
|
||||
clocks = <&dma1_clk>;
|
||||
clock-names = "dma_clk";
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
@ -453,6 +769,7 @@ pioA: gpio@fffff400 {
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioAB_clk>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
@ -464,6 +781,7 @@ pioB: gpio@fffff600 {
|
||||
#gpio-lines = <19>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioAB_clk>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
@ -474,6 +792,7 @@ pioC: gpio@fffff800 {
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioCD_clk>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
@ -485,6 +804,7 @@ pioD: gpio@fffffa00 {
|
||||
#gpio-lines = <22>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioCD_clk>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -497,6 +817,8 @@ ssc0: ssc@f0010000 {
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
clocks = <&ssc0_clk>;
|
||||
clock-names = "pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -507,6 +829,8 @@ mmc0: mmc@f0008000 {
|
||||
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||
dma-names = "rxtx";
|
||||
pinctrl-names = "default";
|
||||
clocks = <&mci0_clk>;
|
||||
clock-names = "mci_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
@ -519,6 +843,8 @@ mmc1: mmc@f000c000 {
|
||||
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||
dma-names = "rxtx";
|
||||
pinctrl-names = "default";
|
||||
clocks = <&mci1_clk>;
|
||||
clock-names = "mci_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
@ -530,6 +856,8 @@ dbgu: serial@fffff200 {
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
clocks = <&mck>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -539,6 +867,8 @@ usart0: serial@f801c000 {
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
clocks = <&usart0_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -548,6 +878,8 @@ usart1: serial@f8020000 {
|
||||
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
clocks = <&usart1_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -557,6 +889,8 @@ usart2: serial@f8024000 {
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
clocks = <&usart2_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -571,6 +905,7 @@ i2c0: i2c@f8010000 {
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
clocks = <&twi0_clk>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -585,6 +920,7 @@ i2c1: i2c@f8014000 {
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
clocks = <&twi1_clk>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -599,6 +935,7 @@ i2c2: i2c@f8018000 {
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
clocks = <&twi2_clk>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -608,6 +945,8 @@ uart0: serial@f8040000 {
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
clocks = <&uart0_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -617,6 +956,8 @@ uart1: serial@f8044000 {
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
clocks = <&uart1_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -626,6 +967,9 @@ adc0: adc@f804c000 {
|
||||
compatible = "atmel,at91sam9260-adc";
|
||||
reg = <0xf804c000 0x100>;
|
||||
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&adc_clk>,
|
||||
<&adc_op_clk>;
|
||||
clock-names = "adc_clk", "adc_op_clk";
|
||||
atmel,adc-use-external-triggers;
|
||||
atmel,adc-channels-used = <0xffff>;
|
||||
atmel,adc-vref = <3300>;
|
||||
@ -673,6 +1017,8 @@ spi0: spi@f0000000 {
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&spi0_clk>;
|
||||
clock-names = "spi_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -687,6 +1033,8 @@ spi1: spi@f0004000 {
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
clocks = <&spi1_clk>;
|
||||
clock-names = "spi_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -805,6 +1153,9 @@ usb0: ohci@00600000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00600000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
|
||||
<&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -812,6 +1163,8 @@ usb1: ehci@00700000 {
|
||||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00700000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ehci_clk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
31
arch/arm/boot/dts/at91sam9x5_can.dtsi
Normal file
31
arch/arm/boot/dts/at91sam9x5_can.dtsi
Normal file
@ -0,0 +1,31 @@
|
||||
/*
|
||||
* at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
|
||||
* Ethernet interface.
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
ahb {
|
||||
apb {
|
||||
pmc: pmc@fffffc00 {
|
||||
periphck {
|
||||
can0_clk: can0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <29>;
|
||||
};
|
||||
|
||||
can1_clk: can1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <30>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
26
arch/arm/boot/dts/at91sam9x5_isi.dtsi
Normal file
26
arch/arm/boot/dts/at91sam9x5_isi.dtsi
Normal file
@ -0,0 +1,26 @@
|
||||
/*
|
||||
* at91sam9x5_isi.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
|
||||
* Image Sensor Interface.
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
ahb {
|
||||
apb {
|
||||
pmc: pmc@fffffc00 {
|
||||
periphck {
|
||||
isi_clk: isi_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <25>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
26
arch/arm/boot/dts/at91sam9x5_lcd.dtsi
Normal file
26
arch/arm/boot/dts/at91sam9x5_lcd.dtsi
Normal file
@ -0,0 +1,26 @@
|
||||
/*
|
||||
* at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
|
||||
* LCD controller.
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
ahb {
|
||||
apb {
|
||||
pmc: pmc@fffffc00 {
|
||||
periphck {
|
||||
lcdc_clk: lcdc_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <25>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -43,12 +43,23 @@ AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
periphck {
|
||||
macb0_clk: macb0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <24>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
macb0: ethernet@f802c000 {
|
||||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xf802c000 0x100>;
|
||||
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb0_rmii>;
|
||||
clocks = <&macb0_clk>, <&macb0_clk>;
|
||||
clock-names = "hclk", "pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@ -31,12 +31,23 @@ AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
periphck {
|
||||
macb1_clk: macb1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <27>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
macb1: ethernet@f8030000 {
|
||||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xf8030000 0x100>;
|
||||
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb1_rmii>;
|
||||
clocks = <&macb1_clk>, <&macb1_clk>;
|
||||
clock-names = "hclk", "pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@ -42,12 +42,23 @@ pinctrl_usart3_sck: usart3_sck-0 {
|
||||
};
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
periphck {
|
||||
usart3_clk: usart3_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usart3: serial@f8028000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf8028000 0x200>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
clocks = <&usart3_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@ -23,6 +23,14 @@ main_clock: clock@0 {
|
||||
};
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/clk/at91.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
model = "Atmel SAMA5D3 family SoC";
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clk/at91.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
ahb {
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clk/at91.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clk/at91.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
|
||||
@ -167,7 +167,6 @@ config SOC_AT91SAM9X5
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select SOC_AT91SAM9
|
||||
select AT91_USE_OLD_CLK
|
||||
select HAVE_AT91_UTMI
|
||||
select HAVE_AT91_SMD
|
||||
select HAVE_AT91_USB_CLK
|
||||
@ -183,7 +182,6 @@ config SOC_AT91SAM9N12
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select SOC_AT91SAM9
|
||||
select AT91_USE_OLD_CLK
|
||||
select HAVE_AT91_USB_CLK
|
||||
help
|
||||
Select this if you are using Atmel's AT91SAM9N12 SoC.
|
||||
|
||||
@ -19,9 +19,10 @@
|
||||
#include "board.h"
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
#include "clock.h"
|
||||
#include "sam9_smc.h"
|
||||
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
#include "clock.h"
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
@ -215,6 +216,9 @@ static void __init at91sam9n12_register_clocks(void)
|
||||
ARRAY_SIZE(periph_clocks_lookups));
|
||||
|
||||
}
|
||||
#else
|
||||
#define at91sam9n12_register_clocks NULL
|
||||
#endif
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* AT91SAM9N12 processor initialization
|
||||
|
||||
@ -19,9 +19,10 @@
|
||||
#include "board.h"
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
#include "clock.h"
|
||||
#include "sam9_smc.h"
|
||||
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
#include "clock.h"
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
@ -313,6 +314,9 @@ static void __init at91sam9x5_register_clocks(void)
|
||||
clk_register(&pck0);
|
||||
clk_register(&pck1);
|
||||
}
|
||||
#else
|
||||
#define at91sam9x5_register_clocks NULL
|
||||
#endif
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* AT91SAM9x5 processor initialization
|
||||
|
||||
Loading…
Reference in New Issue
Block a user