Add the tdm devices responsible for decoding the data provided
through audio serial interface.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the SPDIF output device of the axg audio subsystem
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit adds led support for the Firefly-RK3399. The board has two
leds, this commit enables them.
Signed-off-by: Shohei Maruyama <cheat.sc.linux@outlook.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Commit 0fbc47d9e4 ("phy: rockchip-typec: deprecate some DT properties
for various register fields.") deprecates some Rockchip Type-C
properties. As these are now not needed, remove from the device tree
file.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit adds power button support for the Firefly-RK3399.
Signed-off-by: Shohei Maruyama <cheat.sc.linux@outlook.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the audio memory arbiter which control the access of the audio
fifos to the DDR.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The usb power regulator is supplied by the vcc 5v regulator and
controlled by a GPIO. This will be needed to enable usb.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This regulator is controlled by a GPIO and supplies various devices
on the board, such as the lineout codec, the usb supply or the lcd
controller.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the parent supply of the s400 power supplies.
Also add 'regulator-always-on' property on the regulators which can't
be disabled
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This branch adds initial support for new Texas Instruments AM654
quad core A53 ARMv8 SoC. It's the first device for TI K3 multicore SoC
architecture.
Initially only basic devices are configured, support for more devices
will follow later on. And many of the internal devices familiar from
earlier TI SoCs should work with existing kernel device drivers.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAltSy5YRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMh2hAAqKkW9SbJJnPwFVafBn2W+mXsDG7wNq04
3dvMueGZ4S2wuTOcB4fZLFIAW4N5C3P/d66PL2f/dTZHGBr23Qk9LW5UIPp3A+A7
4jTXBSD2Hv6pLChuy3Mr6grGXKGXKfwptef04UZK2XLydQ/AJwEx6Lhj1nXXgT8x
92C1F/9v7hogO+Iz1uUk/AhNeim7DYA/J6AajVcDjj0TO6a2lnLLxO7mKvZgqgg8
2awuZ5aWuSvAOZ5GIAHksGyg8Z4yJslfM2lmTMZQZ5Wr/mO1Nl4LY9OrR+Cw9ctR
R8k+blJ3iB11eGZglArvEdLIRG88Qi2GHJ69WtAXaHdytrT7v1O3vLwAd3CeEQG4
GWX22X5qkIe6e66LLb/DKT799nZwwKnlH+mErDMF4ug/dbvLfvp6FztQ4URvd7dU
+qRUl8mOS6690/vFKef1vIuK7W4z7T1VxxYssR6eWGXtY4aXVRmU+zVl1J/ymrC+
5WDy9IihHgCYQtof3O/Drx5Go9xWVKrow4AF1onpnawM1N4g4QoPwUuL4bzsIqAk
JcxaAErW1/DLGspkWFNXv70U7/EDYhGKuNMc9SoOYcq3kj1QW86AUmcAWm3LMGYV
eYthnm1oTTD4AVyriMYEaRGhQICJ9zeivQO8dntCtBA4DTZ1MbrO2v+LhpQ45/hp
rsW/9t77QSw=
=pkLC
-----END PGP SIGNATURE-----
Merge tag 'am654-for-v4.19-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
TI AM654 support for v4.19 merge window
This branch adds initial support for new Texas Instruments AM654
quad core A53 ARMv8 SoC. It's the first device for TI K3 multicore SoC
architecture.
Initially only basic devices are configured, support for more devices
will follow later on. And many of the internal devices familiar from
earlier TI SoCs should work with existing kernel device drivers.
* tag 'am654-for-v4.19-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm64: dts: ti: Add support for AM654 EVM base board
soc: ti: Add Support for AM654 SoC config option
arm64: dts: ti: Add Support for AM654 SoC
arm64: Add support for TI's K3 Multicore SoC architecture
dt-bindings: arm: ti: Add bindings for AM654 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
- Update device tree sources to use SPDX identifiers for license.
- Add cooling device property '#cooling-cells' for all CPUs of
a cluster.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbUpInAAoJEFBXWFqHsHzOVXAH/Rp2MvE/TQckMeB1HVUczu30
Lp3Q/SkdE8TRBdYmXscfMZtvzftZK127c+1NLb6Reo6HVvuGAnVIJgbkexj5Zq3N
BaPwsVO5GzVZn5IL6cWAyWerNpq/bQKRLkj/AkMtVDha1sAUK0Mudxjc1YJU1r7n
ZaIVxMNaaHK0gCVmK3PgQs8d/tHiszp2rWWuyoRFMMUlQFqHr5VseK8QLzk5dfUa
Ieva2igKpoL4TIyFfbVhUD9J9FJrve9W1TQZpreOZBgZmkSEGqj5vAmEVqDD4O4y
CwNKgemjQ9mfBCHH29lMl1xh1sPMSORVBVbzS5XUvVXypViOMNghGpL/I2OIk5o=
=2P5W
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Freescale arm64 device tree update for 4.19:
- Update device tree sources to use SPDX identifiers for license.
- Add cooling device property '#cooling-cells' for all CPUs of
a cluster.
* tag 'imx-dt64-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: freescale: Add missing cooling device properties for CPUs
arm64: dts: freescale: Update to use SPDX identifiers
Signed-off-by: Olof Johansson <olof@lixom.net>
Corrections:
* Remove non-existing STBE region from Ether-AVB node in DT of
R-Car E3 (r8a77990) SoC
This region does not exist on this SoC
Cleanups:
* Consistently use rwdt as label for Renesas Watchdog Timer devices
* Add second port to rcar_sound placeholder in DT of R-Car M3-N (r8a77965) SoC
Nodes with #address-cells/#size-cells should have more than one child node
* Fix adv7482 decimal unit addresses in DT of Salvator-X and -XS boards
Addresses are assumed to be hex by dtc, thus it is not valid to use
decimal
Enhancements:
* Describe in DT:
- INTC-EX of R-Car V3H (r8a77980) SoC
- USB3.0 of R-Car E3 (r8a77980) SoC
- All SCIF and HSCIF devices of R-Car D3 (r8a77995) SoC.
Previously only SCIF2, used as the debug consile, was described.
- All IPMMU devicesof R-Car M3-N (r8a77965), V3H (r8a77980) and
E3 (r8a77990) SoCs
* Enable USB3.0 in DT of R-Car E3 (r8a77980) based Ebisu board
* Prefer HSCIF1 over SCIF1 in DT of Salvator-X and -XS boards
HSCIF is superior to SCIF (larger FIFOs, more accurate and wider
supported range of bitrates).
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAltRy/kACgkQ189kaWo3
T75YAw//dZT9bQPdLMGieRr72DbqjYKnje5BJJ+kou5qWY9Q4J1m0M6YIkMLUoWU
Aon0ohO2XKKfaiR9HS/rpsXeUqaOmYxVMXr5nlA9CloeGoZGlTudE4hxoR3sMRZu
/uJ/CiqrWchGp5XE9BZpN2NER0mW6Hwsha2nM5pWsO/zQix+X3nqJ+vcOQEvrO5L
CIQ0W+In1tHDrKQdsQwxRRwWq+UqqdHNEsuyHLa05RpPCrGE1un2Y7ijeNRsHRt6
TWsfZPWsnwz1skGRJRRtvSNu+0TFbza08qBv8ZMtxWzZjj1cVBFKWcH1gZL9JFhu
HHS1G9axWzwohyVcpTYb8sziJugsEBBAbq3CuCJXF2TRflfzMWGNuU3eh2PT4r/f
tqE4MUNio7xywhnWZObyKFxHQqjm/yBKfr///n7qw+VyJonVBoSdv3tluk9HGRQM
KxZ+tEHNRJSCYJTZrpwfITkvRhXvOo3+S3k3w5wqz4sn0UjXJacvzHd7E97nXKQE
7Mi0VZg4h2HDLzXwFRYKt7d1a7iwR1vpM3tVmmxaUviKs03739MtAJnNiSNDQm98
quCwGKIJxVXwXbzgQgXyud8n6xIHj++moTzoqG3NwEzMDX30w9jJ0EUmuAx2hMA5
DpIvBjRHt7ctSKcAAuondW/aAaTJOzlFzJbPjuG31vkA1CltBY0=
=yZLk
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM64 Based SoC DT Updates for v4.19
Corrections:
* Remove non-existing STBE region from Ether-AVB node in DT of
R-Car E3 (r8a77990) SoC
Cleanups:
* Consistently use rwdt as label for Renesas Watchdog Timer devices
* Add second port to rcar_sound placeholder in DT of R-Car M3-N (r8a77965) SoC
* Fix adv7482 decimal unit addresses in DT of Salvator-X and -XS boards
Enhancements:
* Describe in DT:
- INTC-EX of R-Car V3H (r8a77980) SoC
- USB3.0 of R-Car E3 (r8a77980) SoC
- All SCIF and HSCIF devices of R-Car D3 (r8a77995) SoC.
Previously only SCIF2, used as the debug consile, was described.
- All IPMMU devicesof R-Car M3-N (r8a77965), V3H (r8a77980) and
E3 (r8a77990) SoCs
* Enable USB3.0 in DT of R-Car E3 (r8a77980) based Ebisu board
* Prefer HSCIF1 over SCIF1 in DT of Salvator-X and -XS boards
* tag 'renesas-arm64-dt2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: renesas: r8a77980: add INTC-EX support
arm64: dts: renesas: r8a77990: Enable USB3.0 host for Ebisu board
arm64: dts: renesas: r8a77995: Add SCIF {0,1,3,4,5} and all HSCIF device nodes
arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes
arm64: dts: renesas: Unify the labels for RWDT
arm64: dts: renesas: salvator-common: Prefer HSCIF1 over SCIF1
arm64: dts: renesas: r8a77965: Add second port to rcar_sound placeholder
arm64: dts: renesas: salvator-common: Fix adv7482 decimal unit addresses
arm64: dts: renesas: r8a77990: Remove non-existing STBE region
Signed-off-by: Olof Johansson <olof@lixom.net>
- Tidy up MMC properties for hi3660
- Remove keep-power-in-suspend on hikey and hikey960 to
avoid keeping wifi power during suspend and let the
user enable it if required
- Update idle states for hikey960
- Add missing cooling device properties for cpus on hi6220
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJbUGAEAAoJEAvIV27ZiWZc85wQAKQkr3xovlKaFbFgRjo07qaN
+VV5/Fe0i6NQpvjg+dxwNqrUQHvgUEPNhLn70a5UM9/1CV3Iltx6DkImC50deIor
V3fy/IYi5Ud/qYRRTt/J498SPR1zSdLrDVt7gLrAjg3ipREh5MT9TYh6ADOSdfx5
SHLbzC6BTfAR9it5hTrZb2P2zKicA1LNHVfTzmJaHk5eOoqN2S9F0KXni7a9nv5q
LtZS7opR7Kx47iy++E1IOuorNQIFFCKQJWyNvKGzTBkCEKI9xa8pXlSyueKOPPuh
f6ClYSUZnHIM+s6Kly54aFPoPx00Y5djr0svh1j3hJ4IPGQ8nCF9gMYk3G5eO5Rf
/SuCgYhkkBZTXWg/L4I1jkRzfn99yFu+X6Uh/bafOrBVYEzehgucisgNi+T1urTY
oKBQdXaq7LYES3S/PLIVBTat7NkGBN+sbe4cLtBc4RBHcmzI1iy+hKxr+uruhoOC
lh10KCfpfQ3uazAi8kxAu8iJq6LEDfml2ymT5EMNSVKr8IQCxTLTcAJBR7HbFlY+
xSkOqcVj5pHu89UArF34Dwm9TFcujhqdjp6rI/OXIK1CbvWihgMU4/TvBcYu9yZv
TvOox4fQsGAzHAhDJZjTOBZ7IiU8hIVX+/irBP77LEyltczL8yM9PNsyIsgyLkGY
teK3K2epJUzpIMe30oZg
=070t
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-for-4.19v2' of git://github.com/hisilicon/linux-hisi into next/dt
ARM64: DT: Hisilicon SoC DT updates for 4.19v2
- Tidy up MMC properties for hi3660
- Remove keep-power-in-suspend on hikey and hikey960 to
avoid keeping wifi power during suspend and let the
user enable it if required
- Update idle states for hikey960
- Add missing cooling device properties for cpus on hi6220
* tag 'hisi-arm64-dt-for-4.19v2' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Add missing cooling device properties for CPUs
arm64: hikey960: update idle-states
arm64: dts: hikey: Remove keep-power-in-suspend property
arm64: dts: hikey960: Remove keep-power-in-suspend property
arm64: dts: hikey960: Clean up MMC properties and move to proper file
arm64: dts: hikey960: Remove deprecated MMC properties
Signed-off-by: Olof Johansson <olof@lixom.net>
Current LED trigger, 'bt', is not known/used by any existing driver.
Fix this by renaming it to 'bluetooth-power' trigger which is
controlled by the Bluetooth subsystem.
Fixes: 9943230c88 ("arm64: dts: qcom: Add apq8016-sbc board LED's related device nodes")
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In commit 8e4947ee477d ("arm64: dts: qcom: sdm845: Add I2C, SPI, and
UART9 nodes") I accidentally forgot to add the line:
status = "disabled";
to qupv3_id_0 to match qupv3_id_1. Add it now. NOTE: right now the
only sdm845 board with a device tree in mainline is MTP and that board
currently doesn't have any peripherals under qupv3_id_0. If any board
was currently using peripherals under qupv3_id_0 then that board would
need to add this snippet to their board dts file:
&qupv3_id_0 {
status = "okay";
};
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Drop legacy suffix for clocks used by MSM DRM driver.
The _clk suffix has been deprecated since commit 20c3bb80235 ("drm/msm:
drop _clk suffix from clk names").
Fixes: 720c3bb802 (drm/msm: drop _clk suffix from clk names)
The following warnings during boot have been seen since the referenced
fixes commit:
msm_dsi_phy 1a98300.dsi-phy: Using legacy clk name binding. Use "iface" instead of "iface_clk"
msm 1a00000.mdss: Using legacy clk name binding. Use "iface" instead of "iface_clk"
msm 1a00000.mdss: Using legacy clk name binding. Use "bus" instead of "bus_clk"
msm 1a00000.mdss: Using legacy clk name binding. Use "vsync" instead of "vsync_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding. Use "bus" instead of "bus_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding. Use "iface" instead of "iface_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding. Use "core" instead of "core_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding. Use "vsync" instead of "vsync_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "mdp_core" instead of "mdp_core_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "iface" instead of "iface_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "bus" instead of "bus_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "byte" instead of "byte_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "pixel" instead of "pixel_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "core" instead of "core_clk"
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add gpio-line-names property for Dragonboard820c based on APQ8096 SoC.
There are 4 gpio-controllers present on this board, including the
APQ8096 SoC, PM8994 (GPIO and MPP) and PMI8994 (GPIO).
Lines names are derived from 96Boards CE Specification 1.0, Appendix
"Expansion Connector Signal Description". Line names for PMI8994 MPP
pins are not added due to the absence of the gpio-controller support.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the rpmh-clk node to sdm845 based on the examples in the
bindings.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the rpmh-rsc node to sdm845 based on the examples in the
bindings.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The debug UART is very useful to have. I2C10 is enabled as an example
of a I2C port we can talk on for now. Eventually we'll want to put
peripherals under it.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds nodes to SDM845-dtsi for all the I2C ports, all the SPI
ports, and UART9. Note that I2C / SPI / UART are a bit strange on
sdm845 because each "serial engine" has 4 pins associated with it and
depending on which firmware has been loaded into the serial engine
(loaded by the BIOS) the serial engine can behave like an I2C port, a
SPI port, or a UART. As per the landed bindings that means that we
need to create one node for each possible mode that the port could be
in. With 16 serial engines that means 16 x 3 = 48 nodes.
We get away with only creating 33 nodes for now because it seems very
likely that SDM845-based boards will actually all use the same UART
(UART 9) for debug purposes. While another UART could be used for
something like Bluetooth communication we can cross that path when we
come to it. Some documentation that I saw implied that using a UART
for "high speed" communications actually needs yet another different
serial engine firmware anyway.
Note that quick measurements adding all these nodes adds <10k of extra
space per dtb that they're included with. If this becomes a problem
we may need to think of a different way to structure this so that
boards only get the nodes they need (or figure out how to get dtc to
strip 'disabled' nodes). For now it seems OK.
These nodes were programmatically generated with a fairly dumb python
script. See http://crosreview.com/1091631 for the source.
NOTE: at the moment SPI chip select doesn't appear to work in my tests
with the latest posted SPI driver. All testing of SPI with this patch
has been done by hacking SPI to GPIO chip select.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add basic support for the pm8005 and pm8998 PMICs. For now just support
the GPIO controllers.
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the CPU PMU on sdm845 to get perf support for hardware events.
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The Tanix TX3 Mini is a TV box based on the Amlogic S905W chipset.
There are two variants:
- 1 GiB or 2 GiB of DDR3 memory
- 8 GB or 16 GB eMMC flash
Both variants come with:
- 802.11 b/g/n wifi (Silicon Valley Microelectronics SSV6051, does not
support Bluetooth)
- an LED 7 segment display with an FD628 controller
- HDMI and AV (CVBS) output
- 2x USB (utilizing both USB ports provided by the SoC)
- micro SD card slot
- serial console (uart_AO) has to be soldered after opening the case
The board seems to be very similar to the P23x and Q20x reference
boards, which is why it includes meson-gx-p23x-q20x.dtsi:
- eMMC reset routed to BOOT_9
- the SDIO wifi chip's reset line is routed to GPIOX_6 and the reference
clock is 32.768KHz on PWM_E
- SD card detection is routed to CARD_6
- vqmmc of all MMC controllers is hard-wired to 1.8V (VDDIO_BOOT)
- uart_AO can be accessed after opening the case and soldering RX, TX
and GND lines onto the exposed solder points (marked with RX, TX and
GND)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
S905W is a new SoC from the GXL series. It is a cost-reduced version of
the S905X.
The P281 development board from Amlogic uses the same layout as the P231
(S905D development board). Thus the new P281 board inherits
meson-gx-p23x-q20x.dtsi to avoid code-duplication.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the audio clock controller which is part of the audio bus
This controller takes 8 input plls, and the usual clock gate, from the
main clock controller. It provides the clocs for the all the devices of
the audio subsystem, such as tdms, spdif, pdm, etc.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add initial device tree support for Mediatek X20 Development Board
based on MT6797 Deca core SoC. This board is one of the 96Boards
Consumer Edition platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Spdif out in not multiplexed on gpio A7 (spdif in is)
Remove this entry to fix the problem.
Fixes: 53c03b0aff36 ("ARM64: dts: meson-axg: add spdif output pins")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Regulator should not be defined inside the SoC dtsi file.
vddio_ao18 is already defined in the S400 board dts anyway.
Fixes: bb8a2ebd0498 ("ARM64: dts: meson-axg: add saradc support")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the DT info for SAR ADC of the Amlogic's Meson-AXG SoC.
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic P241 board is the Reference Design board for the S805X
variant of the Amlogic Meson GXL SoC family.
The P241 board has the following features :
- 1GiB DDR4 Memory
- HDMI Connector with CEC
- A/V jack with Stereo Audio and CVBS
- 10/100 Ethernet
- 2x USB2.0 Type-A
- On-board WiFi SDIO Module
- On-board eMMC storage
- Infraread Received
- Factory Reset button
- UART connector
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
[khilman: s/arm64/ARM64/ in Subject]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the different pin configurations for the spdif output
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the first of the two tas5707 power amplifier present on the
speaker daughter board.
According to the schematics of the S400 v3, only I2SB_DIN3 and
I2SC_DOUT2 will be available to the speaker board.
9R83, 9R84 and 9R18 are not connected so no audio signal will be
provided to the second amplifier. There is no point in enabling it
even if it is visible on the i2c bus.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add a fixed regulator for the main 12v which is the main power supply
of the board.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The microphone card connected to the s400 has 6 leds controlled
through an additional i2c gpio controller.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic Meson GXBB based Nanopi-K2 board has an HDMI connector
with CEC and CVBS available on the 40pin header.
This patch adds the nodes to enable HDMI, CEC and CVBS functionnalities.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
meson-gx-p23x-q20x.dtsi is currently used by five boards:
- Amlogic P230 and P231 (which should be identical, apart from the
external RGMII PHY on P230 whereas P231 can only use the internal PHY)
- Amlogic Q200 (identical to P230 but with an S912 GXM SoC instead of a
GXL S905D SoC) and Q201 (identical to P231 but with an S912 GXM SoC
instead of a GXL S905D SoC)
- NEXBOX A1 (based on the S912 GXM SoC)
The Amlogic P230 board uses a Broadcom BCM4356 SDIO wifi chip. Since the
other Amlogic reference design boards are very similar it's safe to
assume that these also use a Broadcom based SDIO wifi chip (which is
also how it was configured in meson-gx-p23x-q20x.dtsi).
However, NEXBOX A1 comes with a "longsys LTM8830" SDIO wifi module,
which is based on the "Qualcomm Atheros QCA9377-3(QCA1023-0)" chipset.
Thus move the wifi node from meson-gx-p23x-q20x.dtsi to each of the
four Amlogic reference board's .dts files.
There are no devicetree bindings for the QCA9377 SDIO wifi module yet,
so nothing is added to meson-gxm-nexbox-a1.dts.
Fixes: f51b454549 ("ARM64: dts: meson-gxm: Add support for the Nexbox A1")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
meson-gxl-s905d-p230.dts and meson-gxm-q200.dts enable the saradc node
(and configure it's vref-supply "VDDIO_AO18") in their corresponding
.dts file.
Move both (the saradc node as well as the VDDIO_AO18 regulator) to
remove some duplicate code.
As a positive side-effect this enables the saradc also for the P231 (GXL
S905D) and Q201 (GXM S912) development boards which are similar to the
P230/Q200 boards (P231 and Q201 use the internal 100Mbit/s PHY, while
P230 and Q200 have an external RGMII PHY).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Describe the INTC-EX interrupt controller in the R8A77980 device tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds and USB3.0 host device node and enable it for
R-Car E3 Ebisu board.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds the device nodes for SCIF {0,1,3,4,5} and all HSCIF serial
ports, incl. clocks, power domain and DMAs.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
arm64: dts: add ufs node for Hisilicon.
Signed-off-by: Li Wei <liwei213@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
The Pine H64 board have a MicroSD slot connected to MMC0 controller of
the H6 SoC and a eMMC slot connected to MMC2.
Enable them in the device tree.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The Allwinner H6 SoC have 3 MMC controllers.
Add device tree nodes for them.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
address-cells/size-cells is unnecessary for dwmac-sun8i node.
It was in early days, but since a mdio node is used, it could be
removed.
This patch fix the following DT warning:
Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Avnet Ultra96 rev1 board is commercialized Xilinx zcu100 revC/D
internal board. The patch is reusing zcu100 revC files but changing
model description and compatible strings which are used for example by
libmraa.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
dts reports incorrect usage of these properties in gpio-keys node.
Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary
The patch is removing these useless properties.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mainline started to use serdev interface for uart attached devices.
Change description to reflect it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds GPIO for headphone detection on LD11 global board.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This patch adds GPIO for headphone detection on LD20 global board.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The EValuation Module(EVM) platform for AM654 consists of a
common Base board + one or more of daughter cards, which include:
a) "Personality Modules", which can be specific to a profile, such as
ICSSG enabled or Multi-media (including audio).
b) SERDES modules, which may be 2 lane PCIe or two port PCIe + USB2
c) Camera daughter card
d) various display panels
Among other options. There are two basic configurations defined which
include an "EVM" configuration and "IDK" (Industrial development kit)
which differ in the specific combination of daughter cards that are
used.
To simplify support, we choose to support just the base board as the
core device tree file and all daughter cards would be expected to be
device tree overlays.
Reviewed-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The AM654 SoC is a lead device of the K3 Multicore SoC architecture
platform, targeted for broad market and industrial control with aim to
meet the complex processing needs of modern embedded products.
Some highlights of this SoC are:
* Quad ARMv8 A53 cores split over two clusters
* GICv3 compliant GIC500
* Configurable L3 Cache and IO-coherent architecture
* Dual lock-step capable R5F uC for safety-critical applications
* High data throughput capable distributed DMA architecture under NAVSS
* Three Gigabit Industrial Communication Subsystems (ICSSG), each with dual
PRUs and dual RTUs
* Hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
* Centralized System Controller for Security, Power, and Resource
management.
* Dual ADCSS, eQEP/eCAP, eHRPWM, dual CAN-FD
* Flash subsystem with OSPI and Hyperbus interfaces
* Multimedia capability with CAL, DSS7-UL, SGX544, McASP
* Peripheral connectivity including USB3, PCIE, MMC/SD, GPMC, I2C, SPI,
GPIO
See AM65x Technical Reference Manual (SPRUID7, April 2018)
for further details: http://www.ti.com/lit/pdf/spruid7
NOTE:
1. AM654 is the first of the device variants, hence we introduce a
generic am65.dtsi.
2. We indicate the proper bus topology, the ranges are elaborated in
each bus segment instead of using the top level ranges to make sure
that peripherals in each segment use the address space accurately.
3. Peripherals in each bus segment is maintained in a separate dtsi
allowing for reuse in different bus segment representation from a
different core such as R5. This is also the reason for maintaining a
1-1 address map in the ranges.
4. Cache descriptions follow the ARM64 standard description.
Further tweaks may be necessary as we introduce more complex devices,
but can be introduced in context of the device introduction.
Reviewed-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benjamin Fair <b-fair@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Do minor rearrangement as well to keep ordering consistent.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Update entry/exit latency and residency time of hikey960 to use more
realistic figures based on unitary tests done on the platform.
The complete results (in us) :
big cluster
cluster CPU
max entry latency 800 400
max exit latency 2900 550
residency 903Mhz 5000 1500
residency 2363Mhz 0 1500
little cluster
cluster CPU
max entry latency 500 400
max exit latency 1600 650
residency 533Mhz 8000 4500
residency 1844Mhz 0 1500
We can see that the residency time depends of the running OPP which is not
handled for now. Then we also have to take into account the constraint of
a residency time shorter than the tick to get full advantage of idle loop
reordering(tick is stopped if idle duration is higher than tick period).
Finally the selected residency value are :
big cluster
cluster CPU
residency 3700 1500
little cluster
cluster CPU
residency 3500 1500
A simple test with a task waking up every 11.111ms shows improvement:
- 5% a lowest OPP
- 22% at highest OPP
The period has been chosen:
- to be shorter than old cluster residency time and longer than new
residency time of cluster off C-state
- to prevent any sync with tick (4ms) when running tests that can add
some variances between tests
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Remove the keep-power-in-suspend property because it keeps wifi power
on during suspend. This property is only required when enabling WoWLAN
and should only be enabled based on need.
Signed-off-by: Ryan Grachek <ryan@edited.us>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Remove the keep-power-in-suspend property because it keeps wifi power
on during suspend. This property is only required when enabling WoWLAN
and should only be enabled based on need. Also remove dupplicate property
Signed-off-by: Ryan Grachek <ryan@edited.us>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Certain properties should be moved to the board file to reflect
the specific properties of the board, and not the SoC. Move these
properties to proper location and organize properties in both files.
Signed-off-by: Ryan Grachek <ryan@edited.us>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The input clock of UART0 should be CLK_PERI_UART0_PD.
Fixes: 13f36c326c ("arm64: dts: mt7622: turn uart0 clock to real ones")
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Pine H64 board has an AXP805 PMIC on it, wired up in standalone, or
self-working, mode.
Enable it in the device tree.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
Tested-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Now that the device tree binding headers for the R_CCU have been merged,
we can use the macros, instead of raw numbers.
Switch to R_CCU macros for clock and reset indices.
Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
Tested-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The pwm-regulator for vdd_log uses additional unreviewed properties in the
vendor kernel, which slipped in with the devicetree.
As written, they are unreviewed and unused in all mainline implementations
so drop them again.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The vcc3v3_pcie regulator supplies 3.3V so add voltage properties
for it.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
[split off from original patch]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The board exposes two types A ports, one is USB 3.0, up to 5.0Gbps and
another one is USB 2.0 up to 480Mbps. Enable the USB PHYs and the USB
controllers to enable theses devices.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add earlycon to mt7622-rfb1 as to know what was going on when a certain
fault is happening at the early initialization stage.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Using gpio-ranges property represent which GPIOs correspond to which pins
on MT7622 pin controllers. For details, we can see section 2.1 of
Documentation/devicetree/bindings/gpio/gpio.txt to know how to bind pinctrl
and gpio drivers via the "gpio-ranges" property.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add IPMMU device nodes for the R-Car M3-N (r8a77965),
V3H (r8a77980) and E3 (r8a77990) SoCs.
* The r8a77965 IPMMU is quite similar to r8a7796 however VP0
has been added and PV1 has been removed. Also the IMSSTR
bit assignment has been reworked.
* The r8a77980 IPMMU is quite similar to r8a77970 however VC0
has been added. The IMSSTR bit assignment has also been
reworked. Power domains are also quite different however the
the documentation is rather unclear about this topic.
Until we know better VC0 gets assigned to R8A77980_PD_ALWAYS_ON.
* The r8a77990 IPMMU is similar to r8a77995. Power domains are
however different and the public documentation is still unclear.
Based on preliminary information from the hardware team the R-Car E3
SoC comes with an IPMMU-VP0 device in an Always-on power domain and
the IPMMU-VC0 is placed as expected in the A3VC power domain.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Armada 3700
- Add default memory reservation for ATF
- Add a node for AVS support
Fix eth3 connector name on the Macchiatobin
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCW0hwpQAKCRALBhiOFHI7
1WtcAKCGbi1l3gHxOT0WdMtx3vjxIlySYgCgknnIsyIO3uDuujsEOH9nGhzyDAo=
=KfNs
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.19-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt64 for 4.19 (part 1)
Armada 3700
- Add default memory reservation for ATF
- Add a node for AVS support
Fix eth3 connector name on the Macchiatobin
* tag 'mvebu-dt64-4.19-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: armada-37xx: reserve memory for ATF
arm64: dts: marvell: armada-37xx: add the node allowing AVS support
arm64: dts: marvell: mcbin: fix eth3 connector name
Signed-off-by: Olof Johansson <olof@lixom.net>
Cleanup from old properties and code-style warnings.
-----BEGIN PGP SIGNATURE-----
iQItBAABCAAXBQJbR4N9EBxrcnprQGtlcm5lbC5vcmcACgkQwTdm5oaLg9c52g//
R2TRjLuba33ICAG2HGz9oeoDcBxSDqzSkvUEB2vglby1ezXSNHnaKK6Ucw8HGZbB
vSActvOMsRJr5B4lH2fuqGLyfw4G9XucLPMcLYxwGSSNqCCyaa3vYGD8hCwLIZxz
8GsM1s8WsH7kcq/kBxiB+NOA6/dVWpUX5bR2MPGA0Ra4F+4QWSSVinoIpZvJHBIn
jgZOAfmWnegLh+fafTvs3uN/T3A9oNbCbWYNrO/J0G4BeYbIM0XxB88dKZ0FdViN
XpbZuMo8ZatAH/wlRjk2aaj8+0Q4mQZ208a9Gs831EqQyG5zr0gf+6OOHx304y5h
BCURW4jc2O3m3AiLHEhNUyptiRmuSGScZNjVgeOnM6bLn8NPzprvq5Nh+Xhsx34r
LqU4LaAGo1AIDx3WlVIBcdPDN6DsWfcUZCY3zM4PrwDGFvxZInMQ/hPl2/snqg7F
nUkRkFEZO42BQqCqMNrZW1icnksxQ3UnBh5BemVoxl3vtnBT9pkgGJf20vczexDg
mDSHUWFioydI/No6R4RB7tYXwcYD/49y9OGRQF6c+yhCeKLE+oBbcKZU5y4YqxzO
rqqUqY5Mif9lVi2neV1cypqC6pSYODik/kMAHhipIQw2IpRdAUdYx2zHCC8R2OV4
sAo4O+6/EeJIOLutM64HSfy/+23lfAtR+W7RKHeUb6g=
=Wb+u
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DTS ARM64 changes for v4.19
Cleanup from old properties and code-style warnings.
* tag 'samsung-dt64-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Remove leading 0x from unit addresses in Exynos5433
arm64: dts: exynos: Remove no longer needed samsung thermal properties
Signed-off-by: Olof Johansson <olof@lixom.net>
These changes enable the GPIO controllers on Tegra194 SoCs, which in
turn allows the SD card detection and ethernet controllers to be enabled
as well. The Tegra194 device tree is also extended with the list of CPUs
and a PSCI node to inform the kernel about the presence of PSCI capable
firmware.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAltHc6kTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTPjD/wP8mhtCt99tLlDwieuksk3iV4PNiwm
riBIrvy0g486UviGOr57tDczd/utPQgUDrkAZnewEXP2220jPBtI6OWwHKrkm8ZE
ZEQdI9G5N2rTYQd9r/u/rwjTPNp6zHqARLAASDysoeoecuHIbU/qpcH/WFjB75fk
25IkALhQ1zN9l4dRmrTjbwQGXkNl1F4QPBJ7ZaVuU5KNxZ8aquy9lU0N8QQXrTQ0
1+SczZtEFJPpTmqeYq6Nc+ZZqGN/pFW75+ouhi13BkZn5zOXhKEHeMLD17CNCGIp
KYikaqfOoj2BwwStJiBUfQw8PT5ovu0hzjUnIIAiHHganj1ubEplfG1hGrSIZVsZ
wP4UZ10r61VxrdCl0hKj0283J7Y1ixFbPMpkJz8t+WYk1vTQA+V9Vi48ZhFTyg+L
cZ4MFw1m9YtZS3s7jdt+cETSmmOKPl7Z5PGnlwEmDPdi5qaJE2M0mYFNSyR1YfuB
vAYD5NK13KLBB7ohpGxdSHqgKZ7JDlD29NnAUgBsKCKZ/LbyXh6cLs89BKnWCeJv
hsquCwQRDdqkpFDeT4UZFbL3ds2yY7jayXTOkG3RnyGKHf0W9aKfb/CysZIVGnI3
yf+voR+oVeXohQANowbrmVLEHxDbKBrxFRJb132mfbUVxmSgLMUNjefrAMsMGsUU
V341/MFBDSkFsg==
=DE66
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.19-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
arm64: tegra: Device tree changes for v4.19-rc1
These changes enable the GPIO controllers on Tegra194 SoCs, which in
turn allows the SD card detection and ethernet controllers to be enabled
as well. The Tegra194 device tree is also extended with the list of CPUs
and a PSCI node to inform the kernel about the presence of PSCI capable
firmware.
* tag 'tegra-for-4.19-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add CPU nodes to Tegra194 device tree
arm64: tegra: Add ethernet controller on Tegra194
arm64: tegra: Enable card detect for SD card on P2888
arm64: tegra: Add GPIO controller on Tegra194
Signed-off-by: Olof Johansson <olof@lixom.net>
for 4.19, please pull the following:
- Scott does a bunch of updates to the Stingray DTS and DTS include
files to better support the addition of new boards. Scott also adds
the Stingray OTP Device Tree node
- Pramod updates the Stingray clocks such that they match the latest
revision of the ASIC and datasheets
- Ray sets the Stingray initial watchdog timeout to 60 seconds to give
sufficient time for the kernel to boot and then adds PAXC (internal
PCIe) support to the Stingray base DTS files
- Vladimir adds support for the Stingray smart NIC PS225 boards variants
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJbSLiKAAoJEIfQlpxEBwcEDkYQAKXLAq/k5hZa3vRc86Hd0bqS
9tMBuqsL/o5rFP0gXgtjnZ8vOVpFtan8a16pldIlm13sS6bMUePTLF/ek7O+Ug+6
ScbTG/oKeZ9ztWnttSy5o20c2E1U2IN/ZwRSV1QPOOLsw+fDhUrv+sH3uEF2nbqK
DVfQCoI+XhVauPDMVIJtM+4xor1YYPG4LCBvMUr9uqQX12XENd55IjHH8GSiTyvF
+mUXPQtudceCnuZlYJDTnEJv3a9QwT2Jut+IFf25MNjQl/C2OiJZDCBsLJ8Di164
O5KnZ+NlZFjyxtgl5OTYDYw9n7AeitYyF8+fji7d2PqhD2/cRPOVEmpGpTXJva5R
WSzfXmb4kGncAT48QlUfWZxjdLfC9SzZ0FO80rlAa1L5V8wEBYWzbEqder2/bLG3
DuwgfFzVX6Chvdb6U+Mky/DjWBWDv1BkqYJEUpgSf3vmHzVSFxHuNw4vj1p6Dmom
lCzqdP8EuYBEKObrOkBs4/f/Uy7bwC4l8WMLrHXtXJj753LT/YsByS5W0h15A/2e
0q989PpcLoM5umijzi25DDJLLH1ZfjttsAydccDF500fSj+FhH6Q9YkVLClNOmyw
6o4Jxx/ukcEAB85UiQ9kg8v1iylgONhau2eFGMdnsHHYY9jWEsca28pDIMtPB5zS
GvPZn9pS85230UJVbsLO
=wh6F
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.19/devicetree-arm64' of https://github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 4.19, please pull the following:
- Scott does a bunch of updates to the Stingray DTS and DTS include
files to better support the addition of new boards. Scott also adds
the Stingray OTP Device Tree node
- Pramod updates the Stingray clocks such that they match the latest
revision of the ASIC and datasheets
- Ray sets the Stingray initial watchdog timeout to 60 seconds to give
sufficient time for the kernel to boot and then adds PAXC (internal
PCIe) support to the Stingray base DTS files
- Vladimir adds support for the Stingray smart NIC PS225 boards variants
* tag 'arm-soc/for-4.19/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: stingray: add bcm958802a802x dts
arm64: dts: stingray: add PAXC support
arm64: dts: set initial SR watchdog timeout to 60 seconds
arm64: dts: Update Stingray clock DT nodes
arm64: dts: stingray: Add OTP device node
arm64: dts: stingray: move common board components to stingray-board-base
Signed-off-by: Olof Johansson <olof@lixom.net>
the Chromebook Flip C101PA which also got some stuff moved around
to make room for Scarlet once its display pipeline makes some more
advances.
Also included are some general sound improvements for rk3399
including enabling hdmi-sound on the sapphire board and some
misc fixes like missing cooling device properties and wrong
clock-names for the uart1 on rk3328.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAltGDh0QHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgYhLB/9X2ICbvSw51i1N/4nmuik4t8bXG9l68NtG
E9sGvNI0/kJB8pZAodQfQFCih0+kw++mDQoRimVsIIicbc6T02slKtmF8ezRuLRB
sDb+HTwFcJ6c4WtdNynD7YkSqonMEDJ1RZgCRRwXWjmU17kXUuYLC43FXri6EBID
jqv38rehXt+6qNnIBHXAX52h7jKQWK2rocg8k19J+NOyESQBYB4wJ/HOAqf9nsiZ
eh+xSSg1gmQXuBgbbFKoNu328PGGiEbQq/W7TBMHUu8kjWUKinpu+Hqjj3K8daDm
sE6WR+Gv7aQ7J6xRkabtGo/WqiStcduk12yhuKy44mzUYlcZ3HVB
=o2KT
-----END PGP SIGNATURE-----
Merge tag 'v4.19-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
SPDX conversion for existing devicetree files. New board is Gru-Bob
the Chromebook Flip C101PA which also got some stuff moved around
to make room for Scarlet once its display pipeline makes some more
advances.
Also included are some general sound improvements for rk3399
including enabling hdmi-sound on the sapphire board and some
misc fixes like missing cooling device properties and wrong
clock-names for the uart1 on rk3328.
* tag 'v4.19-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: corrected uart1 clock-names for rk3328
arm64: dts: rockchip: add Google Bob
arm64: dts: rockchip: move core edp from rk3399-kevin to shared chromebook
arm64: dts: rockchip: move Chromebook-specific Gru-parts to a separate file
arm64: dts: rockchip: add phandles to some nodes on rk3399-gru
arm64: dts: rockchip: add some common pin-settings to rk3399
arm64: dts: rockchip: generalize rk3399 #sound-dai-cells
arm64: dts: rockchip: Add missing cooling device properties for CPUs
arm64: dts: rockchip: enable hdmi sound on rk3399-sapphire
arm64: dts: rockchip: connect hdmi sound in rk3399
arm64: dts: rockchip: use SPDX-License-Identifier
Signed-off-by: Olof Johansson <olof@lixom.net>
Add bcm958802a802x dts to be used on all Stingray smart NIC PS225 board
variants
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add PAXC support to Broadcom Stingray SoC
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
New compatibles are now supported by the Inside Secure SafeXcel driver.
As they are more specific than the old ones, they should be used
whenever possible. This patch updates the Marvell Armada 37xx device
tree accordingly.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
New compatibles are now supported by the Inside Secure SafeXcel driver.
As they are more specific than the old ones, they should be used
whenever possible. This patch updates the Marvell cp110 device tree
accordingly.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The RK3399 Ficus board is an Enterprise Edition board
manufactured by Vamrs Ltd., based on the Rockchip RK3399 SoC.
The board exposes a bunch of nice peripherals, including
SATA, HDMI, MIPI CSI, Ethernet, WiFi, and PCIe.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The labels for RWDT device node were named as 2 types now:
- wdt0: r8a7795, r8a7796, r8a77965.
- rwdt: r8a77970, r8a77990, r8a77995.
To be made consistent, this patch unifis the labels as the hardware
name "rwdt".
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Set initial Stingray watchdog timeout to 60 seconds
By the time when the userspace watchdog daemon is ready and taking control
over, the watchdog timeout will then be reset to what's configured in the
daemon.
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
After Kevin, the second chromebook-incarnation of the Gru series is Bob.
This materializes as the Asus Chromebook Flip C101PA, whose formfactor
is quite similar to Minnie from the Veyron series.
Add the devicetree file and binding update for it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Bob needs the same backlight and core edp settings, so move these nodes to
the shared dtsi that both will use as a base.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Similar to rk3288-Veyron before, the Gru-series does contain Chromebook
(aka clamshell laptops) and non-Chromebook devices. And while the two
Chromebook devices Kevin and Bob are quite similar, Scarlet the tablet-
device is quite different in its design.
Therefore move the Chromebook parts into a gru-chromebook dtsi file
to make sharing easier.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Some nodes will need to be refined on a per board level, so add phandles
to them to reference them later.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
HSCIF is superior to SCIF (larger FIFOs, more accurate and wider
supported range of bitrates).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Do minor rearrangement as well to keep ordering consistent.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Simple overlapping changes in stmmac driver.
Adjust skb_gro_flush_final_remcsum function signature to make GRO list
changes in net-next, as per Stephen Rothwell's example merge
resolution.
Signed-off-by: David S. Miller <davem@davemloft.net>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add CPU and PSCI nodes to device tree. The Tegra194 SoC contains
eight NVIDIA Carmel CPUs.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra194 contains the same ethernet controller as the Tegra186.
Add the device tree node for it, and correspondingly the PHY node
on the board device tree.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Now that we have a GPIO controller, enable the card detect GPIO for
the SD card slot.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the device tree node for the GPIO controller on Tegra194.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the required clocks for the new Stratix10 clock bindings
to the SPI nodes.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
- Added power capabilities for the mmc host controller on the
hikey and hikey960 boards to avoid broken wifi.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJbNUZNAAoJEAvIV27ZiWZcRy8P/1z1LnU8CaxaxJo2yD02pq1X
EauFEMVOQP6zoV6+nrLRoMdZ8RSif4joOK5W+mv+9ZIkEeDZ7n5iL23ZNujcUYWH
a+B2zJ6jNMmpnTHADsadQBCtkX+OLlDFqCMmspV/equMgJNIEd8gPQg07jYklZZs
JG9Gb/ZvfILaX6/h3DfYiyc6+ILroxSdH1VgCfXVAA8umzDu5Sn6eakl1NbEYCTe
Wx1vfP0jbaxwPwLB0V6VVV5O/ByykVbf13iNVQMLXGn9bYQzbJ0DCzhZxlXsr2iH
Wrx1ur9oRaGCGsnPq2Koj0oy9mX1wfuDyEedN94SzQezAXUXiQh1yLr6RJitnSkP
cE/UJgNbLOccpzC9/px8ff7igAfLfFVEoFKRYLXmNu45wL7FEiPxrgS4IW4z5IcS
nXH8VBG8KYLWlurJsaHIvf4L4Iaga1Grz1fZrOISdUu9gOpSMrBrVy/u2DSJORWZ
ZG2LCfELPl62XnsE7NGxAV3198ui0SOB75/bdU2emEBwjqB+d7ljrBhPoWrFYk1u
EZ35wWxBwveGXYa7oiRZL7uo4mKHfKY1BAAPGqrK3Q91c+upMgx9+klkFZrRQt1f
FcP5sOPPLUISSvz8jG9mL7SHB7VDWSuN7iV/sWtdz6ayi4WimTX4dR5HIDKiweAF
IFKNuzJr09hEa+9kwH65
=mr1l
-----END PGP SIGNATURE-----
Merge tag 'hisi-fixes-for-4.18' of git://github.com/hisilicon/linux-hisi into fixes
ARM64: hisi fixes for 4.18
- Added power capabilities for the mmc host controller on the
hikey and hikey960 boards to avoid broken wifi.
* tag 'hisi-fixes-for-4.18' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hikey960: Define wl1837 power capabilities
arm64: dts: hikey: Define wl1835 power capabilities
Signed-off-by: Olof Johansson <olof@lixom.net>
This node is just a placeholder but fills that function better if it does
not trigger build warnings. This update satisfies the requirement that
nodes with #address-cells/#size-cells properties have more than one child
node.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning (graph_child_address): /soc/sound@ec500000/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dtb: Warning (graph_child_address): /soc/sound@ec500000/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
The PSCI area should be reserved in Linux for PSCI operations such as
suspend/resume.
Reserve 2MiB of memory which matches the area used by ATF (BL1, BL2,
BL3x, see [1] in ATF source code). This covers all PSCI code and data
area and is 2MiB aligned, which is required by Linux for huge pages
handling.
Please note that this is a default setup allowing to perform PSCI
operations with legacy bootloaders. Recent bootloaders should update the
region size/position accordingly.
[1] plat/marvell/a3700/common/include/platform_def.h
Signed-off-by: Victor Gu <xigu@marvell.com>
[miquel.raynal@bootlin.com: reword of commit message, comment in the DTSI]
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
In order to be able to use Adaptive Voltage Scaling, we need to add a
reference to these registers.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
These properties are required for compatibility with runtime PM.
Without these properties, MMC host controller will not be aware
of power capabilities. When the wlcore driver attempts to power
on the device, it will erroneously fail with -EACCES. This fixes
a regression found here: https://lkml.org/lkml/2018/6/12/930
Fixes: 60f36637bb ("wlcore: sdio: allow pm to handle sdio power")
Signed-off-by: Ryan Grachek <ryan@edited.us>
Tested-by: John Stultz <john.stultz@linaro.org>
Acked-by: John Stultz <john.stultz@linaro.org>
Tested-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
These properties are required for compatibility with runtime PM.
Without these properties, MMC host controller will not be aware
of power capabilities. When the wlcore driver attempts to power
on the device, it will erroneously fail with -EACCES.
Fixes: 60f36637bb ("wlcore: sdio: allow pm to handle sdio power")
Signed-off-by: Ryan Grachek <ryan@edited.us>
Tested-by: John Stultz <john.stultz@linaro.org>
Acked-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
With recent dtc and W=1:
...salvator-x.dtb: Warning (graph_port): /soc/i2c@e66d8000/video-receiver@70/port@10: graph node unit address error, expected "a"
...salvator-x.dtb: Warning (graph_port): /soc/i2c@e66d8000/video-receiver@70/port@11: graph node unit address error, expected "b"
Unit addresses are always hexadecimal (without prefix), while the bases
of reg property values depend on their prefixes.
Fixes: 908001d778 ("arm64: dts: renesas: salvator-common: Add ADV7482 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
meson-gxl-mali.dtsi is only used on GXL SoCs. Thus it should use the GXL
specific compatible string instead of the GXBB one.
For now this is purely cosmetic since the (out-of-tree) lima driver for
this GPU currently uses the "arm,mali-450" match instead of the SoC
specific one. However, update the .dts to match the documentation since
this driver behavior might change in the future.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Like the odroid-c2 and wetek, the s400 uses the RTL8211F and seems to
suffer from the kind of stability issue.
Doing an iperf3 download test, we can see a significant number of LPI
interrupts on the tx path. After a short while (5 to 15 seconds), the
network connection dies. If using rootfs over NFS, the connection may
also break during the boot sequence.
We still don't have a real explanation for this problem so let's disable
EEE once again.
Fixes: f6f6ac914b ("ARM64: dts: meson-axg: enable ethernet for A113D S400 board")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Vendor firmware/uboot has different reserved regions depending on
firmware version, but current codebase reserves the same regions on
GXL and GXBB, so move the additional reserved memory region to common
.dtsi.
Found when putting a recent vendor u-boot on meson-gxbb-p200.
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Cc: stable@vger.kernel.org
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Like LibreTech-CC, the USB0 needs the 5V regulator to be enabled to power the
devices on the P212 Reference Design based boards.
Fixes: b9f07cb4f4 ("ARM64: dts: meson-gxl-s905x-p212: enable the USB controller")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Based on updated information from Amlogic, correct the register range
for the SD/eMMC blocks to the right size.
Reported-by: Yixun Lan <yixun.lan@amlogic.com>
Tested-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There is a problem with the sd-uhs mode when doing a soft reboot.
Switching back from 1.8v to 3.3v messes with the card, which no longer
respond (timeout errors). According to the specification, we should
perform a card reset (power cycling the card) but this is something we
cannot control on this design.
Then the only solution to restore the communication with the card is an
"unplug-plug" which is not acceptable
Until we find a solution, if any, disable the sd-uhs modes on this design.
For the people using uhs at the moment, there will a performance drop as
a result.
Fixes: 3cde63ebc8 ("ARM64: dts: meson-gxl: libretech-cc: enable high speed modes")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Cc: stable@vger.kernel.org
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
On usual A64 board design the power of HDMI controller is connected to
DLDO1 of the AXP803 PMIC. If this regulator is shut down, the HDMI
output will be blank. Therefore the simplefb driver should keep this
regulator on.
Add the regulator to all currently available A64 boards' simplefb_hdmi
device node, if the board is capable of outputing HDMI.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
As the U-Boot bootloader now is also capable of initialize the HDMI on
A64 boards, add a simplefb device tree node for accessing the HDMI
framebuffer initialized by the bootloader.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
As we have all necessary parts to enable the DE2 CCU on the Allwinner
A64 SoC, add the needed device tree nodes, including the DE2 CCU itself
and the DE2 bus.
The "mixer0-lcd0" simplefb device node is updated to use the DE2 CCU.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
R-Car E3 does not have the Stream Buffer for EtherAVB-IF (STBE).
Note that the RAVB driver does not use this region.
Fixes: 913a78b575 ("arm64: dts: renesas: r8a77990: Add EthernetAVB device nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch fixes wrong name of headphone widget for receiving events
of insert/remove headphone plug from simple-card or audio-graph-card.
If we use wrong widget name then we get warning messages such as
"asoc-audio-graph-card sound: ASoC: DAPM unknown pin Headphones"
when the plug is inserted or removed from headphone jack.
Fixes: fb21a0acaa ("arm64: dts: uniphier: add sound node")
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The right most SFP connector on the Macchiatobin board and schematics is
marked as CON13/CON14.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Update clock output names in the Stingray clock DT nodes so they match
the binding document and the latest ASIC datasheet. Also add entries
for LCPLL2
Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Move common board components from base bcm958742 dtsi file to new
stingray-board-base dtsi file so they can be shared between many stingray
boards following common design.
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This patch is to move ptp timer node out of fman.
Because ptp timer will be probed by ptp_qoriq driver,
it should be an independent device in case of conflict
memory mapping.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Acked-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The Pine H64 has 3 GPIO-controlled LEDs, which are labeled "heartbeat",
"link", and "status".
Add device nodes for them.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Currently all ARM kernels will have s2idle enabled if CONFIG_SUSPEND is
present. In this case if the lid is closed, systemd-logind will enter
s2idle mode by default; however there's no possible wakeup source
defined, so the system will enter a forever idle.
Add the lid itself as a wakeup source, thus the system can wakeup when
the lid is opened.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Originally the name of the DLDO3 regulator on TERES-I is "eDP12", which
is not consistent with other regulator names.
Change it to "vdd-edp", in order to make it more consistent.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Remove leading 0x from recently introduced unit addresses to fix DTC
warnings:
Warning (unit_address_format): /soc/sysmmu@0x15040000: unit name should not have leading "0x"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Remove no longer needed samsung thermal properties.
There should be no functional changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add EINT support to pinctrl and set those GPIO keys as interrupt-driven
keys.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds pin control for HSCIF1, and supports connection with
Debug Serial-1 (CN26) on Salvator boards.
SCIF1 and HSCIF1 are sharing the pins connected to Debug Serial-1 (CN26)
on Salvator boards, and it is necessary to ensure that either SCIF1 or
HSCIF1 is enabled, not both.
As for the default of this DeviceTree, SCIF1 is connected.
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Add missing "uart-has-rtscts"]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the interconnected FCPVD0, VSPD0, DU, and LVDS0 devices in the
R8A77980 device tree...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Specify Ethernet PHY IRQs in the Condor/V3HSK board device trees, now that
we have the GPIO support (previously phylib had to resort to polling).
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds PCIe{0,1} device nodes to R8A77965 SoC.
Based on a similar patches of the R8A7796 device tree
by Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD
devices are mapped in the memory range usually used by the VSP LUT and
CLU, which are not present in the VSPD. Fix this by shortening the VSPD
registers range to 0x5000.
Fixes: 9f8573e38a ("arm64: dts: renesas: r8a7795: Add VSP instances")
Fixes: 291e0c4994 ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0")
Fixes: f06ffdfbdd ("arm64: dts: r8a7796: Add VSP instances")
Fixes: b4f92030d5 ("arm64: dts: renesas: r8a77970: add VSPD support")
Fixes: 295952a183 ("arm64: dts: renesas: r8a77995: add VSP instances")
Fixes: 85cb322921 ("arm64: dts: renesas: r8a77965: Add VSP instances")
Reported-by: Simon Horman <horms+renesas@verge.net.au>
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe all 6 GPIO controllers in the R8A77980 device tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds USB2.0 PHY and Host(EHCI/OHCI) nodes and
enables them for R-Car E3 Ebisu board.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the second Cortex-A53 CPU core on the Renesas
R-Car E3 (r8a77990) SoC, and adjust the interrupt delivery masks for ARM
Generic Interrupt Controller and Architectured Timer.
Based on a patch in the BSP by Takeshi Kihara.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
