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arm64: allwinner: h6: add device tree nodes for MMC controllers
The Allwinner H6 SoC have 3 MMC controllers. Add device tree nodes for them. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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@ -126,12 +126,71 @@ pio: pinctrl@300b000 {
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interrupt-controller;
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#interrupt-cells = <3>;
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mmc0_pins: mmc0-pins {
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pins = "PF0", "PF1", "PF2", "PF3",
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"PF4", "PF5";
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function = "mmc0";
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drive-strength = <30>;
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bias-pull-up;
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};
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mmc2_pins: mmc2-pins {
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pins = "PC1", "PC4", "PC5", "PC6",
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"PC7", "PC8", "PC9", "PC10",
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"PC11", "PC12", "PC13", "PC14";
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function = "mmc2";
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drive-strength = <30>;
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bias-pull-up;
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};
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uart0_ph_pins: uart0-ph {
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pins = "PH0", "PH1";
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function = "uart0";
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};
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};
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mmc0: mmc@4020000 {
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compatible = "allwinner,sun50i-h6-mmc",
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"allwinner,sun50i-a64-mmc";
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reg = <0x04020000 0x1000>;
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clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
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clock-names = "ahb", "mmc";
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resets = <&ccu RST_BUS_MMC0>;
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reset-names = "ahb";
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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mmc1: mmc@4021000 {
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compatible = "allwinner,sun50i-h6-mmc",
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"allwinner,sun50i-a64-mmc";
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reg = <0x04021000 0x1000>;
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clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
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clock-names = "ahb", "mmc";
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resets = <&ccu RST_BUS_MMC1>;
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reset-names = "ahb";
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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mmc2: mmc@4022000 {
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compatible = "allwinner,sun50i-h6-emmc",
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"allwinner,sun50i-a64-emmc";
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reg = <0x04022000 0x1000>;
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clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
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clock-names = "ahb", "mmc";
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resets = <&ccu RST_BUS_MMC2>;
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reset-names = "ahb";
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart0: serial@5000000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x05000000 0x400>;
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