Commit Graph

616210 Commits

Author SHA1 Message Date
Tom St Denis
b80b13f0cd drm/amd/powerplay: Fix CZ SMU firmware load check (v4)
Remove an errant return in the middle of the check
function as well as check for success in the start
function.

(v2) Add return check to smu_load_fw()
(v3) Don't return early if SMU load check fails
(v4) No returns!  :-)

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-30 17:54:42 -04:00
Marek Olšák
95844d20ae drm/amdgpu: throttle buffer migrations at CS using a fixed MBps limit (v2)
The old mechanism used a per-submission limit that didn't take previous
submissions within the same time frame into account. It also filled VRAM
slowly when VRAM usage dropped due to a big eviction or buffer deallocation.

This new method establishes a configurable MBps limit that is obeyed when
VRAM usage is very high. When VRAM usage is not very high, it gives
the driver the freedom to fill it quickly. The result is more consistent
performance.

It can't keep the BO move rate low if lots of evictions are happening due
to VRAM fragmentation, or if a big buffer is being migrated.

The amdgpu.moverate parameter can be used to set a non-default limit.
Measurements can be done to find out which amdgpu.moverate setting gives
the best results.

Mainly APUs and cards with small VRAM will benefit from this. For F1 2015,
anything with 2 GB VRAM or less will benefit.

Some benchmark results - F1 2015 (Tonga 2GB):

Limit      MinFPS AvgFPS
Old code:  14     32.6
128 MB/s:  28     41
64 MB/s:   15.5   43
32 MB/s:   28.7   43.4
8 MB/s:    27.8   44.4
8 MB/s:    21.9   42.8 (different run)

Random drops in Min FPS can still occur (due to fragmented VRAM?), but
the average FPS is much better. 8 MB/s is probably a good limit for this
game & the current VRAM management. The random FPS drops are still to be
tackled.

v2: use a spinlock

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-30 17:54:30 -04:00
Tom St Denis
15f441db96 drm/amd/amdgpu: Tidy up cz_dpm.c
Various minor formatting changes.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 14:02:55 -04:00
Tom St Denis
e701f97ff3 drm/amd/amdgpu: Clean up memory leak in cz_dpm_init().
If init fails free up any allocated memory.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 14:02:46 -04:00
Tom St Denis
cc945ce3ab drm/amd/amdgpu: Fix memleak in cz_parse_power_table()
If one of the entries fails to be allocated then free
all of the previous entries before freeing the array which
holds their pointers.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 14:02:39 -04:00
Rex Zhu
c08770eb8a drm/amdgpu: refine uvd gate logic for CI.
uvd dpm will be controlled by uvd.
dpm just disable uvd dpm in case of suspend when play video.
due to the new logic of uvd_begin_use/end_use,
if disable uvd dpm in late init, will have no chance to
enable uvd dpm after resume until play video again.

Change-Id: I70e3d7efe63edad37f26e6c5ea089da1135c0ab5
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:24:15 -04:00
Rex Zhu
075f101cee drm/amd/powerplay: simplify struct amd_pp_init.
delete the members not needed when amd_powerplay_init.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:23:41 -04:00
Rex Zhu
38109efacd drm/amd/powerplay: get system info by cgs interface.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:23:21 -04:00
Rex Zhu
2fef37c62c drm/amdgpu: add support for getting sub_device id and
sub_vendor_id in cgs interface.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:23:00 -04:00
Rex Zhu
c04399f194 drm/amdgpu: add vce bypass mode for tonga.
fix issue that encode test failed on the second time when
vce dpm enabled on tonga.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:22:40 -04:00
Rex Zhu
cbb2fe8e96 drm/amd/powerplay: add bypass mode for vce 2.0.
fix issue after vce encode, the eclk stay high.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:22:24 -04:00
Rex Zhu
0174df4e66 drm/amdgpu: refine function name for consistency
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:22:09 -04:00
Alex Deucher
6f0359ff73 drm/amdgpu/vce3: add support for third vce ring
Not of much use at the moment (we don't really use
the second ring either), but may be useful later.

Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 11:21:51 -04:00
Alex Deucher
75c65480ba drm/amdgpu: track the number of vce rings
Rather than using a hardcoded value.  This allows
different versions to expose more or less rings.

No functional change.

Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 11:21:43 -04:00
Alex Deucher
810ddc3ab5 drm/amdgpu: rename suspend_kms and resume_kms
The old names were dragged over from radeon.  The new ones
better match the naming conventions used in the driver.

No functional change.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 11:19:38 -04:00
Christian König
7b4d3e297e drm/amdgpu: use memcpy_toio for VCE firmware upload
Try to be clean here, even when it's a noop on x86.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:07 -04:00
Christian König
ba0b2275a6 drm/amdgpu: use memcpy_to/fromio for UVD fw upload
Also use the firmware size from the header instead of calculating it.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:06 -04:00
Rex Zhu
39a5830a05 drm/amd/powerplay: delete useless code in iceland_hwmgr.c.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:06 -04:00
Alex Deucher
70a033d25b drm/radeon: switch UVD code to use UVD_NO_OP for padding
Replace packet2's with packet0 writes to UVD_NO_OP.  The
value written to UVD_NO_OP does not matter.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:05 -04:00
Alex Deucher
c8b4f288f4 drm/amdgpu: switch UVD code to use UVD_NO_OP for padding
Replace packet2's with packet0 writes to UVD_NO_OP.  The
value written to UVD_NO_OP does not matter.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:05 -04:00
Alex Deucher
4d6bdbad25 drm/radeon: add support for UVD_NO_OP register
Writes to this register are the preferred way to do NOPs.

Bump the driver version as well.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:04 -04:00
Alex Deucher
8dd31d74ac drm/amdgpu: add support for UVD_NO_OP register
Writes to this register are the preferred way to do NOPs.

Bump the driver version as well.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:04 -04:00
Alex Deucher
a22f803cd2 drm/amdgpu: fix VCE ib alignment value
The VCE rings only require single dword alignment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:03 -04:00
Alex Deucher
c4795ca642 drm/amdgpu: fix IB alignment for UVD
According to the hw team, it should be 16, not 8.

Cc: Peter Fang <peter.fang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-08-24 16:25:02 -04:00
Tom St Denis
1b5836492d drm/amd/amdgpu: Print ring name in amdgpu_ib_schedule()
If the ring isn't ready lets print out which ring name
to help debugging.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:07 -04:00
Heinrich Schuchardt
ddbbd3be96 drm/radeon: remove dead code, si_mc_load_microcode (v2)
In an if block for (running == 0) running cannot be non-zero.

v2: agd: remove unused variable

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:07 -04:00
Heinrich Schuchardt
6e4b070ea1 drm/radeon/cik: remove dead code (v2)
In an if block for (running == 0) running cannot be non-zero.

v2: agd: remove unused variable

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:06 -04:00
Heinrich Schuchardt
bb1800caf7 drm/amd/powerplay: avoid NULL dereference, cz_hwmgr.c
if (a == NULL || a->b == NULL)
leads to a NULL pointer dereference if a == NULL.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:05 -04:00
Heinrich Schuchardt
d36f3e048e drm/amd/powerplay: avoid NULL pointer dereference
if (a == NULL || a->b == NULL)
leads to a NULL pointer dereference if a == NULL.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:05 -04:00
Heinrich Schuchardt
887656f0b7 drm/amdgpu/gmc8: remove dead code (v2)
In an if block for (running == 0) running cannot be non-zero.

v2: agd: remove unused variable

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:04 -04:00
Heinrich Schuchardt
5c0eb98e48 drm/amdgpu/gmc7: remove dead code (v2)
In an if block for (running == 0) running cannot be non-zero.

v2: agd: remove unused variable

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:04 -04:00
Alexandre Demers
5da25cd575 drm/amdgpu: Fix indentation in dce_v8_0_audio_write_sad_regs()
Fixed indentation for readability.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:47:56 -04:00
Alexandre Demers
dfaf2291ab drm/amdgpu: Use correct mask in dce_v8_0_afmt_setmode() and fix comment typos.
We were using the same mask twice. Looking at radeon, it seems
we should be using HDMI_AVI_INFO_CONT instead as the second mask.

Being there, fix typos in comments and improved readability.

I haven't looked at other DCEs, the mask may also be wrong for them.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:25 -04:00
Christian König
99e124f402 drm/amdgpu: cleanup amdgpu_vm_bo_update params
Make it more obvious what we are doing here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:24 -04:00
Christian König
6369f6f133 drm/amdgpu: stop adding dummy entry in amdgpu_ttm_placement_init
AMDGPU_GEM_CREATE_NO_CPU_ACCESS and AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED are
obviously mutual exclusive. So stop adding a dummy entry without effect when
both are specified.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:24 -04:00
Christian König
faceaf6a73 drm/amdgpu: cleanup amdgpu_ttm_placement_init
Make it more clear what this function does. No intendet functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:23 -04:00
Christian König
1fdc0b76ea drm/amdgpu: fix lru size grouping v2
Adding a BO can make it the insertion point for larger sizes as well.

v2: add a comment about the guard structure.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:23 -04:00
Tom St Denis
8cc5e80641 drm/amd/powerplay: Tidy up cz_hwmgr.c
Clean up whitespace and formatting.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:22 -04:00
Marek Olšák
83a59b6338 drm/amdgpu: add AMDGPU_INFO_NUM_EVICTIONS
For profiling.

v2: really bump the minor version

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:21 -04:00
Chunming Zhou
53cdccd520 drm/amdgpu: recover vram bo from shadow after gpu reset V2
V2:
1. don't directly submit to many jobs at the same time.
2. delete unrelated printk.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:21 -04:00
Chunming Zhou
0c4e7fa561 drm/amdgpu: link all shadow bo V2
V2:
1. use mutex instead of spinlock for shadow list, since its process could
sleep.
2. move list_del to bo destroy phase.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:20 -04:00
Chunming Zhou
4c7e885506 drm/amdgpu: update pt shadow while updating pt V2
V2:
move shadow parameter to amdgpu_pte_update_params.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: minutemaidpark@hotmail.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:20 -04:00
Chunming Zhou
6557e3d294 drm/amdgpu: update pd shadow while updating pd V2
V2:
Checking if shadow is valid.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:19 -04:00
Chunming Zhou
20f4eff1c8 drm/amdgpu: sync bo and shadow V3
Use shadow flag to judge which direction to sync.
V2:
Don't need bo pin, so remove it.

V3:
1. Split to two functions, one is backup_to_shadow, another is
restore_from_shadow.
2. Clean up previous shadow direction difinitions.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:18 -04:00
Chunming Zhou
e24db98529 drm/amdgpu: add direct submision option for copy_buffer
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:18 -04:00
Chunming Zhou
3ad81f167e drm/amdgpu: add need backup function V2
V2:
add checking if need backup in amdgpu_bo_create.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:33:22 -04:00
jimqu
abc8c1ce48 drm/amd/amdgpu: S3 resumed failed after 4-5 times loop
Phenomenon: software hang when device resume back, read UVD fence is 0xffffffff
and read pcie pid is 0xffff.
The issue is caused by VCE reset when update cg setting. according to HW programming
guide, adjust update VCE cg sequence.
The patch apply to VCE2.0.

Signed-off-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:32:55 -04:00
Flora Cui
27798e07ed drm/amdgpu: use domain's gpu_offset for start addr
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:32:38 -04:00
Flora Cui
32ab75f076 drm/amdgpu: update gart_pin_size only if the bo is pined to GTT
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:31:36 -04:00
Flora Cui
408778e8e9 drm/amdgpu: check domain sanity in amdgpu_bo_pin_restricted()
abort if the bo is pined to other domain already

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:31:19 -04:00