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drm/amdgpu: track the number of vce rings
Rather than using a hardcoded value. This allows different versions to expose more or less rings. No functional change. Reviewed-by: JimQu <Jim.Qu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1686,6 +1686,7 @@ struct amdgpu_vce {
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unsigned harvest_config;
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struct amd_sched_entity entity;
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uint32_t srbm_soft_reset;
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unsigned num_rings;
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};
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/*
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@ -296,7 +296,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
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break;
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case AMDGPU_HW_IP_VCE:
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type = AMD_IP_BLOCK_TYPE_VCE;
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for (i = 0; i < AMDGPU_MAX_VCE_RINGS; i++)
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for (i = 0; i < adev->vce.num_rings; i++)
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ring_mask |= ((adev->vce.ring[i].ready ? 1 : 0) << i);
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ib_start_alignment = AMDGPU_GPU_PAGE_SIZE;
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ib_size_alignment = 1;
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@ -193,6 +193,8 @@ static int vce_v2_0_early_init(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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adev->vce.num_rings = 2;
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vce_v2_0_set_ring_funcs(adev);
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vce_v2_0_set_irq_funcs(adev);
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@ -202,7 +204,7 @@ static int vce_v2_0_early_init(void *handle)
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static int vce_v2_0_sw_init(void *handle)
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{
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struct amdgpu_ring *ring;
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int r;
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int r, i;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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/* VCE */
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@ -219,19 +221,14 @@ static int vce_v2_0_sw_init(void *handle)
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if (r)
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return r;
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ring = &adev->vce.ring[0];
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sprintf(ring->name, "vce0");
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r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf,
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&adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE);
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if (r)
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return r;
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ring = &adev->vce.ring[1];
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sprintf(ring->name, "vce1");
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r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf,
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&adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE);
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if (r)
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return r;
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for (i = 0; i < adev->vce.num_rings; i++) {
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ring = &adev->vce.ring[i];
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sprintf(ring->name, "vce%d", i);
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r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf,
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&adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE);
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if (r)
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return r;
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}
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return r;
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}
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@ -254,29 +251,23 @@ static int vce_v2_0_sw_fini(void *handle)
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static int vce_v2_0_hw_init(void *handle)
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{
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struct amdgpu_ring *ring;
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int r;
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int r, i;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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r = vce_v2_0_start(adev);
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/* this error mean vcpu not in running state, so just skip ring test, not stop driver initialize */
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if (r)
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/* this error mean vcpu not in running state, so just skip ring test, not stop driver initialize */
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return 0;
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ring = &adev->vce.ring[0];
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ring->ready = true;
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r = amdgpu_ring_test_ring(ring);
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if (r) {
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ring->ready = false;
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return r;
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}
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for (i = 0; i < adev->vce.num_rings; i++)
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adev->vce.ring[i].ready = false;
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ring = &adev->vce.ring[1];
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ring->ready = true;
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r = amdgpu_ring_test_ring(ring);
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if (r) {
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ring->ready = false;
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return r;
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for (i = 0; i < adev->vce.num_rings; i++) {
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r = amdgpu_ring_test_ring(&adev->vce.ring[i]);
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if (r)
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return r;
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else
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adev->vce.ring[i].ready = true;
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}
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DRM_INFO("VCE initialized successfully.\n");
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@ -618,8 +609,10 @@ static const struct amdgpu_ring_funcs vce_v2_0_ring_funcs = {
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static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev)
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{
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adev->vce.ring[0].funcs = &vce_v2_0_ring_funcs;
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adev->vce.ring[1].funcs = &vce_v2_0_ring_funcs;
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int i;
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for (i = 0; i < adev->vce.num_rings; i++)
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adev->vce.ring[i].funcs = &vce_v2_0_ring_funcs;
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}
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static const struct amdgpu_irq_src_funcs vce_v2_0_irq_funcs = {
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@ -345,6 +345,8 @@ static int vce_v3_0_early_init(void *handle)
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(AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1))
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return -ENOENT;
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adev->vce.num_rings = 2;
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vce_v3_0_set_ring_funcs(adev);
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vce_v3_0_set_irq_funcs(adev);
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@ -355,7 +357,7 @@ static int vce_v3_0_sw_init(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct amdgpu_ring *ring;
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int r;
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int r, i;
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/* VCE */
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r = amdgpu_irq_add_id(adev, 167, &adev->vce.irq);
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@ -371,19 +373,14 @@ static int vce_v3_0_sw_init(void *handle)
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if (r)
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return r;
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ring = &adev->vce.ring[0];
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sprintf(ring->name, "vce0");
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r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf,
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&adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE);
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if (r)
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return r;
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ring = &adev->vce.ring[1];
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sprintf(ring->name, "vce1");
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r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf,
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&adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE);
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if (r)
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return r;
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for (i = 0; i < adev->vce.num_rings; i++) {
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ring = &adev->vce.ring[i];
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sprintf(ring->name, "vce%d", i);
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r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf,
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&adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE);
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if (r)
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return r;
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}
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return r;
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}
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@ -413,10 +410,10 @@ static int vce_v3_0_hw_init(void *handle)
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if (r)
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return r;
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adev->vce.ring[0].ready = false;
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adev->vce.ring[1].ready = false;
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for (i = 0; i < adev->vce.num_rings; i++)
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adev->vce.ring[i].ready = false;
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for (i = 0; i < 2; i++) {
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for (i = 0; i < adev->vce.num_rings; i++) {
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r = amdgpu_ring_test_ring(&adev->vce.ring[i]);
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if (r)
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return r;
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@ -800,8 +797,10 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_funcs = {
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static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev)
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{
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adev->vce.ring[0].funcs = &vce_v3_0_ring_funcs;
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adev->vce.ring[1].funcs = &vce_v3_0_ring_funcs;
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int i;
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for (i = 0; i < adev->vce.num_rings; i++)
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adev->vce.ring[i].funcs = &vce_v3_0_ring_funcs;
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}
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static const struct amdgpu_irq_src_funcs vce_v3_0_irq_funcs = {
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