Commit Graph

1765 Commits

Author SHA1 Message Date
Evan Quan
a94235af11 drm/amd/powerplay: update arcturus_ppt.c/h V3
Arcturus ASIC specific powerplay interfaces.

V2: correct SMU msg naming
    drop unnecessary debugs

V3: rebase (Alex)

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:33 -05:00
Evan Quan
c8893d5ce7 drm/amd/powerplay: update arcturus_ppsmc.h
Correct header and fix typo.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:33 -05:00
Evan Quan
22808306f2 drm/amd/powerplay: update smu11_driver_if_arcturus.h
It guides how driver should interface with SMU in arcturus.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:33 -05:00
Evan Quan
7c8bcaf408 drm/amd/powerplay: add SW SMU interface for dumping pptable out (v2)
This is especially useful in early bring up phase.

v2: disabled by default (Alex)

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:33 -05:00
Kenneth Feng
6e92e156aa drm/amdgpu/powerplay: provide the interface to disable uclk switch for DAL
provide the interface for DAL to disable uclk switch on navi10.
in this case, the uclk will be fixed to maximum.
this is a workaround when display configuration causes underflow issue.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:33 -05:00
Kevin Wang
98eb03bbf0 drm/amd/powerplay: implment sysfs feature status function in smu
1. Unified feature enable status format in sysfs
2. Rename ppfeature to pp_features to adapt other pp sysfs node name
3. this function support all asic, not asic related function.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Acked-by: Rui Huang <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:32 -05:00
Kevin Wang
26dd668155 drm/amd/powerplay: move smu_feature_update_enable_state to up level
this function is not ip or asic related function,
so move it to top level as public api in smu.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:32 -05:00
Kevin Wang
cb33363d0e drm/amd/powerplay: add smu feature name support
add smu_get_feature_name support in smu.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:32 -05:00
Kevin Wang
6b294793e3 drm/amd/powerplay: add smu message name support
add smu_get_message_name support in smu.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:32 -05:00
Kevin Wang
0ba5eda81a drm/amd/powerplay: move smu types to smu_types.h
move some enum type (message, feature, clock) to smu_types.h.
these types is too long in amdgpu_smu.h, and not clearly.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:32 -05:00
Alex Deucher
354e6e14ef drm/amdgpu/powerplay: use proper revision id for navi
The PCI revision id determines the sku.

Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:48:32 -05:00
Alex Deucher
1c074a6383 drm/amdgpu/powerplay: add set_mp1_state for vega12
This sets the SMU into the proper state for various
operations (shutdown, unload, GPU reset, etc.).

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:24:41 -05:00
Alex Deucher
e254102d50 drm/amdgpu/powerplay: add set_mp1_state for vega10
This sets the SMU into the proper state for various
operations (shutdown, unload, GPU reset, etc.).

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:24:39 -05:00
Alex Deucher
a906277d22 drm/amdgpu/powerplay: add set_mp1_state for vega20
This sets the SMU into the proper state for various
operations (shutdown, unload, GPU reset, etc.).

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:24:35 -05:00
Alex Deucher
479baeacd8 drm/amdgpu/powerplay: return success if set_mp1_state is not set
Some asics (APUs) don't have this callback so we want to return
success.  Avoids spurious error messages on APUs.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:24:25 -05:00
Alex Deucher
a2c28e34f8 drm/amdgpu/powerplay: add a new interface to set the mp1 state
This is required for certain cases such as various GPU resets
(mode1, mode2), BACO, shutdown, unload, etc. to put the SMU into
the appropriate state for when the hw is re-initialized.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:24:21 -05:00
Evan Quan
4d7fd9e20b drm/amd/powerplay: enable SW SMU reset functionality
Move SMU irq handler register to sw_init as that's totally
software related. Otherwise, it will prevent SMU reset working.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:23:37 -05:00
Evan Quan
f0d2a7dc11 drm/amd/powerplay: fix null pointer dereference around dpm state relates
DPM state relates are not supported on the new SW SMU ASICs. But still
it's not OK to trigger null pointer dereference on accessing them.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:23:29 -05:00
Evan Quan
fcd90fee8a drm/amd/powerplay: minor fixes around SW SMU power and fan setting
Add checking for possible invalid input and null pointer. And
drop redundant code.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:23:21 -05:00
Kevin Wang
668a9469f1 drm/amd/powerplay: fix temperature granularity error in smu11
in this patch,
drm/amd/powerplay: add callback function of get_thermal_temperature_range
the driver missed temperature granularity change on other temperature.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:19:21 -05:00
Evan Quan
780f3a9c5b drm/amd/powerplay: some cosmetic fixes
Drop redundant check, duplicate check, duplicate setting
and fix the return value.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:19:13 -05:00
Evan Quan
d3a593e97e drm/amd/powerplay: no pptable transfer and dpms enabled with "dpm=0"
Honor the 'dpm' module parameter setting on SW SMU routine as what
we did on previous ASICs. SMU FW loading is still proceeded even
with "dpm=0".

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:18:58 -05:00
Kevin Wang
7a81637105 drm/amd/powerplay: add callback function of get_thermal_temperature_range
1. the thermal temperature is asic related data, move the code logic to
xxx_ppt.c.
2. replace data structure PP_TemperatureRange with
smu_temperature_range.
3. change temperature uint from temp*1000 to temp (temperature uint).

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30 23:17:14 -05:00
Alex Deucher
95ccc15508 drm/amdgpu/smu: move fan rpm query into the asic specific code
On vega20, there is an SMU message to query it.  On navi, it's fetched
from the metrics table.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-22 14:57:39 -05:00
Kevin Wang
b629167d68 drm/amd/powerplay: remove redundancy debug log in smu
remove redundacy debug log in smu.
eg:
[ 6897.969447] amdgpu: [powerplay] smu 11 clk dpm feature 1 is not enabled
[ 6897.969448] amdgpu: [powerplay] smu 11 clk dpm feature 1 is not enabled
[ 6897.969448] amdgpu: [powerplay] smu 11 clk dpm feature 1 is not enabled
[ 6899.024114] amdgpu: [powerplay] Unsupported SMU message: 38
[ 6899.024151] amdgpu: [powerplay] smu 11 clk dpm feature 1 is not enabled
[ 6899.024151] amdgpu: [powerplay] smu 11 clk dpm feature 1 is not enabled
[ 6899.024152] amdgpu: [powerplay] smu 11 clk dpm feature 1 is not enabled
[ 6900.078296] amdgpu: [powerplay] Unsupported SMU message: 38
[ 6900.078332] amdgpu: [powerplay] smu 11 clk dpm feature 1 is not enabled
[ 6900.078332] amdgpu: [powerplay] smu 11 clk dpm feature 1 is not enabled
[ 6900.078333] amdgpu: [powerplay] smu 11 clk dpm feature 1 is not enabled
[ 6901.133230] amdgpu: [powerplay] Unsupported SMU message: 38

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-22 14:57:22 -05:00
Kevin Wang
ebf8fc31cb drm/amd/powerplay: custom peak clock freq for navi10
v2:
add function smu_default_set_performance_level as default dpm level handler.
change function name smu_set_performance_level to smu_asic_set_performance_level

v1:
1.NAVI10_PEAK_SCLK_XTX    1830 Mhz
2.NAVI10_PEAK_SCLK_XT     1755 Mhz
3.NAVI10_PEAK_SCLK_XL     1625 Mhz

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-22 14:57:06 -05:00
Kevin Wang
c49b1b59a2 drm/amd/powerplay: change sysfs pp_dpm_xxx format for navi10
v2:
set average clock value on level 1 when current clock equal
min or max clock (fine grained dpm support).

the navi10 gfxclk (sclk) support fine grained DPM,
so use level 1 to show current dpm freq in sysfs pp_dpm_xxx

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:07 -05:00
Evan Quan
3a48c10d7f drm/amd/powerplay: report bootup clock as max supported on dpm disabled
With gfxclk or uclk dpm disabled, it's reasonable to report bootup clock
as the max supported.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:07 -05:00
Evan Quan
c06403045a drm/amd/powerplay: input check for unsupported message/clock index
This can avoid them to be handled in a wrong way without notice.
Since not all SMU messages/clocks are supported on every SMU11 ASIC.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:07 -05:00
Evan Quan
7e01a2ec96 drm/amd/powerplay: correct SW SMU valid mapping check
Current implementation is not actually able to detect
invalid message/table/workload mapping.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:07 -05:00
Yong Zhao
54bd77f3d0 amd/powerplay: No SW XGMI dpm for Arcturus rev 2
xgmi dpm is handled by the SMU.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:06 -05:00
Chengming Gui
e7773c1c11 drm/amd/powerplay: get smc firmware and pptable
get smc firmware and pptable for arcturus

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:05 -05:00
Chengming Gui
1fb8cfc2a3 drm/amdgpu/powerplay: add smu11 driver interface for arcturus. (v2)
add smu11_driver_if_arcturus.h file.

v2: add license, fix header guard (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:05 -05:00
Chengming Gui
6fba59060c drm/amdgpu/powerplay: add arcturus ppt functions
add arcturus_ppsmc.h arcturus_ppt.c and arcturus_ppt.h files.

This is the initial power management support for Arcturus.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:05 -05:00
Jack Xiao
ba02636de5 drm/amdgpu: enable gfxoff code path for navi14
Based on navi10 gfxoff logic, enable the related code
path for navi14.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:01 -05:00
Xiaojie Yuan
e017bb8035 drm/amd/powerplay: disable gfxoff for navi14
gfxoff doesn't work on navi14 yet, so disable it for now

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:01 -05:00
Xiaojie Yuan
b02ff12689 drm/amdgpu/smu11: add support for navi14
Same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18 14:18:00 -05:00
Evan Quan
cd6e0c4ba1 drm/amd/powerplay: update vega20 driver if to fit latest SMU firmware
Optimization for the socket power calculation is introduced.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-17 13:34:30 -05:00
Evan Quan
93002849ff drm/amd/powerplay: maintain SMU FW backward compatibility
Do not halt driver loading on if_version mismatch. As our
driver and FWs are backward compatible.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-17 13:34:30 -05:00
Evan Quan
0d9d78b57b drm/amd/powerplay: correct smu_update_table usage
The interface was used in a confusing way. In profile mode scenario,
the 2nd parameter of the interface was used in a different way from
other scenarios.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-17 13:34:30 -05:00
Evan Quan
7ef65bbd01 drm/amd/powerplay: avoid access before allocation
No access before allocation.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-17 13:34:30 -05:00
Evan Quan
366cf03ec0 drm/amd/powerplay: fix memory allocation failure check V2
Fix memory allocation failure check.

- V2: fix one more similar error

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-17 13:34:30 -05:00
Nathan Chancellor
d72e04d97e drm/amd/powerplay: Use proper enums in vega20_print_clk_levels
clang warns:

drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:995:39: warning:
implicit conversion from enumeration type 'PPCLK_e' to different
enumeration type 'enum smu_clk_type' [-Wenum-conversion]
                ret = smu_get_current_clk_freq(smu, PPCLK_SOCCLK, &now);
                      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:1016:39: warning:
implicit conversion from enumeration type 'PPCLK_e' to different
enumeration type 'enum smu_clk_type' [-Wenum-conversion]
                ret = smu_get_current_clk_freq(smu, PPCLK_FCLK, &now);
                      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:1031:39: warning:
implicit conversion from enumeration type 'PPCLK_e' to different
enumeration type 'enum smu_clk_type' [-Wenum-conversion]
                ret = smu_get_current_clk_freq(smu, PPCLK_DCEFCLK, &now);
                      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~

The values are mapped one to one in vega20_get_smu_clk_index so just use
the proper enums here.

Fixes: 0967610142 ("drm/amd/powerplay: support sysfs to get socclk, fclk, dcefclk")
Link: https://github.com/ClangBuiltLinux/linux/issues/587
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16 14:49:57 -05:00
Kenneth Feng
597292eb73 drm/amd/powerplay: enable fw ctf,apcc dfll and gfx ss
enable fw ctf, apcc dfll and gfx ss on navi10.
fw ctf: when the fw ctf is triggered, the gfx and soc power domain
are shut down. fan speed is boosted to the maximum.
gfx ss: hardware feature, sanity check has been done.
apcc dfll: can check the scoreboard in smu fw to confirm if it's enabled.
no need to do further check since the gfx hardware control the frequency once
a pcc signal comes.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16 14:49:57 -05:00
Fuqian Huang
5db7b0d290 drm/amdgpu: remove memset after kzalloc
kzalloc has already zeroed the memory during the allocation.
So memset is unneeded.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16 13:09:05 -05:00
Kevin Wang
54728170e0 drm/amd/powerplay: add helper of smu_clk_dpm_is_enabled for smu
v2: change function name to smu_clk_dpm_is_enabled.
add this helper function to check dpm clk feature is enabled.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16 13:08:23 -05:00
Kevin Wang
8e33376b76 drm/amd/powerplay: fix save dpm level error for smu
the save dpm level should be save previous dpm profile level,
should not modified by get dpm level function.
eg: default auto
1. auto -> standard ==> dpm_level = standard, save_dpm = auto.
2. standard -> auto ==> dpm_level = auto, save_dpm = standard.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16 13:08:12 -05:00
Kevin Wang
42b3aa9a5b drm/amd/powerplay: avoid double check feature enabled
the unforce_dpm_levels doesn't need to check feature enablement.
because the smu_get_dpm_freq_range function has check feature logic.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16 13:08:01 -05:00
Kevin Wang
75728f512e drm/amd/powerplay: add standard profile dpm support for smu
1. the standard dpm is not support before.
2. use auto profile to adapt standard profile.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16 13:03:10 -05:00
Kevin Wang
eaf963b5c1 drm/amd/powerplay: add socclk profile dpm support.
1.miss socclk profile support when bringup.
2.add feature check for socclk.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16 13:03:03 -05:00