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drm/amdgpu/powerplay: add set_mp1_state for vega10
This sets the SMU into the proper state for various operations (shutdown, unload, GPU reset, etc.). Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -5219,6 +5219,30 @@ static int vega10_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
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return 0;
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}
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static int vega10_set_mp1_state(struct pp_hwmgr *hwmgr,
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enum pp_mp1_state mp1_state)
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{
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uint16_t msg;
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int ret;
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switch (mp1_state) {
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case PP_MP1_STATE_UNLOAD:
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msg = PPSMC_MSG_PrepareMp1ForUnload;
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break;
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case PP_MP1_STATE_SHUTDOWN:
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case PP_MP1_STATE_RESET:
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case PP_MP1_STATE_NONE:
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default:
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return 0;
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}
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PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, msg)) == 0,
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"[PrepareMp1] Failed!",
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return ret);
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return 0;
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}
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static int vega10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
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PHM_PerformanceLevelDesignation designation, uint32_t index,
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PHM_PerformanceLevel *level)
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@ -5308,6 +5332,7 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
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.enable_mgpu_fan_boost = vega10_enable_mgpu_fan_boost,
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.get_ppfeature_status = vega10_get_ppfeature_status,
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.set_ppfeature_status = vega10_set_ppfeature_status,
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.set_mp1_state = vega10_set_mp1_state,
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};
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int vega10_hwmgr_init(struct pp_hwmgr *hwmgr)
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