Commit Graph

60233 Commits

Author SHA1 Message Date
Oleksij Rempel
3ce705650d ARM: dts: imx6dl-riotboard: properly define rgmii PHY
The Atheros AR8035 PHY can be autodetected but can't use interrupt
support provided on this board. Define MDIO bus and the PHY node to make
it work properly.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:47:03 +08:00
Lucas Stach
ab56990713 ARM: dts: imx51-zii-rdu1: set name prefix for TPA6130A2
Set a sound name prefix for the HPA, as otherwise the sound controls
naming will clash with the controls of the DAC.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:44:53 +08:00
Lucas Stach
49b027156b ARM: dts: imx6: RDU2: assign video PLL as input to LDB
Currently we don't ensure that the LDB is clocked from the video PLL
and relied on the bootloader to do the correct setup. This isn't always
true, in which case we would run with a vastly different video clock
than the desired one. Fix this by assigning the proper parent to the
LDB.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:44:09 +08:00
Igor Opaniuk
47d1825a6a ARM: dts: vf: toradex: SPDX tags and copyright cleanup
1. Replace boiler plate licenses texts with the SPDX license
identifiers in Toradex Vybrid-based SoM device trees.
2. As X11 is identical to the MIT License, but with an extra sentence
that prohibits using the copyright holders' names for advertising or
promotional purposes without written permission, use MIT license instead
of X11 ('s/X11/MIT/g').
3. Replace "Toradex AG" with "Toradex" in the Copyright notice.
4. Use GPL2.0+ instead of GPL2.0, as it's used now by default for all
new DTS files.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:26:36 +08:00
Igor Opaniuk
9ceef851b0 ARM: dts: imx7: toradex: use SPDX-License-Identifier
1. Replace boiler plate licenses texts with the SPDX license
identifiers in Toradex i.MX7-based SoM device trees.
2. As X11 is identical to the MIT License, but with an extra sentence
that prohibits using the copyright holders' names for advertising or
promotional purposes without written permission, use MIT license instead
of X11 ('s/X11/MIT/g').
3. Replace "Toradex AG" with "Toradex" in the Copyright notice.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:26:28 +08:00
Igor Opaniuk
bb42a8bf2e ARM: dts: imx6: toradex: use SPDX-License-Identifier
1. Replace boiler plate licenses texts with the SPDX license
identifiers in Toradex iMX6-based SoM device trees.
2. As X11 is identical to the MIT License, but with an extra sentence
that prohibits using the copyright holders' names for advertising or
promotional purposes without written permission, use MIT license instead
of X11 ('s/X11/MIT/g').
3. Replace "Toradex AG" with "Toradex" in the Copyright notice.
4. Use GPL2.0+ instead of GPL2.0, as it's used now by default for all
new DTS files from Toradex.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 10:03:01 +08:00
Philipp Zabel
288b9e6f75 ARM: dts: imx51: add capture-subsystem device
Add IPU CSI ports and capture-subsystem device so the capture subsystem
part of the IPUv3EX can be used with the staging imx-media driver.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:41:15 +08:00
Peng Fan
f5d35d87ef ARM: dts: imx: add nvmem property for cpu0
Add nvmem related property for cpu0, then nvmem API could be used
to read cpu speed grading to avoid directly read OCOTP registers
mapped which could not handle defer probe.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:18:29 +08:00
Fabio Estevam
98670a0bb0 ARM: dts: imx6qdl: Add imx6qdl-pico support
Add support for all the imx6qdl-pico variants.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:07:31 +08:00
Fabio Estevam
47246fafef ARM: dts: imx6ul-pico: Add support for the dwarf baseboard
Add support for the imx6ul pico board with dwarf baseboard combination.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:07:28 +08:00
Fabio Estevam
6418fd9241 ARM: dts: imx7d-pico: Add support for the nymph baseboard
Add support for the imx7d pico board with nymph baseboard combination.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:07:26 +08:00
Fabio Estevam
8b646cfb84 ARM: dts: imx7d-pico: Add support for the dwarf baseboard
Add support for the imx7d pico board with dwarf baseboard combination.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:07:15 +08:00
Michael Heimpold
e4fdac5def ARM: dts: imx23: introduce mmc0_sck_cfg
The Olimex Olinuxino board has a user led connected to SSP1_DETECT.
But since this pin is listed in mmc0_pins_fixup, it is already claimed
by MMC driver and this results in this error during boot:

[    1.390000] imx23-pinctrl 80018000.pinctrl: pin SSP1_DETECT already
  requested by 80010000.spi; cannot claim for leds
[    1.400000] imx23-pinctrl 80018000.pinctrl: pin-65 (leds) status -22
[    1.410000] imx23-pinctrl 80018000.pinctrl: could not request pin 65
   (SSP1_DETECT) from group led_gpio2_1.0  on device 80018000.pinctrl
[    1.420000] leds-gpio leds: Error applying setting, reverse things back
[    1.430000] leds-gpio: probe of leds failed with error -22

This fix it, introduce mmc0_sck_cfg and switch the Olinuxino board to it.

Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 08:49:55 +08:00
Tao Ren
df8ae98d0b ARM: dts: aspeed-g4: add vhub port and endpoint properties
Add "aspeed,vhub-downstream-ports" and "aspeed,vhub-generic-endpoints"
properties to describe supported number of vhub ports and endpoints.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-03-15 12:11:56 +02:00
Tao Ren
a1256487fd ARM: dts: aspeed-g5: add vhub port and endpoint properties
Add "aspeed,vhub-downstream-ports" and "aspeed,vhub-generic-endpoints"
properties to describe supported number of vhub ports and endpoints.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-03-15 12:11:53 +02:00
Tao Ren
3f796460ed ARM: dts: aspeed-g6: add usb functions
Add USB components and according pin groups in aspeed-g6 dtsi.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-03-15 12:11:49 +02:00
Vincenzo Frascino
afb80cf1e6 arm: mach-dove: Mark dove_io_desc as __maybe_unused
Without this, we get the warnings below when CONFIG_MMU is disabled:

linux/arch/arm/mach-dove/common.c:51:24: warning: ‘dove_io_desc’ defined
but not used [-Wunused-variable]
static struct map_desc dove_io_desc[] __initdata = {
                       ^~~~~~~~~~~~

Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Gregory Clement <gregory.clement@bootlin.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-03-13 21:44:50 +01:00
afzal mohammed
37b146e3f2 ARM: orion: replace setup_irq() by request_irq()
request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.

Per tglx[1], setup_irq() existed in olden days when allocators were not
ready by the time early interrupts were initialized.

Hence replace setup_irq() by request_irq().

[1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos

Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-03-13 21:37:15 +01:00
Erwan Le Ray
62c1594d38 ARM: debug: stm32: add UART early console support for STM32MP1
Add support of early console for STM32MP1. Default UART instance is UART4,
but other UART instances can be configured by setting physical and virtual
base addresses in menuconfig.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:05:07 +01:00
Erwan Le Ray
33cab8954a ARM: debug: stm32: add UART early console support for STM32H7
Add support of early console for STM32H7. Default UART instance is USART1,
but other UART instances can be configured by setting physical and virtual
base addresses in menuconfig.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:05:07 +01:00
Erwan Le Ray
13f71fa885 ARM: debug: stm32: add UART early console configuration for STM32F7
Early console is hardcoded on USART1 in current implementation.
With this patch, default UART instance is USART1, but other UART instances
can be configured by setting physical and virtual base addresses in
menuconfig.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:05:07 +01:00
Erwan Le Ray
79d5cfd19d ARM: debug: stm32: add UART early console configuration for STM32F4
Early console is hardcoded on USART1 in current implementation.
With this patch, default UART instance is USART1, but other UART instances
can be configured by setting physical and virtual base addresses in
menuconfig.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:05:07 +01:00
Yann Gautier
431c89e6f3 ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards
On those boards, as stated in schematics files, the regulator used for IOs
is VDD. It was wrongly set to v3v3.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Yann Gautier
79e9650538 ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards
On STM32MP1 DK1, DK2, ED1 and EV1 boards, there is only a micro SD socket.
This is also the case on Avenger board.
They don't support the Write Protect pin.
The disable-wp is then added in the SD-cards sdmmc1 nodes.
This avoids executing some code and a warning during driver probe.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Yann Gautier
877db62ea5 ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards
The broken-cd properties are replaced with cd-gpios, with the correct
GPIO to detect the card insertion. The GPIO lines require a pull-up.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Benjamin Gaignard
7519e95ba5 ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards
Remove unused properties from stpmic node.
The issues have been detected by running dtbs_check.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Benjamin Gaignard
f68e2dbc59 ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1
Rename stmfx joystick pins names according to yaml description.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Ahmad Fatoum
d6210da4f8 ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x
All of the STM32MP151[1], STM32MP153[2] and STM32MP157[3] have their
Cortex-A7 cores running at 650 MHz.

Add the clock-frequency property to CPU nodes to avoid warnings about
them missing.

[1]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp151.html
[2]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp153.html
[3]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Alain Volmat
b65b6fc569 ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
Add the wakeup-source property in all i2c nodes of
the SoC stm32mp157c so that those I2C controllers can become
wakeup-source.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 16:11:12 +01:00
Alain Volmat
1c1cf5996c ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp157c-ed1 board.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 16:11:12 +01:00
Roger Quadros
cfb5d65f25 ARM: dts: dra7: Add bus_dma_limit for L3 bus
The L3 interconnect's memory map is from 0x0 to
0xffffffff. Out of this, System memory (SDRAM) can be
accessed from 0x80000000 to 0xffffffff (2GB)

DRA7 does support 4GB of SDRAM but upper 2GB can only be
accessed by the MPU subsystem.

Add the dma-ranges property to reflect the physical address limit
of the L3 bus.

Issues ere observed only with SATA on DRA7-EVM with 4GB RAM
and CONFIG_ARM_LPAE enabled. This is because the controller
supports 64-bit DMA and its driver sets the dma_mask to 64-bit
thus resulting in DMA accesses beyond L3 limit of 2G.

Setting the correct bus_dma_limit fixes the issue.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Cc: stable@kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-13 07:40:55 -07:00
Linus Walleij
2118c8fd98 ARM: dts: Add devicetree for Samsung GT-S7710
The Samsung GT-S7710 also known as XCover 2 or Skomer is a
Ux500-based mobile phone. In the source code release from
Samsung's open source site it is referred to as "Skomer".

Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200307193627.4092-1-linus.walleij@linaro.org
[Typographic fixups when applying]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-13 14:06:51 +01:00
Alain Volmat
bef15fc0fa ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
Add the sleep state pinctrl entry for the i2c2 and i2c5 nodes
of the stm32mp157c-ev1 board.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 13:00:16 +01:00
Alain Volmat
b7fc0a87b9 ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp15xx-dkx.dtsi

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 13:00:16 +01:00
Alain Volmat
a5e5576552 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards
On DK boards, all I2C4 bus slaves supports I2C Fast Mode hence setting
the bus frequency to 400 KHz.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 12:57:43 +01:00
Alain Volmat
8bc631b650 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1
On this board, the I2C4 bus has only a single slave (pmic) which
supports I2C Fast Mode hence setting bus frequency to 400 KHz.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 12:47:21 +01:00
Dmitry Osipenko
14e086baca cpuidle: tegra: Squash Tegra114 driver into the common driver
Tegra20/30/114/124 SoCs have common idling states, thus there is no much
point in having separate drivers for a similar hardware. This patch moves
Tegra114/124 arch/ drivers into the common driver without any functional
changes. The CC6 state is kept disabled on Tegra114/124 because the core
Tegra PM code needs some more work in order to support that state.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:32:01 +01:00
Dmitry Osipenko
19461a499c cpuidle: tegra: Squash Tegra30 driver into the common driver
Tegra20 and Terga30 SoCs have common C1 and CC6 idling states and thus
share the same code paths, there is no point in having separate drivers
for a similar hardware. This patch merely moves functionality of the old
driver into the new, although the CC6 state is kept disabled for now since
old driver had a rudimentary support for this state (allowing to enter
into CC6 only when secondary CPUs are put offline), while new driver can
provide a full-featured support. The new feature will be enabled by
another patch.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:32:01 +01:00
Dmitry Osipenko
860fbde438 cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
The driver's code is refactored in a way that will make it easy to
support Tegra30/114/124 SoCs by this unified driver later on. The
current functionality is equal to the old Tegra20 driver, only the
code's structure changed a tad. This is also a proper platform driver
now.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:31:58 +01:00
Sowjanya Komatineni
bdb2c52a6e ARM: tegra: Update sound node clocks in device tree
clk_out_1, clk_out_2, and clk_out_3 are part of Tegra PMC block but were
previously erroneously provided by the clock and reset controller.

clk_out_1 is dedicated for audio mclk on Tegra30 through Tegra210.

This patch updates device tree sound node to use clk_out_1 from the PMC
provider as mclk and uses assigned-clock properties to specify clock
parents for clk_out_1 and extern1.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:25:44 +01:00
Sowjanya Komatineni
86614b5d6d ARM: tegra: Add clock-cells property to PMC
Tegra PMC has clk_out_1, clk_out_2, clk_out_3, and blink clock.

These clocks were erroneously provided by the clock and reset controller
and are now provided by the PMC instead because that's where the primary
controls are.

This patch adds #clock-cells property with 1 clock specifier to the
Tegra PMC node in device tree.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:25:43 +01:00
Nagarjuna Kristam
24d43a30e7 ARM: tegra: Remove USB 2-0 port from Jetson TK1 padctl
On Jetson TK1 USB 2-0 port is controlled by phy-tegra-usb driver
rather than padctl driver. Remove the entry for the same.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:25:43 +01:00
Dmitry Osipenko
650a941c34 ARM: tegra: cpuidle: Remove unnecessary memory barrier
There is no good justification for smp_rmb() after returning from LP2
because there are no memory operations that require SMP synchronization.
Thus remove the confusing barrier.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:23:10 +01:00
Dmitry Osipenko
f0c69bdfb0 ARM: tegra: cpuidle: Make abort_flag atomic
Replace memory accessors with atomic API just to make code consistent
with the abort_barrier. The new variant may be even more correct now
since atomic_read() will prevent compiler from generating wrong things
like carrying abort_flag value in a register instead of re-fetching it
from memory.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:23:09 +01:00
Dmitry Osipenko
51da5f1cd8 ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
It is possible that something may go wrong with the secondary CPU, in
that case it is much nicer to get a dump of the flow-controller state
before hanging machine.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:23:09 +01:00
Dmitry Osipenko
7ed50dd5dd ARM: tegra: Make outer_disable() open-coded
The outer_disable() of Tegra's suspend code is open-coded now since
that helper produces spurious warning message about secondary CPUs being
online when CPU enters into LP2 from cpuidle. The secondaries are actually
halted by the cpuidle driver on entering into LP2 idle-state, but the
online status is not touched by the cpuidle. This fixes a storm of
warnings once LP2 idling state is enabled on Tegra30. The outer_disable()
helper has sanity checks for interrupts and secondary CPUs being disabled
and we are pretty confident about the interrupts state during of CPU
idling / system suspend. The rail-off status check is added in this patch
as equivalent for the "num_online_cpus() > 1".

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:23:08 +01:00
Dmitry Osipenko
1f3e18ec95 ARM: tegra: Rename some of the newly exposed PM functions
Rename some of the recently exposed PM functions, prefixing them with
"tegra_pm_" in order to make the naming of the PM functions consistent.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:23:08 +01:00
Dmitry Osipenko
7741868f38 ARM: tegra: Expose PM functions required for new cpuidle driver
The upcoming unified CPUIDLE driver will be added to the drivers/cpuidle/
directory and it will require all these exposed Tegra PM-core functions.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
[treding@nvidia.com: fixup missing include rename]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 11:22:41 +01:00
Nick Hudson
6687c201fd ARM: bcm2835-rpi-zero-w: Add missing pinctrl name
Define the sdhci pinctrl state as "default" so it gets applied
correctly and to match all other RPis.

Fixes: 2c7c040c73 ("ARM: dts: bcm2835: Add Raspberry Pi Zero W")
Signed-off-by: Nick Hudson <skrll@netbsd.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-03-12 13:06:55 -07:00
Stefan Agner
91274f962e ARM: 8962/1: kexec: drop invalid assembly argument
The tst menomic has only a single #<const> argument in Thumb mode. There
is an ARM variant which allows to write #<const> as #<byte>, #<rot>
which probably is where the current syntax comes from.

It seems that binutils does not care about the additional parameter.
Clang however complains in Thumb2 mode:
arch/arm/kernel/relocate_kernel.S:28:12: error: too many operands for
instruction
 tst r3,#1,0
           ^

Drop the unnecessary parameter. This fixes building this file in Thumb2
mode with the Clang integrated assembler.

Link: https://github.com/ClangBuiltLinux/linux/issues/770

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-03-12 11:29:02 +00:00
Dmitry Osipenko
224c663205 ARM: tegra: Enable Tegra cpuidle driver in tegra_defconfig
The Tegra CPU Idle driver was moved out into driver/cpuidle/ directory and
it is now a proper platform driver.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 11:05:00 +01:00
Dmitry Osipenko
742d76ef0e ARM: multi_v7_defconfig: Enable Tegra cpuidle driver
The Tegra CPU Idle driver was moved out into driver/cpuidle/ directory and
it is now a proper platform driver.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 11:04:41 +01:00
Dmitry Osipenko
891e1286c1 ARM: tegra: Propagate error from tegra_idle_lp2_last()
Technically cpu_suspend() may fail and it's never good to lose information
about failure. For example things like cpuidle core could correctly sample
idling time in the case of failure.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:54:05 +01:00
Dmitry Osipenko
f5619492c8 ARM: tegra: Change tegra_set_cpu_in_lp2() type to void
The Tegra30 CPUIDLE driver has intention to check whether primary CPU was
the last CPU that entered LP2 (CC6) idle-state, but that functionality
never got utilized because driver never supported the CC6 state for the
case where any secondary CPU is online. The new cpuidle driver will
properly support CC6 on Tegra30, including the case where secondary CPUs
are online, and that knowledge about what CPUs entered into CC6 won't be
needed at all because new driver will use different approach by making use
of the coupled idle-state and explicitly parking secondary CPUs before
entering into CC6. Thus this patch is just a minor cleanup change.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:53:52 +01:00
Dmitry Osipenko
d90bdb72bb ARM: tegra: Remove pen-locking from cpuidle-tegra20
Pen-locking is meant to block CPU0 if CPU1 wakes up during of entering
into LP2 because of some interrupt firing up, preventing unnecessary LP2
enter that will be resumed immediately. Apparently this case doesn't
happen often in practice, I checked how often it takes place and found
that after ~20 hours of browsing web, managing email, watching videos and
idling (15+ hours) there is only a dozen of early LP2 entering abortions
and they all happened while device was idling. Thus let's remove the
pen-locking and make LP2 entering uninterruptible, simplifying code quite
a lot. This will also become very handy for the upcoming unified cpuidle
driver, allowing to have a common LP2 code-path across of different
hardware generations.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:53:37 +01:00
Dmitry Osipenko
859a6f6ee1 ARM: tegra: Add tegra_pm_park_secondary_cpu()
This function resembles tegra_cpu_die() of the hotplug code, but
this variant is more suitable to be used for CPU PM because it's made
specifically to be used by cpu_suspend(). In short this function puts
secondary CPU offline, it will be used by the new CPUIDLE driver.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:53:18 +01:00
Dmitry Osipenko
df25e55488 ARM: tegra: Compile sleep-tegra20/30.S unconditionally
The sleep-tegra*.S provides functionality required for suspend/resume
and CPU hotplugging. The new unified CPUIDLE driver will support multiple
hardware generations starting from Terga20 and ending with Tegra124, the
driver will utilize functions that are provided by the assembly and thus
it is cleaner to compile that code without any build-dependencies in order
to avoid churning with #ifdef's.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:53:04 +01:00
Jernej Skrabec
dbf72a8c01 ARM: dts: sun8i: a83t: Add device node for rotation core
Allwinner A83T contains rotation core. Add a node for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-12 00:27:18 +08:00
Jernej Skrabec
da18032258 ARM: dts: sunxi: Fix DE2 clocks register range
As it can be seen from DE2 manual, clock range is 0x10000.

Fix it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Fixes: 73f122c827 ("ARM: dts: sun8i: a83t: Add display pipeline")
Fixes: 05a43a262d ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Fixes: 21b2992093 ("ARM: sun8i: v3s: add device nodes for DE2 display pipeline")
Fixes: d8c6f1f029 ("ARM: sun8i: h3/h5: add DE2 CCU device node for H3")
[wens@csie.org: added fixes tags]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-12 00:24:29 +08:00
Corentin Labbe
00cef5e404 ARM: dts: sun8i: a33: add the new SS compatible
Add the new A33 SS compatible to the crypto node.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-11 23:12:06 +08:00
Chen-Yu Tsai
d9b553b02e ARM: dts: sun8i: r40: Move SPI device nodes based on address order
When the SPI device nodes were added, they were added in the wrong
location in the device tree file. The device nodes should be sorted
by register address.

Move the devices node to their correct positions within the file.

Fixes: 554581b791 ("ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes")
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-11 22:49:40 +08:00
Chen-Yu Tsai
abe076fb0d ARM: dts: sun8i: r40: Fix register base address for SPI2 and SPI3
When the SPI device nodes were added, SPI2 and SPI3 had incorrect
register base addresses.

Fix the base address for both of them.

Fixes: 554581b791 ("ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes")
Reported-by: JuanEsf <juanesf91@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-11 22:47:58 +08:00
Chen-Yu Tsai
fe3a04824f ARM: dts: sun8i: r40: Move AHCI device node based on address order
When the AHCI device node was added, it was added in the wrong location
in the device tree file. The device nodes should be sorted by register
address.

Move the device node to before EHCI1, where it belongs.

Fixes: 41c64d3318 ("ARM: dts: sun8i: r40: add sata node")
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-03-11 22:45:58 +08:00
Marek Szyprowski
32a1671ff8 ARM: dts: exynos: Fix polarity of the LCD SPI bus on UniversalC210 board
Recent changes in the SPI core and the SPI-GPIO driver revealed that the
GPIO lines for the LD9040 LCD controller on the UniversalC210 board are
defined incorrectly. Fix the polarity for those lines to match the old
behavior and hardware requirements to fix LCD panel operation with
recent kernels.

Cc: <stable@vger.kernel.org> # 5.0.x
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-03-11 11:03:03 +01:00
Johan Jonker
0c1cb8b00c ARM: dts: add bus to rockchip amba nodenames
A test with the command below gives for example this error:

arch/arm/boot/dts/rk3188-bqedison2qc.dt.yaml: amba: $nodename:0:
'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

AMBA is a open standard for the connection and
management of functional blocks in a SoC.
It's compatible with 'simple-bus', so fix this error
by adding 'bus' to all Rockchip 'amba' nodes.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/
schemas/simple-bus.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200302153047.17101-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-11 10:30:43 +01:00
Johan Jonker
79f23601fc ARM: dts: rockchip: remove #dma-cells from dma client nodes for rv1108
When we combine spi-rockchip.yaml and
spi-controller.yaml and add 'additionalProperties: false'
it gives for example this error:

arch/arm/boot/dts/rv1108-evb.dt.yaml: spi@10270000:
'#dma-cells' does not match any of the regexes:
'^.*@[0-9a-f]+$', '^slave$'

'#dma-cells' are not used for dma clients, so remove them all.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/spi-rockchip.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200309134020.14935-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-11 10:08:48 +01:00
Johan Jonker
8a385eb572 ARM: dts: rockchip: fix rockchip,default-sample-phase property names
A test with the command below does not detect all errors
in combination with 'additionalProperties: false' and
allOf:
  - $ref: "synopsys-dw-mshc-common.yaml#"
allOf:
  - $ref: "mmc-controller.yaml#"

'additionalProperties' applies to all properties that are not
accounted-for by 'properties' or 'patternProperties' in
the immediate schema.

First when we combine rockchip-dw-mshc.yaml,
synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives
for example this error:

arch/arm/boot/dts/rk3036-evb.dt.yaml: mmc@1021c000:
'default-sample-phase' does not match any of the regexes:
'^.*@[0-9]+$', '^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|
uhs-(sdr(12|25|50|104)|ddr50))$', 'pinctrl-[0-9]+'

'default-sample-phase' is not a valid property name for mmc nodes.
Fix this error by renaming it to 'rockchip,default-sample-phase'.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200307134841.13803-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-11 10:06:49 +01:00
Johan Jonker
9cd568dc58 ARM: dts: rockchip: fix vqmmc-supply property name for rk3188-bqedison2qc
A test with the command below does not detect all errors
in combination with 'additionalProperties: false' and
allOf:
  - $ref: "synopsys-dw-mshc-common.yaml#"
allOf:
  - $ref: "mmc-controller.yaml#"

'additionalProperties' applies to all properties that are not
accounted-for by 'properties' or 'patternProperties' in
the immediate schema.

First when we combine rockchip-dw-mshc.yaml,
synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives
this error:

arch/arm/boot/dts/rk3188-bqedison2qc.dt.yaml: mmc@10218000:
'vmmcq-supply' does not match any of the regexes:
'^.*@[0-9]+$',
'^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|
uhs-(sdr(12|25|50|104)|ddr50))$',
'pinctrl-[0-9]+'

'vmmcq-supply' is not a valid property name for mmc nodes.
Fix this error by renaming it to 'vqmmc-supply'.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200307134841.13803-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-11 10:06:30 +01:00
Martin Kaiser
c2902fb04e ARM: dts: imx25-pinfunc: add config for kpp rows 4 to 7
i.MX25's Keypad Port (KPP) can be used with a key pad matrix of up to
8 x 8 keys. Add pin configurations for rows 4 to 7.

The new defines have been tested on an out-of-tree board.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:55:19 +08:00
Horia Geantă
6cef60ff17 ARM: dts: imx: align name for crypto node and child nodes
crypto node should use the "crypto" generic naming,
and not a specific one ("sahara", "dcp", "caam").

Child nodes of the crypto node for caam crypto engine
should use the "jr" name (without an index),
as indicated in the DT binding.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:53:01 +08:00
Marco Felsch
636b45b8ef ARM: dts: imx6: phycore-som: fix arm and soc minimum voltage
The current set minimum voltage of 730000µV seems to be wrong. I don't
know the document which specifies that but the imx6qdl datasheets says
that the minimum voltage should be 0.925V for VDD_ARM (LDO bypassed,
lowest opp) and 1.15V for VDD_SOC (LDO bypassed, lowest opp).

Fixes: ddec5d1c00 ("ARM: dts: imx6: Add initial support for phyCORE-i.MX 6 SOM")
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:28:33 +08:00
Tim Harvey
d2cf2f91ba ARM: dts: imx6qdl-gw5910: add CC1352 UART
The GW5910-C revision adds a TI CC1352 connected to IMX UART4

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:03:00 +08:00
Marian-Cristian Rotariu
99ae78f1fc ARM: dts: iwg22d-sodimm: Enable touchscreen
In one of the iWave-G22D development board variants, called Generic SODIMM
Development Platform, we have an LCD with touchscreen. The resistive touch
controller, STMPE811 is on the development board and is connected through
the i2c5 of the RZ-G1E.

Additionally, this controller should generate an interrupt to the CPU and
it is connected through GPIO4,4 to the GIC.

Touch was tested with one of our iW-RainboW-G22D-SODIMM RZ/G1E development
platforms.

More details on the iWave website:
https://www.iwavesystems.com/rz-g1e-sodimm-development-kit.html

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1583336650-25848-1-git-send-email-marian-cristian.rotariu.rb@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-03-11 09:01:09 +01:00
Marian-Cristian Rotariu
7f61dff1ed ARM: dts: iwg22d-sodimm: Enable LCD panel
On the Generic SODIMM Development Platform there is an RGB LCD panel
directly connected to the DU output. It uses the TPU0 as backlight, one
GPIO pull-up configuration for power enable, R[2:7], G[2:7], B[2:7],
VSYNC, HSYNC, DU0_DISP and, DU0_CLK as inputs.

There is no encoder between the DU and the panel, therefore the default
connector driver is used.

The two variants of the iW-G22D should be mutually exclusive, therefore
this patch also disables the RGB LCD display when the HDMI extension board
is used.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1583239490-8837-1-git-send-email-marian-cristian.rotariu.rb@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-03-11 09:01:09 +01:00
Russell King
b7dc7205b2 ARM: dts: imx6qdl-sr-som-ti: indicate powering off wifi is safe
We need to indicate that powering off the TI WiFi is safe, to avoid:

wl18xx_driver wl18xx.2.auto: Unbalanced pm_runtime_enable!
wl1271_sdio mmc0:0001:2: wl12xx_sdio_power_on: failed to get_sync(-13)

which prevents the WiFi being functional.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:46:01 +08:00
Marco Felsch
50f5b89a32 ARM: dts: imx6: phycore-som: add da9062 gpio support
The pmic is a mfd device and supports gpios. Those gpios are not routed
to the SoM baseboard pin header but they are connected to the i.MX6. We
need the GPIO's to configure the pmic to select between the
suspend/resume arm and soc voltages

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:37:13 +08:00
Marco Felsch
1f4e29d24b ARM: dts: imx6: phycore-som: explicit disable pmic watchdog during suspend
By default the phycore-som has support for two watchdog devices: 1st the
internal imx6 watchdog and 2nd the DA9062 PMIC watchdog. According [1]
the PMIC watchdog is used as boot watchdog. It is common to use this
watchdog during "system up" time too. Furthermore the PMIC watchdog can
be used to address ERR007117 since the phycore-som can be equipped with
NAND or eMMC storage.

The PMIC watchdog can be enabled/disabled by the PMIC itself if the PMIC
enters POWERDOWN mode or by the host. The PMIC powerdown mode can't be
used due to the PCB design. So the watchdog is still enabled during a
suspend which causes a system reset. We need to tell the driver to
disable the watchdog during a system suspend and to reenable it upon a
resume to fix this.

[1] https://git.pengutronix.de/cgit/barebox/tree/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi#n73

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:36:16 +08:00
Anson Huang
684720000a ARM: dts: imx: Make iomuxc node name generic
Node name should be generic, use "pinctrl" instead of "iomuxc"
for all i.MX6/7 SoCs.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:20:51 +08:00
Anson Huang
756931e058 ARM: imx: Drop unnecessary src_base check
src_base is already checked during src driver initialization, no
need to check its availability again when using it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:18:17 +08:00
Anson Huang
62d1c1df85 ARM: imx: Remove unnecessary blank lines
Remove unnecessary blank lines for cleanup.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:17:02 +08:00
André Draszik
135be16d35 ARM: dts: imx7s: add snvs clock to pwrkey
On i.MX7, the SNVS requires a clock. This is similar to the clock
bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled,
then SNVS doesn't work, and as such the pwrkey driver doesn't
work (i.e. hangs the kernel, as the clock isn't enabled).

Also see commit ec2a844ef7
("ARM: dts: imx7s: add snvs rtc clock")
for a similar fix.

Signed-off-by: André Draszik <git@andred.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 14:46:38 +08:00
Dave Airlie
d3bd37f587 Linux 5.6-rc5
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Merge v5.6-rc5 into drm-next

Requested my mripard for some misc patches that need this as a base.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2020-03-11 07:27:21 +10:00
Geert Uytterhoeven
824ca3a2cc ARM: bcm: Drop unneeded select of PCI_DOMAINS_GENERIC, HAVE_SMP, TIMER_OF
Support for Broadcom SoCs depends on ARCH_MULTI_V6_V7, and thus on
ARCH_MULTIPLATFORM, which selects PCI_DOMAINS_GENERIC and TIMER_OF.
Support for the various Broadcom IPROC architected SoCs depends on
ARCH_MULTI_V7, which selects HAVE_SMP.
Hence there is no need for the Broadcom-specific symbols to select any
of them.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-03-10 10:58:26 -07:00
Fabio Estevam
8cdff3241f ARM: dts: imx6sx-softing-vining-2000: Enable PCI support
Add PCI support.

Since this board has an active high PCI reset line, pass the
'reset-gpio-active-high' property.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-10 14:14:30 +08:00
Christian Gmeiner
1910ee13a1 ARM: multi_v7_defconfig: enable drm imx support
It will be useful to have it enabled for KernelCI boot and runtime
testing.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-10 11:27:09 +08:00
Kamel Bouhara
455fec938b ARM: dts: at91: sama5d2: add i2c gpio pinctrl
Add the i2c gpio pinctrls to support the i2c bus recovery

Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com>
[codrin.ciubotariu@microchip.com: removed gpio pull-ups]
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Link: https://lore.kernel.org/r/20200225155012.22764-4-codrin.ciubotariu@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-09 22:13:12 +01:00
Kamel Bouhara
8fb82f050c ARM: dts: at91: sama5d4: add i2c gpio pinctrl
Add the i2c gpio pinctrls so the i2c bus recovery option can be enabled

Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com>
[codrin.ciubotariu@microchip.com: removed gpio pull-ups]
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Link: https://lore.kernel.org/r/20200225155012.22764-3-codrin.ciubotariu@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-09 22:13:12 +01:00
Kamel Bouhara
a4bd8da893 ARM: dts: at91: sama5d3: add i2c gpio pinctrl
Add the i2c gpio pinctrls to support the i2c bus recovery

Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com>
[codrin.ciubotariu@microchip.com: removed gpio pull-ups]
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Link: https://lore.kernel.org/r/20200225155012.22764-2-codrin.ciubotariu@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-09 22:13:12 +01:00
Alexandre Belloni
761f6ed854 ARM: dts: at91: sama5d4: use correct rtc compatible
Use the sama5d4 specific compatible string for the RTC.

Link: https://lore.kernel.org/r/20191229204421.337612-9-alexandre.belloni@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-09 22:13:11 +01:00
Alexandre Belloni
bb50297665 ARM: dts: at91: sama5d2: use correct rtc compatible
Use the sama5d2 specific compatible string for the RTC.

Link: https://lore.kernel.org/r/20191229204421.337612-8-alexandre.belloni@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-09 22:13:11 +01:00
Eugen Hristev
4d8353bd0d ARM: dts: at91: sam9x60ek: enable watchdog node
Enable node for watchdog timer

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lore.kernel.org/r/1581408369-14469-2-git-send-email-eugen.hristev@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-09 22:13:11 +01:00
Eugen Hristev
278af80347 ARM: dts: at91: sam9x60: add watchdog node
Add node for watchdog timer.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lore.kernel.org/r/1581408369-14469-1-git-send-email-eugen.hristev@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-09 22:13:11 +01:00
Rob Herring
aec54ec0c8 ARM: dts: at91: Kill off "simple-panel" compatibles
"simple-panel" is a Linux driver and has never been an accepted upstream
compatible string, so remove it.

Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200117230845.25190-1-robh@kernel.org
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-09 22:13:07 +01:00
Nicolas Saenz Julienne
3d2cbb6448 ARM: dts: bcm2711: Move emmc2 into its own bus
Depending on bcm2711's revision its emmc2 controller might have
different DMA constraints. Raspberry Pi 4's firmware will take care of
updating those, but only if a certain alias is found in the device tree.
So, move emmc2 into its own bus, so as not to pollute other devices with
dma-ranges changes and create the emmc2bus alias.

Based in Phil ELwell's downstream implementation.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/20200304132437.20164-1-nsaenzjulienne@suse.de
2020-03-09 21:18:03 +01:00
Luca Weiss
3ae09e2608 ARM: qcom_defconfig: Enable QRTR
This option is useful on msm8974, so enable it.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20200214183111.50919-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-09 13:13:02 -07:00
Stefan Wahren
cd87c180b3 ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels
This adds the labels for all the SoC GPIOs on the Raspberry Pi 4.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/1581166975-22949-5-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
2020-03-09 21:05:37 +01:00
Marek Szyprowski
93d3ae352b ARM: bcm2835_defconfig: add support for Raspberry Pi4
Add drivers needed to boot Raspberry Pi4 board.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200217155506.5245-1-m.szyprowski@samsung.com
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
2020-03-09 20:36:30 +01:00
Arthur Demchenkov
0c5220a3c1 ARM: dts: N900: fix onenand timings
Commit a758f50f10 ("mtd: onenand: omap2: Configure driver from DT")
started using DT specified timings for GPMC, and as a result the
OneNAND stopped working on N900 as we had wrong values in the DT.
Fix by updating the values to bootloader timings that have been tested
to be working on Nokia N900 with OneNAND manufacturers: Samsung,
Numonyx.

Fixes: a758f50f10 ("mtd: onenand: omap2: Configure driver from DT")
Signed-off-by: Arthur Demchenkov <spinal.by@gmail.com>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-09 09:59:17 -07:00
Janusz Krzysztofik
241008ed0b mtd: rawnand: ams-delta: Push inversion handling to gpiolib
Let platforms take care of declaring correct GPIO pin polarity so we
can just ask a GPIO line to be asserted or deasserted and gpiolib deals
with the rest depending on how the platform is configured.

Inspired by similar changes to regulator drivers by Linus Walleij
<linus.walleij@linaro.org>, thanks!

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-7-jmkrzyszt@gmail.com
2020-03-09 14:51:01 +01:00
Janusz Krzysztofik
38c30b3c96 ARM: OMAP1: ams-delta: Provide board specific partition info
Now as the Amstrad Delta NAND driver supports fetching information on
MTD partitions from device platform data, add partition info to the
NAND device configuration.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-4-jmkrzyszt@gmail.com
2020-03-09 14:51:01 +01:00
Tony Lindgren
55be2f5033 ARM: OMAP2+: Handle errors for cpu_pm
We need to check for errors when calling cpu_pm_enter() and
cpu_cluster_pm_enter(). And we need to bail out on errors as
otherwise we can enter a deeper idle state when not desired.

I'm not aware of the lack of error handling causing issues yet,
but we need this at least for blocking deeper idle states when
a GPIO instance has pending interrupts.

Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20200304225433.37336-2-tony@atomide.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-09 10:24:01 +01:00
Xu Wang
cf8dcf2725 ARM: orion5x: ts78xx: Remove unneeded variable ret
Remove unneeded variable ret used to store return value,just return 0.

Signed-off-by: Xu Wang <vulab@iscas.ac.cn>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-03-08 12:42:07 +01:00
Geert Uytterhoeven
49d5b5683a ARM: orion5x: Drop unneeded select of PCI_DOMAINS_GENERIC
Support for Marvell Orion SoCs depends on ARCH_MULTI_V5, and thus on
ARCH_MULTIPLATFORM.
As the latter selects GENERIC_CLOCKEVENTS and USE_OF, there is no need
for ARCH_ORION5X and ARCH_ORION5X_DT to select any of them.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Gregory Clement <gregory.clement@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-03-08 12:25:43 +01:00
Ingo Molnar
6120681bdf Merge branch 'efi/urgent' into efi/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-03-08 09:57:58 +01:00
Tony Lindgren
5cf9ffe70c ARM: omap2plus_defconfig: Enable ext4 security for setcap
Enable ext4 security for setcap.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 13:28:36 -08:00
Tony Lindgren
104d56b3e3 ARM: OMAP2+: Drop legacy platform data for dra7 edma
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:04 -08:00
Tony Lindgren
b2fbe56c22 ARM: OMAP2+: Drop legacy platform data for am3 and am4 edma
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:04 -08:00
Tony Lindgren
4286b6741e ARM: dts: Configure interconnect target module for dra7 tptc1
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:03 -08:00
Tony Lindgren
103d264174 ARM: dts: Configure interconnect target module for dra7 tptc0
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:03 -08:00
Tony Lindgren
13149bb878 ARM: dts: Configure interconnect target module for dra7 tpcc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:03 -08:00
Tony Lindgren
45701c402f ARM: dts: Configure interconnect target module for am4 tptc2
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:02 -08:00
Tony Lindgren
de01821f27 ARM: dts: Configure interconnect target module for am4 tptc1
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:02 -08:00
Tony Lindgren
0ee89ca32d ARM: dts: Configure interconnect target module for am4 tptc0
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:02 -08:00
Tony Lindgren
cabc9d127c ARM: dts: Configure interconnect target module for am4 tpcc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:02 -08:00
Tony Lindgren
551e01ad62 ARM: dts: Configure interconnect target module for am3 tptc2
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:02 -08:00
Tony Lindgren
1e666cb360 ARM: dts: Configure interconnect target module for am3 tptc1
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:01 -08:00
Tony Lindgren
9c1562ea71 ARM: dts: Configure interconnect target module for am3 tptc0
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:01 -08:00
Tony Lindgren
ece275032f ARM: dts: Configure interconnect target module for am3 tpcc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-06 07:20:01 -08:00
Tony Lindgren
0d53cc8b33 Merge branch 'omap-for-v5.7/omap1' into omap-for-v5.7/soc 2020-03-06 07:17:10 -08:00
Thara Gopinath
8eab879c54 arm/topology: Populate arch_scale_thermal_pressure() for ARM platforms
Hook up topology_get_thermal_pressure to arch_scale_thermal_pressure thus
enabling scheduler to retrieve instantaneous thermal pressure of a CPU.

Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lkml.kernel.org/r/20200222005213.3873-6-thara.gopinath@linaro.org
2020-03-06 12:57:19 +01:00
Stefan Agner
7548bf8c17 crypto: arm/ghash-ce - define fpu before fpu registers are referenced
Building ARMv7 with Clang's integrated assembler leads to errors such
as:
arch/arm/crypto/ghash-ce-core.S:34:11: error: register name expected
 t3l .req d16
          ^

Since no FPU has selected yet Clang considers d16 not a valid register.
Moving the FPU directive on-top allows Clang to parse the registers and
allows to successfully build this file with Clang's integrated assembler.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-06 12:28:25 +11:00
Johan Jonker
17ec2394d5 ARM: dts: rockchip: add missing model properties
A test with the command below gives these errors:

arch/arm/boot/dts/rk3288-evb-act8846.dt.yaml: /: 'model'
is a required property
arch/arm/boot/dts/rk3288-evb-rk808.dt.yaml: /: 'model'
is a required property
arch/arm/boot/dts/rk3288-r89.dt.yaml: /: 'model'
is a required property

Fix this error by adding the missing model properties to
the involved dts files.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/
schemas/root-node.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200304074051.8742-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-05 22:33:49 +01:00
Sam Shih
5afc2b83ac ARM: dts: mediatek: add mt7629 pwm support
This adds pwm support for MT7629.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-03-04 19:02:31 +01:00
Olof Johansson
d4d89e25fc ARM: socfpga_defconfig: add back DEBUGFS
- Add back DEBUG_FS for socfpga_defconfig
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Merge tag 'socfpga_defconfig_fix_for_v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes

ARM: socfpga_defconfig: add back DEBUGFS
- Add back DEBUG_FS for socfpga_defconfig

* tag 'socfpga_defconfig_fix_for_v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga_defconfig: Add back DEBUG_FS

Link: https://lore.kernel.org/r/20200304101917.1243-1-dinguyen@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-03-04 08:51:55 -08:00
afzal mohammed
b75ca52177 ARM: OMAP: replace setup_irq() by request_irq()
request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.

Per tglx[1], setup_irq() existed in olden days when allocators were not
ready by the time early interrupts were initialized.

Hence replace setup_irq() by request_irq().

[1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos

Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:30:30 -08:00
Suman Anna
ecdeca6d96 ARM: dts: dra7: Add PRU-ICSS interconnect target-module nodes
The AM57xx family of SoCs contains two identical PRU-ICSS instances
that have a very unique SYSC register. The IPs do not have any
PRCM reset lines unlike those on AM33xx/AM437x SoCs. Add the PRUSS
interconnect target-module nodes with all the required properties.

Each of the PRUSS devices themselves shall be added as child nodes
to the corresponding interconnect node in the future. The PRU-ICSS
instances are only available on AM57xx family of SoCs and are not
supported on DRA7xx family of SoCs in general, so the target module
nodes are added in a separate dtsi file. This new dtsi file is
included in all the AM57xx SoC dtsi files, so the nodes are
automatically inherited and enabled on all AM57xx boards.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:16:34 -08:00
Suman Anna
44e66a5d9d ARM: dts: AM4372: Add the PRU-ICSS interconnect target-module node
The AM437x family of SoCs contains two dissimilar PRU-ICSS instances,
but leverage a common reset line and SYSCFG from the larger PRU-ICSS1
instance. This SYSC register has also very unique bit-fields. Both
the IPs require the PRCM reset to be deasserted to be able to access
any registers. Add a common PRUSS interconnect target-module with all
the required properties.

The PRUSS devices themselves shall be added as child nodes to this
interconnect node in the future. The PRU-ICSS instances are not
supported on AM4372 SoC though in the AM437x family, so the target
module node should be disabled in any derivative board files that
use this SoC.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:16:18 -08:00
Suman Anna
ce5ca149a6 ARM: dts: AM33xx-l4: Update PRUSS interconnect target-module node
The PRU-ICSS present on some AM33xx SoCs has a very unique SYSC
register. The IP also uses a hard-reset line, and requires this
PRCM reset to be deasserted to be able to access any registers.
Update the existing PRUSS interconnect target-module with all
the required properties.

The PRUSS device itself shall be added as a child node to this
interconnect node in the future. PRU-ICSS is not supported on
AM3351/AM3352/AM3354 SoCs though in the AM33xx family, so the
target module node should be disabled in derivative board files
that use any of these SoCs.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:15:54 -08:00
Tony Lindgren
a3e2a6c85c Merge branch 'omap-for-v5.7/accelerators' into omap-for-v5.7/ti-sysc-drop-pdata 2020-03-04 08:13:46 -08:00
Tony Lindgren
c760f610c9 ARM: OMAP2+: Drop legacy platform data for am437x DSS
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:45 -08:00
Tony Lindgren
6fa1a9863c ARM: OMAP2+: Drop legacy platform data for dra7 DSS
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:44 -08:00
Tony Lindgren
19da9c0ece ARM: OMAP2+: Drop legacy platform data for omap5 DSS
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:44 -08:00
Tony Lindgren
a2ebc75fa9 ARM: OMAP2+: Drop legacy platform data for omap4 dss
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:44 -08:00
Tony Lindgren
11ef2bfc60 ARM: dts: Configure interconnect target module for am437x rfbi
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:43 -08:00
Tony Lindgren
9fd8a854d1 ARM: dts: Configure interconnect target module for am437x dispc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty until the child
devices are probing with ti-sysc interconnect driver.

Note that we also fix a harmless typo for the node name, it's
dispc@400, not dispc@4000.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:43 -08:00
Tony Lindgren
3b6ff6bb5a ARM: dts: Move am437x dss to the interconnect target module in l4
On am437x, the display subsystem (DSS) is on l4. We already have
the interconnect target module for it, so let's just move dss
there.

To do that, we need to adjust the module addresses for the ranges,
and use the ranges already added earlier based on reading the l4
interconnect instance AP registers.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:43 -08:00
Tony Lindgren
c4f4728b03 ARM: dts: Configure interconnect target module for dra7 hdmi
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:42 -08:00
Tony Lindgren
9a95196c43 ARM: dts: Configure interconnect target module for dra7 dispc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty until the child
devices are probing with ti-sysc interconnect driver.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:42 -08:00
Tony Lindgren
a50371f2ef ARM: dts: Configure interconnect target module for dra7 dss
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty until the child
devices are probing with ti-sysc interconnect driver.

Initially let's just update the top level dss node to probe with ti-sysc
interconnect target module driver. The child nodes are still children
of dispc, only the node indentation changes for them now along with
using the reg range provided by top level dss.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:41 -08:00
Tony Lindgren
671ab615bd ARM: dts: Configure interconnect target module for omap5 hdmi
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:41 -08:00
Tony Lindgren
98e1a6a86a ARM: dts: Configure interconnect target module for omap5 dsi2
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:41 -08:00
Tony Lindgren
5a507162f0 ARM: dts: Configure interconnect target module for omap5 dsi1
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:40 -08:00
Tony Lindgren
b9a4e14953 ARM: dts: Configure interconnect target module for omap5 rfbi
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:40 -08:00
Tony Lindgren
2472a4e00a ARM: dts: Configure interconnect target module for omap5 dispc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty until the child
devices are probing with ti-sysc interconnect driver.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:40 -08:00
Tony Lindgren
715a5a9787 ARM: dts: Configure interconnect target module for omap5 dss
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty until the child
devices are probing with ti-sysc interconnect driver.

Initially let's just update the top level dss node to probe with ti-sysc
interconnect target module driver. The child nodes are still children
of dispc, only the node indentation changes for them now along with
using the reg range provided by top level dss.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:39 -08:00
Tony Lindgren
8f66156341 ARM: dts: Configure interconnect target module for omap4 hdmi
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

Note that we must disable smart idle modes for HDMI audio like we've
done with the legacy platform data. And HDMI needs both hdmi clock
and dss clock to operate.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:39 -08:00
Tony Lindgren
dc7578e99d ARM: dts: Configure interconnect target module for omap4 dsi2
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:39 -08:00
Tony Lindgren
0b98d51834 ARM: dts: Configure interconnect target module for omap4 dsi1
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:38 -08:00
Tony Lindgren
663de788d4 ARM: dts: Configure interconnect target module for omap4 venc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

We must now also configure sys_clk for reset to complete, the top
level module only keeps optional clocks enabled for it's own reset.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:38 -08:00
Tony Lindgren
3a97c4b9a1 ARM: dts: Configure interconnect target module for omap4 rfbi
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.

We must now also configure sys_clk for reset to complete, the top
level module only keeps optional clocks enabled for it's own reset.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:37 -08:00
Tony Lindgren
4c8d1c8d62 ARM: dts: Configure interconnect target module for omap4 dispc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty until the child
devices are probing with ti-sysc interconnect driver.

We must now also configure sys_clk for reset to complete, the top
level module only keeps optional clocks enabled for it's own reset.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:37 -08:00
Tony Lindgren
63b34416aa ARM: dts: Configure interconnect target module for omap4 dss
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty until the child
devices are probing with ti-sysc interconnect driver.

The display subsystem (DSS) is in a 16MB interconnect target module
mapped to l4 and l3 buses. We are only using the l3 port as recommended
by the TRM. So there is no need to configure l4 ranges like we've done
for l4 ABE instance for example.

Initially let's just update the top level dss node to probe with ti-sysc
interconnect target module driver. The child nodes are still children
of dispc, only the node indentation changes for them now along with
using the reg range provided by top level dss.

Let's also add add a note about using only the l3 access without l4
as noted in the TRM.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 08:10:37 -08:00
Linus Walleij
bee7ff37ec ARM/arm64: dts: Rename SMB bus to just bus
Discussing the YAML validation schema with the DT maintainers
it came out that a bus named "smb@80000000" is not really
accepted, and the schema was written to name the static memory
bus just "bus@80000000".

This change is necessary for the schema to kick in and validate
these device trees, else the schema gets ignored.

Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-04 15:31:30 +01:00
Linus Walleij
b92d5a7d71 ARM: dts: RealView: Fix the name of the SoC node
Drop the surplus @0 on the soc node making the devicetree
conform strictly to the schema.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-04 15:30:40 +01:00
Linus Walleij
53a5927b65 ARM: dts: Versatile: Use syscon as node name for IB2
The IB2 syscon should not have any funny names, just call
it syscon@ as per the convention so the schema will apply
properly.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-04 15:30:38 +01:00
Rob Herring
40d39c1a7c ARM: dts: integratorap: Remove top level dma-ranges
'dma-ranges' at the top level doesn't make sense. 'dma-ranges' implies
there is a parent bus node with '#address-cells' and '#size-cells' which
is impossible here.

Likely this translation needs to be moved down to sub-nodes that need
it.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-04 15:30:35 +01:00
Dinh Nguyen
41bae0caf5 ARM: socfpga_defconfig: Add back DEBUG_FS
Commit 0e4a459f56 ("tracing: Remove unnecessary DEBUG_FS dependency")
removed select for DEBUG_FS but we still need it for development purposes.

Fixes: 0e4a459f56 ("tracing: Remove unnecessary DEBUG_FS dependency")
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2020-03-04 04:06:27 -06:00
Olof Johansson
820d15632e arm64: dts: agilex: fix gmac compatible
- The compatible for Agilex GMAC should be "altr,socfpga-stmmac-a10-s10"
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Merge tag 'socfpga_dts_fix_for_v5.6_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes

arm64: dts: agilex: fix gmac compatible
- The compatible for Agilex GMAC should be "altr,socfpga-stmmac-a10-s10"

* tag 'socfpga_dts_fix_for_v5.6_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: (578 commits)
  arm64: dts: socfpga: agilex: Fix gmac compatible
  Linux 5.6-rc4
  KVM: VMX: check descriptor table exits on instruction emulation
  ext4: potential crash on allocation error in ext4_alloc_flex_bg_array()
  macintosh: therm_windtunnel: fix regression when instantiating devices
  jbd2: fix data races at struct journal_head
  kvm: x86: Limit the number of "kvm: disabled by bios" messages
  KVM: x86: avoid useless copy of cpufreq policy
  KVM: allow disabling -Werror
  KVM: x86: allow compiling as non-module with W=1
  KVM: Pre-allocate 1 cpumask variable per cpu for both pv tlb and pv ipis
  KVM: Introduce pv check helpers
  KVM: let declaration of kvm_get_running_vcpus match implementation
  KVM: SVM: allocate AVIC data structures based on kvm_amd module parameter
  MAINTAINERS: Correct Cadence PCI driver path
  io_uring: fix 32-bit compatability with sendmsg/recvmsg
  net: dsa: mv88e6xxx: Fix masking of egress port
  mlxsw: pci: Wait longer before accessing the device after reset
  sfc: fix timestamp reconstruction at 16-bit rollover points
  vsock: fix potential deadlock in transport->release()
  ...

Link: https://lore.kernel.org/r/20200303153509.28248-1-dinguyen@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-03-03 16:40:56 -08:00
Tony Lindgren
b46b2b7ba6 ARM: dts: Fix dm814x Ethernet by changing to use rgmii-id mode
Commit cd28d1d6e5 ("net: phy: at803x: Disable phy delay for RGMII mode")
caused a regression for dm814x boards where NFSroot would no longer work.

Let's fix the issue by configuring "rgmii-id" mode as internal delays are
needed that is no longer the case with "rgmii" mode.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-03 13:25:47 -08:00
Olof Johansson
0b86b258e6 This pull request contains Broadcom ARM-based SoCs defconfig file(s)
fixes for v5.6, please pull the following:
 
 - Stefan restores CONFIG_DEBUG_FS from the bcm2835_defconfig which was
   accidentally removed
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Merge tag 'arm-soc/for-5.6/defconfig-fixes' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM-based SoCs defconfig file(s)
fixes for v5.6, please pull the following:

- Stefan restores CONFIG_DEBUG_FS from the bcm2835_defconfig which was
  accidentally removed

* tag 'arm-soc/for-5.6/defconfig-fixes' of https://github.com/Broadcom/stblinux:
  ARM: bcm2835_defconfig: Explicitly restore CONFIG_DEBUG_FS

Link: https://lore.kernel.org/r/20200302195043.14513-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-03-02 11:54:59 -08:00
Olof Johansson
14022b11d6 Amlogic fixes for v5.6-rc
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Merge tag 'amlogic-fixes' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/fixes

Amlogic fixes for v5.6-rc

* tag 'amlogic-fixes' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: dts: meson: fix gxm-khadas-vim2 wifi
  arm64: dts: meson-sm1-sei610: add missing interrupt-names
  ARM: meson: Drop unneeded select of COMMON_CLK

Link: https://lore.kernel.org/r/7hr1yc9cc1.fsf@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-03-02 10:15:12 -08:00
Stefan Wahren
1bba608084 ARM: bcm2835_defconfig: Explicitly restore CONFIG_DEBUG_FS
The commit 0e4a459f56 ("tracing: Remove unnecessary DEBUG_FS dependency")
accidentally dropped the DEBUG FS support in bcm2835_defconfig. So
restore the config as before the commit.

Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Fixes: 0e4a459f56 ("tracing: Remove unnecessary DEBUG_FS dependency")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-03-02 09:26:09 -08:00
Linus Torvalds
f853ed90e2 More bugfixes, including a few remaining "make W=1" issues such
as too large frame sizes on some configurations.  On the
 ARM side, the compiler was messing up shadow stacks between
 EL1 and EL2 code, which is easily fixed with __always_inline.
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM fixes from Paolo Bonzini:
 "More bugfixes, including a few remaining "make W=1" issues such as too
  large frame sizes on some configurations.

  On the ARM side, the compiler was messing up shadow stacks between EL1
  and EL2 code, which is easily fixed with __always_inline"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: VMX: check descriptor table exits on instruction emulation
  kvm: x86: Limit the number of "kvm: disabled by bios" messages
  KVM: x86: avoid useless copy of cpufreq policy
  KVM: allow disabling -Werror
  KVM: x86: allow compiling as non-module with W=1
  KVM: Pre-allocate 1 cpumask variable per cpu for both pv tlb and pv ipis
  KVM: Introduce pv check helpers
  KVM: let declaration of kvm_get_running_vcpus match implementation
  KVM: SVM: allocate AVIC data structures based on kvm_amd module parameter
  arm64: Ask the compiler to __always_inline functions used by KVM at HYP
  KVM: arm64: Define our own swab32() to avoid a uapi static inline
  KVM: arm64: Ask the compiler to __always_inline functions used at HYP
  kvm: arm/arm64: Fold VHE entry/exit work into kvm_vcpu_run_vhe()
  KVM: arm/arm64: Fix up includes for trace.h
2020-03-01 15:16:35 -06:00
Jagan Teki
385d567c13 ARM: dts: rockchip: Add vcc50_hdmi for rk3288-vyasa
Add vcc50_hdmi regulator for Vyasa RK3288 board.

VCC50_HDMI is the real name used for this regulator as
per the schematics.

This regulator used for HDMI connector by detecting the
cable via HDMI_EN gpio and input rails are sourced from
VSUS_5V regulator.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200123134641.30720-3-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-01 01:36:33 +01:00
Jagan Teki
b38a9a3f44 ARM: dts: rockchip: Fix ddc-i2c-bus for rk3288-vyasa
ddc-i2c-bus routed for HDMI is not i2c2 but i2c5 on
Vyasa RK3288 board.

Add support for fixing the same.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200123134641.30720-2-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-01 01:35:43 +01:00
Jagan Teki
8dd177410c ARM: dts: rockchip: Fix vcc10_lcd name and voltage for rk3288-vyasa
According to hardware schematics of Vyasa RK3288 the
actual name used for vcc10_lcd is vdd10_lcd.

regulator suspend voltage can rail upto 1.0V not 1.8V.

Fix the name and suspend voltage for vcc10_lcd regulator.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200123134641.30720-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-01 01:35:10 +01:00
Johan Jonker
2280f861cc ARM: dts: rockchip: add sram to bus_intmem nodename for rk3288
A test with the command below gives for example these errors:

arch/arm/boot/dts/rk3288-evb-act8846.dt.yaml:
bus_intmem@ff700000: $nodename:0: 'bus_intmem@ff700000'
does not match '^sram(@.*)?'
arch/arm/boot/dts/rk3288-evb-rk808.dt.yaml:
bus_intmem@ff700000: $nodename:0: 'bus_intmem@ff700000'
does not match '^sram(@.*)?'

'rockchip-pmu-sram.txt' inherit properties from 'sram.yaml'.
Fix this error by adding 'sram' to the bus_intmem nodename
in 'rk3288.dtsi'. But 'sram' is also a node name already in use.
To prevent confusion rename it to 'pmu_sram'.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200228155354.27206-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-01 00:48:42 +01:00
Johan Jonker
449f52e861 ARM: dts: rockchip: add sram to bus_intmem nodename for rk3036
A test with the command below gives these errors:

arch/arm/boot/dts/rk3036-evb.dt.yaml:
bus_intmem@10080000: $nodename:0: 'bus_intmem@10080000'
does not match '^sram(@.*)?'
arch/arm/boot/dts/rk3036-kylin.dt.yaml:
bus_intmem@10080000: $nodename:0: 'bus_intmem@10080000'
does not match '^sram(@.*)?'

Fix this error by adding sram to the bus_intmem nodename
in rk3036.dtsi.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200228155354.27206-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-01 00:48:38 +01:00
Johan Jonker
048e9a44dd ARM: dts: rockchip: add sram to bus_intmem nodename for rv1108
A test with the command below gives these errors:

arch/arm/boot/dts/rv1108-elgin-r1.dt.yaml:
bus_intmem@10080000: $nodename:0: 'bus_intmem@10080000'
does not match '^sram(@.*)?'
arch/arm/boot/dts/rv1108-evb.dt.yaml:
bus_intmem@10080000: $nodename:0: 'bus_intmem@10080000'
does not match '^sram(@.*)?'

Fix this error by adding sram to the bus_intmem nodename
in rv1108.dtsi.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200228155354.27206-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-01 00:48:34 +01:00
Johan Jonker
a0514bc167 ARM: dts: remove g-use-dma from rockchip usb nodes
A test with the command below gives these errors:

arch/arm/boot/dts/rv1108-elgin-r1.dt.yaml: usb@30180000:
'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/rv1108-evb.dt.yaml: usb@30180000:
'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/rk3228-evb.dt.yaml: usb@30040000:
'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/rk3229-evb.dt.yaml: usb@30040000:
'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/rk3229-xms6.dt.yaml: usb@30040000:
'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+'

'g-use-dma' is not a valid option in dwc2.yaml, so remove it
from all Rockchip dtsi files.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/dwc2.yaml

g-use-dma was deprecated in november 2016, see
https://patchwork.kernel.org/patch/9420553/

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200228113922.20266-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-01 00:46:13 +01:00
Olof Johansson
b6a79b417f This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.6, please pull the following:
 
 - Stefan adds missing Device Tree properties for the Raspberry Pi 3B and
   4 LEDs to have proper default configuration
 
 - Nicolas adds an alias for the PCIe root complex node that is looked up
   by the Raspberry Pi firmware for patching in specific properties
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Merge tag 'arm-soc/for-5.6/devicetree-fixes' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.6, please pull the following:

- Stefan adds missing Device Tree properties for the Raspberry Pi 3B and
  4 LEDs to have proper default configuration

- Nicolas adds an alias for the PCIe root complex node that is looked up
  by the Raspberry Pi firmware for patching in specific properties

* tag 'arm-soc/for-5.6/devicetree-fixes' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcm2711: Add pcie0 alias
  ARM: dts: bcm283x: Add missing properties to the PWR LED

Link: https://lore.kernel.org/r/20200228181144.15148-2-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-02-29 11:48:49 -08:00
Olof Johansson
27ad6129a2 Few fixes for omaps for v5.6-rc cycle
This series of changes contains few code fixes for issues
 recently discovered:
 
 - A build fix for ARMv6 only configs when CONFIG_HAVE_ARM_SMCCC is
   not set
 
 - A fix for ti-sysc quirk handling for 1-wire hdq reset
 
 And a handful of dts fixes that I had queued up and should
 have already sent earlier instead of waiting for the code
 fixes to get sorted out:
 
 - Fix naming of vsys_3v3 regulator for dra7-evm
 
 - Fix incorrect OPP node names for am437x-idk-evm
 
 - Fix IPU1 mux clock parent source for dra7
 
 - Add missing PWM property for dra7 timers 13 to 16
 
 - Add missing dma-ranges for dra7 PCIe nodes
 
 - Fix mmc3 max-frequency for dra76x
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Merge tag 'omap-for-v5.6/fixes-rc3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Few fixes for omaps for v5.6-rc cycle

This series of changes contains few code fixes for issues
recently discovered:

- A build fix for ARMv6 only configs when CONFIG_HAVE_ARM_SMCCC is
  not set

- A fix for ti-sysc quirk handling for 1-wire hdq reset

And a handful of dts fixes that I had queued up and should
have already sent earlier instead of waiting for the code
fixes to get sorted out:

- Fix naming of vsys_3v3 regulator for dra7-evm

- Fix incorrect OPP node names for am437x-idk-evm

- Fix IPU1 mux clock parent source for dra7

- Add missing PWM property for dra7 timers 13 to 16

- Add missing dma-ranges for dra7 PCIe nodes

- Fix mmc3 max-frequency for dra76x

* tag 'omap-for-v5.6/fixes-rc3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Fix compile if CONFIG_HAVE_ARM_SMCCC is not set
  arm: dts: dra76x: Fix mmc3 max-frequency
  ARM: dts: dra7: Add "dma-ranges" property to PCIe RC DT nodes
  bus: ti-sysc: Fix 1-wire reset quirk
  ARM: dts: dra7-l4: mark timer13-16 as pwm capable
  ARM: dts: dra7xx-clocks: Fixup IPU1 mux clock parent source
  ARM: dts: am437x-idk-evm: Fix incorrect OPP node names
  ARM: dts: dra7-evm: Rename evm_3v3 regulator to vsys_3v3

Link: https://lore.kernel.org/r/pull-1582903541-589933@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-02-29 11:47:44 -08:00
Geert Uytterhoeven
a469226d97 ARM: meson: Drop unneeded select of COMMON_CLK
Support for Amlogic Meson SoCs depends on ARCH_MULTI_V7, and thus on
ARCH_MULTIPLATFORM.
As the latter selects COMMON_CLK, there is no need for ARCH_MESON to
select COMMON_CLK.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: linux-amlogic@lists.infradead.org
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200121103722.1781-12-geert+renesas@glider.be
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-02-29 08:16:20 -08:00
Marek Szyprowski
604e8b79c8 ARM: dts: exynos: Fix G3D power domain supply on Arndale Octa boards
G3D power domain in Exynos5420 SoC is supplied from PVDD_G3DS_1V0 and
PVDD_G3D_1V0. Besides the main GPU MALI module it also contains the power
domain control logic and clocks. Turning the power supplies off causes
the power domain to fail to operate properly if GPU drivers are loaded as
modules. GPU should use PVDD_G3D_1V0 supply mainly to control the DVFS.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-02-29 15:40:12 +01:00
Marek Szyprowski
fbec0a1f77 ARM: dts: exynos: Fix G3D power domain supply on Odroid XU3/XU4/HC1 boards
G3D power domain in Exynos5422 SoC is supplied from VDD_G3D. Besides the
main GPU MALI module it also contains the power domain control logic and
clocks. Turning the VDD_G3D power supply off causes the power domain to
fail to operate properly and breaks for example system suspend/resume.
GPU should use VDD_G3D supply mainly to control the DVFS.

Fixes: 1a5a85c564 ("ARM: dts: exynos: Add Mali/GPU node on Exynos5420 and enable it on Odroid XU3/4")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-02-29 15:39:14 +01:00
Marek Szyprowski
182eb908b2 ARM: exynos_defconfig: Add more drivers for GalaxyS3/Trats2
Enable drivers for S5K6A3 and S5C73M3 camera sensors, AAT1290 flash LED,
Midas-TouchKey and BRCMFMAC SDIO-WIFI modules used on Samsung Galaxy S3
and Trats2 boards.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-02-29 15:22:08 +01:00
Ard Biesheuvel
0698fac4ac efi/arm: Clean EFI stub exit code from cache instead of avoiding it
The following commit:

  c7225494b ("efi/arm: Work around missing cache maintenance in decompressor handover")

modified the EFI handover code written in assembler to work around the
missing cache maintenance of the piece of code that is executed after the
MMU and caches are turned off.

Due to the fact that this sequence incorporates a subroutine call, cleaning
that code from the cache is not a matter of simply passing the start and end of
the currently running subroutine into cache_clean_flush(), which is why
instead, the code jumps across into the cleaned copy of the image.

However, this assumes that this copy is executable, and this means we
expect EFI_LOADER_DATA regions to be executable as well, which is not
a reasonable assumption to make, even if this is true for most UEFI
implementations today.

So change this back, and add a cache_clean_flush() call to cover the
remaining code in the subroutine, and any code it may execute in the
context of cache_off().

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: linux-efi@vger.kernel.org
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: David Hildenbrand <david@redhat.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://lore.kernel.org/r/20200228121408.9075-5-ardb@kernel.org
2020-02-29 10:16:57 +01:00
Masahiro Yamada
0d47370516 ARM: dts: uniphier: Add one more generic compatible string for I2C EEPROM
Commit 73f9de0c7f ("ARM: dts: uniphier: Add generic compatible string
for I2C EEPROM") did not touch this node.

Add the compatible string prefixed "atmel," so that this matches to the
OF table.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29 15:03:15 +09:00
Masahiro Yamada
bc350d1073 ARM: dts: uniphier: rename cache controller nodes to follow json-schema
Follow the standard nodename pattern
"^(cache-controller|cpu)(@[0-9a-f,]+)*$" defined in
schemas/cache-controller.yaml of dt-schema.

Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm dtbs_check' will show warnings like this:

  l2-cache@500c0000: $nodename:0: 'l2-cache@500c0000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29 15:00:55 +09:00
Masahiro Yamada
f215c5ef7c ARM: dts: uniphier: rename NAND node names to follow json-schema
Follow the standard nodename pattern "^nand-controller(@.*)?" defined
in Documentation/devicetree/bindings/mtd/nand-controller.yaml

Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm dtbs_check' will show warnings like this:

  nand@68000000: $nodename:0: 'nand@68000000' does not match '^nand-controller(@.*)?'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29 15:00:48 +09:00
Masahiro Yamada
a7142fe1b7 ARM: dts: uniphier: rename aidet node names to follow json-schema
Follow the standard nodename pattern "^interrupt-controller(@[0-9a-f,]+)*$"
defined in schemas/interrupt-controller.yaml of dt-schema.

Otherwise, after the dt-binding is converted to json-schema,
make ARCH=arm dtbs_check' will show warnings like this:

  aidet@5fc20000: $nodename:0: 'aidet@5fc20000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29 15:00:41 +09:00
Masahiro Yamada
7c74e90876 ARM: dts: uniphier: change SD/eMMC node names to follow json-schema
Follow the standard nodename pattern "^mmc(@.*)?$" defined in
Documentation/devicetree/bindings/mmc/mmc-controller.yaml

Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm dtbs_check' will show warnings like this:

  sdhc@5a000000: $nodename:0: 'sdhc@5a000000' does not match '^mmc(@.*)?$'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29 15:00:34 +09:00
Paolo Bonzini
e951445f4d KVM/arm fixes for 5.6, take #1
- Fix compilation on 32bit
 - Move  VHE guest entry/exit into the VHE-specific entry code
 - Make sure all functions called by the non-VHE HYP code is tagged as __always_inline
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Merge tag 'kvmarm-fixes-5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

KVM/arm fixes for 5.6, take #1

- Fix compilation on 32bit
- Move  VHE guest entry/exit into the VHE-specific entry code
- Make sure all functions called by the non-VHE HYP code is tagged as __always_inline
2020-02-28 11:50:06 +01:00
Nicolas Saenz Julienne
94f18b9b24 ARM: dts: bcm2711: Add pcie0 alias
Some bcm2711 revisions have different DMA constraints on the their PCIE
bus. The lower common denominator, being able to access the lower 3GB of
memory, is the default setting for now. Newer SoC revisions are able to
access the whole memory space.

Raspberry Pi 4's firmware is aware of this limitation and will correct
the PCIE's dma-ranges property if a pcie0 alias is available. So add
it.

Fixes: d5c8dc0d4c ("ARM: dts: bcm2711: Enable PCIe controller")
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-02-27 11:29:45 -08:00
Stefan Wahren
bff211bab3 ARM: dts: bcm283x: Add missing properties to the PWR LED
This adds the missing properties to the PWR LED for the RPi 3 & 4 boards,
which are already set for the other boards. Without them we will lose
the LED state after suspend.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-02-27 11:29:27 -08:00
Olof Johansson
f9a15f39e5 Fix AMDTEE memory leak in amdtee_open_session()
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Merge tag 'tee-amdtee-fix-for-5.6' of https://git.linaro.org/people/jens.wiklander/linux-tee into arm/fixes

Fix AMDTEE memory leak in amdtee_open_session()

* tag 'tee-amdtee-fix-for-5.6' of https://git.linaro.org/people/jens.wiklander/linux-tee: (344 commits)
  tee: amdtee: fix memory leak in amdtee_open_session()
  Linux 5.6-rc2
  ext4: improve explanation of a mount failure caused by a misconfigured kernel
  Input: cyapa - replace zero-length array with flexible-array member
  Input: tca6416-keypad - replace zero-length array with flexible-array member
  Input: gpio_keys_polled - replace zero-length array with flexible-array member
  IB/mlx5: Use div64_u64 for num_var_hw_entries calculation
  nvme: fix the parameter order for nvme_get_log in nvme_get_fw_slot_info
  nvme/pci: move cqe check after device shutdown
  nvme: prevent warning triggered by nvme_stop_keep_alive
  nvme/tcp: fix bug on double requeue when send fails
  cifs: make sure we do not overflow the max EA buffer size
  cifs: enable change notification for SMB2.1 dialect
  netdevice.h: fix all kernel-doc and Sphinx warnings
  net: dsa: tag_ar9331: Make sure there is headroom for tag
  net: dsa: tag_qca: Make sure there is headroom for tag
  net, ip6_tunnel: enhance tunnel locate with link check
  net/smc: no peer ID in CLC decline for SMCD
  net/smc: transfer fasync_list in case of fallback
  net: hns3: fix a copying IPv6 address error in hclge_fd_get_flow_tuples()
  ...

Link: https://lore.kernel.org/r/20200227165205.GA7926@jade
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-02-27 10:07:49 -08:00
Olof Johansson
c689300b9c Renesas Fixes for v5.6
- Restore R-Car M3-W support,
   - Drop deprecated compatible value to ease DT binding conversion to
     json-schema.
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Merge tag 'renesas-fixes-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes

Renesas Fixes for v5.6

  - Restore R-Car M3-W support,
  - Drop deprecated compatible value to ease DT binding conversion to
    json-schema.

* tag 'renesas-fixes-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: dts: r8a7779: Remove deprecated "renesas, rcar-sata" compatible value
  arm64: defconfig: Replace ARCH_R8A7796 by ARCH_R8A77960

Link: https://lore.kernel.org/r/20200226105236.18368-1-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-02-27 10:00:03 -08:00
Suman Anna
84a43fddbf ARM: OMAP4: hwmod_data: Remove OMAP4 IPU hwmod data
The OMAP4 IPU hwmod is currently not used in DT, and the new DTS
node shall be added as per the new OMAP remoteproc bindings with
the underneath MMU device relying on the ti-sysc infrastructure.
Drop the legacy hwmod data for OMAP4 IPU as this will not be used
going forward.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27 09:52:37 -08:00
Suman Anna
014bb57b6d ARM: OMAP2+: Drop legacy platform data for OMAP4 DSP
The OMAP4 DSP hwmod is used in DT, but the DT node is not
probing any real driver. The DSP device-tree node shall be
updated as per the new OMAP remoteproc bindings with the
underneath MMU device relying on the ti-sysc infrastructure.

Drop the legacy hwmod data for the DSP device along with the
custom ti,hwmods property. They have to be dropped together
since the early platform data init code is based on the custom
ti,hwmods property.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27 09:52:32 -08:00
Suman Anna
bce9672909 ARM: OMAP2+: Drop hwmod data for am3 and am4 PRUSS
The PRUSS hwmod is currently not used in DT, and the new DTS
nodes shall be added using the ti-sysc infrastructure and the
omap-prm reset driver. Drop the legacy hwmod data for the
PRUSS module on both the AM33xx and AM437x family of SoCs.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27 09:52:27 -08:00
Dave Gerlach
89a7b191fc ARM: dts: am4372: Add idle_states for cpuidle
Add idle_states table for CPU on am437x. Currently just add C1 state
which gates the MPU clock domain.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27 09:33:33 -08:00
Dave Gerlach
c3e6fccafd ARM: dts: am33xx: Add idle_states for cpuidle
Add idle_states table for CPU on am335x. Currently just add C1 state
which gates the MPU clock domain.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27 09:33:29 -08:00
Dave Gerlach
73321b5f4d ARM: omap2plus_defconfig: Add CONFIG_ARM_CPUIDLE
Add CONFIG_ARM_CPUIDLE and supporting CONFIG_DT_IDLE_STATES as am335x
and am437x will make use of these drivers.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27 09:27:30 -08:00
Dave Gerlach
65880ab160 ARM: OMAP2+: pm33xx-core: Extend platform_data ops for cpuidle
In order for am335x and am437x to properly enter deeper c-states in
cpuidle they must always call into the sleep33/43xx suspend code and
also sometimes invoke the wkup_m3_ipc driver. These are both controlled
by the pm33xx module so we must provide a method for the platform code
to call back into the module when it is available as the core cpuidle
ops that are invoked by the cpuidle-arm driver must remain as built in.

Extend the init platform op to take an idle function as an argument so
that we can use this to call into the pm33xx module for c-states that
need it. Also add a deinit op so we can unregister this idle function
from the PM core when the pm33xx module gets unloaded.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27 09:27:27 -08:00
Dave Gerlach
06ee7a950b ARM: OMAP2+: pm33xx-core: Add cpuidle_ops for am335x/am437x
am335x and am437x can now make use of the generic cpuidle-arm driver.
This requires that we define init and suspend ops to be passed set as
the cpuidle ops for the SoC. These ops are invoked directly at the last
stage of the cpuidle-arm driver in order to allow low level platform
code to run and bring the CPU the rest of the way into it's desired idle
state. It is required that the CPUIDLE_METHOD_OF_DECLARE be called from
code that is built in so define these ops in pm33xx-core where the
always built-in portion of the PM code for these SoCs lives.

Additionally, although an soc_suspend function is already exposed by the
pm33xx platform code, it contains additional operations needed for full
SoC suspend beyond what is needed for a relatively simple CPU suspend
needed during cpuidle. To get around this introduce cpu_suspend ops to
be used by the am335x and am437x PM driver for the last stage of cpuidle
path.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27 09:27:26 -08:00
Tony Lindgren
697b4f1603 Merge branch 'omap-for-v5.6/fixes-rc3' into fixes 2020-02-27 08:57:48 -08:00
Mans Rullgard
179a79fd74
ARM: dts: sunxi: h3/h5: add r_pwm node
There is a second PWM unit available in the PL I/O block.
Add a node and pinmux definition for it.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-27 13:55:34 +01:00
Ard Biesheuvel
401b368caa ARM: decompressor: switch to by-VA cache maintenance for v7 cores
Update the v7 cache_clean_flush routine to take into account the
memory range passed in r0/r1, and perform cache maintenance by
virtual address on this range instead of set/way maintenance, which
is inappropriate for the purpose of maintaining the cached state of
memory contents.

Since this removes any use of the stack in the implementation of
cache_clean_flush(), we can also drop some code that manages the
value of the stack pointer before calling it.

Tested-by: Tony Lindgren <tony@atomide.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-02-27 11:15:50 +01:00
Ard Biesheuvel
e114412f61 ARM: decompressor: prepare cache_clean_flush for doing by-VA maintenance
In preparation for turning the decompressor's cache clean/flush
operations into proper by-VA maintenance for v7 cores, pass the
start and end addresses of the regions that need cache maintenance
into cache_clean_flush in registers r0 and r1.

Currently, all implementations of cache_clean_flush ignore these
values, so no functional change is expected as a result of this
patch.

Tested-by: Tony Lindgren <tony@atomide.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-02-27 11:15:35 +01:00
Ard Biesheuvel
184bf653a7 ARM: decompressor: factor out routine to obtain the inflated image size
Before adding another reference to the inflated image size, factor
out the slightly complicated way of loading the unaligned little-endian
constant from the end of the compressed data.

Tested-by: Tony Lindgren <tony@atomide.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-02-27 11:15:10 +01:00
Marek Szyprowski
91bf0eee41 ARM: dts: exynos: Fix memory on Artik5 evaluation boards
The last 8MB of physical memory on Artik520 family boards is reserved for
secure firmware. Adjust the total amount of the memory defined in
exynos3250-artik5.dtsi to match the memory available for the Linux kernel.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-02-26 19:52:55 +01:00
Tony Lindgren
51c22d7b40 ARM: OMAP2+: Fix compile if CONFIG_HAVE_ARM_SMCCC is not set
Recent omap changes added runtime checks to use omap_smccc_smc()
when optee is configured in dts. As the omap-secure code can be
built for ARMv6 only without ARMv7 and use custom smc calls, we
now get a build error:

omap-secure.c:(.text+0x94): undefined reference to `__arm_smccc_smc'

As there secure calls are not used for ARMv6, we should not build
secure-common, and not call omap_secure_init() for omap2.

Fixes: c37baa06f8 ("ARM: OMAP2+: Fix undefined reference to omap_secure_init")
Reported-by: kbuild test robot <lkp@intel.com>
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Steven Price <steven.price@arm.com>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:49:25 -08:00
Faiz Abbas
fa63c00397 arm: dts: dra76x: Fix mmc3 max-frequency
dra76x is not affected by i887 which requires mmc3 node to be limited to
a max frequency of 64 MHz. Fix this by overwriting the correct value in
the the dra76 specific dtsi.

Fixes: 895bd4b3e5 ("ARM: dts: Add support for dra76-evm")
Cc: stable@vger.kernel.org
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:38:30 -08:00
Kishon Vijay Abraham I
27f1377465 ARM: dts: dra7: Add "dma-ranges" property to PCIe RC DT nodes
'dma-ranges' in a PCI bridge node does correctly set dma masks for PCI
devices not described in the DT. Certain DRA7 platforms (e.g., DRA76)
has RAM above 32-bit boundary (accessible with LPAE config) though the
PCIe bridge will be able to access only 32-bits. Add 'dma-ranges'
property in PCIe RC DT nodes to indicate the host bridge can access
only 32 bits.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:38:29 -08:00
Tony Lindgren
feaa8baee8 bus: ti-sysc: Implement SoC revision handling
We need to know SoC type and features for cases where the same SoC
may be installed in various versions on the same board and would need
a separate dts file otherwise for the different variants.

For example, am3703 is pin compatible with omap3630, but has sgx and
iva accelerators disabled. We must not try to access the sgx or iva
module registers on am3703, and need to set the unavailable devices
disabled early.

Let's also detect omap3430 as that is needed for display subsystem
(DSS) reset later on, and GP vs EMU or HS devices. Further SoC
specific disabled device detection can be added as needed, such as
dra71x vs dra76x rtc and usb4.

Cc: Adam Ford <aford173@gmail.com>
Cc: André Hentschel <nerv@dawncrow.de>
Cc: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:03:35 -08:00
Ingo Molnar
e9765680a3 EFI updates for v5.7:
This time, the set of changes for the EFI subsystem is much larger than
 usual. The main reasons are:
 - Get things cleaned up before EFI support for RISC-V arrives, which will
   increase the size of the validation matrix, and therefore the threshold to
   making drastic changes,
 - After years of defunct maintainership, the GRUB project has finally started
   to consider changes from the distros regarding UEFI boot, some of which are
   highly specific to the way x86 does UEFI secure boot and measured boot,
   based on knowledge of both shim internals and the layout of bootparams and
   the x86 setup header. Having this maintenance burden on other architectures
   (which don't need shim in the first place) is hard to justify, so instead,
   we are introducing a generic Linux/UEFI boot protocol.
 
 Summary of changes:
 - Boot time GDT handling changes (Arvind)
 - Simplify handling of EFI properties table on arm64
 - Generic EFI stub cleanups, to improve command line handling, file I/O,
   memory allocation, etc.
 - Introduce a generic initrd loading method based on calling back into
   the firmware, instead of relying on the x86 EFI handover protocol or
   device tree.
 - Introduce a mixed mode boot method that does not rely on the x86 EFI
   handover protocol either, and could potentially be adopted by other
   architectures (if another one ever surfaces where one execution mode
   is a superset of another)
 - Clean up the contents of struct efi, and move out everything that
   doesn't need to be stored there.
 - Incorporate support for UEFI spec v2.8A changes that permit firmware
   implementations to return EFI_UNSUPPORTED from UEFI runtime services at
   OS runtime, and expose a mask of which ones are supported or unsupported
   via a configuration table.
 - Various documentation updates and minor code cleanups (Heinrich)
 - Partial fix for the lack of by-VA cache maintenance in the decompressor
   on 32-bit ARM. Note that these patches were deliberately put at the
   beginning so they can be used as a stable branch that will be shared with
   a PR containing the complete fix, which I will send to the ARM tree.
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Merge tag 'efi-next' of git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi into efi/core

Pull EFI updates for v5.7 from Ard Biesheuvel:

This time, the set of changes for the EFI subsystem is much larger than
usual. The main reasons are:

 - Get things cleaned up before EFI support for RISC-V arrives, which will
   increase the size of the validation matrix, and therefore the threshold to
   making drastic changes,

 - After years of defunct maintainership, the GRUB project has finally started
   to consider changes from the distros regarding UEFI boot, some of which are
   highly specific to the way x86 does UEFI secure boot and measured boot,
   based on knowledge of both shim internals and the layout of bootparams and
   the x86 setup header. Having this maintenance burden on other architectures
   (which don't need shim in the first place) is hard to justify, so instead,
   we are introducing a generic Linux/UEFI boot protocol.

Summary of changes:

 - Boot time GDT handling changes (Arvind)

 - Simplify handling of EFI properties table on arm64

 - Generic EFI stub cleanups, to improve command line handling, file I/O,
   memory allocation, etc.

 - Introduce a generic initrd loading method based on calling back into
   the firmware, instead of relying on the x86 EFI handover protocol or
   device tree.

 - Introduce a mixed mode boot method that does not rely on the x86 EFI
   handover protocol either, and could potentially be adopted by other
   architectures (if another one ever surfaces where one execution mode
   is a superset of another)

 - Clean up the contents of struct efi, and move out everything that
   doesn't need to be stored there.

 - Incorporate support for UEFI spec v2.8A changes that permit firmware
   implementations to return EFI_UNSUPPORTED from UEFI runtime services at
   OS runtime, and expose a mask of which ones are supported or unsupported
   via a configuration table.

 - Various documentation updates and minor code cleanups (Heinrich)

 - Partial fix for the lack of by-VA cache maintenance in the decompressor
   on 32-bit ARM. Note that these patches were deliberately put at the
   beginning so they can be used as a stable branch that will be shared with
   a PR containing the complete fix, which I will send to the ARM tree.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-02-26 15:21:22 +01:00
Laurent Pinchart
e7e67d9a2f drm/omap: Switch the HDMI and VENC outputs to drm_bridge
The TPD12S015, OPA362 and analog and HDMI connectors are now supported
by DRM bridge drivers, and the omapdrm HDMI and VENC outputs can be
handled through the drm_bridge API. Switch the outputs to drm_bridge by
making the next bridge mandatory and removing the related
omapdrm-specific display drivers.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200226112514.12455-40-laurent.pinchart@ideasonboard.com
2020-02-26 13:32:00 +02:00
Laurent Pinchart
0411374bdf drm/bridge: dumb-vga-dac: Rename driver to simple-bridge
The dumb-vga-dac driver can support simple DRM bridges without being
limited to VGA DACs. Rename it to simple-bridge.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Tested-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200226112514.12455-12-laurent.pinchart@ideasonboard.com
2020-02-26 13:31:31 +02:00
Ondrej Jirman
87bf7a5fba
ARM: dts: sun8i-a83t: Add thermal trip points/cooling maps
This enables passive cooling by down-regulating CPU voltage
and frequency.

For the trip points, I used values from the BSP code directly.

The critical trip point value is 30°C above the maximum recommended
ambient temperature (70°C) for the SoC from the datasheet, so there's
some headroom even at such a high ambient temperature.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-25 10:04:58 +01:00
Ondrej Jirman
7ad9f3d0cb
ARM: dts: sun8i-h3: Add thermal trip points/cooling maps
This enables passive cooling by down-regulating CPU voltage
and frequency.

For trip points, I used a slightly lowered values from the BSP
code. The critical temperature of 110°C from BSP code seemed
like a lot, so I rounded it off to 100°C.

The critical trip point value is 30°C above the maximum recommended
ambient temperature (70°C) for the SoC from the datasheet, so there's
some headroom even at such a high ambient temperature.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-25 10:04:23 +01:00
Christian Lamparter
8b99dc0922 ARM: dts: qcom: add gpio-ranges property
This patch adds the gpio-ranges property to almost all of
the Qualcomm ARM platforms that utilize the pinctrl-msm
framework.

The gpio-ranges property is part of the gpiolib subsystem.
As a result, the binding text is available in section
"2.1 gpio- and pin-controller interaction" of
Documentation/devicetree/bindings/gpio/gpio.txt

For more information please see the patch titled:
"pinctrl: msm: fix gpio-hog related boot issues" from
this series.

Reported-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Tested-by: Sven Eckelmann <sven.eckelmann@openmesh.com> [ipq4019]
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Tested-by: Robert Marko <robert.marko@sartura.hr> [ipq4019]
Cc: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Link: https://lore.kernel.org/r/20200108125455.308969-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 20:54:29 -08:00
Diego Elio Pettenò
679b2ec8e0 scsi: sr: remove references to BLK_DEV_SR_VENDOR, leave it enabled
This kernel configuration is basically enabling/disabling sr driver quirks
detection. While these quirks are for fairly rare devices (very old CD
burners, and a glucometer), the additional detection of these models is a
very minimal amount of code.

The logic behind the quirks is always built into the sr driver.

This also removes the config from all the defconfig files that are enabling
this already.

Link: https://lore.kernel.org/r/20200223191144.726-1-flameeyes@flameeyes.com
Reviewed-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Diego Elio Pettenò <flameeyes@flameeyes.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2020-02-24 14:59:01 -05:00
Olof Johansson
f1e4920fe3 i.MX fixes for 5.6:
- Build v7_cpu_resume() unconditionally to fix system hang in case that
    suspend is disabled but cpuidle support is enabled.
  - Drop unexisting Ethernet PHY device from imx8qxp-mek board.
  - Fix SRAM compatible strings on imx6dl-colibri-eval-v3 board.
  - Fix imx-scu driver to make sure that all messages words are written
    sequentially.
  - A series from Leonard Crestez to fix i.MX SC API users, having all
    messages aligned on 4 bytes.
  - Fix eMMC supply for phycore-som board.
  - Drop bogus frequency setting from imx7-colibri SD/MMC device, so that
    HS200 mode starts working and delivers better performance.
  - Fix opp-supported-hw for i.MX7D to get consumer and industrial parts
    work with correct frequency settings.
  - Restore MDIO compatible to the correct one for LS1021A SoC.
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Merge tag 'imx-fixes-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.6:

 - Build v7_cpu_resume() unconditionally to fix system hang in case that
   suspend is disabled but cpuidle support is enabled.
 - Drop unexisting Ethernet PHY device from imx8qxp-mek board.
 - Fix SRAM compatible strings on imx6dl-colibri-eval-v3 board.
 - Fix imx-scu driver to make sure that all messages words are written
   sequentially.
 - A series from Leonard Crestez to fix i.MX SC API users, having all
   messages aligned on 4 bytes.
 - Fix eMMC supply for phycore-som board.
 - Drop bogus frequency setting from imx7-colibri SD/MMC device, so that
   HS200 mode starts working and delivers better performance.
 - Fix opp-supported-hw for i.MX7D to get consumer and industrial parts
   work with correct frequency settings.
 - Restore MDIO compatible to the correct one for LS1021A SoC.

* tag 'imx-fixes-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx-scu: Align imx sc msg structs to 4
  firmware: imx: Align imx_sc_msg_req_cpu_start to 4
  firmware: imx: scu-pd: Align imx sc msg structs to 4
  firmware: imx: misc: Align imx sc msg structs to 4
  firmware: imx: scu: Ensure sequential TX
  ARM: dts: imx7-colibri: Fix frequency for sd/mmc
  arm64: dts: imx8qxp-mek: Remove unexisting Ethernet PHY
  ARM: dts: imx6dl-colibri-eval-v3: fix sram compatible properties
  ARM: dts: ls1021a: Restore MDIO compatible to gianfar
  ARM: dts: imx7d: fix opp-supported-hw
  ARM: imx: build v7_cpu_resume() unconditionally
  ARM: dts: imx6: phycore-som: fix emmc supply

Link: https://lore.kernel.org/r/20200224120334.GH27688@dragon
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-02-24 09:57:05 -08:00
Olof Johansson
515fa3ee9d Fix LCD backlight issue for droid4
There was a bit of an integration glitch with the LED backlight series.
 The LED related parts got merged into v5.6-rc1, but the actual backlight
 driver got left out.
 
 This caused an issue on at least droid4 where the LCD backlight can not
 yet be enabled automatically. And the LCD backlight can no longer be
 enabled manually either via sysfs.
 
 The integration glitch happened because some pending comments from me.
 There was some confusion on which device tree property we should use for
 the default brightness property.
 
 After discussing how to fix this on the mailing lists, we came to the
 conclusion that it's best to fix this issue properly by adding the
 missing driver.
 
 The other solutions would mean backpedaling and try to come up with some
 temporary solution that really does not solve the issue for users. The
 patch for led_bl.c has been around for quite a while and tested by many
 users and was assumed to be merged as part of the LED backlight series.
 
 For the brightness property to use, we ended up using the more common
 "default-brightness-level" rather than "default-brightness" used by
 some backlight drivers.
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Merge tag 'omap-for-v5.6/droid4-lcd-fix-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fix LCD backlight issue for droid4

There was a bit of an integration glitch with the LED backlight series.
The LED related parts got merged into v5.6-rc1, but the actual backlight
driver got left out.

This caused an issue on at least droid4 where the LCD backlight can not
yet be enabled automatically. And the LCD backlight can no longer be
enabled manually either via sysfs.

The integration glitch happened because some pending comments from me.
There was some confusion on which device tree property we should use for
the default brightness property.

After discussing how to fix this on the mailing lists, we came to the
conclusion that it's best to fix this issue properly by adding the
missing driver.

The other solutions would mean backpedaling and try to come up with some
temporary solution that really does not solve the issue for users. The
patch for led_bl.c has been around for quite a while and tested by many
users and was assumed to be merged as part of the LED backlight series.

For the brightness property to use, we ended up using the more common
"default-brightness-level" rather than "default-brightness" used by
some backlight drivers.

* tag 'omap-for-v5.6/droid4-lcd-fix-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: droid4: Configure LED backlight for lm3532
  backlight: add led-backlight driver

Link: https://lore.kernel.org/r/pull-1582303901-96693@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-02-24 09:54:11 -08:00
Tony Lindgren
8f38fd5ba6 ARM: dts: Configure omap5 AESS
We are missing AESS for omap5. Looks like it's similar to what we have
for omap4, and this gets ti-sysc interconnect target module driver to
detect it properly.

Note that we currently have no child device driver available for it.

Cc: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-24 09:51:00 -08:00
Geert Uytterhoeven
21b388dca1 ARM: dts: r8a7779: Remove deprecated "renesas, rcar-sata" compatible value
The "renesas,rcar-sata" compatible value was deprecated by
"renesas,sata-r8a7779" many years ago, in commit e67adb4e66
("sata_rcar: Add R-Car Gen2 SATA PHY support").  Drop it.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200219153929.11073-1-geert+renesas@glider.be
2020-02-24 14:04:21 +01:00
Geert Uytterhoeven
9e1232631d ARM: dts: rzg1: Add reset control properties for display
Add reset control properties to the devices node for the Display Units
on all supported RZ/G1 SoCs.  Note that on these SoCs, there is only a
single reset for all DU channels.

Join the clocks lines while at it, to increase uniformity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-3-geert+renesas@glider.be
2020-02-24 14:03:33 +01:00
Geert Uytterhoeven
d15881f29e ARM: dts: rcar-gen2: Add reset control properties for display
Add reset control properties to the device nodes for the Display Units
on all supported R-Car Gen2 SoCs.  Note that on these SoCs, there is
only a single reset for all DU channels.

Join the clocks lines while at it, to increase uniformity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-2-geert+renesas@glider.be
2020-02-24 14:03:33 +01:00
Geert Uytterhoeven
6e0a7c403d ARM: dts: r8a7745: Convert to new DU DT bindings
The DU DT bindings have been updated to drop the reg-names property.
Update the r8a7745 device tree accordingly.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218132217.21454-1-geert+renesas@glider.be
2020-02-24 14:03:33 +01:00
Ondrej Jirman
b642d48254
ARM: dts: sun8i-a83t-tbs-a711: Fix USB OTG mode detection
USB-ID signal has a pullup on the schematic, but in reality it's not
pulled up, so add a GPIO pullup. And we also need a usb0_vbus_power-supply
for VBUS detection.

This fixes OTG mode detection and charging issues on TBS A711 tablet.
The issues came from ID pin reading 0, causing host mode to be enabled,
when it should not be, leading to DRVVBUS being enabled, which disabled
the charger.

Fixes: f2f221c781 ("ARM: dts: sun8i: a711: Enable USB OTG")
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-24 10:32:25 +01:00
Ondrej Jirman
a40550952c
ARM: dts: sun8i-a83t-tbs-a711: HM5065 doesn't like such a high voltage
Lowering the voltage solves the quick image degradation over time
(minutes), that was probably caused by overheating.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-24 10:32:23 +01:00
Ondrej Jirman
9680d194d5
ARM: dts: sun8i-a83t-tbs-a711: Drop superfluous dr_mode
Property dr_mode = "otg" is the default in sun8i-a83t.dtsi

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-24 10:32:16 +01:00
Ondrej Jirman
cd3e42c9f7
ARM: dts: sun5i: Add PocketBook Touch Lux 3 support
What works:

- Serial console
- mmc0, mmc2 (both microSD card slots on the board)
- All buttons (gpio and lradc based)
- Power LED
- PMIC
- RTC
- USB OTG/gadgets mode
- Realtek USB WiFi
- Display backlight
- eInk display SPI NOR flash memory

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-24 10:17:36 +01:00
Anson Huang
95d014c812 ARM: dts: imx: Align ocotp node name
Node name should be generic, use "ocotp-ctrl" instead of "ocotp"
for all i.MX6 SoCs.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 15:46:30 +08:00
Anson Huang
bffe02ccca ARM: dts: imx: make wdog node name generic
Node name should be generic, use "watchdog" instead of "wdog" for
wdog nodes.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 15:43:20 +08:00
Oleksandr Suvorov
1608bf1f91 ARM: dts: imx7-colibri: add support for Toradex Aster carrier board
Add support for the Toradex Aster carrier board.

Follow the usual hierarchic include model, maintaining shared
configuration imx7-colibri-aster.dtsi.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 14:22:34 +08:00
Oleksandr Suvorov
8083d7261a ARM: dts: imx7-colibri: Convert to SPDX license tags for Colibri iMX7
Replace boiler plate licenses texts with the SPDX license identifiers in
Colibri iMX7 DTS files.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 14:22:15 +08:00
Oleksandr Suvorov
2773fe1d31 ARM: dts: imx7-colibri: Fix frequency for sd/mmc
SD/MMC on Colibri iMX7S/D modules successfully support
200Mhz frequency in HS200 mode.

Removing the unnecessary max-frequency limit significantly
increases the performance:

== before fix ====
root@colibri-imx7-emmc:~# hdparm -t /dev/mmcblk0
/dev/mmcblk0:
 Timing buffered disk reads: 252 MB in  3.02 seconds =  83.54 MB/sec
==================

=== after fix ====
root@colibri-imx7-emmc:~# hdparm -t /dev/mmcblk0
/dev/mmcblk0:
 Timing buffered disk reads: 408 MB in  3.00 seconds = 135.94 MB/sec
==================

Fixes: f928a4a377 ("ARM: dts: imx7: add Toradex Colibri iMX7D 1GB (eMMC) support")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 11:42:16 +08:00
Ard Biesheuvel
148d3f716c efi/libstub: Introduce symbolic constants for the stub major/minor version
Now that we have added new ways to load the initrd or the mixed mode
kernel, we will also need a way to tell the loader about this. Add
symbolic constants for the PE/COFF major/minor version numbers (which
fortunately have always been 0x0 for all architectures), so that we
can bump them later to document the capabilities of the stub.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-02-23 21:59:42 +01:00
Marek Szyprowski
8f274b90b8 ARM: dts: exynos: Make fixed regulators always-on on Arndale5250
The fixed regulators defined for Arndale5250 boards have no control lines,
so mark them as 'always-on' to better describe the hardware and also kill
the strange messages like 'MAIN_DC: disabling' after boot.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-02-23 17:54:19 +01:00
Marek Szyprowski
a5e7a22d73 ARM: dts: exynos: Fix MMC regulator on Arndale5250 board
According to the schematic, both eMMC and SDMMC use dedicated fixed
regulators connected directly to the DC5V and MAIN_DC rails. Remove the
GPX1-1 line assigned to the MMC regulator, because such control
connection doesn't exist. Also change its name to VDD_MMC to avoid
conflict with LDO18 output of S5M8767 PMIC.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-02-23 17:52:49 +01:00
Ard Biesheuvel
9f9223778e efi/libstub/arm: Make efi_entry() an ordinary PE/COFF entrypoint
Expose efi_entry() as the PE/COFF entrypoint directly, instead of
jumping into a wrapper that fiddles with stack buffers and other
stuff that the compiler is much better at. The only reason this
code exists is to obtain a pointer to the base of the image, but
we can get the same value from the loaded_image protocol, which
we already need for other reasons anyway.

Update the return type as well, to make it consistent with what
is required for a PE/COFF executable entrypoint.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-02-22 23:37:37 +01:00
Ard Biesheuvel
e951a1f427 efi/arm: Pass start and end addresses to cache_clean_flush()
In preparation for turning the decompressor's cache clean/flush
operations into proper by-VA maintenance for v7 cores, pass the
start and end addresses of the regions that need cache maintenance
into cache_clean_flush in registers r0 and r1.

Currently, all implementations of cache_clean_flush ignore these
values, so no functional change is expected as a result of this
patch.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-02-22 19:04:57 +01:00
Ard Biesheuvel
c7225494be efi/arm: Work around missing cache maintenance in decompressor handover
The EFI stub executes within the context of the zImage as it was
loaded by the firmware, which means it is treated as an ordinary
PE/COFF executable, which is loaded into memory, and cleaned to
the PoU to ensure that it can be executed safely while the MMU
and caches are on.

When the EFI stub hands over to the decompressor, we clean the caches
by set/way and disable the MMU and D-cache, to comply with the Linux
boot protocol for ARM. However, cache maintenance by set/way is not
sufficient to ensure that subsequent instruction fetches and data
accesses done with the MMU off see the correct data. This means that
proceeding as we do currently is not safe, especially since we also
perform data accesses with the MMU off, from a literal pool as well as
the stack.

So let's kick this can down the road a bit, and jump into the relocated
zImage before disabling the caches. This removes the requirement to
perform any by-VA cache maintenance on the original PE/COFF executable,
but it does require that the relocated zImage is cleaned to the PoC,
which is currently not the case. This will be addressed in a subsequent
patch.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-02-22 19:04:54 +01:00
Tony Lindgren
f4a5ac7bd9 ARM: OMAP2+: Improve handling of ti-sysc related sysc_fields
We can currently get a cryptic warning sysc_fields (ptrval) != (ptrval)
if the legacy platform data has no sysc_fields defined while the newer
dts data has them. This warning appears only when booting still with
legacy "ti,hwmods" custom property set. This can happen at least with
DSS related modules where we may not have sysc_fields defined in the
in the legacy data.

Let's not error out on missing legacy data sysc_fields, and show a more
descriptive warning for other cases.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-21 10:59:24 -08:00
Kees Cook
3c14fe70be ARM: 8959/1: Remove unused .fixup section in boot stub
The boot stub does not emit a .fixup section at all anymore, so remove
it.

Link: https://lore.kernel.org/lkml/202002080058.FD1DDB1@keescook/

Suggested-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-02-21 17:11:04 +00:00
Ard Biesheuvel
89604523a7 ARM: 8961/2: Fix Kbuild issue caused by per-task stack protector GCC plugin
When using plugins, GCC requires that the -fplugin= options precedes
any of its plugin arguments appearing on the command line as well.
This is usually not a concern, but as it turns out, this requirement
is causing some issues with ARM's per-task stack protector plugin
and Kbuild's implementation of $(cc-option).

When the per-task stack protector plugin is enabled, and we tweak
the implementation of cc-option not to pipe the stderr output of
GCC to /dev/null, the following output is generated when GCC is
executed in the context of cc-option:

  cc1: error: plugin arm_ssp_per_task_plugin should be specified before \
         -fplugin-arg-arm_ssp_per_task_plugin-tso=1 in the command line
  cc1: error: plugin arm_ssp_per_task_plugin should be specified before \
         -fplugin-arg-arm_ssp_per_task_plugin-offset=24 in the command line

These errors will cause any option passed to cc-option to be treated
as unsupported, which is obviously incorrect.

The cause of this issue is the fact that the -fplugin= argument is
added to GCC_PLUGINS_CFLAGS, whereas the arguments above are added
to KBUILD_CFLAGS, and the contents of the former get filtered out of
the latter before being passed to the GCC running the cc-option test,
and so the -fplugin= option does not appear at all on the GCC command
line.

Adding the arguments to GCC_PLUGINS_CFLAGS instead of KBUILD_CFLAGS
would be the correct approach here, if it weren't for the fact that we
are using $(eval) to defer the moment that they are added until after
asm-offsets.h is generated, which is after the point where the contents
of GCC_PLUGINS_CFLAGS are added to KBUILD_CFLAGS. So instead, we have
to add our plugin arguments to both.

For similar reasons, we cannot append DISABLE_ARM_SSP_PER_TASK_PLUGIN
to KBUILD_CFLAGS, as it will be passed to GCC when executing in the
context of cc-option, whereas the other plugin arguments will have
been filtered out, resulting in a similar error and false negative
result as above. So add it to ccflags-y instead.

Fixes: 189af46571 ("ARM: smp: add support for per-task stack canaries")
Reported-by: Merlijn Wajer <merlijn@wizzup.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-02-21 17:03:22 +00:00
Kees Cook
f87b1c49bc ARM: 8958/1: rename missed uaccess .fixup section
When the uaccess .fixup section was renamed to .text.fixup, one case was
missed. Under ld.bfd, the orphaned section was moved close to .text
(since they share the "ax" bits), so things would work normally on
uaccess faults. Under ld.lld, the orphaned section was placed outside
the .text section, making it unreachable.

Link: https://github.com/ClangBuiltLinux/linux/issues/282
Link: https://bugs.chromium.org/p/chromium/issues/detail?id=1020633#c44
Link: https://lore.kernel.org/r/nycvar.YSQ.7.76.1912032147340.17114@knanqh.ubzr
Link: https://lore.kernel.org/lkml/202002071754.F5F073F1D@keescook/

Fixes: c4a84ae39b ("ARM: 8322/1: keep .text and .fixup regions closer together")
Cc: stable@vger.kernel.org
Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-02-21 17:03:21 +00:00
Florian Fainelli
45939ce292 ARM: 8957/1: VDSO: Match ARMv8 timer in cntvct_functional()
It is possible for a system with an ARMv8 timer to run a 32-bit kernel.
When this happens we will unconditionally have the vDSO code remove the
__vdso_gettimeofday and __vdso_clock_gettime symbols because
cntvct_functional() returns false since it does not match that
compatibility string.

Fixes: ecf99a4391 ("ARM: 8331/1: VDSO initialization, mapping, and synchronization")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-02-21 17:03:20 +00:00
Russell King
8d54a27593 ARM: allow unwinder to unwind recursive functions
Allow the unwinder to unwind recursive functions if the stack makes
progress, even if the PC is the same. This allows tracing through
recursive __switchdev_handle_port_attr_set() and similar.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-02-21 16:58:50 +00:00
Tony Lindgren
e500ba0e71 Merge branch 'omap-for-v5.6/fixes-rc2' into fixes 2020-02-20 10:02:02 -08:00
Lukasz Luba
834e34007e ARM: exynos_defconfig: Enable SCHED_MC and ENERGY_MODEL
The Energy Model (EM) is needed to run Energy Aware Scheduler (EAS).
Enable ENERGY_MODEL to make that happen. This will increase energy
efficiency of the big.LITTLE platforms (e.g. Exynos5422) by smarter
decisions in scheduling tasks in non-heavy workloads.

Add SCHED_MC in order to create another level in scheduling domains: 'MC'.
This improves scheduler's decisions on platforms with CPU clusters, such
as big.LITTLE.

Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-02-20 18:56:24 +01:00
Lukasz Luba
e4dcb4ab3b ARM: dts: exynos: Add dynamic-power-coefficient to Exynos5422 CPUs
To use Energy Aware Scheduler (EAS) the Energy Model (EM) should be
registered for CPUs. Add dynamic-power-coefficient into CPU nodes which
let CPUFreq subsystem register the EM structures. This will increase
energy efficiency of big.LITTLE platforms.

The 'dynamic-power-coefficient' values have been obtained experimenting
with different workloads. The power measurements taken from big CPU
Cluster and LITTLE CPU Cluster has been compared with official documents
and synthetic workloads estimations. The effective power ratio between
Cortex-A7 and Cortex-A15 CPUs (~3x) is also aligned with documentation.

Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-02-20 18:56:05 +01:00
Grygorii Strashko
00a39c92c8 ARM: dts: dra7-l4: mark timer13-16 as pwm capable
DMTimers 13 - 16 are PWM capable and also can be used for CPTS input
signals generation. Hence, mark them as "ti,timer-pwm".

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-20 09:54:22 -08:00
Suman Anna
78722d37b2 ARM: dts: dra7xx-clocks: Fixup IPU1 mux clock parent source
The IPU1 functional clock is the output of a mux clock (represented
by ipu1_gfclk_mux previously) and the clock source for this has been
updated to be sourced from dpll_core_h22x2_ck in commit 39879c7d96
("ARM: dts: dra7xx-clocks: Source IPU1 functional clock from CORE DPLL").
ipu1_gfclk_mux is an obsolete clock now with the clkctrl conversion,
and this clock source parenting is lost during the new clkctrl layout
conversion.

Remove this stale clock and fix up the clock source for this mux
clock using the latest equivalent clkctrl clock. This restores the
previous logic and ensures that the IPU1 continues to run at the
same frequency of IPU2 and independent of the ABE DPLL.

Fixes: b5f8ffbb6f ("ARM: dts: dra7: convert to use new clkctrl layout")
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-20 09:52:31 -08:00
Suman Anna
31623468be ARM: dts: am437x-idk-evm: Fix incorrect OPP node names
The commit 337c6c9a69 ("ARM: dts: am437x-idk-evm: Disable
OPP50 for MPU") adjusts couple of OPP nodes defined in the
common am4372.dtsi file, but used outdated node names. This
results in these getting treated as new OPP nodes with missing
properties.

Fix this properly by using the correct node names as updated in
commit b9cb2ba718 ("ARM: dts: Use - instead of @ for DT OPP
entries for TI SoCs").

Reported-by: Roger Quadros <rogerq@ti.com>
Fixes: 337c6c9a69 ("ARM: dts: am437x-idk-evm: Disable OPP50 for MPU")
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-20 09:50:57 -08:00
Peter Ujfalusi
d6c01c25f0 ARM: dts: dra7-evm: Rename evm_3v3 regulator to vsys_3v3
On the new schematics it is renamed and the same name is used on other
dra7 boards.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-20 09:26:35 -08:00
Andrey Lebedev
564c481507
ARM: dts: sun7i: Add LVDS panel support on A20
Define pins for LVDS channels 0 and 1, configure reset line for tcon0 and
provide sample LVDS panel, connected to tcon0.

Signed-off-by: Andrey Lebedev <andrey@lebedev.lt>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-20 18:20:52 +01:00
Maxime Ripard
692b4363c4
ARM: dts: sunxi: Remove redundant assigned-clocks
The display DRC nodes have an assigned clocks property, while the driver
also enforces it.

Since assigned-clocks is pretty fragile anyway, let's just remove it.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-20 18:16:58 +01:00
Maxime Ripard
06f177c3da
ARM: dts: sunxi: Remove redundant assigned-clocks
The display backend nodes have an assigned clocks property, while the driver
also enforces it.

Since assigned-clocks is pretty fragile anyway, let's just remove it.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-20 18:16:56 +01:00