Rename module and all functions within so we can add support for other
keyboards in the same file. Rename the _tp postfix to _tpkbd, to
signify functions relevant to the TP USB keyboard.
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Antonio Ospite <ao2@ao2.it>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
A Flexgen structure is composed by:
- a clock cross bar (represented by a mux element)
- a pre and final dividers (represented by a divider and gate elements)
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Naming convention was changed in dts file but the
clock binding documentation hasn't been updated.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
DCR handling was only needed for 440 KVM. Since we removed it, we can also
remove handling of DCR accesses.
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide device tree support and binding information. Also provide support
for a new chip "pixcir_tangoc".
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
- BCM Mobile SMP support
- BRCM STB platform support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT1mIQAAoJEOfTILNwq7R4E9EQALNeAA80eWRF+xtGp7heShrt
lxm1gT8JUyCIG6GvCiYy5QvNpSaxaLqWpsSHdmxETfUHzexvICUJUECNmxUR49RX
9TScOu3P0lfQrd6+ZoAZdqTeiOv4nbQjdTrioIPvnjNKP/pk3FJy43ExkPaElDqG
792hrsPcKJ2Qet2Eu73Xx2LtEgarWoR9MDV/Yr1eI1CoKDiVobOCTeQlv+AtwEnW
Mj+DBRdMKykLvB5aS1fN1lRP+AOEibgn6mWyQExT1+8uVrqX5zjiuqtrxLqwgMep
9UFk1gUu4u/ao9CELi/thwBHm0BYt43y4h/mA9KspgOxE+eOoBXEruyxEb1s/hVU
nqF59FNfIJNVKA1dgOrYmph3xMTEMeenkf/EHBoXEsLOQRW84PIpHUYbsrj7akr2
aUte0nL7dWYXgcT+V6pn2IADWXGkp4AzAr1i8nAApHifDJmQ65a+ph7Y/J1s6eag
SWLdHLWQLcSS/YPHHyXWKSCwf3vHEx3GNfeoXqqpYgSLlfWifSXQpJc+Pi0hQrvv
12qmQkWmEc/wEDuJeOFmUedG1ZDW2ID03cCh10G2alkUCvn9i2STtfjV7Z7MkDtz
DbJCGoLfsQA92Zc0U5zHnuG7jDs+eCtODeKCpsrSuOoqOKUIze6gOStAfclC17sk
yigSWSFaOFhb6udn8dP5
=ZOoN
-----END PGP SIGNATURE-----
Merge tag 'for-3.17/bcm-dt' of git://github.com/broadcom/mach-bcm into next/dt
Merge "ARM: mach-bcm: dt updatees for 3.17" from Matt Porter:
- BCM Mobile SMP support
- BRCM STB platform support
* tag 'for-3.17/bcm-dt' of git://github.com/broadcom/mach-bcm:
ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
ARM: brcmstb: add misc. DT bindings for brcmstb
ARM: brcmstb: add CPU binding for Broadcom Brahma15
ARM: dts: enable SMP support for bcm21664
ARM: dts: enable SMP support for bcm28155
devicetree: bindings: document Broadcom CPU enable method
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTzJFGAAoJEHm+PkMAQRiGNzQH/087gQch5K+A2HKvPzjUXq57
G82DJHLONMMq8+NY3Vqhp8g2V8zRbXGJEvMJMsyuscO37Vo7ADcrYo8lqY9w5bIl
h+Zarhkqz0rqRs2SfMMIVzdd2W7MzL+lqj3GplGPxHztw0+qk7PRKILx6eRppGaH
JaD4NfkD5+1vfve/2d1ze9D5pCiw6PFNzjesKZxScQhNhIyLdRamfSTY4r9XeURo
CxpwjphEYfvAcgc39mwzEHPHyKSqULu0By6R8FXQpJ9QjVtzcGEiF+cPqGncpZOR
5ZSyU5e1CpBl9w8o6Lm9ewXmaCSnBU/VFrOwWvZrXfokZedXBOz7KdShU93XFjU=
=0VJM
-----END PGP SIGNATURE-----
Merge tag 'v3.16-rc6' into next/dt
Update to Linux 3.16-rc6 as a dependency for the broadcom changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Armada XP
- New board, Lenovo ix4-300d NAS
- Add Lenovo to vendor-prefixes
- Dove
- Add LCD controllers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJT1l8ZAAoJEP45WPkGe8ZnoEAP/1tuwu6stZaEQSEEtI6TB5QP
RIjW19sMHcxNsH2s5uCXnG/Zrijkv+iPVizzx7uHs8upjvyo0Q4kPX3NYq4hQFMT
AriVnTHTVZ0ostX2IjflWWdikPwUi+a6yYmlZs2pUvUO/mrvuoMCDKNm4ry2zPZs
T4bXaKvHy+Y7LtqIQLTarr3oqkVi5N0zu+lVz7YMOj6plFrt+Q2ek0XiqJIjcR/+
59TozGocVQzS3p8zj2CJdHyqAdsId+mLQHsuLyMSHwQMADZsFtlmk71gFTlSrjdh
IL5IJbGaWXLVVelNo66T77a3bg3zpKetcA+4qwzIZjYQaZv9Et+old/dBUiAoumn
Vbo+QvqjumJRmFCY8ja3UNxKAjtPzdStZiomf2lCkJwEnxiFFwV2PCIxf9HkKGqC
tKU0vKG3fhmw1oOqkxRHNlNNtH8w+yfcAp1BDH6dnEUr3Og+vfZJeth+a6zDScaI
EBtTcBxHyfz9TmHw2SrUc8gjhEM0UkpE9UThukjy/futXxqlBn9BbgON9+s2IpqH
65s4I3ddtHcvO/ZamGC2IhHBmoorhdZ1HTYC2bkiq5IMrvkWEHWQpCZJlkEXfeLa
JxzFqU4i+W5824krYcYd2E46APE5CUT8d/tcuPog+LPy8B+T4Br2vhEzZ4bE9nTz
4VkOqw8kkJpAB3cIzXDy
=Ixkt
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.17-4' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu DT changes for v3.17 (round 4)" from Jason Cooper"
- Armada XP
- New board, Lenovo ix4-300d NAS
- Add Lenovo to vendor-prefixes
- Dove
- Add LCD controllers
* tag 'mvebu-dt-3.17-4' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add dts definition for Lenovo Iomega ix4-300d NAS
of: Add Lenovo Group Ltd. to the vendor-prefixes list.
ARM: dts: dove: add DT LCD controllers
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Document the Broadcom Brahma B15 GIC implementation as compatible
with the ARM GIC standard.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Matt Porter <mporter@linaro.org>
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Matt Porter <mporter@linaro.org>
Add the Broadcom Brahma B15 CPU to the DT CPU binding list.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Matt Porter <mporter@linaro.org>
Broadcom mobile SoCs use a ROM-implemented holding pen for
controlled boot of secondary cores. A special register is
used to communicate to the ROM that a secondary core should
start executing kernel code. This enable method is currently
used for members of the bcm281xx and bcm21664 SoC families.
The use of an enable method also allows the SMP operation vector to
be assigned as a result of device tree content for these SoCs.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Lenovo Group Ltd. (stylized as lenovo) is a Chinese multinational computer
technology company with headquarters in Beijing, China, and Morrisville, North
Carolina, United States.
http://www.lenovo.com/
Signed-off-by: Benoit Masson <yahoo@perenite.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/1406154923-13612-1-git-send-email-yahoo@perenite.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The KVM_CHECK_EXTENSION is only available on the kvm fd today. Unfortunately
on PPC some of the capabilities change depending on the way a VM was created.
So instead we need a way to expose capabilities as VM ioctl, so that we can
see which VM type we're using (HV or PR). To enable this, add the
KVM_CHECK_EXTENSION ioctl to our vm ioctl portfolio.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Unfortunately, the LPCR got defined as a 32-bit register in the
one_reg interface. This is unfortunate because KVM allows userspace
to control the DPFD (default prefetch depth) field, which is in the
upper 32 bits. The result is that DPFD always get set to 0, which
reduces performance in the guest.
We can't just change KVM_REG_PPC_LPCR to be a 64-bit register ID,
since that would break existing userspace binaries. Instead we define
a new KVM_REG_PPC_LPCR_64 id which is 64-bit. Userspace can still use
the old KVM_REG_PPC_LPCR id, but it now only modifies those fields in
the bottom 32 bits that userspace can modify (ILE, TC and AIL).
If userspace uses the new KVM_REG_PPC_LPCR_64 id, it can modify DPFD
as well.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Cc: stable@vger.kernel.org
Signed-off-by: Alexander Graf <agraf@suse.de>
The 440 target hasn't been properly functioning for a few releases and
before I was the only one who fixes a very serious bug that indicates to
me that nobody used it before either.
Furthermore KVM on 440 is slow to the extent of unusable.
We don't have to carry along completely unused code. Remove 440 and give
us one less thing to worry about.
Signed-off-by: Alexander Graf <agraf@suse.de>
This adds code to check that when the KVM_CAP_PPC_ENABLE_HCALL
capability is used to enable or disable in-kernel handling of an
hcall, that the hcall is actually implemented by the kernel.
If not an EINVAL error is returned.
This also checks the default-enabled list of hcalls and prints a
warning if any hcall there is not actually implemented.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
This provides a way for userspace controls which sPAPR hcalls get
handled in the kernel. Each hcall can be individually enabled or
disabled for in-kernel handling, except for H_RTAS. The exception
for H_RTAS is because userspace can already control whether
individual RTAS functions are handled in-kernel or not via the
KVM_PPC_RTAS_DEFINE_TOKEN ioctl, and because the numeric value for
H_RTAS is out of the normal sequence of hcall numbers.
Hcalls are enabled or disabled using the KVM_ENABLE_CAP ioctl for the
KVM_CAP_PPC_ENABLE_HCALL capability on the file descriptor for the VM.
The args field of the struct kvm_enable_cap specifies the hcall number
in args[0] and the enable/disable flag in args[1]; 0 means disable
in-kernel handling (so that the hcall will always cause an exit to
userspace) and 1 means enable. Enabling or disabling in-kernel
handling of an hcall is effective across the whole VM.
The ability for KVM_ENABLE_CAP to be used on a VM file descriptor
on PowerPC is new, added by this commit. The KVM_CAP_ENABLE_CAP_VM
capability advertises that this ability exists.
When a VM is created, an initial set of hcalls are enabled for
in-kernel handling. The set that is enabled is the set that have
an in-kernel implementation at this point. Any new hcall
implementations from this point onwards should not be added to the
default set without a good reason.
No distinction is made between real-mode and virtual-mode hcall
implementations; the one setting controls them both.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
This is a dependency for the rk3288 DT updates, the branch should
first get merged through Mike's clk git.
* 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux:
ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER
clk: rockchip: add clock controller for rk3288
dt-bindings: add documentation for rk3288 cru
clk: rockchip: add clock driver for rk3188 and rk3066 clocks
dt-bindings: add documentation for rk3188 clock and reset unit
clk: rockchip: add reset controller
clk: rockchip: add clock type for pll clocks and pll used on rk3066
clk: rockchip: add basic infrastructure for clock branches
clk: composite: improve rate_hw sanity check logic
clk: composite: allow read-only clocks
clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a dependency for the rk3288 DT updates, the branch should
first get merged through Mike's clk git.
* 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux:
ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER
clk: rockchip: add clock controller for rk3288
dt-bindings: add documentation for rk3288 cru
clk: rockchip: add clock driver for rk3188 and rk3066 clocks
dt-bindings: add documentation for rk3188 clock and reset unit
clk: rockchip: add reset controller
clk: rockchip: add clock type for pll clocks and pll used on rk3066
clk: rockchip: add basic infrastructure for clock branches
clk: composite: improve rate_hw sanity check logic
clk: composite: allow read-only clocks
clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The huge majority of GPIOs have their direction and initial value set
right after being obtained by one of the gpiod_get() functions. The
integer GPIO API had gpio_request_one() that took a convenience flags
parameter allowing to specify an direction and value applied to the
returned GPIO. This feature greatly simplifies client code and ensures
errors are always handled properly.
A similar feature has been requested for the gpiod API. Since setting
the direction of a GPIO is so often the very next action done after
obtaining its descriptor, we prefer to extend the existing functions
instead of introducing new functions that would raise the
number of gpiod getters to 16 (!).
The drawback of this approach is that all gpiod clients need to be
updated. To limit the pain, temporary macros are introduced that allow
gpiod_get*() to be called with or without the extra flags argument. They
will be removed once all consumer code has been updated.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As per example from the regulator subsystem: put all defines and
functions related to registering board info for GPIO descriptors
into a separate <linux/gpio/machine.h> header.
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patchset add new extcon provider driver and fix minor issue of extcon driver.
Detailed description for patchset:
1. Add new Silicon-Mitus SM5502 MUIC (Micro-USB Interface Controller) device
- extcon-sm5502 driver is capable of identifying the type of the external power
source and attached accessory. And external power sources, such as Dedicated
charger or a standard USB port, are able to charge the battery in the smart
phone via the connector.
2. Fix minor issue of extcon driver
- extcon-arizona driver
- extcon-palmas driver
- Remove unnecessary OOM messages for all extcon device drivers
3. Fix minor issue of extcon core
- Re-order the sequence of extcon device driver in Kconfig/Makefile alphabitically
- Set parent device of extcon device automatically using devm_extcon_dev_allocate()
4. Fix MAX77693 driver
- This patchset has dependency on MFD/Regulator/Extcon. So, Lee Jones
(MFD Maintainer) created Immutable branch between MFD and Extcon due
for v3.17 merge-window and then I merged this patchset from MFD git repo[1]
to Extcon git repo.
[1] git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
(branch: ib-mfd-extcon-regulator)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJT0aFrAAoJEJzN3yze689TGL4QAIAsofuwlFTSi28WAxTDxXPE
7o8FGcikRkvOcMsKaa/482JpvRrcZEsO2uXMMGdYv4mCm8BPGlw1fmNYx1Ai+aWT
A04P7TqKdddo7Id4FGSYpSMHekfrgmEkwxliEEZ2zcRJrAovq4KSKZoZ4eY5NXUm
widR7LtGFQXnCmNuEzptNlG+s9TNtPF2u0kondgR0zZlEqU03b8uN4m5DO6UaxTB
1X3rqeSENcPWyu/2tWl0pUGDJqUFfSzqU0XMoDU5zto/N5RZKyucRXUUPZRYlb+Z
OuvsQT1ASi2nzqB7DDroC6iFmYi3hQPkyzI8K9L3XZVXcObHWNH6gv8WKpUaFtZI
VK3nKaDm8jO9DvHZ+p8PEkKBkvPNA1lAOoJdqeJUe9WtVF6TP/Gi5R1OF+b1CdOV
ms2jEQWDAzNejNT1h6XxRMcJkmSlPtGHYP6z5sIbzXOJJSqq224jn9viTJSCCfJa
FV7Qyd6xjxJEMuWbZLYteTNL9nFbLhAnFa1ETgFsbhZ5AwHzojMZip4LwsaoVlFi
OUwsQ6jNLLVCqLo0B68ksAuS3AKw3b3ar5kB0qEiDmkskTP6Acx+WqyMY+dJSaMQ
x3XNzzWug8370pvwXcRnuDrx1Vsweiz4H2QkpuGc3lzL9Oxy5wNRnf+BgK8OT2k9
OYgQsnO3NyoKc8YDrpUh
=zJIS
-----END PGP SIGNATURE-----
Merge tag 'extcon-next-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-next
Chanwoo writes:
Update extcon for v3.17
This patchset add new extcon provider driver and fix minor issue of extcon driver.
Detailed description for patchset:
1. Add new Silicon-Mitus SM5502 MUIC (Micro-USB Interface Controller) device
- extcon-sm5502 driver is capable of identifying the type of the external power
source and attached accessory. And external power sources, such as Dedicated
charger or a standard USB port, are able to charge the battery in the smart
phone via the connector.
2. Fix minor issue of extcon driver
- extcon-arizona driver
- extcon-palmas driver
- Remove unnecessary OOM messages for all extcon device drivers
3. Fix minor issue of extcon core
- Re-order the sequence of extcon device driver in Kconfig/Makefile alphabitically
- Set parent device of extcon device automatically using devm_extcon_dev_allocate()
4. Fix MAX77693 driver
- This patchset has dependency on MFD/Regulator/Extcon. So, Lee Jones
(MFD Maintainer) created Immutable branch between MFD and Extcon due
for v3.17 merge-window and then I merged this patchset from MFD git repo[1]
to Extcon git repo.
[1] git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
(branch: ib-mfd-extcon-regulator)
This patch makes init_net's high_thresh limit to be the maximum for all
namespaces, thus introducing a global memory limit threshold equal to the
sum of the individual high_thresh limits which are capped.
It also introduces some sane minimums for low_thresh as it shouldn't be
able to drop below 0 (or > high_thresh in the unsigned case), and
overall low_thresh should not ever be above high_thresh, so we make the
following relations for a namespace:
init_net:
high_thresh - max(not capped), min(init_net low_thresh)
low_thresh - max(init_net high_thresh), min (0)
all other namespaces:
high_thresh = max(init_net high_thresh), min(namespace's low_thresh)
low_thresh = max(namespace's high_thresh), min(0)
The major issue with having low_thresh > high_thresh is that we'll
schedule eviction but never evict anything and thus rely only on the
timers.
Signed-off-by: Nikolay Aleksandrov <nikolay@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
merge functionality into the eviction workqueue.
Instead of rebuilding every n seconds, take advantage of the upper
hash chain length limit.
If we hit it, mark table for rebuild and schedule workqueue.
To prevent frequent rebuilds when we're completely overloaded,
don't rebuild more than once every 5 seconds.
ipfrag_secret_interval sysctl is now obsolete and has been marked as
deprecated, it still can be changed so scripts won't be broken but it
won't have any effect. A comment is left above each unused secret_timer
variable to avoid confusion.
Joint work with Nikolay Aleksandrov.
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Nikolay Aleksandrov <nikolay@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When the high_thresh limit is reached we try to toss the 'oldest'
incomplete fragment queues until memory limits are below the low_thresh
value. This happens in softirq/packet processing context.
This has two drawbacks:
1) processors might evict a queue that was about to be completed
by another cpu, because they will compete wrt. resource usage and
resource reclaim.
2) LRU list maintenance is expensive.
But when constantly overloaded, even the 'least recently used' element is
recent, so removing 'lru' queue first is not 'fairer' than removing any
other fragment queue.
This moves eviction out of the fast path:
When the low threshold is reached, a work queue is scheduled
which then iterates over the table and removes the queues that exceed
the memory limits of the namespace. It sets a new flag called
INET_FRAG_EVICTED on the evicted queues so the proper counters will get
incremented when the queue is forcefully expired.
When the high threshold is reached, no more fragment queues are
created until we're below the limit again.
The LRU list is now unused and will be removed in a followup patch.
Joint work with Nikolay Aleksandrov.
Suggested-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Nikolay Aleksandrov <nikolay@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
With a flash-based BBT there is no reason to move the Factory Bad
Block Marker from the data area buffer (to where it is mapped by the
GPMI NAND controller) to the OOB buffer. Thus, make this feature
configurable via DT. This is required for the Ka-Ro electronics
platforms.
In the original code 'this->swap_block_mark' was synonymous with
'!GPMI_IS_MX23()', so use the latter at the relevant places.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
We don't have license to redistribute this firmware, so extract
it from the driver, and add the needed headers.
Signed-off-by: Matthias Schwarzott <zzam@gentoo.org>
Tested-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The Allwinner A31 and A23 SoCs have a reset controller
maintaining the UART in reset by default.
This patch adds optional reset support to the driver.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
- Armada XP
- Fix return value check in pmsu code
- Document URLs for new public datasheets (Thanks, Marvell & free-electrons!)
- Armada 370/38x
- Add cpuidle support
- mvebu
- Fix build when no platforms are selected
- Update EBU SoC status in docs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJT0kjkAAoJEP45WPkGe8ZnqpsQALFvbZKqBmvm+dj4G/dB9YYg
ihJM1FasU5yrHWhQlUSJw3Lntf/WwK2Qbrq3NmeCNo9qxx5r3IOv8inLah+XsXWv
C4RyiqmbnbiUg24QwHHGHLnRZuKCZdciiCyVmDO5DxRiT7Ov7EffOiiEws1WIUU1
6os30LEp82UpfcUkevJi12AkQvgTcX8tQXN2Kc7TgbxzJcyOt9M03BUej9gDdqD3
XfeBZv/WTapZllifRF04zsVJUtPKx48BmR0KdInYlsRfjg7knbYb1qkC7iysPJvv
G2XPWYOTVC7bbY+ZRfDcreowcTbBxXNiVbtPMM0+5kfli76/thPFutlA9/hi5plR
WeGa6V+M61RMdOexg9C/lVIpdqXLpI1xINlRv4vyjalm28JgvzAoucaaFnY6Rdxt
ApDIbhHzYCWyHwMn9DXi5s2nhMFL7i7JXCL/iDySzZB+ZNSKd+ULn1AhTOnOjFSL
jU7S9htD8tNZ7MuTX1Jg6gsuGxH1yr8x6kUX99DymUiYlKT7XbrXPa3Xf9vS8dx+
j0y7J6aJET7dlReH3tScehKOjnt44Djwgb9HiEilMNNYCWUQkKwxZCxnDQ6xNFCV
COXfu+nx87yVbBhSlJH+m0hQbf3jBmx/vuKnjYLRrZ/ATeWv/uWd78G2tZV7ercU
AiXn0eiPzFWML9isjqzd
=y40Y
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-3.17-4' of git://git.infradead.org/linux-mvebu into next/soc
Merge "mvebu SoC changes for v3.17 (round 4)" from Jason Cooper:
- Armada XP
- Fix return value check in pmsu code
- Document URLs for new public datasheets (Thanks, Marvell & free-electrons!)
- Armada 370/38x
- Add cpuidle support
- mvebu
- Fix build when no platforms are selected
- Update EBU SoC status in docs
* tag 'mvebu-soc-3.17-4' of git://git.infradead.org/linux-mvebu: (21 commits)
Documentation: arm: misc updates to Marvell EBU SoC status
Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC
ARM: mvebu: fix build without platforms selected
ARM: mvebu: add cpuidle support for Armada 38x
ARM: mvebu: add cpuidle support for Armada 370
cpuidle: mvebu: add Armada 38x support
cpuidle: mvebu: add Armada 370 support
cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7
ARM: mvebu: export the SCU address
ARM: mvebu: make the snoop disabling optional in mvebu_v7_pmsu_idle_prepare()
ARM: mvebu: use a local variable to store the resume address
ARM: mvebu: make the cpuidle initialization more generic
ARM: mvebu: rename the armada_370_xp symbols to mvebu_v7 in pmsu.c
ARM: mvebu: use the common function for Armada 375 SMP workaround
ARM: mvebu: add a common function for the boot address work around
ARM: mvebu: sort the #include of pmsu.c in alphabetic order
ARM: mvebu: split again armada_370_xp_pmsu_idle_enter() in PMSU code
ARM: mvebu: fix return value check in armada_xp_pmsu_cpufreq_init()
clk: mvebu: extend clk-cpu for dynamic frequency scaling
ARM: mvebu: extend PMSU code to support dynamic frequency scaling
...
Conflicts:
arch/arm/mach-mvebu/Kconfig
drivers/cpuidle/cpuidle-armada-370-xp.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
As announced parts from ARM they will probably be used in socs shortly.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
- support common clock framework for s5pv210 clock
- add generic PHY driver on s5pv210 to support it via DT
- add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards
- remove board files from mach-s5pv210 and unused codes
- enable multiplatform for s5pv210
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJT0ZTrAAoJEA0Cl+kVi2xqaAgP/RZjKZizSPCTTM71wQv4QWjU
TR3SJMgejnePLzHU6h22P11PBV1KOCec9nko+7M+vQeSCJscoJsudmSiKRceh0tC
9ATq5eSIw/p3WVjRSFOsj95O1urKdFQPzQ/odwwtw4WRnFerZoY9ihRBKnZxRCJc
oQdFTDTJeBVlPUxLV1/slS+HWP+I/csYXnAF1Y2tz0GxEX+7iQ6LS7YuCB3kGiG1
S4mcNyfyhUjpxO4oL0QazCEpsX7UgyNm9MMaW7jGxjc7J7GraiVnFdo3C8yZIeS/
zAkA6YnOBoFqwCwgJsvo8VBsfqUtMC49GVJYSFiVNe3s9W6awuLfr8GhhHLX7q6t
dGib2p0DtYbVNGRUHW1PWkwBefdFEGkYmNugcS9/WiqTL2oUr3L11LaAEbzVC2pq
cBnT7+8lyEoaBmpeMDpmXUti4fyQH4uNxMjoRT4qDI1d/U20+d5pZFZzuQbuZ5xX
UZnk4vs6YRZAqYgkPh9Wg5A56J+ku21oHBlnbjIxBgrjA9UjP4foCk3rA8iZT1JD
eH7r033zcOZ1LUOZWO53O4/l5pE8cfU6FweEb9h6ADfrMB8vKTAeDbwipI4n+l0v
/VxlIV+cRCEuWPCNuYJkOLpqj7L36MFkbkppJy8wyPPPu1UUrpAWpq/Pw60uEW7M
hkVo/JtpTjqzUEEb7mC1
=7b91
-----END PGP SIGNATURE-----
Merge tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung S5PV210 DT support for v3.17" from Kukjin Kim:
- support common clock framework for s5pv210 clock
- add generic PHY driver on s5pv210 to support it via DT
- add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards
- remove board files from mach-s5pv210 and unused codes
- enable multiplatform for s5pv210
* tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
clk: samsung: s5pv210: Remove legacy board support
ARM: SAMSUNG: Remove remaining legacy code
gpio: samsung: Remove legacy support of S5PV210
ARM: S5PV210: Enable multi-platform build support
cpufreq: s5pv210: Make the driver multiplatform aware
ARM: S5PV210: Register cpufreq platform device
ARM: S5PV210: move debug-macro.S into the common space
ARM: S5PV210: Untie PM support from legacy code
ARM: S5PV210: Remove support for board files
ARM: dts: Add Device tree for s5pc110/s5pv210 boards
ARM: dts: Add Device tree for s5pv210 SoC
ARM: S5PV210: Add board file for boot using Device Tree
phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver
clk: samsung: Add S5PV210 Audio Subsystem clock driver
ARM: SAMSUNG: Remove legacy clock code
serial: samsung: Remove support for legacy clock code
cpufreq: s3c24xx: Remove some dead code
ARM: S5PV210: Migrate clock handling to Common Clock Framework
clk: samsung: Add clock driver for S5PV210 and compatible SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTzJFGAAoJEHm+PkMAQRiGNzQH/087gQch5K+A2HKvPzjUXq57
G82DJHLONMMq8+NY3Vqhp8g2V8zRbXGJEvMJMsyuscO37Vo7ADcrYo8lqY9w5bIl
h+Zarhkqz0rqRs2SfMMIVzdd2W7MzL+lqj3GplGPxHztw0+qk7PRKILx6eRppGaH
JaD4NfkD5+1vfve/2d1ze9D5pCiw6PFNzjesKZxScQhNhIyLdRamfSTY4r9XeURo
CxpwjphEYfvAcgc39mwzEHPHyKSqULu0By6R8FXQpJ9QjVtzcGEiF+cPqGncpZOR
5ZSyU5e1CpBl9w8o6Lm9ewXmaCSnBU/VFrOwWvZrXfokZedXBOz7KdShU93XFjU=
=0VJM
-----END PGP SIGNATURE-----
Merge branches 'samsung/cleanup' and 'samsung/s5p-cleanup-v2', tag 'v3.16-rc6' into next/soc
The following samsung branches are based on these cleanups,
which are already in mainline before this branch gets pulled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The sh-mmcif driver implements DT support but the bindings are not
documented. Document them.
Cc: devicetree@vger.kernel.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The DT binding example in the documentation is missing the -supply
suffix for the vmmc and vqmmc regulators. Fix it.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch introduces a driver that handles configuration of CLKOUT pin
of Exynos SoCs that can be used to output certain clocks from inside of
the SoC to a dedicated output pin.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
This pull request adds support for the clocks found in the newly supported
Allwinner A23 clocks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTyYx4AAoJEBx+YmzsjxAgj9QP/2zRnM312oQ0MPPys+QG8mLg
Ecsi+RVuCnfk3+JGqvvh0FRkyNinK4KHitPc2YAvK07vOjwhalYNfFRtuK4MRgmW
z217GHzr67GJuu5nn6xlP1c6NYSZEtImvbksnthE4SPXrxA56fp4FME9/I4/vOR+
/+5KNWHCfngfZTBVFvjeXAh/pNXEdYBpPqe/CQCmhjDW8rxJJAVoFCAXA+Xx2ln/
StJXnSQdiJtoDLF19iaqp+W1i2xhaLF3oLUcEoqL3/ZGTTrm2ylT8dFyCb2RpIsn
6CEzVKjky6Yr851AaU+d2p/IQEUT1j35zPiLDhyZCTsEEVW91h89ykB2GjlEwH+n
cPicqfP+5/y0rnGU7JDjf4eqv/l+VX2M7/BKra2H4xLUrHXqZOSFnkidF6cdE77C
nLHfNXR4eyIfw5r7ccwd2ZMTofzNpEIAixt6/UjfpCun0u1uFI54/vfEoXvcyemm
IggOmah8BMogMG8ZhDHgQo5ln8JFjULkackAcwQL+a1qLZW601NOsa9Ke0xuCkEE
lXw+JytWUwz+D+hxB5XAvYMLNRXZ4WuIY/VO4SfNR6fdc+9bs0QN942QA7T+46g2
SvUFml/9sbGKFOBRWx+sEebxoLz0jnt7FqxRU4z0ZK0W6qLiNs4TeIOy5JpxPCAE
lEAwP7hv5da8InxsSlxR
=85He
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clocks-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next-sunxi
Allwinner clocks additions for 3.17
This pull request adds support for the clocks found in the newly supported
Allwinner A23 clocks.
These patches add support for a handful of Qualcomm's SoC clock
controllers: APQ8084 gcc and mmcc, IPQ8064 gcc, and APQ8064.
There's also a small collection of bug fixes that aren't critical
-rc worthy regressions because the consumer drivers aren't present
or using the buggy clocks and one optimization for HDMI.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABCAAGBQJTyb5mAAoJENidgRMleOc9mCAP/3JAiwaf0vsdhxf5/hQRakTq
DzGnjtMV3fHvEc5vBO5mdv8uiOv6P6dkWdBh2cRk52sFgdqz+qcr4IfQUw7yVUDN
Zyr9BqrrEEllQLTRbzf/8cEIWyXripp7kV7yVjP2Ng37NPktliYb26sqp2HODeEa
38+yi/gXbUQ5Gzh0EIeUmt1ORpJfa9qGlxRQGuDT+wL35Fb6Q/Lr+emfacmVkJuO
FYOXRHVK1i3WnjigCATsYmoD5jFkpGBqJgUFfzyy5oz94WrL6QRrSbQS3ASsWx2i
c2tSXvrOSX9Xf9/UOjf6ZZ+5qvdjxWOHkkilerbJDEUnV4W9G8dmag/7czUINVmU
/21KUoObj+wLdWl4SFMdUmksGkHLm7j6Tnllfkcke3FQrELovfb4ARAsxiU2zvXy
646qfk7f+0SWPf3/3fKl9JEQnqBaOimDjX6ibbHjY16r4xiCVMzACVeI3CQtlFyZ
knMQVjZDcgj1w80SSuG60e3Ahd5rknH8eB2h+nrUtbbjz2S1u733Dht4vBgDkSHZ
yntZ/u/7HhNehqjlBWBQyLuTPRIBTENQW2W95QR9W62FaQgzZXd7/n74gcoS3CsG
pqI1Glb166GbmiEtbXEKrOIwMenOiR7RY1/BsKO0kAqJitrShy8mvqTEzFyDPZo5
HdqttkTPpDGcF53PtltY
=azpb
-----END PGP SIGNATURE-----
Merge tag 'qcom-clocks-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into clk-next-msm
qcom clock changes for 3.17
These patches add support for a handful of Qualcomm's SoC clock
controllers: APQ8084 gcc and mmcc, IPQ8064 gcc, and APQ8064.
There's also a small collection of bug fixes that aren't critical
-rc worthy regressions because the consumer drivers aren't present
or using the buggy clocks and one optimization for HDMI.
Document the new RDS receiver controls. This will be used by the radio-miropcm20
driver.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Document the new RDS features that will be supported by the si4713 driver.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This patch explicitly documents the relationship between bytesused and data_offset.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This patch adds helper functions to configure clock parents and rates
as specified through 'assigned-clock-parents', 'assigned-clock-rates'
DT properties for a clock provider or clock consumer device.
The helpers are now being called by the bus code for the platform, I2C
and SPI busses, before the driver probing and also in the clock core
after registration of a clock provider.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Introduce a device tree binding document for the MPC512x DMA controller
Signed-off-by: Alexander Popov <a13xp0p0v88@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The "security: introduce kernel_fw_from_file hook" patch defined a
new security hook to evaluate any loaded firmware that wasn't built
into the kernel.
This patch defines ima_fw_from_file(), which is called from the new
security hook, to measure and/or appraise the loaded firmware's
integrity.
Signed-off-by: Mimi Zohar <zohar@linux.vnet.ibm.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Add helper functions that allow regulator consumers to obtain low-level
details about the regulator hardware, like the voltage selector register
address and such. These details can be useful when configuring hardware
or firmware that want to do low-level access to regulators, with no
involvement from the kernel.
The use-case for Tegra is a voltage-controlled oscillator clocksource
which has control logic to change the supply voltage via I2C to achieve
a desired output clock rate.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The Allwinner A31 DMA controller is rather simple to describe in the DT. Add
the bindings documentation.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Make /sys/bus/rbd/devices/<id>/parent show the entire chain of parent
images. While at it, kernel sprintf() doesn't return negative values,
casting to unsigned long long is no longer necessary and there is no
good reason to split into multiple sprintf() calls.
Signed-off-by: Ilya Dryomov <ilya.dryomov@inktank.com>
Reviewed-by: Alex Elder <elder@linaro.org>
Shared Peripheral ASRC, running on SPBA, needs to use shp sciprts for
DMA transfer. So this patch just adds a new DMATYPE for it.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
We're about to add a device tree for the Parallella board.
Cc: Andreas Olofsson <andreas@adapteva.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Following the merging of mach-kirkwood into mach-mvebu, the removal of
mach-kirkwood, and the progress of the integration of mach-dove into
mach-mvebu, this commit makes a few updates to the Marvell README file
in the kernel documentation.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1406227593-29749-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Marvell has very recently released a public version of the "Functional
specifications" and "Hardware specifications" datasheets for the
Marvell Armada XP SoC. This allows contributors and developers not
under NDA with Marvell to get more details about this SoC than what
the current kernel code shows, and hopefully allows to improve the
support for this SoC in the mainline kernel, as well as in other
projects.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1406227593-29749-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
New functionality
* A new modifier to indicate that a rotation is relative to either
true or magnetic north. This is to be used by some magnetometers
that provide data in this way.
* hid magnetometer now supports output rotations from various variants on
North
* HMC5843 driver converted to regmap and reworked to allow easy support
of other similar devices. Support for HMC5983 added via both i2c and SPI.
* Rework of Exynos driver to simplify extension to support more devices.
* Addition of support for the Exynos3250 ADC (which requires an additional
clock) Support for quite a few more devices on its way.
Cleanups
* ad7997 - a number of cleanups and tweaks to how the events are controlled
to make it more intuitive.
* kxcjk - cleanups and minor fixes for this new driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJT0VkRAAoJEFSFNJnE9BaIVmwP/i9/kzwHaXr09GbOMoUNlnuP
4wU+qJTucPOlj0rNvE6VewOshkF5G1soMAc97MAlEL12mU0qXt+q9m9xu7aVnQwF
FU87BECdmbWVSIfGnCwkm2PzN+zLmGKr/TTPdCa+kuX1WIq7tUfVwYJVqU7vxDde
n1G5Rx3sbujwAd/kP5X0Bk35X2Wng4Af0f3tkuoRC8nFWCxXN1qW9VZHlJCp5UIh
c4J1COUeANf26CnMbgz3qqumGtYX1gbGHi3zzD4vYxD+inqKtvg/pqTqge3J7E9D
HBhyNn0Rd3m2DDoz/5fRQ5z/5CAKLkpsqJa9ZsYLzzmo3AHUDYoVA6tGIoExhW9q
7P8FJgJx0Gc58V/A0Y48vcHAcqinoL+2vphc5BHZXA2wdeVHZxWO3e7HX7KUmr55
AXlHowFf0VKoJjJtcfFkFjalF5flIfyA7Kiu+10kptj8wsoX+AjUHXPYDfeRxw+S
7nkr/7janHvsBhoP83PqPdRSrlnNPiLJSl8ZIgegVpKOBtsRKJLGW4zlwTp1lchr
M1ydD9eh3uUT3luKRCJzoXo60Ia15x3KBrZxIkQiORIW2otlfUm7dduICc4p9Ij7
RjU8S1NbOVZiD8fNcbmnFp0Xj3cGf4K/Jf1Jvs/QrGB2GAuYoF48BIyeaHj0tCr8
n4wJtDu+aly6vzM7Kf8d
=iOto
-----END PGP SIGNATURE-----
Merge tag 'iio-for-3.17d' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes:
Fourth round of IIO new drivers, functionality and cleanups for the 3.17 cycle
New functionality
* A new modifier to indicate that a rotation is relative to either
true or magnetic north. This is to be used by some magnetometers
that provide data in this way.
* hid magnetometer now supports output rotations from various variants on
North
* HMC5843 driver converted to regmap and reworked to allow easy support
of other similar devices. Support for HMC5983 added via both i2c and SPI.
* Rework of Exynos driver to simplify extension to support more devices.
* Addition of support for the Exynos3250 ADC (which requires an additional
clock) Support for quite a few more devices on its way.
Cleanups
* ad7997 - a number of cleanups and tweaks to how the events are controlled
to make it more intuitive.
* kxcjk - cleanups and minor fixes for this new driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTzJFGAAoJEHm+PkMAQRiGNzQH/087gQch5K+A2HKvPzjUXq57
G82DJHLONMMq8+NY3Vqhp8g2V8zRbXGJEvMJMsyuscO37Vo7ADcrYo8lqY9w5bIl
h+Zarhkqz0rqRs2SfMMIVzdd2W7MzL+lqj3GplGPxHztw0+qk7PRKILx6eRppGaH
JaD4NfkD5+1vfve/2d1ze9D5pCiw6PFNzjesKZxScQhNhIyLdRamfSTY4r9XeURo
CxpwjphEYfvAcgc39mwzEHPHyKSqULu0By6R8FXQpJ9QjVtzcGEiF+cPqGncpZOR
5ZSyU5e1CpBl9w8o6Lm9ewXmaCSnBU/VFrOwWvZrXfokZedXBOz7KdShU93XFjU=
=0VJM
-----END PGP SIGNATURE-----
Merge tag 'v3.16-rc6' into next
Merge with mainline to bring in changes to MFD to allow merging
ipaq-micro-ts driver.
Both functions were introduced to let gpio drivers request their own
gpio pins. Without exporting the functions, this can however only be
used by gpio drivers built into the kernel.
Secondary impact is that the functions can not currently be used by
platform initialization code associated with the gpio-pca953x driver.
This code permits auto-export of gpio pins through platform data, but
if this functionality is used, the module can no longer be unloaded due
to the problem solved with the introduction of gpiochip_request_own_desc
and gpiochip_free_own_desc.
Export both function so they can be used from modules and from
platform initialization code.
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There are a number of outstanding workitems that need to be done on the
device tree code. Start tracking them so that interested developers can
pick up a task and start working on it.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Introducing DT transactional support.
A DT transaction is a method which allows one to apply changes
in the live tree, in such a way that either the full set of changes
take effect, or the state of the tree can be rolled-back to the
state it was before it was attempted. An applied transaction
can be rolled-back at any time.
Documentation is in
Documentation/devicetree/changesets.txt
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
[glikely: Removed device notifiers and reworked to be more consistent]
Signed-off-by: Grant Likely <grant.likely@linaro.org>
This adds some documentation about clock sources, clock events,
the weak sched_clock() function and delay timers that answers
questions that repeatedly arise on the mailing lists.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Colin Cross <ccross@google.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
special clock ('sclk_adc') for ADC which provide clock to internal ADC.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Merge basic support for the Mediatek Cortex-A7 SoCs from Matthias Brugger:
Support is quite basic, as the only component working up to now are the
timers.
* tag 'v3.17-next-mediatek-support' of https://github.com/mbgg/linux-mediatek:
arm: mediatek: add dts for Aquaris5 mobile phone
dt-bindings: add documentation for Mediatek SoC
arm: add basic support for Mediatek MT6589 boards
Signed-off-by: Matthias Brugger matthias.bgg@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds support for the hmc5983 i2c interface.
This chip is almost identical to the hmc5883. The difference being added
temperature compensation, additional available sample rate (220Hz) and an SPI
interface.
Signed-off-by: Josef Gajdusek <atx@atx.name>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Driver providing perf backend for ARM Cache Coherent Network
interconnect. Supports counting all hardware events and crosspoint
watchpoints.
Currently works with CCN-504 only, although there should be
no changes required for CCN-508 (just impossible to test it now).
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
gpio_lock/unlock_as_irq() are working with (chip, offset) arguments and
are thus not using the old integer namespace. Therefore, there is no
reason to have gpiod variants of these functions working with
descriptors, especially since the (chip, offset) tuple is more suitable
to the users of these functions (GPIO drivers, whereas GPIO descriptors
are targeted at GPIO consumers).
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch allows support for 3 levels of page tables with 64KB page
configuration allowing 48-bit VA space. The pgd is no longer a full
PAGE_SIZE (PTRS_PER_PGD is 64) and (swapper|idmap)_pg_dir are not fully
populated (pgd_alloc falls back to kzalloc).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Jungseok Lee <jungseoklee85@gmail.com>
Rather than guessing what the maximum vmmemap space should be, this
patch allows the calculation based on the VA_BITS and sizeof(struct
page). The vmalloc space extends to the beginning of the vmemmap space.
Since the virtual kernel memory layout now depends on the build
configuration, this patch removes the detailed description in
Documentation/arm64/memory.txt in favour of information printed during
kernel booting.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Jungseok Lee <jungseoklee85@gmail.com>
This patch adds memory layout and translation lookup information
about 48-bit address space with 4K pages. The description is based
on 4 levels of translation tables.
Signed-off-by: Jungseok Lee <jays.lee@samsung.com>
Reviewed-by: Sungjinn Chung <sungjinn.chung@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Jungseok Lee <jungseoklee85@gmail.com>
The default cache operations for ARM64 were changed during 3.15.
To use coherent operations a "dma-coherent" device tree property
is required. If that property is not present in the device tree
node then the non-coherent operations are assigned for the device.
Add support to the ccp driver to assign the AXI DMA cache settings
based on whether the "dma-coherent" property is present in the device
node. If present, use settings that work with the caches. If not
present, use settings that do not look at the caches.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Pull clockevents from Danel Lezcano:
* New timer driver for the Cirrus Logic CLPS711X SoC
* New driver for the Mediatek SoC which includes:
* A new function for of, acked by Rob Herring
* Move the PXA driver to drivers/clocksource, add DT support
* Optimization of the exynos_mct driver
* DT support for the renesas timers family.
* Some Kconfig and driver fixlets
Add binding documentation for the General Purpose Timer driver of
the Mediatek SoCs.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Updated drm documentation to include desscription of aspect ratio property.
v2: Updated aspect ratio specific documentation on top of the HTML table created.
Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Cc: Sagar Kamble <sagar.a.kamble@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Sagar Kamble <sagar.a.kamble@intel.com>
Acked-by: Dave Airlie <airlied@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Merge armada changes, I've confirmed the componenet changes are same as in Greg's tree.
* 'drm-armada-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
drm/armada: register crtc with port
drm/armada: permit CRTCs to be registered as separate devices
dt-bindings: add Marvell Dove LCD controller documentation
drm/armada: update Armada 510 (Dove) to use "ext_ref_clk1" as the clock
drm/armada: convert to componentized support
drm: add of_graph endpoint helper to find possible CRTCs
component: fix bug with legacy API
drm/armada: make variant a CRTC thing
drm/armada: move variant initialisation to CRTC init
drm/armada: use number of CRTCs registered
drm/armada: move IRQ handling into CRTC
component: add support for component match array
component: ignore multiple additions of the same component
component: fix missed cleanup in case of devres failure
This patch add documentation for binding of SM5502 MUIC (Micro-USB Interface
Controller) device which is using EXTCON subsystem. The SM5502 MUIC device
can detect various external accessories when external accessories is attached
or detached.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
The DocBook documentation is incorrect: on ISDB-T, interleaving
time is always a power of 2. Fix it and provides a table showing
the actual interleaving length for each mode.
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Adds regulator support in PHY core. PHY core is modified to support
representation of multi-phy PHY providers with each individual PHY
as sub-node OF PHY provider node. New PHY drivers adapted to PHY
framework (hix5hd2 SATA PHY, QCOM APQ8064 SATA PHY,
QCOM IPQ806x SATA PHY, Berlin SATA PHY and MiPHY356x). Existing
TI PIPE3 PHY can now be used for PCIe too. Includes misc fixes and
cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTzhPPAAoJEA5ceFyATYLZYH0QAJTrXObYG3pSWonyqn3fUUkZ
G9GexVDajtZw3SQytVJseDsiwmqZAib/ePBI/HGNGa40Iq59VuvtnabMJWF48gQk
GPufh3cXxe/MiC0U7wHncRhoq7Al7JAvbpihVA4fXD6W4ji9JrbogaxB6+tweAgW
4i8+t9SkamLMz7OwNME7/lTOx+kUtEakoHmwfgf0wRYmGktyAG8HJ+mOoJgEeZa/
weC5J1ay8nt2ISi4gyckaW83sl5UvfWG1XOzqypZXhTARGvDIZ/4fPyUsrhjCv6L
V5SGuq0HdUgbc7FS5Gvnn56PSHO8QFG0li2VSaJKlf1vYv/hGDxMFcpbuFOAhl99
+edueAAFr/NY2/lpAhf6qse2SRQqJGqy33Rn8mp4x3yIX18bLKvg+i/MXhN7xUFn
5lRitH4v23kKT6iv5iyZP5YW5ljYMSKmG122Ri3YwHB9cFvZKG8aEzr2Js1gSVTI
9K8AcQ3VpCi+9IS1WTVCU/nPYOUTm+wb5i4TgC19yjUw97+i9e2DtosHAwx3Xj93
HRSxWmJOHRwI0mBPyrIiNj40Hya9HU+7sf2Z6W3O9BKGWYxYVZ8aarFm/ChQDUBS
Smmj8eGdW7yRQ+opb1usYcePoxsrp2B86fNsCRqc/oI4JGyLh7OcDKIaQhGtcEep
pZjQ+ClSzUv65XVVZVqi
=uUhi
-----END PGP SIGNATURE-----
Merge tag 'for_3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes:
for_3.17
Adds regulator support in PHY core. PHY core is modified to support
representation of multi-phy PHY providers with each individual PHY
as sub-node OF PHY provider node. New PHY drivers adapted to PHY
framework (hix5hd2 SATA PHY, QCOM APQ8064 SATA PHY,
QCOM IPQ806x SATA PHY, Berlin SATA PHY and MiPHY356x). Existing
TI PIPE3 PHY can now be used for PCIe too. Includes misc fixes and
cleanups.
fsl,usbphy is no optional property. This patch moves it to the list of
required properties.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Update comment about gpio-cells which says not correctly to be set to 0.
When we want to reference tca6507 gpio #gpio-cells must be set to 2 (it is
already correct in example).
Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
Since the OPP layer is a kernel library which has been converted to be
directly selectable by its callers rather than user selectable and
requiring architectures to enable it explicitly the ARCH_HAS_OPP symbol
has become redundant and can be removed. Do so.
Signed-off-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Add support for PCIe controller in DRA7xx. This driver re-uses the
designware core code that is already present in kernel.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Mohit Kumar <mohit.kumar@st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Call the ->free_preparse() key type op even after ->preparse() returns an
error as it does cleaning up type stuff.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Steve Dickson <steved@redhat.com>
Acked-by: Jeff Layton <jlayton@primarydata.com>
Reviewed-by: Sage Weil <sage@redhat.com>
Allow a key type's preparsing routine to set the expiry time for a key.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Steve Dickson <steved@redhat.com>
Acked-by: Jeff Layton <jlayton@primarydata.com>
Reviewed-by: Sage Weil <sage@redhat.com>
The configuration address space has so far been specified in *ranges*,
however it should be specified in *reg* making it a platform MEM resource.
Hence used 'platform_get_resource_*' API to get configuration address space
in the designware driver.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Mohit Kumar <mohit.kumar@st.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Arnd Bergmann <arnd@arndb.de>
This adds a DT binding documentation for the MT6589 SoC from Mediatek.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Instead of relying on pinmux->disable(), make the gpio function an
explicit function for all pins that supports it.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Conflicts:
drivers/infiniband/hw/cxgb4/device.c
The cxgb4 conflict was simply overlapping changes.
Signed-off-by: David S. Miller <davem@davemloft.net>
This changes the default IOTLB flushing method to lazy flushing, which
means that there will be no direct flush after each DMA unmap operation.
Instead, the iommu bitmap pointer will be adjusted after unmap, so that
no DMA address will be re-used until after an iommu bitmap wrap-around.
The only IOTLB flush will then happen after each wrap-around.
A new kernel parameter "s390_iommu=" is also introduced, to allow changing
the flushing behaviour to the old strict method.
Reviewed-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on
the IPQ806x family of SoCs.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
In case of multi-phy PHY providers, each PHY should be modeled as a sub
node of the PHY provider. Then each PHY will have a different node pointer
(node pointer of sub node) than that of PHY provider. Added this provision
in the PHY core.
Also fixed all drivers to use the updated API.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
The Berlin SATA PHY drives the PHY related to the SATA interface. Add
the corresponding documentation.
Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This patch adds binding spec for Qualcomm AP8064 SATA PHY.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Kiran Padwal <kiran.padwal@smartplayin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy-supply is a phandle to the regulator that provides power to the
PHY. This regulator is managed during the PHY power on/off sequence
by the phy core driver.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This patch adds support for Exynos3250 SoC to Exynos2USB PHY driver.
Although Exynos3250 has only one device phy interface, the register
layout and all operations that are required to get it enabled are almost
same as on Exynos4x12. The only different is one more register
(REFCLKSEL) which need to be set and lack of MODE SWITCH register.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
8-bit delay value (0xF1) is required for GEN2 devices to be enumerated
consistently. Added an API to be called from PHY drivers to set this delay
value and called it from PIPE3 driver to set the delay value.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
PCIe PHY uses an external pll instead of the internal pll used by SATA
and USB3. So added support in pipe3 PHY to use external pll.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
This panel is used by the Medcom Wide and supported by the
simple-panel driver.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
* .: (268 commits)
Linux 3.16-rc6
um: segv: Save regs only in case of a kernel mode fault
um: Fix hung task in fix_range_common()
um: Ensure that a stub page cannot get unmapped
Revert "um: Fix wait_stub_done() error handling"
btrfs: test for valid bdev before kobj removal in btrfs_rm_device
Btrfs: fix abnormal long waiting in fsync
random: check for increase of entropy_count because of signed conversion
ARM: EXYNOS: Fix core ID used by platsmp and hotplug code
ahci: add support for the Promise FastTrak TX8660 SATA HBA (ahci mode)
ARM: at91/dt: add missing clocks property to pwm node in sam9x5.dtsi
ARM: at91/dt: fix usb0 clocks definition in sam9n12 dtsi
ARM: at91: at91sam9x5: correct typo error for ohci clock
irqchip: gic: Fix core ID calculation when topology is read from DT
GFS2: fs/gfs2/rgrp.c: kernel-doc warning fixes
GFS2: memcontrol: Spelling s/invlidate/invalidate/
GFS2: Allow caching of glocks for flock
GFS2: Allow flocks to use normal glock dq rather than dq_wait
GFS2: replace count*size kzalloc by kcalloc
GFS2: Use GFP_NOFS when allocating glocks
...
Conflicts:
drivers/media/dvb-frontends/si2168.c
drivers/media/dvb-frontends/si2168_priv.h
drivers/media/tuners/si2157.c
V4L2_CID_BASE_LASTP1 should be V4L2_CID_LASTP1. This has probably been wrong
since the earliest days of this documentation until I did a copy-and-paste
and found out that V4L2_CID_BASE_LASTP1 doesn't actually exist :-)
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Add defines for the start line numbers of each field for both
525 and 625 line formats.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The fact that the pixelformat is using a packed RGB format has nothing
to do with the colorspace that is being used. Those are very different
things. The colorspace decides what color a triplet of RGB numbers
actually map to. E.g. a red color with values (255, 0, 0) is a different
type of red depending on the colorspace. If the original pixelformat was
e.g. YUV in colorspace REC709, then after the conversion to RGB the
colorspace is still REC709. Unless the hardware actually converted the
colorspace as well from REC709 to sRGB, but that rarely if ever happens.
Remove this incorrect comment.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
New field buffersize was added to inform application maximum
buffer size used. Add it to documentation too.
Cc: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
V4L2_SDR_FMT_CS14LE is complex signed 14-bit sample format, used
for software defined radio devices.
[m.chehab@samsung.com: remove V4L2_FL_USE_FH_PRIO setting to avoid
compilation breakage, as this flag doesn't exist anymore]
Signed-off-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
V4L2_SDR_FMT_CS8 is complex signed 8-bit sample format, used for
software defined radio devices.
Signed-off-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Document V4L2_SDR_FMT_RU12LE format. It is real unsigned 12-bit
little endian sample inside 16-bit space. Used by software defined
radio devices.
Signed-off-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Surprisingly enough, while a big set of patches, the majority is
composed of cleanups (using devm_*, fixing sparse errors, moving
code around, adding const, etc).
The highlights are addition of new support for PLX USB338x devices,
and support for USB 2.0-only configurations of the DWC3 IP core.
Signed-of-by: Felipe Balbi <balbi@ti.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTzTI9AAoJEIaOsuA1yqREIqcQAJbwMaDb5sp8dWst+nL1Vo8N
08bhOOM+o2KLiIBSNQh1hYtujpa06RSQMiNYZ7F/+R4Q3OAoq+uC0dD69TLEQ3Sd
1xi0UgUTAvtXo13TToRjIi0mYywrrkZ91Maqff5jZKdslOY4ZfAScpUQHyD3i1UO
JNUqpayYAnp8JJIGQ8CG1wAeJh/J8JH3O607vaknKVjds+WMkeC5ubnuV4sgVw71
8JTwxk22EkMTr2MKhHjZwcv016NMEvziinWVoTXcWN2Uwk42Dn1nhfaYWSvg7kZE
8/3t6zzdFMdoeeTEn2xXIQGTjbHW0sBS5+S+6PAon2YbjS3x40cbyLJnZ+KoVXog
iHDKAl5w53gd/7qMiv57dW+HRP0M7/m2iy/owIrY8H8DkM3uwFevaeq/G2raJKmA
frB1k95bSyypN7wVkALYv4nurP5+d7ERy9hPj/49M5giJXPpEIbgKN2qGdafaEx7
xzAI+GqYrFtmmg25+f6AQRicVczQNMCdDT8HPZ04099Z2JVY/4uOoqTl29CePMgo
OXeQ45ECMoJuRSwpF56e8h+qmsXp6WD31IhlcHseTvUvFu0Ex4SgUJhFP2UaF9WP
aOqz0w36yX/ME3VhQk9YImNqGoqEk6fYHIHhxfdDugt0n68+M56EiiwtKvd5v5BI
hCJAMBrv+WCGnJvWunVW
=aJY4
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v3.17 merge window
Surprisingly enough, while a big set of patches, the majority is
composed of cleanups (using devm_*, fixing sparse errors, moving
code around, adding const, etc).
The highlights are addition of new support for PLX USB338x devices,
and support for USB 2.0-only configurations of the DWC3 IP core.
Signed-of-by: Felipe Balbi <balbi@ti.com>
It's possible that the controller has an individually switchable power supply.
Therefore add support to control a supplying regulator.
As this is not always the case, the regulator is requested as optional.
Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
The Allwinner A23 SoC has a PRCM unit like the previous A31 SoC.
The differences are the AR100 clock can no longer be modified,
the APB0 clock has different divisors, and some clock gates are
gone.
This patch adds a compatible with a modified subdevice list for
the A23.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
the cpu state settable by user space.
This is necessary to avoid races in s390 SIGP/reset handling which
happen because some SIGPs are handled in QEMU, while others are
handled in the kernel. Together with the busy conditions as return
value of SIGP races happen especially in areas like starting and
stopping of CPUs. (For example, there is a program 'cpuplugd', that
runs on several s390 distros which does automatic onlining and
offlining on cpus.)
As soon as the MPSTATE interface is used, user space takes complete
control of the cpu states. Otherwise the kernel will use the old way.
Therefore, the new kernel continues to work fine with old QEMUs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTxSp+AAoJEBF7vIC1phx8RYgP/0mBaV3isXrCR+iisLJYNJjq
s6Ssl9TUMR3+lRZ9epytRd02UfkBGqVaW+HtRh5JP5KKAGSn2i3eB9WDAY7bD8i7
DVLVE2aO7okw1Z2G6CEO27dRfS0SCAfj/X77BRISyqVxK4eY86lAhQdyU5nB67TR
c0Fk4YHwjeBoQxZTAQr2xL4052gkB+Jp/PpltszILonsYNASOsxbcHqH4t+0SFmo
FGXydBn6eN+e3fWQSxetkrxvj14sj5K6ljiZoSMyw5nDfyrRn8RcCX87GjNLG+GR
X0eFB9Nl83NQoC5ksQtojunsx57+cEMgoWbdK7mxoqp+6+wJrvYB2eSKY77RYH4J
2xIy3klF/ypSZt7gxwL0pugi9QodGW39mA+stuezKUwyPalpMxHmRRwvHitGJjkP
KwvWc4m2QebKJ6RHhgkvZ0gMaVUJcqitrlXUxWgAAcH6MNBIC1g2ufsxnv51V/O6
SnspBWTPVDUqO6bJP4brJiAt8K7Jx3Bg5frpyN0jparh8Nmu3Kwfz0RtDYrUYyOe
p2o2lzY5L6gvY3iOrhvoc9zbpbyuycon8nUP4WOh/eGvIM2WV6cxmkck1Fo/wNso
evunS1FNvbN7Wxk5h4/XSVsfdcM/mUa3E7cVxgpg8+Aqse9qfpM35BlNWR+zf0G+
AdF90u/I+3mcRKWoSrKu
=86qw
-----END PGP SIGNATURE-----
Merge tag 'kvm-s390-20140715' of git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into kvm-next
This series enables the "KVM_(S|G)ET_MP_STATE" ioctls on s390 to make
the cpu state settable by user space.
This is necessary to avoid races in s390 SIGP/reset handling which
happen because some SIGPs are handled in QEMU, while others are
handled in the kernel. Together with the busy conditions as return
value of SIGP races happen especially in areas like starting and
stopping of CPUs. (For example, there is a program 'cpuplugd', that
runs on several s390 distros which does automatic onlining and
offlining on cpus.)
As soon as the MPSTATE interface is used, user space takes complete
control of the cpu states. Otherwise the kernel will use the old way.
Therefore, the new kernel continues to work fine with old QEMUs.
Let's document that this is a capability that may be enabled per-vm.
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Capabilities can be enabled on a vcpu or (since recently) on a vm. Document
this and note for the existing capabilites whether they are per-vcpu or
per-vm.
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
- kirkwood
- Add d2 Network v2 board
- mvebu
- Add Armada 375 ethernet node
- Add CA9 MPcore SoC controller node
- Add support for dynamic freq scaling on Armada XP
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyZ0+AAoJEP45WPkGe8ZnuS8P/A9ARBOZHfRAjWY+jFRgiDl4
eC+e6Iad1J6hQ4oWvK0KKLajvHc7GoPJIX8axFotXfoMEJJePPYM9Ye3TxtFPLU6
xhiB9yakk4/EFhx0N223P7gBCnpwxEnSTVTKrx3nRVIWlDPfw7kV33JgMiExFXZB
9idpAAHzvkSGIM4JNRc65YC+Auy3Pe++yLiMaAXwyscA7ucZZouot7MUCHnY+J6M
BoKec244nMWSk6FzWWx2EEPQ4wTUoNpYh5tM6Y7JV8mtgIKLYe0gTseMQgy7hN2Q
OnLFluK5jVbSqp0DIYR3Bf2Dw25YKrw9HjI10a4blXoJhu04naU8aVzDsMRZIgPS
hJyG/V9gPqXoWjkDiCZO4OrksJQOjabP2inthpW6mYeoc+o9Ar1y6gb8TRJMnida
EM4nf5sus1kJPLNkBhoAtbf7lzGPI0p7po2rrmH9uYzpfWGeLKzkTtudjvZTCaD7
7jF5lCp9KpOI6gwvSt6CQd0TFiU7F6NVsV7N1kJnCW3HRfgSggxefEkIuRAVMzwd
U9wvxu3o2XTVHx2DHv/9Oq+hiWiu9lX8s4nQXWBXIEcS+8hq4WbrBz5fKxzm+UQx
2Jmo/Q6bNPB2oYRVySkLJ8BzG9yG+mQFC7Gj6a/gsoAZTWw9lu/ECCYXQztec70n
o1jOJwWvn+wF2TcJgTPq
=3NU7
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.17-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "ARM: mvebu: DT changes for v3.17 (round 2)" from Jason Cooper:
mvebu DT changes for v3.17 (round 2):
- kirkwood
* Add d2 Network v2 board
- mvebu
* Add Armada 375 ethernet node
* Add CA9 MPcore SoC controller node
* Add support for dynamic freq scaling on Armada XP
* tag 'mvebu-dt-3.17-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: update Armada XP DT for dynamic frequency scaling
ARM: mvebu: add CA9 MPcore SoC Controller node
ARM: mvebu: Enable the network controller in Armada 375 DB board
ARM: mvebu: Add support for the network controller in Armada 375 SoC
ARM: Kirkwood: add DT support for d2 Network v2
ARM: Kirkwood: allow to use netxbig DTSI for d2net_v2 DTS
Signed-off-by: Olof Johansson <olof@lixom.net>
Added documentation for the sysfs attributes supported by the rotation from north
sensor.
Signed-off-by: Reyad Attiyat <reyad.attiyat@gmail.com>
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
- add callbacks exynos_suspend() and exynos_powered_up()
for support cpuidle through mcpm
- skip exynos_cpuidle for exynos5420 because is uses
cpuidle-big-liggle generic cpuidle driver
- add generic functions to calculate cpu number is used
for pmu and this is required for exynos5420 multi-cluster
- add of_device_id structure for big.LITTLE cpuidle and
add "samsung,exynos5420" compatible string for exynos5420
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTybYIAAoJEA0Cl+kVi2xqcmsP/Au37R0j1B8KpZ4scUBTczHJ
t/oucJ3N2y7vSNdqZ21izolKQjl94NAidpzeaL0lXmthoAhdc8ESwMK8Nd9TR27r
qJyu+FiXQFhZy9NbaKbkvl27bzfRJPaBQzDAPM6HvExP5p0aIUCGXu9mDUb6koe4
Zm344G5az7iooRkerPw6SrswiJ6BJ6R4elkFGsZLDTRhLWoZ36PG2puRuEk6lVO7
X7bsyvbx+Go6ru4KUvMRBIoMUDRDL0NbIFq0p8Q6naEbHSucYAo9MfHYJ/Hux/9B
G7UoVwLjPyR2jbAYIn6XyDjWKvPEL1FwwuY1OwJ/oIa32yD0LQ1d6dEX7Px5z4Ts
6lpTeaFKPuDLz2VN+WuRyTySnJ3cD4RihagNSTpTIMmvk0k2tPwtXhvhTkP73Gsb
fV11rywmyMbdcBvRawN7DmSz10iSoF6VLsMF3WBcaNDBzbthRNMmHc2twbkBo0T+
lxyHvstwD78vrYODLX6lelfsru1RPwaIFFj/sTSaGibLR+I8Xq2MKPpZeO8lUwAJ
u057QCBDmVvwkBc40HRnjBvP+RjJp3+jnaB3GVplPkOaSmhEtRQezyHKEzbT0LoW
n9l4UbnmV8QeiWRtFfI4qK43ZTp4Eq6b/CE7qIrDG1zTofJK3ySuo7/t2wm5HMTQ
GJNJpPl6GweryKVDlJ0M
=jkc2
-----END PGP SIGNATURE-----
Merge tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung exynos cpuidle update for v3.17" from Kukjin Kim:
- add callbacks exynos_suspend() and exynos_powered_up()
for support cpuidle through mcpm
- skip exynos_cpuidle for exynos5420 because is uses
cpuidle-big-liggle generic cpuidle driver
- add generic functions to calculate cpu number is used
for pmu and this is required for exynos5420 multi-cluster
- add of_device_id structure for big.LITTLE cpuidle and
add "samsung,exynos5420" compatible string for exynos5420
* tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: populate suspend and powered_up callbacks for mcpm
ARM: EXYNOS: do not allow cpuidle registration for exynos5420
cpuidle: big.LITTLE: init driver for exynos5420
cpuidle: big.LITTLE: Add ARCH_EXYNOS entry in config
ARM: EXYNOS: add generic function to calculate cpu number
cpuidle: big.LITTLE: add of_device_id structure
+ Linux 3.16-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
: Most of them are for exynos SoCs, remove useless
codes and update for PMU consolidation.
- remove unnecessary header file in mach-exynos/pmu.c
- remove unused code in mach-exynos/common.h
- remove mach-exynos/regs-pmu.h dependency from PD
- remove file path from comment section in mach-exynos
- move SYSREG definitions into mach-exynos/regs-sys.h
- add mapping PMU base address via DT for PMU cleanup
- use staic in mach-exynos/common.h
- update Samsung UART config options for low-level debug
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTybGdAAoJEA0Cl+kVi2xqwW4QAIgCaoe33s4qCUY1n1xZjLld
DiLaolgeFyTMB7jekRgNhdCrdUXNPWRhp94dM3pzoiV8RAzXru86Xa86FbVkH6SZ
sPShkL4auv+D+fQ1bso0EyB2GPGm5m8IJ7ZrPwgVUItX7TUnfIsvNsOsg7iY9gcw
dMe8fb+oFieVlutX3ITL6thtmrJxCgM67Yyt/WY4HrShtR9dNi1soTUYBmQLznD/
zqf58657eTVc8M0eiA9mkFSQJ1N5C670fyZN6CcQoKXIGvf5oh4ba6CUKkSQBM9Y
UY7jksM/nXujyj0N2tIKNKFrkhBGhH99Rtp66R93tV7FCM9rgbsYwWwJCr6rqAVk
u9NQFF2pbvRsgkw18coV9yxVyafLYlVdfGUzl2yq7u9SR3wmPcjROERer0h5UueR
0mEq5v6eok2EZ29Tn2vU2Io0RShFbxLGNQC2/cs3PS+Un7xla5VOmwFjtKlWWtVA
LHTbdGthjSGxH0SXOfXQD2pubkXLLEU7AekpOC+i14o97g9B235mHIP/m+X7a3F7
cVCza9yRtKA1ztkdgq3vC29n09+4hU1qGVsQN8btM8ItqpGqLbb8qUj6wLGfhOXb
UfYBo5RrIb1neAhKapaaB5Nus/9AQrkkYwVPiO+pWZ1KrIvRSLEjFjjrc4pJw+QS
SQdAhJJQ0k6H82lQAu9A
=goDG
-----END PGP SIGNATURE-----
Merge tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup for v3.17" from Kukjin Kim:
Most of them are for exynos SoCs, remove useless codes and update for
PMU consolidation.
- remove unnecessary header file in mach-exynos/pmu.c
- remove unused code in mach-exynos/common.h
- remove mach-exynos/regs-pmu.h dependency from PD
- remove file path from comment section in mach-exynos
- move SYSREG definitions into mach-exynos/regs-sys.h
- add mapping PMU base address via DT for PMU cleanup
- use staic in mach-exynos/common.h
- update Samsung UART config options for low-level debug
* tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Add support for mapping PMU base address via DT
ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
ARM: EXYNOS: Remove file path from comment section
ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
ARM: EXYNOS: Make exynos machine_ops as static
ARM: EXYNOS: Remove unused code in common.h
ARM: debug: Update Samsung UART config options
+ Linux 3.16-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
- New board support:
- Apalis T30
- HDA support for Tegra124 and Venice2
- Display on Medcom Wide and Roth
- GK20A support on Tegra124
- XUSB pad controller for Tegra124 and Jetson TK1
- Various cleanups
This pulls in the for-3.17/fuse-move, for-3.17/dt-cros-ec-kbd and
for-3.17/xusb-padctl branches to resolve dependencies.
Note that the Apalis T30 support has a runtime dependency on the
for-3.17/pcie-regulators branch, so they should preferably be applied
in that order. I didn't merge that branch into this because Apalis T30
support is new, therefore can't regress, and because the dependency
exists only at runtime.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyRtaAAoJEN0jrNd/PrOhgRUQAJUXqH+xOusiIJj0Q+1Uh2ga
5JiqBqhVjaN0plF9XyZJq3/FP3mU8IslLswK3ybh/gqwOGqQ0qrXP2Nc9GHsvS8I
KIyMRqu7sGgTKFMHRLH3V7+LTwr6nNoonTFCDQAhJZb3nbxmxpToyj2XpSpcN3kX
ZaJXeSMe6yk09YQijvM6aq/gAPaz2aHLkIThzwA6GvFj3vfRKyoqQdeycUY4y1Lq
AUGADoJOqo33megAdGlu1iFAmm36xv6c6g6TK3EnBnvYf6PTwAPg3IHIGu5G7UD9
kcWqrveCi5VwIKWv4vJ7S3frj7OXHovel4qvN6GiDHQLKAHB+6PJAQwHYhLdHiEP
PhXfosca7KnAPDncoeKyETiYU4W4mIVOec+ySvFZvI17/hgfW/UkLuyzWTYytLjA
4B9Y3H/LgVIaKFwNEVpYh0511S2J9Zbm8X0qw51M0krO3d/Ux08OeXS5KCQLjHRK
m1VJ6atYYbfqOO4v664pwZkPVSvwz2mCw/Pi6STFd2vl6R05onuS7voHQd7LqFa/
15mSaAbdUxNr1RNCz4wTSxJ4gauD+TWmJdboT4i2hAvgL9SSLjJ9tOvwQxQIliRg
NKUNwtfRPIOiO/dywl4bDDQphxjdCtuLZtHdKhqcPzTakKpXIw70THgEdEACtYMt
FRZSkOHGAnpfZkiBNbt1
=t3Ef
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.17-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: device tree changes for 3.17" from Thierry Reding:
- New board support:
* Apalis T30
- HDA support for Tegra124 and Venice2
- Display on Medcom Wide and Roth
- GK20A support on Tegra124
- XUSB pad controller for Tegra124 and Jetson TK1
- Various cleanups
This pulls in the for-3.17/fuse-move, for-3.17/dt-cros-ec-kbd and
for-3.17/xusb-padctl branches to resolve dependencies.
Note that the Apalis T30 support has a runtime dependency on the
for-3.17/pcie-regulators branch, so they should preferably be applied
in that order. I didn't merge that branch into this because Apalis T30
support is new, therefore can't regress, and because the dependency
exists only at runtime.
* tag 'tegra-for-3.17-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (28 commits)
ARM: tegra: roth: add display DT node
ARM: tegra: Fix typoed ams,ext-control properties
ARM: tegra: jetson-tk1: Add XUSB pad controller
ARM: tegra: tegra124: Add XUSB pad controller
ARM: tegra: add GK20A GPU to Tegra124 DT
ARM: tegra: of: add GK20A device tree binding
ARM: tegra: roth: enable input on mmc clock pins
ARM: tegra: roth: fix unsupported pinmux properties
ARM: tegra: Migrate Apalis T30 PCIe power supply scheme
ARM: tegra: tamonten: add the display to the Medcom Wide
ARM: tegra: tamonten: add the base board regulators
ARM: tegra: initial support for apalis t30
ARM: tegra: jetson-tk1: mark eMMC as non-removable
ARM: tegra: venice2 - Enable HDA
ARM: tegra: Add Tegra124 HDA support
ARM: tegra: Add the EC i2c tunnel to tegra124-venice2
soc/tegra: fuse: fix dummy functions
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
soc/tegra: Add efuse and apbmisc bindings
soc/tegra: Add efuse driver for Tegra
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Adds device tree bindings and a driver for the XUSB pad controller found
on Tegra114 and later. This is a prerequisites for PCIe, SATA and XUSB
drivers which are all currently being reviewed or pending for merge.
This is a separate branch in case it needs to be pulled into the pinctrl
tree to resolve conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTySWRAAoJEN0jrNd/PrOhIXsP/2Zfx2ctY5i9PTsu8V8tnuQ7
IO6mNKZGE9nocoi64Nq/+tBiQn+X1y0Pu5uHJt9a4FCOpNY5TsgwN3d3PCoRNbqu
1Buqjla/cgAZ+E2WkqSqvZLxlTIAIlFGxNNucBgXkn1euebsNkYWgdcxucUBqdUE
F1AgsZFK6wuZIONZIRTBWUxZwSiu5Nh0Fd6Qg6yZbMTs8mKZVesm0KHglZiAH/m9
h6htGQpfwxGqnk1O3Cm0I6dwuhMLzoVCPdnPfDx5K5mTNeOmfPcRsJ6au9S1eqM8
ZI0o+aCWiOi42UBLcCX7voriPSsTq0Ur5igmo+Gn3Rfa00aACuy3FPu8a3+453ID
nnG3zo2vLDO5MkRbCqgvW7L29Q6wtO7Xx5o608tetvCC4MXItj5OSzowp57m9OIw
PP1pYc3fgJeAbh8tHAc81tHUbV0mNYVLxN44erg3SVO168+clHVDWdTYqMFUtGs8
kPKsgJHeQKW5tKlOf919+oCaIje64vhzwOTN+L0M+TPUD8S8qkBfFEcNQkFPZ5GA
v7xyAgTHlTcwpkKRt4fdI97PfPpu47+wVu3d0Ivv/zzE5oPuQqdXMgeWzBrMUysh
nUycFAxiq9JljaBMNAaLJH+S+eX8yrI8GoOe+s+dQrVk2vFmKKvSDU5wbT4jQvxh
T3tUy/gem9p19dVcQhpU
=oUBt
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.17-xusb-padctl' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Add XUSB pad controller support" from Thierry Reding:
Adds device tree bindings and a driver for the XUSB pad controller found
on Tegra114 and later. This is a prerequisites for PCIe, SATA and XUSB
drivers which are all currently being reviewed or pending for merge.
This is a separate branch in case it needs to be pulled into the pinctrl
tree to resolve conflicts.
* tag 'tegra-for-3.17-xusb-padctl' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
pinctrl: Add NVIDIA Tegra XUSB pad controller support
of: Add NVIDIA Tegra XUSB pad controller binding
Signed-off-by: Olof Johansson <olof@lixom.net>
This branch reworks the set of regulators that the Tegra PCIe driver
uses, so that the driver and DT bindings more correctly model what's
really going on in HW. For backwards-compatibility the driver will
fallback to using the old set of regulators if the new ones can't be
found.
I've made this a separate branch in case it needs to be pulled into the
PCIe tree to resolve any conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyRXmAAoJEN0jrNd/PrOhpcIP/1bhFxw7a0HjG1Cwtj27uJKo
2S9z28sFbVERmOTy4Sfy/bf3EEBNZajgYJ0kOIJbrVRkpGV6BU/3nNVmqR9G1jOY
9wVr7e9Z0lWQ8r8e9jXIRpTOO1PUFfx3AhyjD1kT5bUsI8m5dcDmryyLqsvh2UDn
F1S2JpAeylVSFzZLspqnuc1HgG6V4xMxt7JCKQqQo4uTTs2LVWpLWRqQEOhpsmVW
WDSzovSXBThm4wXvZlrTij7HuOqYbwG3wLpzJMVVfhysRZDfIO8i7hK2kAQ8+3O6
0yS8HsfzrjhGvNgbGUt+hGTYg+omHp3i0RJf/AxhOIOrA5fIs4pOTC2HSqq+kG4x
K2OWCUboaTbMpJ/+TwcY83Ohk/r+Qj3Ay9loyIbQ5e2ORbkmpvbBALiQLTFwswaf
zPsuwSXW8imVnPsduo+7qnvq2sbQ45Wy30wZMPRKYSfQzNY40AK0hzvRtW1BfMHY
3P35z+9uIygiOr4KlwvbnTjL/nNWa5aVO8CYDfAxDa81SUJn/4vGkJNLNw6z1zo8
Jvem210R6G0dca257NFWZ9w7hB9bfX3AVR8ZovDkg7tiOOlaOwq8HJrVU8oM3dtu
/ztRVYKo/XqRtKyCcUnCtoF6CswlhfT4u4JOmo/5KwD9VBmxQPWHEkUwMl9j6eu3
5dNKF79ROlQ1Idk0jjDZ
=48cL
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.17-pcie-regulators' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "ARM: tegra: rework PCIe regulators" from Thierry Reding:
This branch reworks the set of regulators that the Tegra PCIe driver
uses, so that the driver and DT bindings more correctly model what's
really going on in HW. For backwards-compatibility the driver will
fallback to using the old set of regulators if the new ones can't be
found.
I've made this a separate branch in case it needs to be pulled into the
PCIe tree to resolve any conflicts.
* tag 'tegra-for-3.17-pcie-regulators' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Remove legacy PCIe power supply properties
PCI: tegra: Remove deprecated power supply properties
PCI: tegra: Implement accurate power supply scheme
ARM: tegra: Add new PCIe regulator properties
PCI: tegra: Overhaul regulator usage
Signed-off-by: Olof Johansson <olof@lixom.net>
This branch moves code related to the Tegra fuses out of arch/arm and
into a centralized location which could be shared with ARM64. It also
adds support for reading the fuse data through sysfs.
Included is also some preparatory work that moves Tegra-related header
files from include/linux to include/soc/tegra as suggested by Arnd.
Furthermore the Tegra chip ID is now retrieved using a function rather
than a variable so that sanity checks can be done. This is convenient
in subsequent patches that will move some of the code that's currently
called from Tegra machine setup into regular initcalls so that it can
be reused on 64-bit ARM. The sanity checks help with verifying that no
code tries to obtain the Tegra chip ID before the underlying driver is
properly initialized.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyR7HAAoJEN0jrNd/PrOhXRoQAKIs/o8Xf6aTb48OOODFt8g0
3GiKaYfVPk6VzkrhywmulOndmYy9BjLwhX2jnPgPzFbM5h2jk39/PK3RtssD92Wm
sHbDflbCj+gaLvjETbTWtYbbYmejqp2xhte/F+MMT0QJKl8BjmyO6WOoUL1+QEyW
p+OUYRgasmyAiq7qov1MeMW+edNqFHhHpmnsva62NUbcOaKTJ6U6antm79PoAA9M
Da3UScoX9BxqsyuxBteLdcpgSgOHjW/eLz9xHVf5gtG4ZsTjkWFRyP9wwY6rCxij
+6cMvKs8OT2y+TjQ6qv5/Zu+XbXGbo2yujnK2oFkLsST/LWobGfuGXUp/K7CkkKJ
0wgZS1t2iT3RXSQn/Fz8zJx9j0q3GJmvMFmdrOAh8Vx6ucP1m8DZ4noms37D0+Wn
2HSW55sAXIUFALZgOiVRq0GXtw/iA76S9GtjfFWkCkyGV4WLH6C1NSoojvmXWQ3U
QQWlpGODQFYUTDUhwh6/T3cP7Ip12W9OU2eTNfdgn8D+PU16CPSfdXN6JWxBI13L
vVUxWMm9JG+QkbSjfw4q2A0dHEu6lssmOSvMjU6pm5v6xCfry6Fn6m3vBBU3OpLx
mOge6U696hwL3tNMuwfsIVFNQpoHJT+2Saq71jS+XZeGn+5wC3ovejREls0HIzze
kwHNIuMygB78uVwWyMJr
=XyRE
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.17-fuse-move' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup
Merge "ARM: tegra: move fuse code out of arch/arm" from Thierry Reding:
This branch moves code related to the Tegra fuses out of arch/arm and
into a centralized location which could be shared with ARM64. It also
adds support for reading the fuse data through sysfs.
Included is also some preparatory work that moves Tegra-related header
files from include/linux to include/soc/tegra as suggested by Arnd.
Furthermore the Tegra chip ID is now retrieved using a function rather
than a variable so that sanity checks can be done. This is convenient
in subsequent patches that will move some of the code that's currently
called from Tegra machine setup into regular initcalls so that it can
be reused on 64-bit ARM. The sanity checks help with verifying that no
code tries to obtain the Tegra chip ID before the underlying driver is
properly initialized.
* tag 'tegra-for-3.17-fuse-move' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: fuse: fix dummy functions
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
soc/tegra: Add efuse and apbmisc bindings
soc/tegra: Add efuse driver for Tegra
ARM: tegra: move fuse exports to soc/tegra/fuse.h
ARM: tegra: export apb dma readl/writel
ARM: tegra: Use a function to get the chip ID
ARM: tegra: Sort includes alphabetically
ARM: tegra: Move includes to include/soc/tegra
Signed-off-by: Olof Johansson <olof@lixom.net>
- Document and use new cadence serial binding
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iEYEABECAAYFAlPI73sACgkQykllyylKDCGYzQCggc3g80f6R008+SNKlrN0Wuy+
b9kAnjqTO0Q0kDf4PlI/a5EVsfPmOzoS
=Bo6W
-----END PGP SIGNATURE-----
Merge tag 'zynq-dt-for-3.17' of git://git.xilinx.com/linux-xlnx into next/dt
Merge "Xilinx Zynq changes for v3.17" from Michal Simek:
arm: Xilinx Zynq dt patches for v3.17
- Document and use new cadence serial binding
* tag 'zynq-dt-for-3.17' of git://git.xilinx.com/linux-xlnx:
ARM: zynq: DT: Migrate UART to Cadence binding
tty: cadence: Document DT binding
+ Linux 3.16-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add device tree sources and pin function header for i.MX6SX SoC
- Initial imx6sx-sdb board support with FEC, MMC, USB, PMIC, Audio
and GPIO key enabled
- New board support: mbimxsd25 and mbimxsd27 from Eukrea, aristainetos
imx6dl boards, Rex Pro and Basic, Ka-Ro TX6
- Restructure imx6qdl-wandboard.dtsi for new rev C1 board
- Split M28EVK and M53EVK into SoM and EVK parts
- A few correction around SDMA, SSI and SATA device nodes
- Add eSATA support for Cubox-i board
- Updates on edmqmx6 to enable PCIe, I2C and CAN
- Use DT macro for clock ID for imx27 and imx6qdl
- Add FlexCAN support for VF610 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTyOTXAAoJEFBXWFqHsHzOnMgH/1Kjr8tbtPEx0aJ8HDAqAY7t
L4oDPZOt5QtbkWN4PH00yvgpN/ODl5ux6u1OKXt6F/XYXcBWBngGcIpPl5Qwo8lG
WMOt+OLh6xWSRwvzi9iXKU18PDbHvtHmSHCPLDC64T2esi8AuQIuWW8zWl+NAYhs
yrhjxVN8VQBuc3XubxNjATXr4ybsB4uhpshuFYUvyGo+KeRNJv2aNen//KyFPVNC
VuD/cRag46uWKymJ8gMtl5B5WzbIOqfs5wPHaULiIv8IJzItPW+PbGzyVK1XuTzl
pRbQAIqw7BPCzKpJ1elyvz9MThYyJOhV7F36GZyZIVCvITDoH9bdR9ib1EH4Wyc=
=q+sf
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Merge "ARM: imx: device tree updates for 3.17" from Shawn Guo:
The i.MX device tree updates for 3.17:
- Add device tree sources and pin function header for i.MX6SX SoC
- Initial imx6sx-sdb board support with FEC, MMC, USB, PMIC, Audio
and GPIO key enabled
- New board support: mbimxsd25 and mbimxsd27 from Eukrea, aristainetos
imx6dl boards, Rex Pro and Basic, Ka-Ro TX6
- Restructure imx6qdl-wandboard.dtsi for new rev C1 board
- Split M28EVK and M53EVK into SoM and EVK parts
- A few correction around SDMA, SSI and SATA device nodes
- Add eSATA support for Cubox-i board
- Updates on edmqmx6 to enable PCIe, I2C and CAN
- Use DT macro for clock ID for imx27 and imx6qdl
- Add FlexCAN support for VF610 SoC
* tag 'imx-dt-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (125 commits)
ARM: dts: vf610: add FlexCAN node
ARM: dts: add initial Rex Basic board support
ARM: dts: add initial Rex Pro board support
ARM: dts: mx5: Split M53EVK into SoM and EVK parts
ARM: dts: imx6: RIoTboard explicitly define pad settings
ARM: dts: vf610: fix length of eshdc1 register property
ARM: dts: Restructure imx6qdl-wandboard.dtsi for new rev C1 board.
ARM: dts: imx53: correct clock-names of SATA node
ARM: imx6: Align ssi nodes between mx6 variants
ARM: i.MX27 clk: dts: Use clock defines in DTS files
ARM: dts: imx: correct sdma compatbile for imx6sl and imx6sx
ARM: dts: imx6sx-sdb: Add audio support
ARM: dts: imx6sx: Pass the fsl,fifo-depth property
ARM: dts: imx6sx: Fix sdma node
ARM: dts: imx6: edmqmx6: Add can bus
ARM: dts: imx6: edmqmx6: Add two other i2c buses
ARM: dts: imx6: edmqmx6: Add PCIe support
ARM: dts: imx25-pdk: Add USB OTG support
ARM: dts: i.MX53: add aipstz nodes
ARM: dts: mxs: Split M28EVK into SoM and EVK parts
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add devicetree support for i.MX1 and i.MX21 clock driver
- Use CLOCKSOURCE_OF_DECLARE() to initialize timer for DT targets
- Use of_clk_init() to initialize i.MX25 and i.MX27 clock driver in
device tree boot
- Remove i.MX1 camera support
- Remove i.MX27 IP Camera and Lite-Kit board support
- Add suspend and cpuidle support for i.mx6sx
- Clean up unused clk_register_clkdev() lookups
- Update imx-weim bus driver to support populating devices on a simple
bus
- Switch i.MX27 and i.MX6QDL clock driver to use macro for clock IDs
- Make i.MX51 a DT only platform and clean up the non-DT support code
- Support disabling supervisor protect via DT
- Random defconfig updates
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTyN58AAoJEFBXWFqHsHzO6WUH/2d/ZYyXS94Iw/kPm1FEweDg
0wtHVb+Fs/Sjj961xASATNepBwOzpQ1ykI++kvZ1TQXk+FdaYEcB9idmTPycAp9j
QcEmhvxjPmGJtjmTzc/zogL7tTf8TVKX0zGbFGhdpT5tmulY8NA6skAQpB0HAt+s
I95O5t+adwNTl7hAcQWGxOb8E+CA2gJCPdnJ5rdPHr2nzw6B7SjjnjeC90vIbDdh
b6jtfePLvbRUIif0kZuVMXWvebNYa+iRsXsvpoV95q3VJhoR2wPN+H4xnfNviJPb
h+nzibRgrPTyxMWWZ3jtUjw4YIvNdrJWaulC2incOAIQTb7zxrn5w5qxxP3Uj4k=
=RGCO
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Merge "ARM: imx: SoC changes for 3.17" from Shawn Guo:
The i.MX SoC changes for 3.17:
- Add devicetree support for i.MX1 and i.MX21 clock driver
- Use CLOCKSOURCE_OF_DECLARE() to initialize timer for DT targets
- Use of_clk_init() to initialize i.MX25 and i.MX27 clock driver in
device tree boot
- Remove i.MX1 camera support
- Remove i.MX27 IP Camera and Lite-Kit board support
- Add suspend and cpuidle support for i.mx6sx
- Clean up unused clk_register_clkdev() lookups
- Update imx-weim bus driver to support populating devices on a simple
bus
- Switch i.MX27 and i.MX6QDL clock driver to use macro for clock IDs
- Make i.MX51 a DT only platform and clean up the non-DT support code
- Support disabling supervisor protect via DT
- Random defconfig updates
* tag 'imx-soc-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (69 commits)
ARM: imx: clk-vf610: fix FlexCAN clock gating
ARM: i.MX: Use CLOCKSOURCE_OF_DECLARE() for DT targets
ARM: i.MX53: globally disable supervisor protect
ARM: i.MX: allow disabling supervisor protect via DT
ARM: i.MX27 clk: Add 26 MHz oscillator circuit clock gate
ARM: i.MX27 clk: Remove unused definitions
ARM: i.MX27 clk: Introduce DT include for clock provider
ARM: i.MX: Remove Freescale Logic Product Development i.MX27 Lite-Kit board support
ARM: i.MX: Remove excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27
ARM: i.MX: Remove i.MX1 camera support
ARM: imx: use PTR_ERR_OR_ZERO
bus: imx-weim: populate devices on a simple bus
ARM: imx: build cpu_is_imx6sl function conditionally
ARM: imx: imx6sx uses imx6q cpuidle code
ARM: imx: drop PL310 errata 588369 and 727915
ARM: imx_v6_v7_defconfig: add FSL_EDMA and PRINTK_TIME
ARM: imx: clk-imx6sx: register SSI/SSI_IPG as shared gate clocks
ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support
ARM: imx_v6_v7_defconfig: Enable STMPE gpio support
ARM: imx: mark .dt_compat as const
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull RCU fixes from Thomas Gleixner:
"Two RCU patches:
- Address a serious performance regression on open/close caused by
commit ac1bea8578 ("Make cond_resched() report RCU quiescent
states")
- Export RCU debug functions. Not a regression, but enablement to
address a serious recursion bug in the sl*b allocators in 3.17"
* 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
rcu: Reduce overhead of cond_resched() checks for RCU
rcu: Export debug_init_rcu_head() and and debug_init_rcu_head()
window:
- Enable irqchip crossbar interrupt mapping. These changes
are based on an immutable irqchip branch set up by Jason
Cooper to make it easier to merge the related .dts changes.
- Removal of omap2 related static clock data that now comes
from device tree.
- Enabling of PHY regulators for various omaps
- Enabling of PCIe for dra7
- Add support for am437x starterkit
- Enable audio for for omap5
- Enable display and am335x-evmsk
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTxj2LAAoJEBvUPslcq6VzQX0QALzyimJdW8GX+9hV1+LgtiPU
eTtR+LxZt1dR5n2EeaNk9dn1DmmNqyQKN5VVB36rdaC2P7NgAfQgOwzG2RBos5mX
Nap/DkMYs1NbNrgJCJVaND85HD2ZNyu8+Au2h1ggZC7xoAZbWlIDdR2livo454tf
Whdjhm47dCTeIagFxBwAnuVml2Ry7P1pA7Gr8AGteAmsOrUwXdwevC4HqCEAhuG8
2bINI71JhvpJ3tvV12VeJqAEZn7GWU5xnJYt7Kftm6RK8chuC0Ohfmo/BHO2DTVy
BPBZDs6fYY8/2lBY/q3UCA3MSqBSLo9lxK+l8n5jaQVPse+6h7uVGijQxQZRcHqf
7oP3tjLeTcszjoiQYSTKcQK65zpu+n7P1UAS4J3IjAoRC7Pi2Qvq5h4ABrxipQMY
rctj2GLvNOV4ntx2GceXeyMGQBvu/p6GAFE7jmj0xLO4kBDORaY8PmQySXF81A12
a0cCNL4g/YexeAfYXr4z6gyjGwOK4XbQocDkH9MlqAgQlSsb501tY7Xe2I/aAaYs
IN4F5sBdvhBAuP79qFXOnlGgi2VkB3zcfu4MIIzIDxE2ZmPDRKv6oGVSGclVEzTd
4HZsZDu6442zaAQ5XbwwST4gIeCygnqj+qrOQ6uYXAvmt3MFzjZ66bdTZjPMp7cC
u7XduFmqLxsoGW7iuqqt
=4svh
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap dts changes for v3.17 merge window, part1" from Tony Lindgren:
First set of .dts changes for omaps for v3.17 merge window:
- Enable irqchip crossbar interrupt mapping. These changes
are based on an immutable irqchip branch set up by Jason
Cooper to make it easier to merge the related .dts changes.
- Removal of omap2 related static clock data that now comes
from device tree.
- Enabling of PHY regulators for various omaps
- Enabling of PCIe for dra7
- Add support for am437x starterkit
- Enable audio for for omap5
- Enable display and am335x-evmsk
* tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (43 commits)
ARM: DTS: omap5-uevm: Enable basic audio (McPDM <-> twl6040)
ARM: DTS: omap5-uevm: Add node for twl6040 audio codec
ARM: DTS: omap5-uevm: Enable palmas clk32kgaudio clock
ARM: dts: dra7: Add dt data for PCIe controller
ARM: dts: dra7: Add dt data for PCIe PHY
ARM: dts: dra7: Add dt data for PCIe PHY control module
ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe PHY instance
ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance
ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHY
ARM: dts: dra7xx-clocks: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck
ARM: dts: dra7xx-clocks: Add divider table to optfclk_pciephy_div clock
ARM: dts: dra7-evm: Add regulator information to USB2 PHYs
ARM: omap2plus_defconfig: enable TPS65218 configs
ARM: dts: AM437x: Add TPS65218 device tree nodes
ARM: dts: AM437x: Fix i2c nodes indentation
ARM: dts: AM43x: Add TPS65218 device tree nodes
ARM: dts: Add devicetree for Gumstix Pepper board
ARM: dts: dra7: add crossbar device binding
ARM: dts: dra7: add routable-irqs property for gic node
ARM: OMAP24xx: clock: remove legacy clock data
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds device tree binding documentation for the SATA
controller found on NVIDIA Tegra SoCs.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Add new power supply properties for input current, charge termination
current, min and max temperature
POWER_SUPPLY_PROP_TEMP_MIN - minimum operatable temperature
POWER_SUPPLY_PROP_TEMP_MAX - maximum operatable temperature
POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT - input current limit programmed
by charger. Indicates the input current for a charging source.
POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT - Charge termination current used
to detect the end of charge condition
Signed-off-by: Jenny TC <jenny.tc@intel.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Add support for the Samsung's S5PV210 SoC to the Exynos USB 2.0 PHY driver.
Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
[k.debski@samsung.com: cleanup and commit description]
[k.debski@samsung.com: make changes accordingly to the mailing list
comments]
Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds a driver for clock controller being a part of Audio
Subsystem present on S5PV210 and compatible SoCs. It is used to provide
clocks for other IP blocks of this subsystem.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds new, Common Clock Framework-based clock driver for Samsung
S5PV210 and compatible SoCs. The driver is just added, without enabling it yet.
Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[t.figa: Added support for other SoC variants and clock output. Fixed
remaining minor issues.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
function_trace_stop is no longer used to disable function tracing.
This means that archs are no longer limited if it does not support
checking this variable in the mcount trampoline.
No need to use the list_func for archs that do not support this
obsolete method.
Acked-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
This patch adds a driver for Microchips CAP1106, an I2C driven, 6-channel
capacitive touch sensor.
For now, only the capacitive buttons are supported, and no specific
settings that can be tweaked for individual channels, except for the
device-wide sensitivity gain. The defaults seem to work just fine out of
the box, so I'll leave configurable parameters for someone who's in need
of them and who can actually measure the impact. All registers are
prepared, however. Many of them are just not used for now.
The implementation does not make any attempt to be compatible to platform
data driven boards, but fully depends on CONFIG_OF.
Power management functions are also left for volounteers with the ability
to actually test them.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Add binding documentation for the Cadence UART.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
These power supply properties are no longer needed since the binding now
contains the full set properties to accurately describe the power supply
inputs of the Tegra PCIe block.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Use clock defines in order to make devicetrees more human readable.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds devicetree support CCM module for i.MX21 CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Instead of using enum for clock ID, let's switch imx6qdl clock driver to
use macro. In this case, device tree can reuse these macros to improve
readability.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds devicetree support CCM module for i.MX1 (MC9328MX1) CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This is a tiny clean up for typos in the firmware_class README.
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add tunable RX interrupt trigger I/F of FIFO buffers.
Serial devices are used as not only message communication devices but control
or sending communication devices. For the latter uses, normally small data
will be exchanged, so user applications want to receive data unit as soon as
possible for real-time tendency. If we have a sensor which sends a 1 byte data
each time and must control a device based on the sensor feedback, the RX
interrupt should be triggered for each data.
According to HW specification of serial UART devices, RX interrupt trigger
can be changed, but the trigger is hard-coded. For example, RX interrupt trigger
in 16550A can be set to 1, 4, 8, or 14 bytes for HW, but current driver sets
the trigger to only 8bytes.
This patch makes some devices change RX interrupt trigger from userland.
<How to use>
- Read current setting
# cat /sys/class/tty/ttyS0/rx_trig_bytes
8
- Write user setting
# echo 1 > /sys/class/tty/ttyS0/rx_trig_bytes
# cat /sys/class/tty/ttyS0/rx_trig_bytes
1
<Support uart devices>
- 16550A and Tegra (1, 4, 8, or 14 bytes)
- 16650V2 (8, 16, 24, or 28 bytes)
- 16654 (8, 16, 56, or 60 bytes)
- 16750 (1, 16, 32, or 56 bytes)
<Change log>
Changes in V9:
- Use attr_group instead of dev_spec_attr_group of uart_port structure
Changes in V8:
- Divide this patch from V7's patch based on Greg's comment
Changes in V7:
- Add Documentation
- Change I/F name from rx_int_trig to rx_trig_bytes because the name
rx_int_trig is hard to understand how users specify the value
Changes in V6:
- Move FCR_RX_TRIG_* definition in 8250.h to include/uapi/linux/serial_reg.h,
rename those to UART_FCR_R_TRIG_*, and use UART_FCR_TRIGGER_MASK to
UART_FCR_R_TRIG_BITS()
- Change following function names:
convert_fcr2val() => fcr_get_rxtrig_bytes()
convert_val2rxtrig() => bytes_to_fcr_rxtrig()
- Fix typo in serial8250_do_set_termios()
- Delete the verbose error message pr_info() in bytes_to_fcr_rxtrig()
- Rename *rx_int_trig/rx_trig* to *rxtrig* for several functions or variables
(but UI remains rx_int_trig)
- Change the meaningless variable name 'val' to 'bytes' following functions:
fcr_get_rxtrig_bytes(), bytes_to_fcr_rxtrig(), do_set_rxtrig(),
do_serial8250_set_rxtrig(), and serial8250_set_attr_rxtrig()
- Use up->fcr in order to get rxtrig_bytes instead of rx_trig_raw in
fcr_get_rxtrig_bytes()
- Use conf_type->rxtrig_bytes[0] instead of switch statement for support check
in register_dev_spec_attr_grp()
- Delete the checking whether a user changed FCR or not when minimum buffer
is needed in serial8250_do_set_termios()
Changes in V5.1:
- Fix FCR_RX_TRIG_MAX_STATE definition
Changes in V5:
- Support Tegra, 16650V2, 16654, and 16750
- Store default FCR value to up->fcr when the port is first created
- Add rx_trig_byte[] in uart_config[] for each device and use rx_trig_byte[]
in convert_fcr2val() and convert_val2rxtrig()
Changes in V4:
- Introduce fifo_bug flag in uart_8250_port structure
This is enabled only when parity is enabled and UART_BUG_PARITY is enabled
for up->bugs. If this flag is enabled, user cannot set RX trigger.
- Return -EOPNOTSUPP when it does not support device at convert_fcr2val() and
at convert_val2rxtrig()
- Set the nearest lower RX trigger when users input a meaningless value at
convert_val2rxtrig()
- Check whether p->fcr is existing at serial8250_clear_and_reinit_fifos()
- Set fcr = up->fcr in the begging of serial8250_do_set_termios()
Changes in V3:
- Change I/F from ioctl(2) to sysfs(rx_int_trig)
Changed in V2:
- Use _IOW for TIOCSFIFORTRIG definition
- Pass the interrupt trigger value itself
Signed-off-by: Yoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
UART modules on some SoCs only differ in the fifosize of each
UART channel. Its useless to duplicate the drv_data structure
or create a compatible name for such a change.
We can get fifosize via the device tree nodes (not mandating it).
Also updates the documentation.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
use exact SoC revision instead of wildcard describing
to make the binding more clearer.
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pm-sleep:
PM / sleep: fix freeze_ops NULL pointer dereferences
PM / sleep: Fix request_firmware() error at resume
* pm-cpufreq:
cpufreq: make table sentinel macros unsigned to match use
cpufreq: move policy kobj to policy->cpu at resume
cpufreq: cpu0: OPPs can be populated at runtime
cpufreq: kirkwood: Reinstate cpufreq driver for ARCH_KIRKWOOD
cpufreq: imx6q: Select PM_OPP
cpufreq: sa1110: set memory type for h3600
OTG3 and EH Compliance Plan 1.0 talks about Super Speed OTG Verification
system (SS-OVS) which consists of an excersizer and analyzer.
USB Compliance Suite from Lecroy or Ellisys can act as such SS-OVS for
Link Layer Validation (LVS).
Some modifications are needed for an embedded Linux USB host to pass all
these tests. Most of these tests require just Link to be in U0. They do
not work with default Linux USB stack since, default stack does port
reset and then starts sending setup packet, which is not expected by
Link Layer Validation (LVS) device of Lecroy Compliance Suit. Then,
There are many Link Layer Tests which need host to generate specific
traffic.
This patch supports specific traffic generation cases. As of now all the
host Lecroy Link Layer-USBIF tests (except TD7.26) passes
with this patch for single run using Lecroy USB Compliance Suite
Version 1.98 Build 239 and Lecroy USB Protocol Analyzer version 4.80
Build 1603. Therefore patch seems to be a good candidate for inclusion.
Further modification can be done on top of it.
lvstest driver will not bind to any device by default. It can bind
manually to a super speed USB host controller root hub. Therefore, regular
hub driver must be unbound before this driver is bound. For example, if
2-0:1.0 is the xhci root hub, then execute following to unbind hub driver.
echo 2-0:1.0 > /sys/bus/usb/drivers/hub/unbind
Then write Linux Foundation's vendor ID which is used by root hubs and
SS root hub's device ID into new_id file. Writing IDs into new_id file
will also bind the lvs driver with any available SS root hub interfaces.
echo "1D6B 3" > /sys/bus/usb/drivers/lvs/new_id
Now connect LVS device with root hub port.
Test case specific traffic can be generated as follows whenever needed:
1. To issue "Get Device descriptor" command for TD.7.06:
echo > /sys/bus/usb/devices/2-0\:1.0/get_dev_desc
2. To set U1 timeout to 127 for TD.7.18
echo 127 > /sys/bus/usb/devices/2-0\:1.0/u1_timeout
3. To set U2 timeout to 0 for TD.7.18
echo 0 > /sys/bus/usb/devices/2-0\:1.0/u2_timeout
4. To issue "Hot Reset" for TD.7.29
echo > /sys/bus/usb/devices/2-0\:1.0/hot_reset
5. To issue "U3 Entry" for TD.7.35
echo > /sys/bus/usb/devices/2-0\:1.0/u3_entry
6. To issue "U3 Exit" for TD.7.36
echo > /sys/bus/usb/devices/2-0\:1.0/u3_exit
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Document the Layer 2 hash factors with packet type ID field.
CC: Jay Vosburgh <j.vosburgh@gmail.com>
CC: Veaceslav Falico <vfalico@gmail.com>
CC: Andy Gospodarek <andy@greyhouse.net>
CC: David S. Miller <davem@davemloft.net>
CC: Pan Jiafei <Jiafei.Pan@freescale.com>
Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The total number of bits is 16 (12+4). Fix it.
Signed-off-by: Andreas Weber <andy.weber.aw@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Obsolete; either use 'max_lun' if the host supports only a
limited number of LUNs or BLIST_NOLUN if the target has
problems addressing more than one LUN.
Signed-off-by: Hannes Reinecke <hare@suse.de>
Reviewed-by: Ewan Milne <emilne@redhat.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
The text referred to videodev.h when videodev2.h was meant. Fixed.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The v4l2_event union has a new src_change field, but that was never
added to the VIDIOC_DQEVENT documentation of that union. Fixed.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
There shouldn't be any spaces after <constant> or before </constant>.
This leads to ugly results like: 'image size set by VIDIOC_S_FMT .'
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Samsung SPI driver now uses the generic SPI "cs-gpios"
binding so update the documentation accordingly.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
[javier.martinez@collabora.co.uk: split changes and improve commit message]
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Some chips implement banked register ranges. This allows implementing
more registers than the limited 8-bit address space originally allows.
In order to access a register on these chips, you must first select
the proper bank. Add support for this mechanism to the i2c-stub driver
so that such chips can be emulated. All the bank settings are passed
as module parameters.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Gadget function files have been moved to a "function" subdirectory.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
SMBus block commands are different to I2C block commands since
the returned data is not normally accessible with byte or word
commands on other command offsets. Add linked list of 'block'
commands to support those commands.
Access mechanism is quite simple: Block commands must be written
before they can be read. Subsequent writes can be partial. Block
read commands always return the number of bytes associated with
the longest previous write.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Support the TI TAS2552 Class D amplifier.
The TAS2552 is a high efficiency Class-D audio
power amplifier with advanced battery current
management and an integrated Class-G boost
The device constantly measures the
current and voltage across the load and provides a
digital stream of this information.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
When set, the new V4L2_PIX_FMT_FLAG_PREMUL_ALPHA flag indicates that the
pixel values are premultiplied by the alpha channel value.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The v4l2_pix_format structure has no reserved field. It is embedded in
the v4l2_framebuffer structure which has no reserved fields either, and
in the v4l2_format structure which has reserved fields that were not
previously required to be zeroed out by applications.
To allow extending v4l2_pix_format, inline it in the v4l2_framebuffer
structure, and use the priv field as a magic value to indicate that the
application has set all v4l2_pix_format extended fields and zeroed all
reserved fields following the v4l2_pix_format field in the v4l2_format
structure.
The availability of this API extension is reported to userspace through
the new V4L2_CAP_EXT_PIX_FORMAT capability flag. Just checking that the
priv field is still set to the magic value at [GS]_FMT return wouldn't
be enough, as older kernels don't zero the priv field on return.
To simplify the internal API towards drivers zero the extended fields
and set the priv field to the magic value for applications not aware of
the extensions.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Extend the V4L2_CID_ALPHA_COMPONENT control for use on output devices,
to set the alpha component value when the output format doesn't have an
alpha channel.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The existing RGB pixel formats are ill-defined in respect to their alpha
bits and their meaning is driver dependent. Create new standard ARGB and
XRGB variants with clearly defined meanings and make the existing
variants deprecated.
The new pixel formats 4CC values have been selected to match the DRM
4CCs for the same in-memory formats.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Removed the "This type is only used-in array controls." sentence in DocBook
which was thought to only confuse.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Document the new motion detection event.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Document the 'Detect' control class and the new Motion Detection controls.
Those controls will be used by the solo6x10 and go7007 drivers.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
These types are needed for the upcoming Motion Detection matrix
controls, so document them.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The way current and new values are accessed has changed. Update the
document to bring it up to date with the code.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Document the support for compound types in controls.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Improve the control section:
- Clarify the handling of private controls
- Explain the V4L2_CTRL_FLAG_INACTIVE flag
- Remove obsolete text regarding missing control event (we have them
today) and the incorrect V4L2_CTRL_FLAG_DISABLED reference.
- Add a code example on how to enumerate over user controls.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Use the proper kernel coding style in these examples.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Document the support for the new compound type controls.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Document the new VIDIOC_QUERY_EXT_CTRL ioctl.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Rather than having two unions for all types just keep 'val' and
'cur.val' and use the p_cur and p_new unions to access all others.
The only reason for keeping 'val' and 'cur.val' is that it is used
all over, so converting this as well would be a huge job.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Olof Johansson pointed out that usually the company name is picked as
namespace prefix to specific properties. So expect "energymicro,location"
but fall back to the previously introduced name "efm32,location".
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Instead of allowing public keys, with certificates signed by any
key on the system trusted keyring, to be added to a trusted keyring,
this patch further restricts the certificates to those signed only by
builtin keys on the system keyring.
This patch defines a new option 'builtin' for the kernel parameter
'keys_ownerid' to allow trust validation using builtin keys.
Simplified Mimi's "KEYS: define an owner trusted keyring" patch
Changelog v7:
- rename builtin_keys to use_builtin_keys
Signed-off-by: Dmitry Kasatkin <d.kasatkin@samsung.com>
Signed-off-by: Mimi Zohar <zohar@linux.vnet.ibm.com>
Instead of allowing public keys, with certificates signed by any
key on the system trusted keyring, to be added to a trusted keyring,
this patch further restricts the certificates to those signed by a
particular key on the system keyring.
This patch defines a new kernel parameter 'ca_keys' to identify the
specific key which must be used for trust validation of certificates.
Simplified Mimi's "KEYS: define an owner trusted keyring" patch.
Changelog:
- support for builtin x509 public keys only
- export "asymmetric_keyid_match"
- remove ifndefs MODULE
- rename kernel boot parameter from keys_ownerid to ca_keys
Signed-off-by: Dmitry Kasatkin <d.kasatkin@samsung.com>
Signed-off-by: Mimi Zohar <zohar@linux.vnet.ibm.com>
Use of multiple-page collect buffers reduces:
1) the number of block IO requests
2) the number of asynchronous hash update requests
Second is important for HW accelerated hashing, because significant
amount of time is spent for preparation of hash update operation,
which includes configuring acceleration HW, DMA engine, etc...
Thus, HW accelerators are more efficient when working on large
chunks of data.
This patch introduces usage of multi-page collect buffers. Buffer size
can be specified using 'ahash_bufsize' module parameter. Default buffer
size is 4096 bytes.
Changes in v3:
- kernel parameter replaced with module parameter
Signed-off-by: Dmitry Kasatkin <d.kasatkin@samsung.com>
Signed-off-by: Mimi Zohar <zohar@linux.vnet.ibm.com>
Async hash API allows the use of HW acceleration for hash calculation.
It may give significant performance gain and/or reduce power consumption,
which might be very beneficial for battery powered devices.
This patch introduces hash calculation using ahash API. ahash performance
depends on the data size and the particular HW. Depending on the specific
system, shash performance may be better.
This patch defines 'ahash_minsize' module parameter, which is used to
define the minimal file size to use with ahash. If this minimum file size
is not set or the file is smaller than defined by the parameter, shash will
be used.
Changes in v3:
- kernel parameter replaced with module parameter
- pr_crit replaced with pr_crit_ratelimited
- more comment changes - Mimi
Changes in v2:
- ima_ahash_size became as ima_ahash
- ahash pre-allocation moved out from __init code to be able to use
ahash crypto modules. Ahash allocated once on the first use.
- hash calculation falls back to shash if ahash allocation/calculation fails
- complex initialization separated from variable declaration
- improved comments
Signed-off-by: Dmitry Kasatkin <d.kasatkin@samsung.com>
Signed-off-by: Mimi Zohar <zohar@linux.vnet.ibm.com>
Move atmel aic driver doc to the interrupt-controller directory as the new
driver now lays in drivers/irqchip/atmel-aic.c.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Link: https://lkml.kernel.org/r/1405012462-766-3-git-send-email-boris.brezillon@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add the device tree binding documentation for the GK20A GPU used in
Tegra K1 SoCs.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch adds the device tree to support Toradex Apalis T30, a
computer on module which can be used on different carrier boards.
The module consists of a Tegra 3 SoC, two PMICs, 1 or 2 GB of DDR3L
RAM, eMMC, an LM95245 temperature sensor chip, an i210 resp. i211
gigabit Ethernet controller, an STMPE811 ADC/touch controller as well
as two MCP2515 CAN controllers. Furthermore, there is an SGTL5000 audio
codec which is not yet supported. Anything that is not self contained
on the module is disabled by default.
The device tree for the Evaluation Board includes the modules device
tree and enables the supported peripherals of the carrier board (the
Evaluation Board supports almost all of them).
While at it also add the device tree binding documentation for Apalis
T30.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
[swarren: fixed some node sort orders]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTwvRvAAoJEHm+PkMAQRiG8CoIAJucWkj+MJFFoDXjR9hfI8U7
/WeQLJP0GpWGMXd2KznX9epCuw5rsuaPAxCy1HFDNOa7OtNYacWrsIhByxOIDLwL
YjDB9+fpMMPFWsr+LPJa8Ombh/TveCS77w6Pt5VMZFwvIKujiNK/C3MdxjReH5Gr
iTGm8x7nEs2D6L2+5sQVlhXot/97phxIlBSP6wPXEiaztNZ9/JZi905Xpgq+WU16
ZOA8MlJj1TQD4xcWyUcsQ5REwIOdQ6xxPF00wv/12RFela+Puy4JLAilnV6Mc12U
fwYOZKbUNBS8rjfDDdyX3sljV1L5iFFqKkW3WFdnv/z8ZaZSo5NupWuavDnifKw=
=6Q8o
-----END PGP SIGNATURE-----
Merge tag 'v3.16-rc5' into HEAD
Docbook creation was broken. We need to move after
v3.16-rc1-3-ga981296f048b in order to get commit
a981296f04.
Linux 3.16-rc5
* tag 'v3.16-rc5': (985 commits)
Linux 3.16-rc5
clk: spear3xx: Set proper clock parent of uart1/2
clk: spear3xx: Use proper control register offset
parisc: drop unused defines and header includes
parisc: fix fanotify_mark() syscall on 32bit compat kernel
parisc: add serial ports of C8000/1GHz machine to hardware database
ext4: fix potential null pointer dereference in ext4_free_inode
ext4: fix a potential deadlock in __ext4_es_shrink()
Documenation/laptops: rename and update hpfall.c
DocBook: fix various typos
DocBook: fix mtdnand typos
scripts/kernel-doc: handle object-like macros
Documentation/Changes: clean up mcelog paragraph
ARM: at91: at91sam9x5: add clocks for usb device
phy: omap-usb2: Balance pm_runtime_enable() on probe failure and remove
phy: core: Fix error path in phy_create()
drivers: phy: phy-samsung-usb2.c: Add missing MODULE_DEVICE_TABLE
phy: omap-usb2: fix devm_ioremap_resource error detection code
phy: sun4i: depend on RESET_CONTROLLER
USB: serial: ftdi_sio: Add Infineon Triboard
...
Add efuse and apbmisc bindings for Tegra20, Tegra30, Tegra114 and
Tegra124.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124. This
replaces functionality previously provided in arch/arm/mach-tegra, which
is removed in this patch.
While at it, move the only user of the global tegra_revision variable
over to tegra_sku_info.revision and export tegra_fuse_readl() to allow
drivers to read calibration fuses.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The similar MDIO HW blocks is used by keystone 2 SoCs as
in Davinci SoCs:
- one in Gigabit Ethernet (GbE) Switch Subsystem
See http://www.ti.com/lit/ug/sprugv9d/sprugv9d.pdf
- one in 10 Gigabit Ethernet Subsystem
See http://www.ti.com/lit/ug/spruhj5/spruhj5.pdf
Hence, reuse Davinci MDIO driver for Keystone 2 and
enable TI networking for Keystone 2 devices
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add DT bindings for tps65218 PMIC regulators.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTwvRvAAoJEHm+PkMAQRiG8CoIAJucWkj+MJFFoDXjR9hfI8U7
/WeQLJP0GpWGMXd2KznX9epCuw5rsuaPAxCy1HFDNOa7OtNYacWrsIhByxOIDLwL
YjDB9+fpMMPFWsr+LPJa8Ombh/TveCS77w6Pt5VMZFwvIKujiNK/C3MdxjReH5Gr
iTGm8x7nEs2D6L2+5sQVlhXot/97phxIlBSP6wPXEiaztNZ9/JZi905Xpgq+WU16
ZOA8MlJj1TQD4xcWyUcsQ5REwIOdQ6xxPF00wv/12RFela+Puy4JLAilnV6Mc12U
fwYOZKbUNBS8rjfDDdyX3sljV1L5iFFqKkW3WFdnv/z8ZaZSo5NupWuavDnifKw=
=6Q8o
-----END PGP SIGNATURE-----
Merge tag 'v3.16-rc5' into timers/core
Reason: Bring in upstream modifications, so the pending changes which
depend on them can be queued.
Add a new "name" attribute to the TS5500 sysfs group, to clarify
which supported board model it is.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Savoir-faire Linux Inc. <kernel@savoirfairelinux.com>
Link: http://lkml.kernel.org/r/1404860269-11837-3-git-send-email-vivien.didelot@savoirfairelinux.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The shared library feature in Makefile.host is no longer used.
Rip it off to keep the build infrastucture simple.
Update Documentation/kbuild/makefiles.txt too.
The section "4.3 Definition shared libraries" should be removed
and the following sections should be re-numbered.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Suggested-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Michal Marek <mmarek@suse.cz>
OPPs can be populated statically, via DT, or added at run time with
dev_pm_opp_add().
While this driver handles the first case correctly, it would fail to populate
OPPs added at runtime. Because call to of_init_opp_table() would fail as there
are no OPPs in DT and probe will return early.
To fix this, remove error checking and call dev_pm_opp_init_cpufreq_table()
unconditionally.
Update bindings as well.
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The current "wait_on_bit" interface requires an 'action'
function to be provided which does the actual waiting.
There are over 20 such functions, many of them identical.
Most cases can be satisfied by one of just two functions, one
which uses io_schedule() and one which just uses schedule().
So:
Rename wait_on_bit and wait_on_bit_lock to
wait_on_bit_action and wait_on_bit_lock_action
to make it explicit that they need an action function.
Introduce new wait_on_bit{,_lock} and wait_on_bit{,_lock}_io
which are *not* given an action function but implicitly use
a standard one.
The decision to error-out if a signal is pending is now made
based on the 'mode' argument rather than being encoded in the action
function.
All instances of the old wait_on_bit and wait_on_bit_lock which
can use the new version have been changed accordingly and their
action functions have been discarded.
wait_on_bit{_lock} does not return any specific error code in the
event of a signal so the caller must check for non-zero and
interpolate their own error code as appropriate.
The wait_on_bit() call in __fscache_wait_on_invalidate() was
ambiguous as it specified TASK_UNINTERRUPTIBLE but used
fscache_wait_bit_interruptible as an action function.
David Howells confirms this should be uniformly
"uninterruptible"
The main remaining user of wait_on_bit{,_lock}_action is NFS
which needs to use a freezer-aware schedule() call.
A comment in fs/gfs2/glock.c notes that having multiple 'action'
functions is useful as they display differently in the 'wchan'
field of 'ps'. (and /proc/$PID/wchan).
As the new bit_wait{,_io} functions are tagged "__sched", they
will not show up at all, but something higher in the stack. So
the distinction will still be visible, only with different
function names (gds2_glock_wait versus gfs2_glock_dq_wait in the
gfs2/glock.c case).
Since first version of this patch (against 3.15) two new action
functions appeared, on in NFS and one in CIFS. CIFS also now
uses an action function that makes the same freezer aware
schedule call as NFS.
Signed-off-by: NeilBrown <neilb@suse.de>
Acked-by: David Howells <dhowells@redhat.com> (fscache, keys)
Acked-by: Steven Whitehouse <swhiteho@redhat.com> (gfs2)
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Steve French <sfrench@samba.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/20140707051603.28027.72349.stgit@notabene.brown
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit extends the existing clk-cpu driver used on Marvell Armada
XP platforms to support the dynamic frequency scaling of the CPU
clock. Non-dynamic frequency change was already supported (and used
before secondary CPUs are started), but the dynamic frequency change
requires a completely different procedure.
In order to achieve this, the clk_cpu_set_rate() function is reworked
to handle two separate cases:
- The case where the clock is enabled, which is the new dynamic
frequency change code, implemented in clk_cpu_on_set_rate(). This
part will be used for cpufreq activities.
- The case where the clock is disabled, which is the existing
frequency change code, moved in clk_cpu_off_set_rate(). This part
is already used to set the clock frequency of the secondary CPUs
before starting them.
In order to implement the dynamic frequency change function, we need
to access the PMU DFS registers, which are outside the currently
mapped "Clock Complex" registers, so a new area of registers is now
mapped. This affects the Device Tree binding, but we are careful to do
it in a backward-compatible way (by allowing the second pair of
registers to be non-existent, and in this case, ensuring
clk_cpu_on_set_rate() returns an error).
Note that technically speaking, the clk_cpu_on_set_rate() does not do
the entire procedure needed to change the frequency dynamically, as it
involves touching a number of PMSU registers. This is done through a
clock notifier registered by the PMSU driver in followup commits.
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1404920715-19834-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The CA9 MPcore SoC Control block is a set of registers that allows to
configure certain internal aspects of the core blocks of the SoC
(Cortex-A9, L2 cache controller, etc.). In most cases, the default
values are fine so they aren't many reasons to touch those registers,
but there is one exception: to support cpuidle on Armada 38x, we need
to modify the value of the CA9 MPcore Reset Control register.
Therefore, this commit adds a new Device Tree binding for this
hardware block, and uses this new binding for the Armada 38x Device
Tree file.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: devicetree@vger.kernel.org
Link: https://lkml.kernel.org/r/1404913221-17343-11-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
We always use resched_task() with rq->curr argument.
It's not possible to reschedule any task but rq's current.
The patch introduces resched_curr(struct rq *) to
replace all of the repeating patterns. The main aim
is cleanup, but there is a little size profit too:
(before)
$ size kernel/sched/built-in.o
text data bss dec hex filename
155274 16445 7042 178761 2ba49 kernel/sched/built-in.o
$ size vmlinux
text data bss dec hex filename
7411490 1178376 991232 9581098 92322a vmlinux
(after)
$ size kernel/sched/built-in.o
text data bss dec hex filename
155130 16445 7042 178617 2b9b9 kernel/sched/built-in.o
$ size vmlinux
text data bss dec hex filename
7411362 1178376 991232 9580970 9231aa vmlinux
I was choosing between resched_curr() and resched_rq(),
and the first name looks better for me.
A little lie in Documentation/trace/ftrace.txt. I have not
actually collected the tracing again. With a hope the patch
won't make execution times much worse :)
Signed-off-by: Kirill Tkhai <tkhai@yandex.ru>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Link: http://lkml.kernel.org/r/20140628200219.1778.18735.stgit@localhost
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The APQ8064 multimedia clock controller is fairly similar to the
8960 multimedia clock controller, except that gfx2d0/1 has been
removed and the gfx3d frequency is slightly faster when using the
newly introduced PLL15. We also add vcap clocks and a couple new
TV clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add a driver for the global clock controller found on IPQ8064 based
platforms. This should allow most non-multimedia device drivers to probe
and control their clocks.
This is currently missing clocks for USB HSIC and networking devices.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support for the multimedia clock controller found on the APQ8084
based platforms. This will allow the multimedia device drivers to
control their clocks.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
[sboyd: Rework parent mapping to avoid conflicts]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The SO_TIMESTAMPING API defines option SOF_TIMESTAMPING_SYS_HW.
This feature is deprecated. It should not be implemented by new
device drivers. Existing drivers do not implement it, either --
with one exception.
Driver developers are encouraged to expose the NIC hw clock as a
PTP HW clock source, instead, and synchronize system time to the
HW source.
The control flag cannot be removed due to being part of the ABI, nor
can the structure scm_timestamping that is returned. Due to the one
legacy driver, the internal datapath and structure are not removed.
This patch only clearly marks the interface as deprecated. Device
drivers should always return a syststamp value of zero.
Signed-off-by: Willem de Bruijn <willemb@google.com>
----
We can consider adding a WARN_ON_ONCE in__sock_recv_timestamp
if non-zero syststamp is encountered
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Based on a patch by David Herrmann.
The name_assign_type attribute gives hints where the interface name of a
given net-device comes from. These values are currently defined:
NET_NAME_ENUM:
The ifname is provided by the kernel with an enumerated
suffix, typically based on order of discovery. Names may
be reused and unpredictable.
NET_NAME_PREDICTABLE:
The ifname has been assigned by the kernel in a predictable way
that is guaranteed to avoid reuse and always be the same for a
given device. Examples include statically created devices like
the loopback device and names deduced from hardware properties
(including being given explicitly by the firmware). Names
depending on the order of discovery, or in any other way on the
existence of other devices, must not be marked as PREDICTABLE.
NET_NAME_USER:
The ifname was provided by user-space during net-device setup.
NET_NAME_RENAMED:
The net-device has been renamed from userspace. Once this type is set,
it cannot change again.
NET_NAME_UNKNOWN:
This is an internal placeholder to indicate that we yet haven't yet
categorized the name. It will not be exposed to userspace, rather
-EINVAL is returned.
The aim of these patches is to improve user-space renaming of interfaces. As
a general rule, userspace must rename interfaces to guarantee that names stay
the same every time a given piece of hardware appears (at boot, or when
attaching it). However, there are several situations where userspace should
not perform the renaming, and that depends on both the policy of the local
admin, but crucially also on the nature of the current interface name.
If an interface was created in repsonse to a userspace request, and userspace
already provided a name, we most probably want to leave that name alone. The
main instance of this is wifi-P2P devices created over nl80211, which currently
have a long-standing bug where they are getting renamed by udev. We label such
names NET_NAME_USER.
If an interface, unbeknown to us, has already been renamed from userspace, we
most probably want to leave also that alone. This will typically happen when
third-party plugins (for instance to udev, but the interface is generic so could
be from anywhere) renames the interface without informing udev about it. A
typical situation is when you switch root from an installer or an initrd to the
real system and the new instance of udev does not know what happened before
the switch. These types of problems have caused repeated issues in the past. To
solve this, once an interface has been renamed, its name is labelled
NET_NAME_RENAMED.
In many cases, the kernel is actually able to name interfaces in such a
way that there is no need for userspace to rename them. This is the case when
the enumeration order of devices, or in fact any other (non-parent) device on
the system, can not influence the name of the interface. Examples include
statically created devices, or any naming schemes based on hardware properties
of the interface. In this case the admin may prefer to use the kernel-provided
names, and to make that possible we label such names NET_NAME_PREDICTABLE.
We want the kernel to have tho possibilty of performing predictable interface
naming itself (and exposing to userspace that it has), as the information
necessary for a proper naming scheme for a certain class of devices may not
be exposed to userspace.
The case where renaming is almost certainly desired, is when the kernel has
given the interface a name using global device enumeration based on order of
discovery (ethX, wlanY, etc). These naming schemes are labelled NET_NAME_ENUM.
Lastly, a fallback is left as NET_NAME_UNKNOWN, to indicate that a driver has
not yet been ported. This is mostly useful as a transitionary measure, allowing
us to label the various naming schemes bit by bit.
v8: minor documentation fixes
v9: move comment to the right commit
Signed-off-by: Tom Gundersen <teg@jklm.no>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Kay Sievers <kay@vrfy.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
The DMA40 device tree documentation was vague on the second cell passed
in the configuration node for consumers, and did not specify what the
available signals were connected to. Extend the documentation with this
information for the DB8500 ASIC.
Reported-by: Pawel Kulakowski <pawel.kulakowski@tieto.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Until now, cftype arrays carried files for both the default and legacy
hierarchies and the files which needed to be used on only one of them
were flagged with either CFTYPE_ONLY_ON_DFL or CFTYPE_INSANE. This
gets confusing very quickly and we may end up exposing interface files
to the default hierarchy without thinking it through.
This patch makes cgroup core provide separate sets of interfaces for
cftype handling so that the cftypes for the default and legacy
hierarchies are clearly distinguished. The previous two patches
renamed the existing ones so that they clearly indicate that they're
for the legacy hierarchies. This patch adds the interface for the
default hierarchy and apply them selectively depending on the
hierarchy type.
* cftypes added through cgroup_subsys->dfl_cftypes and
cgroup_add_dfl_cftypes() only show up on the default hierarchy.
* cftypes added through cgroup_subsys->legacy_cftypes and
cgroup_add_legacy_cftypes() only show up on the legacy hierarchies.
* cgroup_subsys->dfl_cftypes and ->legacy_cftypes can point to the
same array for the cases where the interface files are identical on
both types of hierarchies.
* This makes all the existing subsystem interface files legacy-only by
default and all subsystems will have no interface file created when
enabled on the default hierarchy. Each subsystem should explicitly
review and compose the interface for the default hierarchy.
* A boot param "cgroup__DEVEL__legacy_files_on_dfl" is added which
makes subsystems which haven't decided the interface files for the
default hierarchy to present the legacy files on the default
hierarchy so that its behavior on the default hierarchy can be
tested. As the awkward name suggests, this is for development only.
* memcg's CFTYPE_INSANE on "use_hierarchy" is noop now as the whole
array isn't used on the default hierarchy. The flag is removed.
v2: Updated documentation for cgroup__DEVEL__legacy_files_on_dfl.
v3: Clear CFTYPE_ONLY_ON_DFL and CFTYPE_INSANE when cfts are removed
as suggested by Li.
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Acked-by: Li Zefan <lizefan@huawei.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Michal Hocko <mhocko@suse.cz>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Aristeu Rozanski <aris@redhat.com>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
The documentation only mentioned the generic fallback compatible property.
Add the missing SoC-specific compatible properties, some of which are
already in use.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <eduardo.valentin@ti.com>
Cc: linux-pm@vger.kernel.org
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
This patch add registers, bit fields and compatible strings for Exynos3250 TMU
(Thermal Management Unit). Exynos3250 uses the Cortex-A7 dual cores and has
a target speed of 1.0 GHz.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[Add MUX address setting bits by Jonghwa Lee]
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Amit Daniel Kachhap<amit.daniel@samsung.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
This panel is used by Atmel's SAMA5D3 Evaluation Kits (sama5d3xek) and
supported by the simple-panel driver.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch adds "allwinner,sun8i-a23-apb0-gates-clk", a A23 specific
compatible to the sun6i-a31-apb0-gates clock driver, along with the
gate bitmap.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Create a sysfs-fs-xfs ABI documentation file for newly added sysfs
attributes. This is created under the testing section.
Signed-off-by: Brian Foster <bfoster@redhat.com>
Reviewed-by: Dave Chinner <dchinner@redhat.com>
Signed-off-by: Dave Chinner <david@fromorbit.com>
This reverts commit 886129a8ee (ACPI / video: change acpi-video
brightness_switch_enabled default to 0) as it is reported to cause
problems to happen.
Fixes: 886129a8ee (ACPI / video: change acpi-video brightness_switch_enabled default to 0)
Link: http://marc.info/?l=linux-acpi&m=140534286826819&w=2
Reported by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
During the last few years, several inline wrappers for DMA operations have
been introduced:
- commit 16052827d9 ("dmaengine/dma_slave:
introduce inline wrappers"),
- commit a14acb4ac2 ("DMAEngine: add
dmaengine_prep_interleaved_dma wrapper for interleaved api"),
- commit 6e3ecaf0ad ("dmaengine: add
wrapper functions for device control functions").
Update the documentation to use the wrappers.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
By default when CONFIG_XEN and CONFIG_XEN_PVHVM kernels are
run, they will enable the PV extensions (drivers, interrupts, timers,
etc) - which is the best option for the majority of use cases.
However, in some cases (kexec not fully working, benchmarking)
we want to disable Xen PV extensions. As such introduce the
'xen_nopv' parameter that will do it.
This parameter is intended only for HVM guests as the Xen PV
guests MUST boot with PV extensions. However, even if you use
'xen_nopv' on Xen PV guests it will be ignored.
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
---
[v2: s/off/xen_nopv/ per Boris Ostrovsky recommendation.]
[v3: Add Reviewed-by]
[v4: Clarify that this is only for HVM guests]
SPEAr SOCs have some miscellaneous registers which are used to configure
peripheral.
This patch adds dt node and binding information for this block.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Cc: devicetree@vger.kernel.org
[viresh: fixed logs/cclist]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
ARM based ST Microelectronics's SPEAr1310/40 platforms uses ST's phy (known as
'miphy') for PCIe and SATA. This patch adds drivers for these miphys.
This also adds proper bindings for miphys.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Tested-by: Mohit Kumar <mohit.kumar@st.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
[viresh: fixed logs/cclist/checkpatch warnings, broken into smaller patches]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
ARM based ST Microelectronics's SPEAr1310 and SPEAr1340 SOCs have onchip
designware PCIe controller. To make that usable, this patch adds a wrapper
driver based on existing designware driver.
Adds bindings for this new driver and update MAINTAINERS as well.
Cc: linux-pci@vger.kernel.org
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Mohit Kumar <mohit.kumar@st.com>
[viresh: fixed logs/cclist/checkpatch warnings, broken into smaller patches]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
