This patch adds SATA support fot MT7622.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds PCIe support for MT7622.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
[mb: fix type in commit message]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
add ethernet device nodes which enable GMAC1 with SGMII interface
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
add nodes for NOR flash, parallel Nand flash with error correction code
support.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: RogerCC Lin <rogercc.lin@mediatek.com>
Cc: Guochun Mao <guochun.mao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch also cleans up two oscillators that provide clocks for MT7623.
Switch the uart clocks to the real ones while at it.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add clocks, regulators and opp information into cpu nodes.
In addition, the power supply for cpu nodes is deployed on
mt7622-rfb1 board.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enable pwrap and MT6380 on mt7622-rfb1 board. Also add all mt6380
regulator nodes in an alone file to allow similar boards using MT6380
able to resue the configuration.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Philippe Ombredanne <pombredanne@nexb.com>
Acked-by: Philippe Ombredanne <pombredanne@nexb.com>
[mb: add missing space]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
add pinctrl device nodes and rfb1 board, additionally include all pin
groups possible being used on rfb1 board and available gpio keys.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add clock controller nodes for MT7622 and include header for topckgen,
infracfg, pericfg, apmixedsys, ethsys, sgmiisys, pciesys and ssusbsys
for those devices nodes to be added afterwards.
In addition, provides an oscillator node for the source of PLLs and dummy
clock for PWARP to complement missing support of clock gate for the
wrapper circuit in the driver.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This extra clock is needed to access the registers of the UARTs used on
CP110 component of the Armada 7K/8K SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Set correct clocks and interrupt values.
Fixes the incorrect SPI master configuration. This is
mandatory to make the SPI5 interface functional.
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add cpu cooling maps for cpu passive trip points. The cpu cooling
device states are mapped to cpufreq based scaling frequencies.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
A 2MB shared memory region is used on MSM8996 for exchanging sector data
in rmtfs. Add this chunk of reserved memory now that we have the
rmtfs-mem compatible to describe it and its memory protection
properties.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add a CPU OPP table to allow CPU frequency scaling on msm8916 platforms.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
There are clock controller registers in the APCS block, which purpose
is to control the main CPU mux and divider. Add the clock properties as
part of the APCS device-tree node.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The APCS block was exposed until now as a syscon, but now we have a
proper driver for this block. Add the compatible string of the new
driver to probe and register the mailbox functionality.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add a device tree node for the A53 PLL, which exists on msm8916
platforms.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
GICv3 does not have affinity bitmap in the binding for PPI
interrupts. It can be specified using a 4th cell if needed
as documented in the bindings. Clean up the wrong use of the
affinity bitmap using the GIC_CPU_MASK_SIMPLE() macro
Reported-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add device tree files for the Tegra194 P2972-0000 development board.
The board consists of the P2888 compute module and the P2822 baseboard.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the chip-level device tree, including binding headers, for the
NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices
are initially available, enough to boot to UART console.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Xilinx zc1751 boards is used for silicon validation. Board can be
extended with 5 FMCs/DCs cards to connect various IPs. Describe all
these combinations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
These 3 boards requires minimal support to get Linux up and running.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Xilinx zcu104 is another customer board. It is sort of zcu102 clone
with some differences.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
This patch is adding revA, revB and rev1.0. There are also other
revisions between which should be backward compatible with previous
versions. Unfortunately all revs are still in use.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
This board has 2GB of memory, i2c, sd, wifi sdio, spis, uarts, display
port and usbs.
Board is using fixed clocks because clock driver hasn't been merged yet.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
This patch add 8-bit bus width property to eMMC node.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds the sata port phy OOB timing values in the sata
device-tree node.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds a specific wetek dtsi to handle the specific Hub and Play2
boards by no more depending on the p20x dtsi.
This simplifies the hub and play2 dts and will avoid breaking these
boards when adding p200 and p201 specific changes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Different modules maybe installed by the user on the eMMC connector
of the odroid-c2. While the red modules are working without an issue,
it seems some black modules (apparently Samsung based) are having
issue at 200MHz
While the tuning algorithm introduced in v4.14 enables high speed modes
on every other tested designs, it seems a problem remains for this
particular combination of board and eMMC module.
Lowering the maximum frequency of the eMMC on this board until we can
figure out a better solution.
Fixes: d341ca88ee ("mmc: meson-gx: rework tuning function")
Suggested-by: Ellie Reeves <ellierevves@gmail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Cc: stable@vger.kernel.org
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Move the SPDX-License-Identifier lines to the top and drop the
license splat.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The compatible in pwm_AO_cd is wrong and does not match anything.
Correct this with the correct compatible string
Fixes: 4a81e5ddfb ("ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
add the secure AO system controller with chipid enabled
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
1. Add support for HDMI audio on Exynos 5433 TM2/TM2E boards.
2. Add support for USB-MHL connector on Exynos 5433 TM2/TM2E boards.
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Merge tag 'samsung-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Pull "Samsung DTS ARM64 changes for v4.17" from Krzysztof Kozłowski:
1. Add support for HDMI audio on Exynos 5433 TM2/TM2E boards.
2. Add support for USB-MHL connector on Exynos 5433 TM2/TM2E boards.
* tag 'samsung-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: add OF graph between MHL and USB connector
arm64: dts: exynos: add micro-USB connector node to TM2 platforms
ARM: dts: exynos: Add support for HDMI audio on Exynos 5433 TM2 board
ARM: dts: exynos: Update I2S0 device node in exynos5433
ARM: dts: exynos: Add I2S1 device node to exynos5433
'linux,stdout-path' has been deprecated for some time in favor of
'stdout-path'. Now dtc will warn on occurrences of 'linux,stdout-path'.
Search and replace the one occurrence with 'stdout-path'.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Spreadtrum SC9860 platform has one SC2731 PMIC, and the SC2731
PMIC integrates all mobile handset power management, audio codec,
battery management and user interface support function in a single
chip.
This patch adds the SC2731 dts file, as well as adding the RTC and
regulator device node for this PMIC.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Spreadtrum SC9860 platform has two DMA controllers, one is located
on the ap-ahb system, and another one is located on the agcp system.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the watchdog device node for Spreadtrum SC9860 platform to
watch the system's stability.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
We will use one always-on timer to be the broadcast device, thus add
the timer device node for Spreadtrum SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds the pin controller device node for Spreadtrum
SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
We will access the PMIC through ADI controller, thus this patch adds
the ADI device node for Spreadtrum SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Spreadtrum SC9860 platform only has one hardware spinlock device,
which is located on AON system of Spreadtrum SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
OF graph describes MHL data lanes between MHL and respective USB
connector.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Since USB connector bindings are available we can describe it on TM2(e).
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP'
idle state. At early time, the CPU CA73 CPU_NAP idle state has been
supported on Hikey960. Later we found the system has the hang issue
and for resolving this issue Hisilicon released new MCU firmware, but
unfortunately the new MCU firmware has side effect and results in the
CA73 CPU cannot really enter CPU_NAP state and roll back to WFI state.
After discussion we cannot see the possibility to enable CA73 CPU_NAP
state anymore on Hikey960, based on this conclusion we should remove
this state from DT binding.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Kevin Wang <jean.wangtao@linaro.org>
Cc: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This patch is to add watchdog binding for Hi6220 on Hikey board.
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
a CPU cooling device is found by referring to the cpufreq table instead.
Moreover, the entries are incorrect here as min level is 4 and the max
level is 0.
Remove the unused properties from the CPU nodes.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
According to the hi6220 datasheet, the MMC controller is JEDEC eMMC 4.5
compliant, in addition to supporting a clock of up to 150MHz. The Hikey
schematic also indicates the device utilizes 1.8v signaling. Define these
parameters in the device tree to enable HS200 mode.
Signed-off-by: Ryan Grachek <ryan@edited.us>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The HiSilicon erratum 161010801 describes the limitation of
HiSilicon platforms hip06/hip07 to support the SMMUv3 mappings
for MSI transactions.
PCIe controller on these platforms has to differentiate the
MSI payload against other DMA payload and has to modify the
MSI payload. This makes it difficult for these platforms to
have SMMU translation for MSI. In order to workaround this,
ARM SMMUv3 driver requires a quirk to treat the MSI regions
separately. Such a quirk is currently missing for DT based
systems and therefore we need to explicitly disable the
hip06/hip07 smmu entries in dts.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add cpld-syscon node to support the cpld control for hns-dsaf
on the hip07 SoC.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Enable HDMI output on all boards with HDMI connector.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This reverts commit c301b327ae.
While this works splendidly on rk3399-gru devices using the cros-ec
extcon, other rk3399-based devices using the fusb302 or no power-delivery
controller at all don't probe at all anymore, as the typec-phy currently
always expects the extcon to be available and therefore defers probing
indefinitly on these.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Back in the early days when gru devices were still under development
we found an issue where the WiFi reset line needed to be configured as
early as possible during the boot process to avoid the WiFi module
being in a bad state.
We found that the way to get the kernel to do this in the earliest
possible place was to configure this line in the pinctrl hogs, so
that's what we did. For some history here you can see
<http://crosreview.com/368770>. After the time that change landed in
the kernel, we landed a firmware change to configure this line even
earlier. See <http://crosreview.com/399919>. However, even after the
firmware change landed we kept the kernel change to deal with the fact
that some people working on devices might take a little while to
update their firmware.
At this there are definitely zero devices out in the wild that have
firmware without the fix in it. Specifically looking in the firmware
branch several critically important fixes for memory stability landed
after the patch in coreboot and I know we didn't ship without those.
Thus, by now, everyone should have the new firmware and it's safe to
not have the kernel set this up in a pinctrl hog.
Historically, even though it wasn't needed to have this in a pinctrl
hog, we still kept it since it didn't hurt. Pinctrl would apply the
default hog at bootup and then would never touch things again. That
all changed with commit 981ed1bfbc ("pinctrl: Really force states
during suspend/resume"). After that commit then we'll re-apply the
default hog at resume time and that can screw up the reset state of
WiFi. ...and on rk3399 if you touch a device on PCIe in the wrong way
then the whole system can go haywire. That's what was happening.
Specifically you'd resume a rk3399-gru-* device and it would mostly
resume, then would crash with some crazy weird crash.
One could say, perhaps, that the recent pinctrl change was at fault
(and should be fixed) since it changed behavior. ...but that's not
really true. The device tree for rk3399-gru is really to blame.
Specifically since the pinctrl is defined in the hog and not in the
"wlan-pd-n" node then the actual user of this pin doesn't have a
pinctrl entry for it. That's bad.
Let's fix our problems by just moving the control of
"wlan_module_reset_l pinctrl" out of the hog and put them in the
proper place.
NOTE: in theory, I think it should actually be possible to have a pin
controlled _both_ by the hog and by an actual device. Once the device
claims the pin I think the hog is supposed to let go. I'm not 100%
sure that this works and in any case this solution would be more
complex than is necessary.
Reported-by: Marc Zyngier <marc.zyngier@arm.com>
Fixes: 48f4d9796d ("arm64: dts: rockchip: add Gru/Kevin DTS")
Fixes: 981ed1bfbc ("pinctrl: Really force states during suspend/resume")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The memory node in fsl-ls1046a.dtsi has no 'reg' property, and causes
the dtc warning below.
Warning (unit_address_vs_reg): Node /memory@80000000 has a unit name, but no reg property
Let's add a 'reg' property with dummy memory size, since bootloader will
need to fill the correct one per board memory configuration anyway.
Cc: Mingkai Hu <Mingkai.Hu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Currently the size of GICv2m MSI frames are listed as 4kB while the
Juno TRM specifies 64kB for each of these MSI frames.
Though the devices connected themselves might just use the first 4kB,
to be consistent with the general practice of 64kB boundary alignment
to all the devices, let's keep the size as 64kB. This might also help
in avoiding any surprise when passing the device to a VM.
This patch increases the size of each GICv2m MSI frames from 4kB to 64kB
as per the specification.
Cc: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
It fixes LS family SoCs device tree dtc warning in IFC child nodes.
Warning (simple_bus_reg): Node /soc/ifc@1530000/nor@0,0 simple-bus unit address format error, expected "0"
Warning (simple_bus_reg): Node /soc/ifc@1530000/nand@1,0 simple-bus unit address format error, expected "100000000"
Warning (simple_bus_reg): Node /soc/ifc@1530000/board-control@2,0 simple-bus unit address format error, expected "200000000"
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use the new bindings of the reworked Marvell NAND controller driver.
Also adapt the nand controller node organization to distinguish which
property is relevant for the controller, and which one is NAND chip
specific. Expose the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
the driver activates the arbiter by default for all boards (either
needed or harmless).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use the new bindings of the reworked Marvell NAND controller driver.
Also adapt the nand controller node organization to distinguish which
property is relevant for the controller, and which one is NAND chip
specific. Expose the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
the driver activates the arbiter by default for all boards (either
needed or harmless).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the AHCI SATA
controller used on the Armada 7K/8K SoCs.
The ahci drivers was already designed to support up to 5 clocks so there
is only need to update the device tree to use it. It was not noticed
until now because of wrong assumption in the clock drivers, but as this
IP really needs 2 clocks, we had to declare both of them.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Juno's GICv2m implementation consists of four frames providing 32
interrupts each. Since it is possible to plug in enough PCIe endpoints
to consume more than 32 MSIs, and the driver already has a bodge to
handle multiple frames, let's expose the other three as well.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
According to PSCI standard v0.2, for CPU_SUSPEND call, which is
used by cpu idle framework, bit[16] of state parameter must be 0.
So update bit[16] of property 'arm,psci-suspend-param', which is
used as state parameter, to 0.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add SPDX identifier as was done by for example by:
"License cleanup: add SPDX GPL-2.0 license identifier to files with no
license" (commit <b24413180f5600bcb3bb70fbed5cf186b60864bd>)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The patch
"devicetree: Add compatible string for Zynq Ultrascale+ MPSoC"
(commit <988d6f07fc0a29e392035ba56e3bcfaf7b397d95>)
introduced specific compatible string for ZynqMP which should be used
first.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
adding the grf-vio clock to the edp so that it can also be build
as module, correct pcie ep-gpio on the sapphire board and finally
a fix that makes the gmac work at gigabit speeds on the rk3328-rock64.
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Merge tag 'v4.16-rockchip-dts64fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes
Pull "Rockchip dts64 fixes for 4.16" from Heiko Stübner:
Fixes of dwmmc tuning clocks that may make probing HS cards fail,
adding the grf-vio clock to the edp so that it can also be build
as module, correct pcie ep-gpio on the sapphire board and finally
a fix that makes the gmac work at gigabit speeds on the rk3328-rock64.
* tag 'v4.16-rockchip-dts64fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Fix DWMMC clocks
arm64: dts: rockchip: introduce pclk_vio_grf in rk3399-eDP device node
arm64: dts: rockchip: correct ep-gpios for rk3399-sapphire
arm64: dts: rockchip: fix rock64 gmac2io stability issues
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -E -i -e "s/@0x([0-9a-fA-F\.]+)\s?\{/@\L\1 \{/g" -e "s/@0+([0-9a-fA-F\.]+)\s?\{/@\L\1 \{/g" {} +
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This is a follow up to commit 4c9847b737 ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
dtc recently added PCI bus checks. Fix these warnings:
arch/arm64/boot/dts/cavium/thunder2-99xx.dtb: Warning (pci_bridge): Node /pci missing bus-range for PCI bridge
arch/arm64/boot/dts/cavium/thunder2-99xx.dtb: Warning (unit_address_vs_reg): Node /pci has a reg or ranges property, but no unit name
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Jayachandran C <jnair@caviumnetworks.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Define the Condor board dependent part of the EtherAVB device node.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A77980 SoC based Condor board.
The board has 1 debug serial port (SCIF0); include support for it, so
that the serial console can work.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: correct memory size to 0x78000000 (2GiB)]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A77980 part of the EtherAVB device node.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe [H]SCIF ports in the R8A77980 device tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While the sapphire board is a system-on-module and mostly used with the
excavator baseboard, it is also possible to use it standalone without
any base. So add a board-variant for this type.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Vicente Bergas <vicencb@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
The i2s2 drives the HDMI audio, which has the connector on the daughterboard.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The sdio signals are routed through the connector to the baseboard,
where the wifi module is also located. So move the sdio node to
the excavator as well.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Vicente Bergas <vicencb@gmail.com>
Enable the NXP SGTL5000 audio codec on the RK3399-Q7 EVK baseboard
Haikou.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The I2S definition is part of the SoM and therefore should be in
rk3399-puma.dtsi. Also correct the number of channels available.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The vdd_log power supply is controlled by a PWM pin, not by i2c
register access. There is a boot message that reports an error
about not being able to bring that supply up.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Haikou is a Qseven and μQseven baseboard used in Theobroma Systems
evaluation kits. This dts adds a version for use with a RK3368-uQ7 SoM
called Lion.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The RK3368-uQ7 SoM is a uQseven-compatible (40mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3368.
It provides the following feature set:
* up to 4GB DDR3
* on-module SPI-NOR flash
* on-module eMMC (with 8-bit 1.8V interface)
* SD card (on a baseboad) via edge connector
* Gigabit Ethernet with on-module Micrel KSZ9031 GbE PHY
* HDMI/eDP/MIPI-DSI/LVDS
* MIPI-CSI
* USB
- 1x USB 2.0 dual-role
- 1x USB 2.0 host
* on-module STM32 Cortex-M0 companion controller, implementing:
- low-power RTC functionality (ISL1208 emulation)
- fan controller (AMC6821 emulation)
- USB<->CAN bridge controller
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable the DU, providing only the VGA output for now.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The VSPD includes a CLUT on RPF2. Ensure that the register space is
mapped correctly to support this.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The VSPD includes a CLUT on RPF2. Ensure that the register space is
mapped correctly to support this.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The VSPD includes a CLUT on RPF2. Ensure that the register space is
mapped correctly to support this.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Trying to boot an RK3328 box with an HS200-capable eMMC, I see said eMMC
fail to initialise as it can't run its tuning procedure, because the
sample clock is missing. Upon closer inspection, whilst the clock is
present in the DT, its name is subtly incorrect per the binding, so
__of_clk_get_by_name() never finds it. By inspection, the drive clock
suffers from a similar problem, so has never worked properly either.
Fix up all instances of the incorrect clock names across the 64-bit DTs.
Fixes: d717f7352e ("arm64: dts: rockchip: add sdmmc/sdio/emmc nodes for RK3328 SoCs")
Fixes: b790c2cab5 ("arm64: dts: add Rockchip rk3368 core dtsi and board dts for the r88 board")
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Using a serial console on RK3328 provokes an error from
of_dma_request_slave_channel() since the UART nodes have a "dmas"
property but are missing the mandatory "dma-names" to go with it.
Replace the bogus "#dma-cells" - these UARTs are DMA channel consumers,
not providers - with the appropriate names instead. DMA still doesn't
actually work, since the PL330 driver doesn't quite implement everything
the 8250 driver demands, but at least it makes the DT correct.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch updates the sound node of the exynos5433-tm2 board
and adds clock tree configuration in order to support HDMI sound.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The i2s0 node name is changed to a more generic "i2s" and missing
(optional) properties are added. The #sound-dai-cells property is
required for HDMI audio support on TM2 board.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add DT node for the second I2S controller available
on Exynos 5433 SoC.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Define the generic r8a77995 part of the DU device node.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The single SDHI controller is connected to eMMC.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The r8a77995 has a VSPBS to support image processing such as blending of
two input images, and has two VSPDs to handle display pipelines with a
DU.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
[simon: updated base address of vsp node to fea28000]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The FCPVB handles the interface between the VSPB and memory, while the
FCPVD handles the interface between the VSPD and memory.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Specify EtherAVB PHY IRQ in the Eagle board's device tree, now that we
have the GPIO support (previously phylib had to resort to polling).
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe all 6 GPIO controllers in the R8A77970 device tree.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Most of the boards use the mmc1 pins and their attributes defined in
mmc1_pins_a. Let's default to that by moving the pinctrl attributes to
the dtsi file. This makes it easier to modify device trees in the
future as there is only one place to change the pinctrl attributes.
Signed-off-by: Joonas Kylmälä <joonas.kylmala@iki.fi>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Using the cd-inverted property is not useful when GPIOs are used as card
detects since the polarity can be specified with the usual
GPIO_ACTIVE_(HIGH|LOW) GPIO flags. It has also caused confusion for
U-Boot developers, so migrate all sunxi boards away from cd-inverted.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add the DAI blocks to the device tree. I2S0 and I2S1 are for
connecting to an external codec.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The S/PDIF transmitter can be reached on the Euler connector.
But as this is a GPIO then leave it disabled so that an overlay
can override the status property.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the device tree sound bindings for the S/PDIF block.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the SPDIF transceiver controller block and pin to the A64 dtsi.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Most of the boards use the mmc0 pins and their attributes defined in
mmc0_pins_a. Let's default to those by moving the pinctrl attributes
to the dtsi file. This makes it easier to modify device trees in the
future as there is only one place to change the pinctrl attributes.
Signed-off-by: Joonas Kylmälä <joonas.kylmala@iki.fi>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
A 'C' was missing in the model name, this patch fixes it.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add description of the J25 and J27 UART headers of the Macchiatobin. They use
uart peripherals that the CP0 (J25) and CP1 (J27) provide.
Even though J25 and J27 are labeled as UART header, the pins on these headers
can be muxed for other purposes. But the UART functionality is useful when the
board is mounted in an ATX style enclosure, since the console UART is not
accessible through the microUSB at CON9.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The CP110 component has 4 uart peripherals. All of them use the same clock
gate for slow peripherals that is shared with the i2c and spi peripherals.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the I2C controller
used on the Armada 7K/8K SoCs.
This follows the changes already made in the binding documentation (as
well as in the driver) in:
commit 1534156e99 ("i2c: mv64xxx: Fix clock
resource by adding an optional bus clock")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the SPI controller
used on Armada 7K/8K SoCs.
This follows the changes already made in the binding documentation (as
well as in the driver) in:
'commit 92ae112e47 ("spi: orion: Fix clock
resource by adding an optional bus clock")'.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Enable cdn_dp and create a cdn-dp-sound for the DP audio. Delete the
endpoints between dp and vopL for gru, since we want the DP only use
VOP big, which can support 4K mode.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
[dropped vop-hacks]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add a node for the cdn DP controller which is embedded in the rk3399
SoC.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
[fixed whitespaces instead of tabs, dropped unnecessary address+size-cells
and fixed the number of interrupt cells]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the (previously omitted) SCIF0 pin data to the Eagle board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A77970 part of the PFC device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Extend configuring the MAC address from u-boot to all meson boards.
I didn't test this changeset but having checked libretech's u-boot
tree I believe it should just work.
Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
With the adequate configuration settings, u-boot will loop through the
list of aliases looking for "ethernetX".
By adding an ethernet alias, u-boot can fixup the local-mac-address
property in the kernel's device tree using a value held in its
environment variable ethaddr.
Tested-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The UART_A is connected to a BT module on the S400 board.
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Explictly request the pinctrl info for the UART_AO_A controller,
otherwise we may need to rely on bootloader for the initialization.
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Describe the pinctrl info for the UART controller which is found
in the Meson-AXG SoCs.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: s/uart_ao_b_gpioz/uart_ao_b_z/ ]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
When update the clock info for the UART controller in the EE domain,
the driver explicitly require 'pclk' in order to work properly.
With current logic of the code, the driver will go for the legacy clock probe
routine if it find current compatible string match to 'amlogic,meson-uart',
which result in not requesting the 'pclk' clock, thus break the driver in the end.
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Comparing to RGMII interface, the RMII interface require few pins.
So it's worth describing them here.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
In the S400 board, The I2C master-1 is connecting to
the audio speaker daughter board.
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Describe all the pin mux for the I2C controller which found in
Meson-AXG SoC.
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There are four I2C masters in EE domain, and one I2C Master in
AO domain, the DT info here should describe them all.
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The address space range is actually 0x18, fixed here.
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
R-Car D3 does not have the Stream Buffer for EtherAVB-IF (STBE).
Note that the RAVB driver does not use this region.
Fixes: f9ba0c4cfe ("arm64: dts: renesas: r8a77995: Add EthernetAVB device node")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car V3M does not have the Stream Buffer for EtherAVB-IF (STBE).
Note that the RAVB driver does not use this region.
Fixes: bea2ab136e ("arm64: dts: renesas: r8a77970: add EtherAVB support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe SYS-DMAC1/2 in the R8A77980 device tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The initial R8A77980 SoC device tree including Cortex-A53 CPU, GIC, timer,
CPG, RST, and SYSC.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
No devices to add, I2C1 has an external connector only.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enables EEPROM on I2C0 on the Draak board.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
To be able to read fused calibration values from hardware the size of
the register resource of TSC1 needs to be incremented to cover one more
register which holds the information if the calibration values have been
fused or not.
Instead of increasing TSC1 size to the value from the datasheet update
all TSC's size to the smallest granularity of the address decoder
circuitry.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
To be able to read fused calibration values from hardware the size of
the register resource of TSC1 needs to be incremented to cover one more
register which holds the information if the calibration values have been
fused or not.
Instead of increasing TSC1 size to the value from the datasheet update
all TSC's size to the smallest granularity of the address decoder
circuitry
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move pmu_a53 and timer nodes from soc node to root node. The nodes that
have been moved do not have any register properties and thus shouldn't be
placed on the bus.
This problem is flagged by the compiler as follows:
$ make W=1
...
arch/arm64/boot/dts/renesas/r8a77995-draak.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a77995-draak.dtb: Warning (simple_bus_reg): Node /soc/pmu_a53 missing or empty reg/ranges property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move timer node from soc node to root node. The node that have been moved
do not have any register properties and thus shouldn't be placed on the
bus.
This problem is flagged by the compiler as follows:
$ make W=1
...
DTC arch/arm64/boot/dts/renesas/r8a77970-eagle.dtb
arch/arm64/boot/dts/renesas/r8a77970-eagle.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
DTC arch/arm64/boot/dts/renesas/r8a77970-v3msk.dtb
arch/arm64/boot/dts/renesas/r8a77970-v3msk.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
We need to configure its GPIOs later.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define OOP tables for all CPUs.
This allows CPUFreq to function.
Based in part on work by Hien Dang.
Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Define OOP tables for all CPUs.
This allows CPUFreq to function.
Based in part on work by Hien Dang.
Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Move scif node so that sub-nodes of the root node are in
alphabetical order.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Add pin definition for I2S0 if used as a 2-channel only bus.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable the SoC thermal sensor on RK3399-Q7 (Puma).
As we want to do do a full board reset instead of just a SoC one, set
hw-tshut-mode to GPIO.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The roc-rk3328-cc is a credit card size single board computer using the
Rockchip RK3328 Quad-Core ARM Cortex A53 64-Bit Processor and supporting
up to 2GB 2133MHz LPDDR4 memory. It provides eMMC module socket, MicroSD
Card slot, USB 2.0/3.0, Gigabit Ethernet, HDMI/CVBS, Infrared Receiver,
SPDIF/I2S, and SPI/I2C/UART/PWM interfaces.
The devicetree currently supports basic peripherals.
Signed-off-by: Levin Du <djw@t-chip.com.cn>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
There are three pins can act as cif test clock for rk3399.
They're sourced from 24M and output 24M by default and some boards
may use them as camera 24M xvclk.
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The pclk_vio_grf supply power for VIO GRF IOs, if it is disabled,
driver would failed to operate the VIO GRF registers.
The clock is optional but one of the side effects of don't have this clk
is that the Samsung Chromebook Plus fails to recover display after a
suspend/resume with following errors:
rockchip-dp ff970000.edp: Input stream clock not detected.
rockchip-dp ff970000.edp: Timeout of video streamclk ok
rockchip-dp ff970000.edp: unable to config video
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
[this should also fix display failures when building rockchip-drm as module]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The endpoint control gpio for rk3399-sapphire boards is gpio2_a4,
so correct it now.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit enables thresh dma mode as this forces to disable checksuming,
and chooses delay values which make the interface stable.
These changes are needed, because ROCK64 is faced with two problems:
1. tx checksuming does not work with packets larger than 1498,
2. the default delays for tx/rx are not stable when using 1Gbps connection.
Delays were found out with:
https://github.com/ayufan-rock64/linux-build/tree/master/recipes/gmac-delays-test
Signed-off-by: Kamil Trzciński <ayufan@ayufan.eu>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The 'reg' property should match the corresponding @ address, so
fix it accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pass unit name to dspi child nodes to fix the following build warnings
with W=1:
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dtb: Warning (unit_address_vs_reg): Node /soc/dspi@2100000/n25q128a has a reg or ranges property, but no unit name
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dtb: Warning (unit_address_vs_reg): Node /soc/dspi@2100000/sst25wf040b has a reg or ranges property, but no unit name
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dtb: Warning (unit_address_vs_reg): Node /soc/dspi@2100000/en25s64 has a reg or ranges property, but no unit name
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move cpu_thermal node from soc node to root node.
cpu_thermal node does not have any register properties and thus
shouldn't be placed on the bus.
This fixes the following build warnings with W=1:
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move cpu_thermal node from soc node to root node.
cpu_thermal node does not have any register properties and thus
shouldn't be placed on the bus.
This fixes the following build warnings with W=1:
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move cpu_thermal node from soc node to root node.
cpu_thermal node does not have any register properties and thus
shouldn't be placed on the bus.
This fixes the following build warnings with W=1:
arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move cpu_thermal node from soc node to root node.
cpu_thermal node does not have any register properties and thus
shouldn't be placed on the bus.
This fixes the following build warnings with W=1:
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move cpu_thermal node from soc node to root node.
cpu_thermal node does not have any register properties and thus
shouldn't be placed on the bus.
This fixes the following build warnings with W=1:
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
ARM DPAA1 (LS1043 and LS1046) have 10 QBMan portals (indexed 0-9)
Enable the one that is missing in the device trees.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There are eight cores in ls1088a and each core has an watchdog,
ls1088a can use sp805-wdt driver, so we just add DT node for it.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We get a moderate number of new machines this time, and only one
new SoC variant (Actions S700):
Actions:
S700 Soc and CubieBoard7 development board
Allo.com Sparky Single-board-computer
Allwinner:
Orange Pi R1 development board
Libre Computer Board ALL-H3-CC H3 single-board computer
ASpeed ast2x00:
Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500
Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500
Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400
AT91:
Axentia Nattis/Natte digital signage
sama5d2 PTC-ek Evaluation board
Freescale/NXP i.MX:
SolidRun Humminboard2 development board
Variscite DART-MX6 SoM and Carrier-board
Technologic TS-4600 and TS-7970 development board
Toradex Colibri iMX7D SoM board
v1.5 variant of Solidrun Cubox-i and Hummingboard
Freescale/NXP Layerscape:
Moxa UC-8410A Series industrial computer
Gemini:
D-Link DNS-313 NAS enclosure
OMAP:
LogicPD OMAP35xx SOM-LV devkit
LogicPD OMAP35xx Torpedo devkit
Renesas:
r8a77970 (V3M) Starter Kit board
r8a7795 (M3-W) Salvator-XS board
We finally managed to get the dtc warnings under control, with no more
build-time warnings for bad device tree files. This includes fixes for
the majority of platforms, including nomadik, samsung, lpc32xx, STi,
spear, mediatek, freescale, qcom, realview, keystone, omap, kirkwood,
renesas, hisilicon, and broadcom.
Files get rearranged on a few platforms, in particular the Marvell
Armada 7K/8K device tree files are changed in preparation for future
SoC support, based on more than two of the same chips in one package,
and some boards get renamed for oxnas for consistency.
Finally, many existing SoCs gain descriptions for additional on-chip
devices that we can now support with kernel drivers:
Allwinner A83t (drm, ethernet, i2c, ...), H3/H5 (USB-OTG)
Amlogic AXG family (clk, pinctrl, pwm, ...), and others (vpu, hdmi)
Aspeed clk controller support
Freescale LS1088A, LS1021A device support
Gemini Ethernet, PCI, TVE, panel
Keystone gpio, qspi, more uarts
Mediatek cpufreq, regulator, clock, reset
Marvell thermal, cpufreq, nand
Renesas SMP, thermal, timer, PWM, sound, phy, ipmmu
Rockchip Mipi, GPU, display
Samsung Exynos5433 PMU, power domain, nfc
Spreadtrum: sc9860 clocks
Tegra TX2 PSDI, HDMI, I2C,SMMU, display, fuse, ...
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"We get a moderate number of new machines this time, and only one new
SoC variant (Actions S700):
Actions:
- S700 Soc and CubieBoard7 development board
- Allo.com Sparky Single-board-computer
Allwinner:
- Orange Pi R1 development board
- Libre Computer Board ALL-H3-CC H3 single-board computer
ASpeed ast2x00:
- Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500
- Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500
- Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400
AT91:
- Axentia Nattis/Natte digital signage
- sama5d2 PTC-ek Evaluation board
Freescale/NXP i.MX:
- SolidRun Humminboard2 development board
- Variscite DART-MX6 SoM and Carrier-board
- Technologic TS-4600 and TS-7970 development board
- Toradex Colibri iMX7D SoM board
- v1.5 variant of Solidrun Cubox-i and Hummingboard
Freescale/NXP Layerscape:
- Moxa UC-8410A Series industrial computer
Gemini:
- D-Link DNS-313 NAS enclosure
OMAP:
- LogicPD OMAP35xx SOM-LV devkit
- LogicPD OMAP35xx Torpedo devkit
Renesas:
- r8a77970 (V3M) Starter Kit board
- r8a7795 (M3-W) Salvator-XS board
We finally managed to get the dtc warnings under control, with no more
build-time warnings for bad device tree files. This includes fixes for
the majority of platforms, including nomadik, samsung, lpc32xx, STi,
spear, mediatek, freescale, qcom, realview, keystone, omap, kirkwood,
renesas, hisilicon, and broadcom.
Files get rearranged on a few platforms, in particular the Marvell
Armada 7K/8K device tree files are changed in preparation for future
SoC support, based on more than two of the same chips in one package,
and some boards get renamed for oxnas for consistency.
Finally, many existing SoCs gain descriptions for additional on-chip
devices that we can now support with kernel drivers:
- Allwinner A83t (drm, ethernet, i2c, ...), H3/H5 (USB-OTG)
- Amlogic AXG family (clk, pinctrl, pwm, ...), and others (vpu, hdmi)
- Aspeed clk controller support
- Freescale LS1088A, LS1021A device support
- Gemini Ethernet, PCI, TVE, panel
- Keystone gpio, qspi, more uarts
- Mediatek cpufreq, regulator, clock, reset
- Marvell thermal, cpufreq, nand
- Renesas SMP, thermal, timer, PWM, sound, phy, ipmmu
- Rockchip Mipi, GPU, display
- Samsung Exynos5433 PMU, power domain, nfc
- Spreadtrum: sc9860 clocks
- Tegra TX2 PSDI, HDMI, I2C,SMMU, display, fuse, ..."
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (690 commits)
arm64: dts: stratix10: fix SPI settings
ARM: dts: socfpga: add i2c reset signals
arm64: dts: stratix10: add USB ECC reset bit
arm64: dts: stratix10: enable USB on the devkit
ARM: dts: socfpga: disable over-current for Arria10 USB devkit
ARM: dts: Nokia N9: add support for up/down keys in the dts
ARM: dts: nomadik: add interrupt-parent for clcd
ARM: dts: Add ethernet to a bunch of platforms
ARM: dts: Add ethernet to the Gemini SoC
ARM: dts: rename oxnas dts files
ARM: dts: s5pv210: add interrupt-parent for ohci
ARM: lpc3250: fix uda1380 gpio numbers
ARM: dts: STi: Add gpio polarity for "hdmi,hpd-gpio" property
ARM: dts: dra7: Reduce shut down temperature of non-cpu thermal zones
ARM: dts: n900: Add aliases for lcd and tvout displays
ARM: dts: Update ti-sysc data for existing users
ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance
arm64: dts: marvell: armada-80x0: Fix pinctrl compatible string
arm: spear13xx: Fix spics gpio controller's warning
arm: spear13xx: Fix dmas cells
...
Here is the big USB and PHY driver update for 4.16-rc1.
Along with the normally expected XHCI, MUSB, and Gadget driver patches,
there are some PHY driver fixes, license cleanups, sysfs attribute
cleanups, usbip changes, and a raft of other smaller fixes and
additions.
Full details are in the shortlog.
All of these have been in the linux-next tree for a long time with no
reported issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-4.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/PHY updates from Greg KH:
"Here is the big USB and PHY driver update for 4.16-rc1.
Along with the normally expected XHCI, MUSB, and Gadget driver
patches, there are some PHY driver fixes, license cleanups, sysfs
attribute cleanups, usbip changes, and a raft of other smaller fixes
and additions.
Full details are in the shortlog.
All of these have been in the linux-next tree for a long time with no
reported issues"
* tag 'usb-4.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (137 commits)
USB: serial: pl2303: new device id for Chilitag
USB: misc: fix up some remaining DEVICE_ATTR() usages
USB: musb: fix up one odd DEVICE_ATTR() usage
USB: atm: fix up some remaining DEVICE_ATTR() usage
USB: move many drivers to use DEVICE_ATTR_WO
USB: move many drivers to use DEVICE_ATTR_RO
USB: move many drivers to use DEVICE_ATTR_RW
USB: misc: chaoskey: Use true and false for boolean values
USB: storage: remove old wording about how to submit a change
USB: storage: remove invalid URL from drivers
usb: ehci-omap: don't complain on -EPROBE_DEFER when no PHY found
usbip: list: don't list devices attached to vhci_hcd
usbip: prevent bind loops on devices attached to vhci_hcd
USB: serial: remove redundant initializations of 'mos_parport'
usb/gadget: Fix "high bandwidth" check in usb_gadget_ep_match_desc()
usb: gadget: compress return logic into one line
usbip: vhci_hcd: update 'status' file header and format
USB: serial: simple: add Motorola Tetra driver
CDC-ACM: apply quirk for card reader
usb: option: Add support for FS040U modem
...
The USB IP on the Stratix10 SoC needs the USB OCP(ecc) bit to get de-asserted
as well for the USB IP to work properly.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Fix for the CP110 dt de-duplication series
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Merge tag 'mvebu-dt64-4.16-3' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt64 for 4.16 (part 3)" from Gregory CLEMENT:
Fix for the CP110 dt de-duplication series
* tag 'mvebu-dt64-4.16-3' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: armada-80x0: Fix pinctrl compatible string
When replacing the cpm by cp0 and cps by cp1 [1] not only the label and
the alias were replaced but also the compatible string which was wrong.
Due to this the pinctrl driver was no more probed.
This patch fix it by reverting this change for the pinctrl compatible
string on Armada 8K.
[1]: "arm64: dts: marvell: replace cpm by cp0, cps by cp1"
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
dtc complains about the lack of #coolin-cells properties for the
CPU nodes that are referred to as "cooling-device":
arch/arm64/boot/dts/mediatek/mt8173-evb.dtb: Warning (cooling_device_property): Missing property '#cooling-cells' in node /cpus/cpu@0 or bad phandle (referred from /thermal-zones/cpu_thermal/cooling-maps/map@0:cooling-device[0])
arch/arm64/boot/dts/mediatek/mt8173-evb.dtb: Warning (cooling_device_property): Missing property '#cooling-cells' in node /cpus/cpu@100 or bad phandle (referred from /thermal-zones/cpu_thermal/cooling-maps/map@1:cooling-device[0])
Apparently this property must be '<2>' to match the binding.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The PMU node has no working interrupt, as shown by this dtc warning:
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dtb: Warning (interrupts_property): Missing interrupt-parent for /pmu
This adds an interrupt-parent property so we can correct parse
that interrupt number.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2 device tree related fixes fixing 2 issues:
- broken pinctrl support since 4.11 on OpenBlocks A7
- implicit clock dependency making the kernel hang if the Xenon sdhci
module was loaded before the mvpp2 Ethernet support (for this one
the driver had to be fixed which was done in v4.14)
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Merge tag 'mvebu-fixes-4.15-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixess for 4.15 (part 1)
2 device tree related fixes fixing 2 issues:
- broken pinctrl support since 4.11 on OpenBlocks A7
- implicit clock dependency making the kernel hang if the Xenon sdhci
module was loaded before the mvpp2 Ethernet support (for this one
the driver had to be fixed which was done in v4.14)
* tag 'mvebu-fixes-4.15-1' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: armada-cp110: Fix clock resources for various node
ARM: dts: kirkwood: fix pin-muxing of MPP7 on OpenBlocks A7
Signed-off-by: Olof Johansson <olof@lixom.net>
A few improvements to our DT support, with:
- basic DRM support for the A83t
- simplefb support for the H3 and H5 SoCs
- One fix for the USB ethernet on the Orange Pi R1
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Merge tag 'sunxi-dt-for-4.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.16, bis
A few improvements to our DT support, with:
- basic DRM support for the A83t
- simplefb support for the H3 and H5 SoCs
- One fix for the USB ethernet on the Orange Pi R1
* tag 'sunxi-dt-for-4.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: a711: Enable the LCD
ARM: dts: sun8i: a83t: Add LVDS pins group
ARM: dts: sun8i: a83t: Enable the PWM
ARM: dts: sun8i: a83t: Add display pipeline
ARM: sunxi: h3/h5: add simplefb nodes
arm64: allwinner: h5: add compatible string for DE2 CCU
ARM: sun8i: h3/h5: add DE2 CCU device node for H3
dt-bindings: simplefb-sunxi: add pipelines for DE2
ARM: dts: sun8i: fix USB Ethernet of Orange Pi R1
Signed-off-by: Olof Johansson <olof@lixom.net>
include IR, SPI and ethernet MAC support for the new AXG family SoCs.
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Merge tag 'amlogic-dt64-3' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Another round of 64-bit DT changes for the new Amlogic SoCs. These
include IR, SPI and ethernet MAC support for the new AXG family SoCs.
* tag 'amlogic-dt64-3' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: dts: meson-axg: enable ethernet for A113D S400 board
ARM64: dts: meson-axg: add ethernet mac controller
ARM64: dts: meson-axg: add the SPICC controller
ARM64: dts: meson-axg: enable IR controller
arm64: dts: meson-axg: switch uart_ao clock to CLK81
clk: meson-axg: add clocks dt-bindings required header
dt-bindings: clock: add compatible variant for the Meson-AXG
Signed-off-by: Olof Johansson <olof@lixom.net>
Use new binding about USB wakeup which now supports multi USB
wakeup glue layer between SSUSB and SPM.
Meanwhile remove dummy clocks of USB wakeup.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This is tested in the S400 dev board which use a RTL8211F PHY,
and the pins connect to the 'eth_rgmii_y_pins' group.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add DT info for the stmmac ethernet MAC which found in
the Amlogic's Meson-AXG SoC, also describe the ethernet
pinctrl & clock information here.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add DT info for the SPICC controller which found in
the Amlogic's Meson-AXG SoC.
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable IR remote controller which found in Amlogic's Meson-AXG SoCs.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Switch the uart_ao pclk to CLK81 since the clock driver is ready.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The main change here are the series of commits doing the Armada 7K/8K
CP110 DT de-duplication, they include the de-duplication itself and
small fixes in the device tree files.
Besides them there are 2 other patches:
- One adding the crypto support for Armada 37xx SoCs
- An other adding Ethernet aliases on A7K/A8K base boards
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Merge tag 'mvebu-dt64-4.16-2' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt64 for 4.16 (part 2)" from Gregory CLEMENT:
The main change here are the series of commits doing the Armada 7K/8K
CP110 DT de-duplication, they include the de-duplication itself and
small fixes in the device tree files.
Besides them there are 2 other patches:
- One adding the crypto support for Armada 37xx SoCs
- An other adding Ethernet aliases on A7K/A8K base boards
* tag 'mvebu-dt64-4.16-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add Ethernet aliases
arm64: dts: marvell: replace cpm by cp0, cps by cp1
arm64: dts: marvell: de-duplicate CP110 description
arm64: dts: marvell: use aliases for SPI busses on Armada 7K/8K
arm64: dts: marvell: use mvebu-icu.h where possible
arm64: dts: marvell: fix compatible string list for Armada CP110 slave NAND
arm64: dts: marvell: fix typos in comment describing the NAND controller
arm64: dts: marvell: use lower case for unit address and reg property
arm64: dts: marvell: fix watchdog unit address in Armada AP806
arm64: dts: marvell: armada-37xx: add a crypto node
ARM64: dts: marvell: armada-cp110: Fix clock resources for various node
ARM: dts: kirkwood: fix pin-muxing of MPP7 on OpenBlocks A7
This patch adds Ethernet aliases in the Marvell Armada 7040 DB, 8040 DB
and 8040 mcbin device trees so that the bootloader setup the MAC
addresses correctly.
Signed-off-by: Yan Markman <ymarkman@marvell.com>
[Antoine: commit message, small fixes]
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
In preparation for the introduction of more than 2 CPs in upcoming
SoCs, it makes sense to move away from the "CP master" (cpm) and "CP
slave" (cps) naming, and use instead cp0/cp1.
This commit is the result of:
sed 's%cpm%cp0g%' arch/arm64/boot/dts/marvell/*
sed 's%cps%cp1g%' arch/arm64/boot/dts/marvell/*
So it is a purely mechaninal change.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Suggested-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
One concept of Marvell Armada 7K/8K SoCs is that they are made of HW
blocks composed of a variety of IPs (network, PCIe, SATA, XOR, SPI,
I2C, etc.), and those HW blocks can be duplicated several times within
a given SoC. The Armada 7K SoC has a single CP110 (so no duplication),
while the Armada 8K SoC has two CP110. In the future, SoCs with more
than 2 CP110s will be introduced.
In current kernel versions, the master CP110 is described in
armada-cp110-master.dtsi and the slave CP110 is described in
armada-cp110-slave.dtsi. Those files are basically exactly the same,
since they describe the same hardware. They only have a few
differences:
- Base address of the registers is different for the "config-space"
- Base address of the PCIe registers, MEM, CONF and IO areas were
different
- Labels (and phandles pointing to them) of the nodes were different
("cpm" prefix in the master CP, "cps" prefix in the slave CP)
This duplication issue has been discussed at the DT workshop [1] in
Prague last October, and we presented on this topic [2]. The solution
of using the C pre-processor to avoid this duplication has been
validated by the people present in this DT workshop, and this patch
simply implements what has been presented.
We handle differences between the master CP and slave CP description
using the C pre-processor, by defining a set of macros with different
values armada-cp110.dtsi is included to instantiate one of the master
or slave CP110.
There are a few aspects that deserve additional explanations:
- PCIe needs to be handled separately because it is not part of the
config-space {...} node, since it has registers outside of the
range covered by config-space {...}.
- We need to defined CP110_BASE, CP110_PCIEx_BASE without 0x, because
they are used for the unit address part of some DT nodes. But since
they are also used for the "reg" property of the same nodes, we
have an ADDRESSIFY() macro that prepends 0x to those values.
We compared the resulting .dtb for armada-8040-db.dtb before and after
this patch is applied, and the result is exactly the same, except for
a few differences:
- the SDHCI controller that was only described in the master CP110 is
now also described in the slave CP110. Even though the SDHCI
controller from the slave CP110 is indeed not usable (as it isn't
wired to the outside world) it is technically part of the silicon,
and therefore it is reasonable to also describe it to be part of
the slave CP110. In addition, if we wanted to get this correct for
the SDHCI controller, we should also do it for the NAND controller,
for which the situation is even more complicated: in a single CP110
configuration (Armada 7K), the usable NAND controller is in the
master CP110, while in a dual CP110 configuration (Armada 8K), the
usable NAND controller is in the slave CP110. Since that would add
a lot of additional complexity for no good reason, and since the IP
blocks are in fact really present in both CPs, we simply describe
them in both CPs at the DT level.
- the cp110-master and cp110-slave nodes are now named cpm and
cps. We could have kept cp110-master and cp110-slave, but that
would have required adding another CP110_xyz define, which didn't
seem very useful.
Note that this commit also gets rid of the armada-cp110-master.dtsi
and armada-cp110-slave.dtsi files, as future SoCs will have more than
2 CPs. Instead, we instantiate the CPs directly from the SoC-specific
.dtsi files, i.e armada-70x0.dtsi and armada-80x0.dtsi.
[1] https://elinux.org/Device_tree_kernel_summit_2017_etherpad
[2] https://elinux.org/images/1/14/DTWorkshop2017-duplicate-data.pdf
[gregory.clement@free-electrons.com: add back the "ARM64: dts: marvell:
Fix clock resources for various node" commit]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
We are currently using the cell-index DT property to assign SPI bus
numbers. This property is specific to the spi-orion driver, and
requires each SPI controller to have a unique ID defined in the Device
Tree.
As we are about to merge armada-cp110-master.dtsi and
armada-cp110-slave.dtsi into a single file, those cell-index
properties that differ between the master CP110 and the slave CP110
are a difference that would have to be handled.
In order to avoid this, we switch to using the "aliases" DT node to
assign a unique number to each SPI controller. This is more generic,
and directly handled by the SPI core.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Back when the ICU Device Tree binding was introduced, we could not use
mvebu-icu.h from the Device Tree files, because the DT files and
mvebu-icu.h were following different merge routes towards Linus
tree. Now that both have been merged, we can switch the Marvell Armada
CP110 Device Tree files to use the mvebu-icu.h header instead of
duplicating the ICU_GRP_NSR definition.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada CP110 slave NAND controller Device Tree description lists
the compatible string in the wrong order: marvell,armada-8k-nand
should come first. This commit alignes the slave CP110 description
with the master CP110 description from that respect.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Fix the same typo duplicated in both master and slave version of
armada-cp110-*.dtsi file: s/limiation/limitation/.
[gregory.clement@free-electrons.com: add the commit log]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This fixes the following DTC warning:
<stdout>: Warning (simple_bus_reg): Node /ap806/config-space@f0000000/thermal@6f808C simple-bus unit address format error, expected "6f808c"
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This fixes the following DTC warning:
Warning (simple_bus_reg): Node /ap806/config-space@f0000000/watchdog@600000 simple-bus unit address format error, expected "610000"
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch adds a crypto node describing the EIP97 engine found in
Armada 37xx SoCs. The cryptographic engine is enabled by default.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
On the CP modules we found on Armada 7K/8K, many IP block actually also
need a "functional" clock (from the bus). This patch add them which allows
to fix some issues hanging the kernel:
If Ethernet and sdhci driver are built as modules and sdhci was loaded
first then the kernel hang.
Fixes: bb16ea1742 ("mmc: sdhci-xenon: Fix clock resource by adding an
optional bus clock")
Cc: stable@vger.kernel.org
Reported-by: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
- clock, pinctrl, PWM and reset nodes for new AXG SoC family
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Merge tag 'amlogic-dt64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Pull "Amlogic 64-bit DT updates for v4.16, round 2" from Kevin Hilman:
This adds a few more basics (clock, pinctrl, PWM, reset) for the new AXG
family of Amlogic SoCs.
* tag 'amlogic-dt64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: meson-axg: add new reset DT node
ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC
ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC
documentation: Add compatibles for Amlogic Meson AXG pin controllers
arm64: dts: meson-axg: add clock DT info for Meson AXG SoC
- clean up gpios properties by macro
- add GPIO hog for PXs3 reference node
- add has-transaction-translator property to generic-ehci nodes
- enable more serial ports for PXs3 reference node
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Merge tag 'uniphier-dt64-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
UniPhier ARM64 SoC DT updates for v4.16
- clean up gpios properties by macro
- add GPIO hog for PXs3 reference node
- add has-transaction-translator property to generic-ehci nodes
- enable more serial ports for PXs3 reference node
* tag 'uniphier-dt64-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: enable more serial ports for PXs3 ref board
arm64: dts: uniphier: add has-transaction-translator property to usb node for LD11
arm64: dts: uniphier: add GPIO hog definition for PXs3
arm64: dts: uniphier: use macros in dt-bindings header
Signed-off-by: Olof Johansson <olof@lixom.net>
There are two important changes in this round.
The first removes the redundant pinctrl setting for the MMC card detect
GPIO. We are moving to strict pinctrl/GPIO exclusion, i.e. GPIO usage
will block other pin muxing usage, and vice versa. The usage of pinmux
for guarding GPIO pins in the device tree prevents us from doing so.
This is part of an ongoing effort to clean up the existing device trees.
The other important change enables the PMIC on the Orangepi Win. The
PMIC provides power to most of the external onboard peripherals.
Enabling it will allow us to enable Ethernet or WiFi support later on.
The remaining changes in this round enable some peripheral, such as
Ethernet, an external WiFi chip, or LEDs.
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Merge tag 'sunxi-dt64-for-4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT64 changes for 4.16
There are two important changes in this round.
The first removes the redundant pinctrl setting for the MMC card detect
GPIO. We are moving to strict pinctrl/GPIO exclusion, i.e. GPIO usage
will block other pin muxing usage, and vice versa. The usage of pinmux
for guarding GPIO pins in the device tree prevents us from doing so.
This is part of an ongoing effort to clean up the existing device trees.
The other important change enables the PMIC on the Orangepi Win. The
PMIC provides power to most of the external onboard peripherals.
Enabling it will allow us to enable Ethernet or WiFi support later on.
The remaining changes in this round enable some peripheral, such as
Ethernet, an external WiFi chip, or LEDs.
* tag 'sunxi-dt64-for-4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: a64: bananapi-m64: Add LED device node
arm64: dts: a64-olinuxino: Enable RTL8723BS WiFi
arm64: dts: allwinner: h5: NanoPi NEO Plus2 : add EMAC support
arm64: dts: allwinner: H5: remove redundant MMC0 card detect pin
arm64: allwinner: a64: Enable AXP803 for Orangepi Win
arm64: dts: orange-pi-zero-plus2: enable AP6212a WiFi/BT combo
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the NAND support on the Marvell 8040-DB board
Add the thermal support for Martvell A7K/A8K Socs
Add nodes allowing cpufreq support on Aramda 3700 SoCs
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Merge tag 'mvebu-dt64-4.16-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt64 for 4.16 (part 1)
Add the NAND support on the Marvell 8040-DB board
Add the thermal support for Martvell A7K/A8K Socs
Add nodes allowing cpufreq support on Aramda 3700 SoCs
* tag 'mvebu-dt64-4.16-1' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: Add thermal support for A7K/A8K
arm64: dts: marvell: armada-37xx: add nodes allowing cpufreq support
arm64: dts: marvell: add NAND support on the 8040-DB board
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add usb3_phy node to r8a7795 (R-Car H3) and r8a7796 (R-Car M3-W) SoCs, and
enable usb3_peri0 on salvator boards
* Allow DTBs of boards of r8a7795 (R-Car H3) and r8a7796 SoCs to build
without any warnings when compiled with W=1 using gcc-linaro-5.4.1-2017.05
- Move nodes which have no reg property out of bus, they don't belong there
- Add reg properties to dummy pciec[01] nodes
- Also sort sub-nodes of root node to allow for easier maintenance
* Add Add EthernetAVB PHY reset to r8a7795 (R-Car H3) and r8a7796 SoCs boards.
Geert Uytterhoeven says "... add properties to describe the EthernetAVB
PHY reset topology to the common Salvator-X/XS and ULCB DTS files, which
solves two issues:
1. On Salvator-XS, the enable pin of the regulator providing PHY power
is connected to PRESETn, and PSCI powers down the SoC during system
suspend. Hence a PHY reset is needed to restore network
functionality after system resume.
2. Linux should not rely on the boot loader having reset the PHY, but
should reset the PHY during driver probe."
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Merge tag 'renesas-arm64-dt2-for-v4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM64 Based SoC DT Updates for v4.16
* Add usb3_phy node to r8a7795 (R-Car H3) and r8a7796 (R-Car M3-W) SoCs, and
enable usb3_peri0 on salvator boards
* Allow DTBs of boards of r8a7795 (R-Car H3) and r8a7796 SoCs to build
without any warnings when compiled with W=1 using gcc-linaro-5.4.1-2017.05
- Move nodes which have no reg property out of bus, they don't belong there
- Add reg properties to dummy pciec[01] nodes
- Also sort sub-nodes of root node to allow for easier maintenance
* Add Add EthernetAVB PHY reset to r8a7795 (R-Car H3) and r8a7796 SoCs boards.
Geert Uytterhoeven says "... add properties to describe the EthernetAVB
PHY reset topology to the common Salvator-X/XS and ULCB DTS files, which
solves two issues:
1. On Salvator-XS, the enable pin of the regulator providing PHY power
is connected to PRESETn, and PSCI powers down the SoC during system
suspend. Hence a PHY reset is needed to restore network
functionality after system resume.
2. Linux should not rely on the boot loader having reset the PHY, but
should reset the PHY during driver probe."
* tag 'renesas-arm64-dt2-for-v4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: renesas: salvator-common: enable usb3_peri0
arm64: dts: renesas: salvator-common: enable usb3_phy0 node
arm64: dts: renesas: r8a7796: add usb3_phy node
arm64: dts: renesas: r8a7795: add usb3_phy node
arm64: dts: renesas: r8a7796: add reg properties to pciec[01] nodes
arm64: dts: renesas: r8a7796: move nodes which have no reg property out of bus
arm64: dts: renesas: r8a7796: sort subnodes of root node alphabetically
arm64: dts: renesas: r8a7795: sort subnodes of root node alphabetically
arm64: dts: renesas: ulcb: Add EthernetAVB PHY reset
arm64: dts: renesas: salvator-common: Add EthernetAVB PHY reset
arm64: dts: renesas: r8a7795: Move nodes which have no reg property out of bus
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add SD card support for the hi3798cv200-poplar board
- Replace the PMU node with exact match for the hi3660 SoC
- Add cpu capacity-dmips-mhz information for the hi3660 SoC
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Merge tag 'hisi-arm64-dt-for-4.16-v2' of git://github.com/hisilicon/linux-hisi into next/dt
ARM64: DT: Hisilicon SoC DT updates for 4.16
- Add SD card support for the hi3798cv200-poplar board
- Replace the PMU node with exact match for the hi3660 SoC
- Add cpu capacity-dmips-mhz information for the hi3660 SoC
* tag 'hisi-arm64-dt-for-4.16-v2' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Add hi3660 cpu capacity-dmips-mhz information
arm64: dts: hi3660: improve pmu description
arm64: dts: hi3798cv200: add SD card support
Signed-off-by: Olof Johansson <olof@lixom.net>
The added header inclusion broke the 'allmodconfig' build in
arm-soc, presumably since the file is added in a different tree:
In file included from arch/arm64/boot/dts/sprd/sp9860g-1h10.dts:11:0:
arch/arm64/boot/dts/sprd/sc9860.dtsi:10:10: fatal error: dt-bindings/clock/sprd,sc9860-clk.h: No such file or directory
It turns out we don't actually need to include it at all, so
I'm removing the line again to fix the build.
Fixes: 22f37a2429 ("arm64: dts: add clocks for SC9860")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Some clocks on SC9860 are in the same address area with syscon devices,
those are what have a property of 'sprd,syscon' which would refer to
syscon devices, others would have a reg property indicated their address
ranges.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Some clocks on SC9860 are in the same address area with syscon
devices, the proper syscon node will be quoted under the
definitions of those clocks in DT.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is probably a copy-paste mistake. The gpio-ranges of PXs3 is
different from that of LD20.
Fixes: 277b51e705 ("arm64: dts: uniphier: add GPIO controller nodes")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
First, one fix that adds proper regulator references for the EMAC
external PHYs on A64 boards. The EMAC bindings were developed for 4.13,
but reverted at the last minute. They were finalized and brought back
for 4.15. However in the time between, regulator support for the A64
boards was merged. When EMAC device tree changes were reintroduced,
this was not taken into account.
Second, a patch that adds OF based modalias uevent for RSB slave devices.
This has been missing since the introduction of RSB, and recently with
PMIC regulator support introduced for the A64, has been seen affecting
distributions, which have the all-important PMIC mfd drivers built as
modules, which then don't get loaded.
Other minor cleanups include final conversion of raw indices to CCU
binding macros for sun[4567]i HDMI, cleanup of dummy regulators on the
A64 SOPINE, a SD card detection polarity fix for the Orange Pi Zero
Plus2, and adding a missing compatible for the PMIC on the TBS A711
tablet.
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Merge tag 'sunxi-fixes-for-4.15' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Pull "Allwinner fixes for 4.15" from Chen-Yu Tsai:
First, one fix that adds proper regulator references for the EMAC
external PHYs on A64 boards. The EMAC bindings were developed for 4.13,
but reverted at the last minute. They were finalized and brought back
for 4.15. However in the time between, regulator support for the A64
boards was merged. When EMAC device tree changes were reintroduced,
this was not taken into account.
Second, a patch that adds OF based modalias uevent for RSB slave devices.
This has been missing since the introduction of RSB, and recently with
PMIC regulator support introduced for the A64, has been seen affecting
distributions, which have the all-important PMIC mfd drivers built as
modules, which then don't get loaded.
Other minor cleanups include final conversion of raw indices to CCU
binding macros for sun[4567]i HDMI, cleanup of dummy regulators on the
A64 SOPINE, a SD card detection polarity fix for the Orange Pi Zero
Plus2, and adding a missing compatible for the PMIC on the TBS A711
tablet.
* tag 'sunxi-fixes-for-4.15' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: a711: Reinstate the PMIC compatible
arm64: dts: orange-pi-zero-plus2: fix sdcard detect
arm64: allwinner: a64-sopine: Fix to use dcdc1 regulator instead of vcc3v3
ARM: dts: sunxi: Convert to CCU index macros for HDMI controller
sunxi-rsb: Include OF based modalias in device uevent
arm64: allwinner: a64: add Ethernet PHY regulator for several boards
Vladimir Zapolskiy says:
The present change is a bug fix for AVB link iteratively up/down.
Steps to reproduce:
- start AVB TX stream (Using aplay via MSE),
- disconnect+reconnect the eth cable,
- after a reconnection the eth connection goes iteratively up/down
without user interaction,
- this may heal after some seconds or even stay for minutes.
As the documentation specifies, the "renesas,no-ether-link" option
should be used when a board does not provide a proper AVB_LINK signal.
There is no need for this option enabled on RCAR H3/M3 Salvator-X/XS
and ULCB starter kits since the AVB_LINK is correctly handled by HW.
Choosing to keep or remove the "renesas,no-ether-link" option will
have impact on the code flow in the following ways:
- keeping this option enabled may lead to unexpected behavior since
the RX & TX are enabled/disabled directly from adjust_link function
without any HW interrogation,
- removing this option, the RX & TX will only be enabled/disabled after
HW interrogation. The HW check is made through the LMON pin in PSR
register which specifies AVB_LINK signal value (0 - at low level;
1 - at high level).
In conclusion, the change is also a safety improvement because it
removes the "renesas,no-ether-link" option leading to a proper way
of detecting the link state based on HW interrogation and not on
software heuristic.
Note that DTS files for V3M Starter Kit, Draak and Eagle boards
contain the same property, the files are untouched due to unavailable
schematics to verify if the fix applies to these boards as well.
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Merge tag 'renesas-fixes-for-v4.15' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Pull "Renesas ARM Based SoC Fixes for v4.15" from Simon Horman:
Vladimir Zapolskiy says:
The present change is a bug fix for AVB link iteratively up/down.
Steps to reproduce:
- start AVB TX stream (Using aplay via MSE),
- disconnect+reconnect the eth cable,
- after a reconnection the eth connection goes iteratively up/down
without user interaction,
- this may heal after some seconds or even stay for minutes.
As the documentation specifies, the "renesas,no-ether-link" option
should be used when a board does not provide a proper AVB_LINK signal.
There is no need for this option enabled on RCAR H3/M3 Salvator-X/XS
and ULCB starter kits since the AVB_LINK is correctly handled by HW.
Choosing to keep or remove the "renesas,no-ether-link" option will
have impact on the code flow in the following ways:
- keeping this option enabled may lead to unexpected behavior since
the RX & TX are enabled/disabled directly from adjust_link function
without any HW interrogation,
- removing this option, the RX & TX will only be enabled/disabled after
HW interrogation. The HW check is made through the LMON pin in PSR
register which specifies AVB_LINK signal value (0 - at low level;
1 - at high level).
In conclusion, the change is also a safety improvement because it
removes the "renesas,no-ether-link" option leading to a proper way
of detecting the link state based on HW interrogation and not on
software heuristic.
Note that DTS files for V3M Starter Kit, Draak and Eagle boards
contain the same property, the files are untouched due to unavailable
schematics to verify if the fix applies to these boards as well.
* tag 'renesas-fixes-for-v4.15' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: renesas: ulcb: Remove renesas, no-ether-link property
arm64: dts: renesas: salvator-x: Remove renesas, no-ether-link property
Fix typo in unit address of MSCL clock controller (the reg entry is
correct) of Exynso5433.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Convert all hex addresses in node unit addresses to lower case to
fix warnings like:
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dtb: Warning (simple_bus_reg):
Node /soc/video-scaler@13C00000 simple-bus unit address format error, expected "13c00000"
Conversion was done using sed:
$ sed -e 's/@\([a-zA-Z0-9_-]*\) {/@\L\1 {/' -i arch/arm64/boot/dts/exynos/*.dts*
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
This node was the only one that didn't have the same set of pins in
active and suspend mode.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Nodes relative to the first sdhc node were interlaced with node of the
second sdhc. Move sdhc2_cd_pin with its siblings to prevent that. Also
rename the grouping node from sdhc2_cd_pin to pmx_sdc2_cd_pin, as
"pmx_sdc" is the prefix used by other nodes.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The QUP core can be used either for I2C or SPI, so the same IP is mapped
by a driver or the other. SPI bindings use a leading 0 for the start
address and a size of 0x600, I2C bindings don't have the leading 0 and
have a size 0x1000.
To make them more similar, add the leading 0 to I2C bindings and changes
the size to 0x500 for all of them, as this is the actual size of these
blocks. Also align the second entry of the clocks array.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
These nodes reserve and configure some pins as GPIOs. They are not
generic pinctrls, they actually belong to board files but they are not
used by any other node, so just drop them altogether.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Drop assignments to bias-disable as the documentation [1] states that
this property doesn't take a value. Other occurrences of this property
respect that.
[1] Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Indentation did not respect kernel standards, so fix that for the usual
indent with tabs, align with spaces. While at it, remove some empty
lines before and after the closing parenthesis of this block.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
SMSM is not symmetrical, the incoming bits from WCNSS are available at
index 6, but the outgoing host id for WCNSS is 3. Further more, upstream
references the base of APCS (in contrast to downstream), so the register
offset of 8 must be included.
Fixes: 1fb47e0a9b ("arm64: dts: qcom: msm8916: Add smsm and smp2p nodes")
Cc: stable@vger.kernel.org
Reported-by: Ramon Fried <rfried@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The serial pins of PXs3 SoC are not multiplexed with any other
functions. Enable serial2 and serial3 on the PXs3 reference board
because I see the connectors on the board.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The DE2 CCU on Allwinner H5 SoC has a slightly different behavior than
the one on H3, so the compatible string is not set in the common DTSI
file.
Add the compatible string of H5 DE2 CCU in H5 DTSI file.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
When a full/low speed device is connected to USB 2.0 port on UniPhier SoC
that has ehci controller, the kernel shows the following messages.
| usb usb1-port1: Cannot enable. Maybe the USB cable is bad?
| usb usb1-port1: Cannot enable. Maybe the USB cable is bad?
| usb usb1-port1: Cannot enable. Maybe the USB cable is bad?
| usb usb1-port1: unable to enumerate USB device
To fix the issue, the driver needs to enable Transaction Translator on ehci
root hub. This adds 'has-transaction-translator' property to each node.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Ina220 chip was used on ls208xardb platform to monitor power
comsumption. So add ina220 chip node in dts to enable power
consumption monitor feature.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add USB support on ls1088ardb
Signed-off-by: yinbo zhu <yinbo.zhu@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following dt entries are added:
cpus [0-3] (Cortex A53):
- capacity-dmips-mhz = <592>;
cpus [4-7] (Cortex A73):
- capacity-dmips-mhz = <1024>;
Those values were obtained by running dhrystone 2.1 on a
HiKey960 with the following procedure:
- Offline all CPUs but CPU0 (A53)
- Set CPU0 frequency to maximum
- Run Dhrystone 2.1 for 20 seconds
- Offline all CPUs but CPU4 (A73)
- set CPU4 frequency to maximum
- Run Dhrystone 2.1 for 20 seconds
The results are as follows:
A53: 129633887 loops
A73: 287034147 loops
By scaling those values so that the A73s use 1024, we end up with 462
for the A53s. However, they have different maximum frequencies:
1.844GHz for A53s and 2.362GHz for A73s. Thus, we can scale the A53
value to truly represent dmips per MHz, and we end up with 592.
The impact of this change can be verified on HiKey960:
$ cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq
1844000
1844000
1844000
1844000
2362000
2362000
2362000
2362000
$ cat /sys/devices/system/cpu/cpu*/cpu_capacity
462
462
462
462
1024
1024
1024
1024
Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
cortex-a73 pmu driver is supported now. hi3660 is 4*a73 + 4*a53, so it
should use "cortex-a73-pmu" and "cortex-a53-pmu" instead of "armpmu-v3",
then we can use the a73 and a53 events in perf tool directly.
Signed-off-by: Xu YiPing <xuyiping@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The present change is a bug fix for AVB link iteratively up/down.
Steps to reproduce:
- start AVB TX stream (Using aplay via MSE),
- disconnect+reconnect the eth cable,
- after a reconnection the eth connection goes iteratively up/down
without user interaction,
- this may heal after some seconds or even stay for minutes.
As the documentation specifies, the "renesas,no-ether-link" option
should be used when a board does not provide a proper AVB_LINK signal.
There is no need for this option enabled on RCAR H3/M3 Salvator-X/XS
and ULCB starter kits since the AVB_LINK is correctly handled by HW.
Choosing to keep or remove the "renesas,no-ether-link" option will
have impact on the code flow in the following ways:
- keeping this option enabled may lead to unexpected behavior since
the RX & TX are enabled/disabled directly from adjust_link function
without any HW interrogation,
- removing this option, the RX & TX will only be enabled/disabled after
HW interrogation. The HW check is made through the LMON pin in PSR
register which specifies AVB_LINK signal value (0 - at low level;
1 - at high level).
In conclusion, the present change is also a safety improvement because
it removes the "renesas,no-ether-link" option leading to a proper way
of detecting the link state based on HW interrogation and not on
software heuristic.
Fixes: dc36965a89 ("arm64: dts: r8a7796: salvator-x: Enable EthernetAVB")
Fixes: 6fa501c549 ("arm64: dts: r8a7795: enable EthernetAVB on Salvator-X")
Signed-off-by: Bogdan Mirea <Bogdan-Stefan_Mirea@mentor.com>
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The present change is a bug fix for AVB link iteratively up/down.
Steps to reproduce:
- start AVB TX stream (Using aplay via MSE),
- disconnect+reconnect the eth cable,
- after a reconnection the eth connection goes iteratively up/down
without user interaction,
- this may heal after some seconds or even stay for minutes.
As the documentation specifies, the "renesas,no-ether-link" option
should be used when a board does not provide a proper AVB_LINK signal.
There is no need for this option enabled on RCAR H3/M3 Salvator-X/XS
and ULCB starter kits since the AVB_LINK is correctly handled by HW.
Choosing to keep or remove the "renesas,no-ether-link" option will
have impact on the code flow in the following ways:
- keeping this option enabled may lead to unexpected behavior since
the RX & TX are enabled/disabled directly from adjust_link function
without any HW interrogation,
- removing this option, the RX & TX will only be enabled/disabled after
HW interrogation. The HW check is made through the LMON pin in PSR
register which specifies AVB_LINK signal value (0 - at low level;
1 - at high level).
In conclusion, the present change is also a safety improvement because
it removes the "renesas,no-ether-link" option leading to a proper way
of detecting the link state based on HW interrogation and not on
software heuristic.
Fixes: dc36965a89 ("arm64: dts: r8a7796: salvator-x: Enable EthernetAVB")
Fixes: 6fa501c549 ("arm64: dts: r8a7795: enable EthernetAVB on Salvator-X")
Signed-off-by: Bogdan Mirea <Bogdan-Stefan_Mirea@mentor.com>
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
for the type-c phys. The Kevin Chromebooks based on rk3399 now can use their
internal edp displays. RK3328 gets its efuse node and Mali450 gpu node,
which actually produces already some nice results with the WIP Lima driver.
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Merge tag 'v4.16-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts64 changes for 4.16" from Heiko Stübner:
General RK3399 gets Mipi nodes, fixes for usb3 support and better support
for the type-c phys. The Kevin Chromebooks based on rk3399 now can use their
internal edp displays. RK3328 gets its efuse node and Mali450 gpu node,
which actually produces already some nice results with the WIP Lima driver.
* tag 'v4.16-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Add efuse device node for RK3328 SoC
arm64: dts: rockchip: add rk3328 mali gpu node
dt-bindings: gpu: mali-utgard: add rockchip,rk3328-mali compatible
arm64: dts: rockchip: add extcon nodes and enable tcphy rk3399-gru
arm64: dts: rockchip: add usb3-phy otg-port support for rk3399
arm64: dts: rockchip: add reset property for dwc3 controllers on rk3399
arm64: dts: rockchip: add the aclk_usb3 clocks for USB3 on rk3399
arm64: dts: rockchip: add pd_usb3 power-domain node for rk3399
arm64: dts: rockchip: Enable edp disaplay on kevin
arm64: dts: rockchip: update mipi cells for RK3399
arm64: dts: rockchip: add mipi_dsi1 support for rk3399
arm64: dts: rockchip: add rk3399 DSI0 reset
This set of patches enables a bunch of new features on Jetson TX2 that
were finally unblocked by the GPIO driver getting merged for v4.15.
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Merge tag 'tegra-for-4.16-arm64-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "arm64: tegra: Changes for v4.16-rc1" from Thierry Reding:
This set of patches enables a bunch of new features on Jetson TX2 that
were finally unblocked by the GPIO driver getting merged for v4.15.
* tag 'tegra-for-4.16-arm64-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Use sor1_out clock
arm64: tegra: Fix SD write-protect polarity on Jetson TX2
arm64: tegra: Add CPU and PSCI nodes for NVIDIA Tegra210 platforms
arm64: tegra: Enable HDMI on Jetson TX2
arm64: tegra: Mark I2C4 as DDC on P3310
arm64: tegra: Add display nodes on Tegra186
arm64: tegra: Add SMMU node for Tegra186
arm64: tegra: Enable memory controller on P3310
arm64: tegra: Add memory controller on Tegra186
arm64: tegra: Add FUSE block on Tegra186
arm64: tegra: Add MISC registers on Tegra186
1. Add CPU perf counters to Exynos5433.
2. Add missing power domains to Exynos5433.
3. Add NFC chip to Exynos5433 TM2/TM2E.
4. Fix obscure bugs on I2C transfers to MHL chip on TM2/TM2E.
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Merge tag 'samsung-dt64-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Pull "Samsung DTS ARM64 changes for v4.16" from Krzysztof Kozłowski:
1. Add CPU perf counters to Exynos5433.
2. Add missing power domains to Exynos5433.
3. Add NFC chip to Exynos5433 TM2/TM2E.
4. Fix obscure bugs on I2C transfers to MHL chip on TM2/TM2E.
* tag 'samsung-dt64-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Increase bus frequency for MHL chip
arm64: dts: exynos: Add remaining power domains to Exynos5433 SoC
arm64: dts: exynos: Add AUD power domain to Exynos5433 SoC
arm64: dts: exynos: Add MFC power domain to Exynos 5433 SoC
arm64: dts: exynos: Add MSCL power domain to Exynos 5433 SoC
arm64: dts: exynos: Add DISP power domain to Exynos 5433 SoC
arm64: dts: exynos: Add GSCL power domain to Exynos 5433 SoC
arm64: dts: exynos: Add support for S3FWRN5 NFC chip to TM2(e) boards
arm64: dts: exynos: Add CPU performance counters to Exynos5433 boards
Removed as well got the vdd_log regulator from the rk3399-puma board.
While it is there, the absence of any user makes it prone to configuration
problems when the pwm-regulator takes over the boot-up default and wiggles
settings there. Case in question was the PCIe host not working anymore.
With vdd_log removed for the time being, PCIe on Puma works again.
And a second stopgap is limiting the speed of the gmac on the rk3328-rock64
to 100MBit. While the hardware can reach 1GBit, currently it is not stable.
Limiting it to 100MBit for the time being allows nfsroots to be used again
until the problem is identified.
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Merge tag 'v4.15-rockchip-dts64fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes
Pull "Rockchip dts64 fixes for 4.15" from Heiko Stübner:
Another trailing interrupt-cell 0 removed.
Removed as well got the vdd_log regulator from the rk3399-puma board.
While it is there, the absence of any user makes it prone to configuration
problems when the pwm-regulator takes over the boot-up default and wiggles
settings there. Case in question was the PCIe host not working anymore.
With vdd_log removed for the time being, PCIe on Puma works again.
And a second stopgap is limiting the speed of the gmac on the rk3328-rock64
to 100MBit. While the hardware can reach 1GBit, currently it is not stable.
Limiting it to 100MBit for the time being allows nfsroots to be used again
until the problem is identified.
* tag 'v4.15-rockchip-dts64fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: limit rk3328-rock64 gmac speed to 100MBit for now
arm64: dts: rockchip: remove vdd_log from rk3399-puma
arm64: dts: rockchip: fix trailing 0 in rk3328 tsadc interrupts
- meson-gx: add VPU power domain support
- odroid-c2: add HDMI and CEC nodes
- misc cleanups
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Merge tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Pull "Amlogic 64-bit DT updates for v4.16" from Kevin Hilman
- meson-gx: add VPU power domain support
- odroid-c2: add HDMI and CEC nodes
- misc cleanups
* tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: dts: meson-gxm: fix q200 interrupt number
ARM64: dts: meson-gxm: add the PHY interrupt line on Khadas VIM2
ARM64: dts: meson: add comments with the GPIO for the PHY interrupts
ARM64: dts: amlogic: use generic bus node names
ARM64: dts: meson: drop "sana" clock from SAR ADC
ARM64: dts: odroid-c2: Add HDMI and CEC Nodes
ARM64: dts: meson-gx: grow reset controller memory zone
ARM64: dts: meson-gx: Add HDMI_5V regulator on selected boards
ARM64: dts: meson-gx: add VPU power domain
* Use r8a77970 (V3M) CPG core clock and SYSC power domain macros
These may be used in place of numeric constants now that they
are present in Linus's tree.
* Add r8a77970 (V3M) Starter Kit board support
This includes basic support to bring up the board with a serial
console and EtherAVB support
* Add IPMMU nodes and connections to on-chip devices
on r8a7795 (H3), r8a7796 (M3-W), r8a77970 (V3M) and r8a77995 (D3) SoCs
Simon Horman says "With these patches applied a white list enabled IPMMU
driver may be used to check silicon revision and then enable IPMMU in the
known working cases."
* Enable DMA for SCIF2 on r8a77995 (D2) SoC
* Increase the number of GPIO bank 1 ports to 29 on r8a7795 (H3) SoC
This adds support for the GP-1-28 port pin of the r8a7795 (H3) ES2.0 SoC
* Add support for CAN to r8a77995 (D3) SoC
Ulrich Hecht says "This is a by-the-datasheet implementation, with the
datasheet missing some bits, namely the pin map. I filled in the gaps...
by deducing the information from pin numbers already in the PFC driver,
so careful scrutiny is advised."
* Add support for SDHI to r8a77995 (D3) SoC
* Add SoC name to file header of r8a7795 (H3) and r8a7796 (M3-W)
Salvator-X and Salvator-XS board files
Geert Uytterhoeven says "With the proliferation of Salvator-X and
Salvator-XS boards carrying different R-Car Gen3 SoCs variants, several
DTS files ended up having the same file headers.
Add the SoC names to the file headers to avoid confusion."
* Add device note for ROHM BD9571MWV PMIC to
r8a7795 (H3) and r8a7796 (M3-W) Salvator-X and Salvator-XS boards.
Geert Uytterhoeven says "This was based on the example in the DT binding
documentation, but using IRQ0 instead of a GPIO interrupt, as that
matches the schematics, and because INTC-EX is a simpler block."
* Enable USB2.0 channel 0 on r8a77970 (V3M) ULCB Kingfisher board
Vladimir Barinov says "The dedicated USB0_PWEN pin is used to control
CN13 VBUS source from U43 power supply. MAX3355 can also provide VBUS,
hence it should be disabled via OTG_OFFVBUSn node coming from gpio
expander TCA9539. Set MAX3355 enabled using OTG_EXTLPn node to be able
to read OTG ID of CN13."
* Add support for r8a7795 (M3-W) Salvator-XS board
Geert Uytterhoeven says "This patch series adds support for the version
of the Salvator-XS development board equipped with an R-Car M3-W SiP.
The DT was based on work for the Salvator-X and -XS boards with M3-W
resp. H3 SiPs."
* Add watchdog timer support to r8a77970 (V3M) eagle board
Geert Uytterhoven says "This allows to use the watchdog timer to reset
the board, until PSCI is enhanced to include such functionality."
* Use Use R-Car SDHI Gen3 fallback on r8a7795 (H3) and r8a7796 (M3-W) SoCs
* Set driver type for MMC on r8a7795 (H3) and r8a7796 (M3-W) Salvator-X and
Salvator-XS boards.
Wolfram Sang says "These boards are known to have eMMC issues with the
default driver type. Specify a working one."
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Merge tag 'renesas-arm64-dt-for-v4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Renesas ARM64 Based SoC DT Updates for v4.16" from Simon Horman:
* Use r8a77970 (V3M) CPG core clock and SYSC power domain macros
These may be used in place of numeric constants now that they
are present in Linus's tree.
* Add r8a77970 (V3M) Starter Kit board support
This includes basic support to bring up the board with a serial
console and EtherAVB support
* Add IPMMU nodes and connections to on-chip devices
on r8a7795 (H3), r8a7796 (M3-W), r8a77970 (V3M) and r8a77995 (D3) SoCs
Simon Horman says "With these patches applied a white list enabled IPMMU
driver may be used to check silicon revision and then enable IPMMU in the
known working cases."
* Enable DMA for SCIF2 on r8a77995 (D2) SoC
* Increase the number of GPIO bank 1 ports to 29 on r8a7795 (H3) SoC
This adds support for the GP-1-28 port pin of the r8a7795 (H3) ES2.0 SoC
* Add support for CAN to r8a77995 (D3) SoC
Ulrich Hecht says "This is a by-the-datasheet implementation, with the
datasheet missing some bits, namely the pin map. I filled in the gaps...
by deducing the information from pin numbers already in the PFC driver,
so careful scrutiny is advised."
* Add support for SDHI to r8a77995 (D3) SoC
* Add SoC name to file header of r8a7795 (H3) and r8a7796 (M3-W)
Salvator-X and Salvator-XS board files
Geert Uytterhoeven says "With the proliferation of Salvator-X and
Salvator-XS boards carrying different R-Car Gen3 SoCs variants, several
DTS files ended up having the same file headers.
Add the SoC names to the file headers to avoid confusion."
* Add device note for ROHM BD9571MWV PMIC to
r8a7795 (H3) and r8a7796 (M3-W) Salvator-X and Salvator-XS boards.
Geert Uytterhoeven says "This was based on the example in the DT binding
documentation, but using IRQ0 instead of a GPIO interrupt, as that
matches the schematics, and because INTC-EX is a simpler block."
* Enable USB2.0 channel 0 on r8a77970 (V3M) ULCB Kingfisher board
Vladimir Barinov says "The dedicated USB0_PWEN pin is used to control
CN13 VBUS source from U43 power supply. MAX3355 can also provide VBUS,
hence it should be disabled via OTG_OFFVBUSn node coming from gpio
expander TCA9539. Set MAX3355 enabled using OTG_EXTLPn node to be able
to read OTG ID of CN13."
* Add support for r8a7795 (M3-W) Salvator-XS board
Geert Uytterhoeven says "This patch series adds support for the version
of the Salvator-XS development board equipped with an R-Car M3-W SiP.
The DT was based on work for the Salvator-X and -XS boards with M3-W
resp. H3 SiPs."
* Add watchdog timer support to r8a77970 (V3M) eagle board
Geert Uytterhoven says "This allows to use the watchdog timer to reset
the board, until PSCI is enhanced to include such functionality."
* Use Use R-Car SDHI Gen3 fallback on r8a7795 (H3) and r8a7796 (M3-W) SoCs
* Set driver type for MMC on r8a7795 (H3) and r8a7796 (M3-W) Salvator-X and
Salvator-XS boards.
Wolfram Sang says "These boards are known to have eMMC issues with the
default driver type. Specify a working one."
* tag 'renesas-arm64-dt-for-v4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (54 commits)
arm64: dts: renesas: r8a77970: use SYSC power domain macros
arm64: dts: renesas: r8a77970: use CPG core clock macros
arm64: dts: renesas: v3msk: add EtherAVB support
arm64: dts: renesas: initial V3MSK board device tree
arm64: dts: renesas: r8a77995: Connect Ethernet-AVB to IPMMU-RT
arm64: dts: renesas: r8a77995: Add IPMMU device nodes
arm64: dts: renesas: r8a77970: Enable IPMMU-DS1, RT and MM
arm64: dts: renesas: r8a77970: Connect Ethernet-AVB to IPMMU-RT
arm64: dts: renesas: r8a77970: Tie SYS-DMAC to IPMMU-DS1
arm64: dts: renesas: r8a77970: Add IPMMU device nodes
arm64: dts: renesas: r8a77995: add DMA for SCIF2
arm64: dts: renesas: r8a77970: sort includes
arm64: dts: renesas: r8a7795: Increase the number of GPIO bank 1 ports to 29
arm64: dts: renesas: r8a77995: Add CAN FD support
arm64: dts: renesas: r8a77995: Add CAN support
arm64: dts: renesas: r8a77995: Add CAN external clock support
arm64: dts: renesas: r8a7795-salvator-xs: Add SoC name to file header
arm64: dts: renesas: r8a7796-salvator-x: Add SoC name to file header
arm64: dts: renesas: r8a7795-salvator-x: Add SoC name to file header
arm64: dts: renesas: r8a7795-es1-salvator-x: Add SoC name to file header
...
Blink the LED on a kernel panic.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Acked-by: Guodong Xu <guodong.xu@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Blink the LED on a kernel panic.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Acked-by: Guodong Xu <guodong.xu@linaro.org>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Blink the LED on a kernel panic.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add opp v2 information,
and also add clocks, regulators and opp information into cpu nodes
Signed-off-by: Andrew-sh Cheng <andrew-sh.cheng@mediatek.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add clock controller nodes for MT2712, include topckgen, infracfg,
pericfg, mcucfg and apmixedsys. This patch also add six oscillators that
provide clocks for MT2712.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add opp v2 information,
and also add clocks, regulators and opp information into cpu nodes
Signed-off-by: Andrew-sh Cheng <andrew-sh.cheng@mediatek.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch enables usb3_peri0 that uses usb3_phy0 to enable VBUS
detection for the USB3.0 peripheral.
The Salvator-X[S] has USB3.0 type-A connector and supplies VBUS
if USB3.0 host runs. So, you need a special cable for it, and
to stop the VBUS supplies from the board, after you installs
a gadget driver, you should run the following command to avoid
conflict VBUS supply:
# echo 1 > /sys/kernel/debug/ee020000.usb/b_device
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables usb3_phy0 node for Salvator-X[S].
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
It adds device mmc@9820000 which is used as SD card on poplar board.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This patch adds an efuse node in the device tree for rk3228 SoC.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add reg properties to pciec[01] placeholder nodes
This is to stop the compiler complaining as follows:
$ make
...
DTC arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb: Warning (unit_address_vs_reg): Node /soc/pcie@fe000000 has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb: Warning (unit_address_vs_reg): Node /soc/pcie@ee800000 has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/pcie@fe000000 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/pcie@ee800000 missing or empty reg/ranges property
DTC arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dtb
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dtb: Warning (unit_address_vs_reg): Node /soc/pcie@fe000000 has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dtb: Warning (unit_address_vs_reg): Node /soc/pcie@ee800000 has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dtb: Warning (simple_bus_reg): Node /soc/pcie@fe000000 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dtb: Warning (simple_bus_reg): Node /soc/pcie@ee800000 missing or empty reg/ranges property
DTC arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dtb
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dtb: Warning (unit_address_vs_reg): Node /soc/pcie@fe000000 has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dtb: Warning (unit_address_vs_reg): Node /soc/pcie@ee800000 has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dtb: Warning (simple_bus_reg): Node /soc/pcie@fe000000 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dtb: Warning (simple_bus_reg): Node /soc/pcie@ee800000 missing or empty reg/ranges property
DTC arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb: Warning (unit_address_vs_reg): Node /soc/pcie@fe000000 has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb: Warning (unit_address_vs_reg): Node /soc/pcie@ee800000 has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb: Warning (simple_bus_reg): Node /soc/pcie@fe000000 missing or empty reg/ranges property
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb: Warning (simple_bus_reg): Node /soc/pcie@ee800000 missing or empty reg/ranges property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
In order to be able to use cpu freq, we need to associate a clock to each
CPU and to expose the power management registers.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add NAND support on the Armada-8040-DB by adding the same tree as for
the Armada-7040-DB by using the same compatible string
"marvell,armada-8k-nand".
Do not enable the NAND node as enabling it (and changing manually the
proper DPR-76 switch) would disable MDIO from CP1 (and thus disable CPS
Ethernet PHY).
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Enable tcphy and create the cros-ec's extcon node for the USB Type-C port.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the usb3 phyter for the USB3.0 OTG controller.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
After commit '06c47e6286d usb: dwc3: of-simple: Add support to get resets
for the device' you can add the reset property to the dwc3 node, the reset
is required for the controller to work properly, otherwise bind / unbind
stress testing of the USB controller on rk3399 we'd often end up with lots
of failures that looked like this:
phy phy-ff800000.phy.9: phy poweron failed --> -110
dwc3 fe900000.dwc3: failed to initialize core
dwc3: probe of fe900000.dwc3 failed with error -110
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The aclk_usb3 must be enabled to support USB3 for rk3399.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the usb3 power-domain, its qos area and assign it to the usb device
node.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add PWM DT info for the Amlogic's Meson-Axg SoC.
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add new pinctrl DT info for the Amlogic's Meson-AXG SoC.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: dropped unnecessary include]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Try to add Hiubus DT info, and also enable clock DT info
for the Amlogic's Meson-AXG SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Use the sor1_out clock instead of sor1_src. This is a more accurate
model of the hardware and allows for more complicated configurations
such as HDMI 2.0.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the CPU and PSCI nodes for the NVIDIA Tegra210 platforms so that
all CPUs can be enabled on boot. This assumes that the PSCI firmware
has been loaded during the initial bootstrap on the device before the
kernel starts (which is typically the case for these platforms). The
PSCI firmware version is set to v0.2 which aligns with the current
shipping version for Tegra.
Reported-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Tested-By: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enable the host1x and necessary children and hook up the HDMI +5V pin to
enable video output on the HDMI port found on Jetson TX2.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Adds the device tree nodes for the display hub and display controllers
as well as the DPAUX, DSI and SOR controllers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the DT node for ARM SMMU on Tegra186.
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The FUSE register block found on Tegra186 SoCs encodes various settings,
such as calibration data for other blocks.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The MISC register block found on Tegra186 SoCs contains registers that
can be used to identify a given chip and various strapping options.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sort root sub-nodes alphabetically for allow for easier maintenance
of this file.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sort root sub-nodes alphabetically for allow for easier maintenance
of this file.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Commit 15e85695e5 ("arm64: dts: uniphier: add GPIO hog definition")
missed to update the PXs3 DTS for some reason. Do it now.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The dt-bindings header was applied to the driver subsystem. I had to
wait for a merge window to use it from DT.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Describe the GPIO used to reset the Ethernet PHY for EthernetAVB.
This allows the driver to reset the PHY during probe and after system
resume.
On ULCB, the enable pin of the regulator providing PHY power is always
pulled high, but the driver may still need to reset the PHY if this
wasn't done by the bootloader before.
Inspired by patches in the BSP for the individual Salvator-X/XS boards
by Kazuya Mizuguchi.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the GPIO used to reset the Ethernet PHY for EthernetAVB.
This allows the driver to reset the PHY during probe and after system
resume.
This fixes Ethernet operation after resume from s2ram on Salvator-XS,
where the enable pin of the regulator providing PHY power is connected
to PRESETn, and PSCI powers down the SoC during system suspend.
On Salvator-X, the enable pin is always pulled high, but the driver may
still need to reset the PHY if this wasn't done by the bootloader
before.
Inspired by patches in the BSP for the individual Salvator-X/XS boards
by Kazuya Mizuguchi.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- GPIO interrupt fixes
- socinfo fix for GX series
- fix typo
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Merge tag 'amlogic-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into fixes
Amlogic fixes for v4.15-rc
- GPIO interrupt fixes
- socinfo fix for GX series
- fix typo
* tag 'amlogic-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: dts: meson-gx: fix UART pclk clock name
meson-gx-socinfo: Fix package id parsing
ARM: meson: fix spelling mistake: "Couln't" -> "Couldn't"
ARM: dts: meson: fix the memory region of the GPIO interrupt controller
ARM: dts: meson: correct the sort order for the the gpio_intc node
Signed-off-by: Olof Johansson <olof@lixom.net>
Correct the interrupt number assigned to the Realtek PHY in the q200
Fixes: b94d22d94a ("ARM64: dts: meson-gx: add external PHY interrupt on some platforms")
Reported-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The INTB/PMEB pin of the RTL8211F PHY on the Khadas VIM2 is routed to
GPIOZ_15. Add the corresponding interrupt using the GPIO interrupt
controller so the PHY framework doesn't have to poll the PHY for it's
status.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Currently one has to look/calculate the GPIO for the PHY interrupts
manually. Add a comment for the existing PHY interrupt lines to make it
easier to find out which GPIO is used.
This is done using the following calculation:
- number of GPIO AO pins (14 on GXBB: GPIOAO_0..13)
- add the offset of the pin which is used for the interrupt (for example
GPIOZ_15 = 15 on Odroid-C2)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-By: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The DT spec recommends that node-names have generic names like "bus".
Fix that in the Amlogic DTs, while leaving the label names to have more
SoC-specific names that match with the HW documentation.
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The clock-names for pclk was wrongly set to "core", but the bindings
specifies "pclk".
This was not cathed until the legacy non-documented bindings were removed.
Reported-by: Andreas Färber <afaerber@suse.de>
Fixes: f72d6f6037 ("ARM64: dts: meson-gx: use stable UART bindings with correct gate clock")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Bananapi-M64 has 3 LEDS in red, green, and blue. These are toggled
via GPIO lines, which drive transistors that control current across the
LEDS. The red LED is by default on, via an additional pull-up on the
control line. We consider this means that it is a power indicator.
So we set the "default-on" property for it.
The pingroups the GPIO lines belong to require external regulators be
enabled to be able to drive the GPIO high. These regulators also have
other purposes. However the pin controller does not have bindings for
regulators. Here we just set them to always-on.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The SAR ADC modules doesn't require The "sana" clock.
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Singed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Now the VPU Power Domain has been fixed while boothing from Mainline U-Boot,
VPU and HDMI nodes can finally be added to the Odroid-C2 DTS.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Now the Amlogic Meson GX SoCs datasheet documents all the Reset registers,
grow the memory in the node to allow usage of the level registers.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
On reference boards and derivatives, the HDMI Logic is powered by an external
5V regulator.
This regulator was set by the Vendor U-Boot, add the regulator and set it always-on for now.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This patch adds support for the VPU Power Domain nodes, and attaches the
VPU power domain to the VPU node.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
It looks like either the current kernel or the hardware has reliability
issues when the gmac is actually running at 1GBit. In my test-case
it is not able to boot on a nfsroot at this speed, as the system
will always lose the connection to the nfs-server during boot, before
reaching any login prompt and not recover from this.
So until this is solved, limit the speed to 100MBit as with this the
nfsroot survives stress tests like an apt-get upgrade without problems.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
vdd_log has no consumer and therefore will not be set to a specific
voltage. Still the PWM output pin gets configured and thence the vdd_log
output voltage will changed from it's default. Depending on the idle
state of the PWM this will slightly over or undervoltage the logic supply
of the RK3399 and cause instability with GbE (undervoltage) and PCIe
(overvoltage). Since the default value set by a voltage divider is the
correct supply voltage and we don't need to change it during runtime we
remove the rail from the devicetree completely so the PWM pin will not
be configured.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The sdcard detect pin on orange-pi-zero-plus2 is pulled up.
Fix cd-gpio description to enable sdcard detect.
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Since current tree support AXP803 regulators,
replace fixed regulator vcc3v3 with AXP803 dcdc1 regulator where ever
it need to replace.
Tested mmc0 on sopine baseboard.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that the commit 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC
power domain definitions") has hit Linus' tree, we can replace the bare
numbers (we had to use to avoid a cross tree dependency) with these macro
definitions...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that the commit ecadea00f5 ("dt-bindings: clock: Add R8A77970 CPG
core clock definitions") has hit Linus' tree, we can replace the bare
numbers (we had to use to avoid a cross tree dependency) with these macro
definitions...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add edp panel and enable related nodes on kevin.
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: Mark Yao <mark.yao@rock-chips.com>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Probably due to some copy-paste mistake, the tsadc of rk3328 ended up
with a 0 as 4th element that shouldn't be there, as interrupts on the
rk3328 only have multiples of 3, making dtc complain. So remove it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
sii8620 supports 1 MHz clock, it allows faster transmissions and according
to extensive tests allows to mitigate some obscure bugs in I2C client
logic of the chip.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
We might include additional ports in derivative device trees, so the
'port' node should have an address, and the parent 'ports' node needs
/#{addres,size}-cells.
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the information for the secondary MIPI DSI controller,
e.g., interrupts, grf, clocks, ports and so on. Mirrors the existing
definition for dsi0.
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We've documented this one already, but we didn't add it to the DTSI yet.
Suggested-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Define the V3M Starter Kit board dependent part of the EtherAVB
device node.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the V3M Starter Kit board.
The board has 1 debug serial port (SCIF0); include support for it,
so that the serial console can work.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The list is almost sorted. Move "lg" up to complete it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds support for G2D, G3D, CAM0, CAM1, ISP, HVEC power domains
to Exynos5433 SoCs. Currently only clock controllers for those domains are
defined. CAM1 is a parent of CAM0 power domain and CAM0 is a parent of ISP
power domain.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds support for AUD power domain to Exynos5433 SoCs, which
contains following devices: a clock controller, a pin controller, LPASS
module, I2S controller, ADMA PL330 engine and UART #3 device.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds support for MFC power domain to Exynos 5433 SoCs, which
contains following devices: a clock controller, MFC codec device and its
SYSMMUs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds support for MSCL power domain to Exynos 5433 SoCs, which
contains following devices: a clock controller, JPEG codec device and its
SYSMMU.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds support for DISP power domain to Exynos 5433 SoCs, which
contains following devices: a clock controller, two display controllers
(DECON and DECON TV), their SYSMMUs, MIC, DSI and HDMI video devices.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds support for GSCL power domain to Exynos 5433 SoCs, which
contains following devices: a clock controller, three GSCL video scalers and
their SYSMMUs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add device tree node with S3FWRN5 NFC chip to TM2(e) boards. The chip is
connected through HS-I2C bus #4.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
[mszyprow: rebased onto v4.15-rc1, moved node to exynos5433-tm2-common.dtsi,
rephrased commit message]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Enable support for ARM Performance Monitoring Units available in
Cortex-A53 and Cortex-A57 CPU cores for Exynos5433 SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
add arm64 H5 dwmac-sun8i support for this board
Signed-off-by: Antony Antony <antony@phenome.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
These were added to make the ARM64 branch self-contained because
updates for ARM and ARM64 are supposed to be sent as separate
pull requests.
Now, they were merged together in Linus' tree and interrupt-parent
from the arch/arm/boot/dts/uniphier-support-card.dtsi is visible from
ARM64 DT files by the cross-arch reference.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add IPMMU-RT to the Ethernet-AVB device node.
Based on work by Magnus Damm for the r8a7795.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add r8a77995 IPMMU nodes and keep all disabled by default.
Based on work for the r8a7795 and r8a7796 by Magnus Damm
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Enable the r8a77970 device nodes for IPMMU-DS1, IPMMU-RT
and the shared IPMMU-MM device.
Based on work for the r8a7796 by Magnus Damm.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add IPMMU-RT to the Ethernet-AVB device node.
Based on work by Magnus Damm for the r8a7795.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up r8a77970 DMAC nodes to the IPMMU. In particular
SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1.
Based on work for the r8a7796 by Magnus Damm.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add r8a77970 IPMMU nodes and keep all disabled by default.
Based on work for the r8a7796 by Magnus Damm
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sort includes used in r8a77970 DTS to improve maintainability
and for consistency with other R-Car DTS files.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
This patch changes the number of GPIO bank 1 ports to 29 because GP-1-28
port pin of R8A7795 ES2.0 SoC support was added.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Fixes: 291e0c4994 ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0")
[geert: Keep 28 GPIOs on H3 ES1.x after r8a7795.dtsi sharing]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds CAN FD controller node for r8a77995.
Based on a patch for r8a7796 by Chris Paterson.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds CAN controller nodes for r8a77995.
Based on a patch for r8a7796 by Chris Paterson.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds external CAN clock node for r8a77995. This clock can be used as
fCAN clock of CAN and CAN FD controller.
Based on a patch for r8a7796 by Chris Paterson.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Document clearly which SoC this DTS applies to, to distinguish from
Salvator-XS boards equipped with other SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Document clearly which SoC this DTS applies to, to distinguish from
Salvator-X boards equipped with other SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Document clearly which SoC this DTS applies to, to distinguish from
Salvator-X boards equipped with other SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Document clearly which SoC this DTS applies to, to distinguish from
Salvator-X boards equipped with other SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the ROHM BD9571MWV PMIC.
This was based on the example in the DT binding documentation, but using
IRQ0 instead of a GPIO interrupt, as that matches the schematics, and
because INTC-EX is a simpler block.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the r8a7795 device nodes for IPMMU-VI0, IPMMU-VP1, IPMMU-DS0,
IPMMU-DS1 and the shared IPMMU-MM device.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Enable the r8a7795 ES1.x device node for IPMMU-MP1.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add IPMMU-HC to the SATA device node.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add IPMMU-DS0 to the Ethernet-AVB device node.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up the FCPVI devices to allow use of VSPI with IPMMU-VP.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up the FCPVI devices to allow use of VSPI with
IPMMU-VP0 and IPMMU-VP1.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up the FCPVB devices to allow use of VSPBC/VSPBD with
IPMMU-VP0 and IPMMU-VP1.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up the FCPF devices to allow use of FDP1 with IPMMU-VP0.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up the FCPF devices to allow use of FDP1 with IPMMU-VP.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up the FCPVD devices to allow use of the VSP and DU
together with IPMMU-VI0.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up the FCPVD devices to allow use of the VSP and DU
together with IPMMU-VI1 and IPMMU-VI1.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up r8a7795 ES2.0 Audio-DMAC nodes to the IPMMU-MP0.
Hook up r8a7795 ES1.x Audio-DMAC nodes to the IPMMU-MP1.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up r8a7795 SYS-DMAC nodes to the IPMMUs. In particular SYS-DMAC0 gets
tied to IPMMU-DS0, and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add r8a7795 ES1.x IPMMU nodes and keep all disabled by default.
This is a follow-up to a patch that adds IPMMU device nodes that
are common to r8a7795 ES1.x and ES2.0
Power domains are omitted as they appear to be undocumented.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add r8a7795 IPMMU nodes and keep all disabled by default.
This includes all IPMMU devices for r8a7795 ES2.0. Those
not present in r8a7795 ES1.x are removed from the DT for those
SoCs using delete-node. A follow-up patch will add IPMMU devices
to ES1.x which are not also present in ES2.0.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
R-Car D3 has only one SDHI controller.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Differs from other Gen3 SoCs in that each controller only supports eight
channels.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ULCB-KF has a USB2.0 dual-role channel (CN13).
This adds dr_mode property for USB2.0 channel 0 (EHCI/OHCI and HS-USB)
as "otg".
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports USB2 PHY channel #0 on ULCB Kingfisher board
The dedicated USB0_PWEN pin is used to control CN13 VBUS source from U43
power supply.
MAX3355 can also provide VBUS, hence it should be disabled via OTG_OFFVBUSn
node coming from gpio expander TCA9539.
Set MAX3355 enabled using OTG_EXTLPn node to be able to read OTG ID of
CN13.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the r8a7795 device nodes for IPMMU-DS0, IPMMU-DS1, IPMMU-MP,
IPMMU-VI0, IPMMU-VC0 and the shared IPMMU-MM device.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add IPMMU-DS0 to the Ethernet-AVB device node.
Based on work by Magnus Damm for the r8a7795.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up the FCPVI devices to allow use of VSPI with IPMMU-VC0.
Based on work for the r8a7795 by Magnus Damm.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up the FCPF devices to allow use of FDP1 with IPMMU-VI0.
Based on work by Magnus Damm for the r8a7795.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up r8a7796 Audio-DMAC nodes to the IPMMU-MP.
Based on work for the r8a7795 by Magnus Damm.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Hook up r8a7796 DMAC nodes to the IPMMUs. In particular SYS-DMAC0
gets tied to IPMMU-DS0, and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add r8a7796 IPMMU nodes and keep all disabled by default.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add initial support for the Renesas Salvator-XS (Salvator-X 2nd version)
development board equipped with an R-Car M3-W SiP.
Based on work for the Salvator-X and -XS boards with M3-W resp. H3 SiPs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the Watchdog Timer (WDT) controller on the Renesas Eagle
board equipped with an R-Car V3M (r8a77970) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Watchdog Timer (WDT) controller on the
Renesas R-Car V3M (r8a77970) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use newly added R-Car SDHI Gen3 fallback compat string
in the DT of the r8a7796 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use newly added R-Car SDHI Gen3 fallback compat string
in the DT of the r8a7795 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
These boards are known to have eMMC issues with the default driver type.
Specify a working one.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
PF6 is mostly used as the CD pin for the microSD slot on H5 based
boards. So far we were referencing this pin twice: once using the
mmc0_cd_pin phandle, and then again directly as a GPIO via the pinctrl
phandle.
This will cause problems if the pinctrl driver enables strict mode, as
the second request will fail now, leading to a driver init failure.
Remove the redundant pin reference via the mmc0_cd_pin phandle.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Chris Obbard <obbardc@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On several A64 boards the Ethernet PHY is powered by the DC1SW regulator
on the AXP803 PMIC.
Add phy-handle property to these boards' emac node.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable AXP803 PMIC and regulators for Orangepi Win.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
We add device tree files for a couple of additional SoCs in various areas:
Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking,
Amlogic A113D for audio, and Renesas R-Car V3M for automotive.
As usual, lots of new boards get added based on those and other SoCs:
- Actions S500 based CubieBoard6 single-board computer
- Amlogic Meson-AXG A113D based development board
- Amlogic S912 based Khadas VIM2 single-board computer
- Amlogic S912 based Tronsmart Vega S96 set-top-box
- Allwinner H5 based NanoPi NEO Plus2 single-board computer
- Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
- Allwinner A83T based TBS A711 Tablet
- Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
- Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
wireless access points and routers
- NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
- NXP i.MX53 based GE Healthcare PPD biometric monitor
- NXP i.MX6 based Pistachio single-board computer
- NXP i.MX6 based Vining-2000 automotive diagnostic interface
- NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
- Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
- Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
- Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
- Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
- Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
- Renasas r8a7745 based iWave G22D-SODIMM SoM
- Rockchip rk3288 based Amarula Vyasa single-board computer
- Samsung Exynos5800 based Odroid HC1 single-board computer
For existing SoC support, there was a lot of ongoing work, as usual
most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic
and Allwinner platforms, but others were also active.
Rob Herring and many others worked on reducing the number of issues that
the latest version of 'dtc' now warns about. Unfortunately there is still
a lot left to do.
A rework of the ARM foundation model introduced several new files
for common variations of the model.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM device-tree updates from Arnd Bergmann:
"We add device tree files for a couple of additional SoCs in various
areas:
Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for
networking, Amlogic A113D for audio, and Renesas R-Car V3M for
automotive.
As usual, lots of new boards get added based on those and other SoCs:
- Actions S500 based CubieBoard6 single-board computer
- Amlogic Meson-AXG A113D based development board
- Amlogic S912 based Khadas VIM2 single-board computer
- Amlogic S912 based Tronsmart Vega S96 set-top-box
- Allwinner H5 based NanoPi NEO Plus2 single-board computer
- Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
- Allwinner A83T based TBS A711 Tablet
- Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
- Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
wireless access points and routers
- NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
- NXP i.MX53 based GE Healthcare PPD biometric monitor
- NXP i.MX6 based Pistachio single-board computer
- NXP i.MX6 based Vining-2000 automotive diagnostic interface
- NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
- Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
- Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
- Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
- Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
- Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
- Renasas r8a7745 based iWave G22D-SODIMM SoM
- Rockchip rk3288 based Amarula Vyasa single-board computer
- Samsung Exynos5800 based Odroid HC1 single-board computer
For existing SoC support, there was a lot of ongoing work, as usual
most of that concentrated on the Renesas, Rockchip, OMAP, i.MX,
Amlogic and Allwinner platforms, but others were also active.
Rob Herring and many others worked on reducing the number of issues
that the latest version of 'dtc' now warns about. Unfortunately there
is still a lot left to do.
A rework of the ARM foundation model introduced several new files for
common variations of the model"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits)
arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3
dt-bindings: bus: Add documentation for the Technologic Systems NBUS
arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock
ARM: dts: owl-s500: Add CubieBoard6
dt-bindings: arm: actions: Add CubieBoard6
ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock
ARM: dts: owl-s500: Set power domains for CPU2 and CPU3
arm: dts: mt7623: remove unused compatible string for pio node
arm: dts: mt7623: update usb related nodes
arm: dts: mt7623: update crypto node
ARM: dts: sun8i: a711: Enable USB OTG
ARM: dts: sun8i: a711: Add regulator support
ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1
ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes
ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
ARM: dts: sunxi: Add dtsi for AXP81x PMIC
arm64: dts: allwinner: H5: Restore EMAC changes
...
Commit 429f203eb7 ("arm64: dts: uniphier: route on-board device IRQ
to GPIO controller") missed to update this DTS. It becames a real
problem when arm and arm64 trees are merged together.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- kbuild cleanups and improvements for dtbs
- Code clean-up of overlay code and fixing for some long standing memory
leak and race condition in applying overlays
- Improvements to DT memory usage making sysfs/kobjects optional and
skipping unflattening of disabled nodes. This is part of kernel
tinification efforts.
- Final piece of removing storing the full path for every DT node. The
prerequisite conversion of printk's to use device_node format
specifier happened in 4.14.
- Sync with current upstream dtc. This brings additional checks to dtb
compiling.
- Binding doc tree wide removal of leading 0s from examples
- RTC binding documentation adding missing devices and some
consolidation of duplicated bindings
- Vendor prefix documentation for nutsboard, Silicon Storage Technology,
shimafuji, Tecon Microprocessor Technologies, DH electronics GmbH,
Opal Kelly, and Next Thing
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Merge tag 'devicetree-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull DeviceTree updates from Rob Herring:
"A bigger diffstat than usual with the kbuild changes and a tree wide
fix in the binding documentation.
Summary:
- kbuild cleanups and improvements for dtbs
- Code clean-up of overlay code and fixing for some long standing
memory leak and race condition in applying overlays
- Improvements to DT memory usage making sysfs/kobjects optional and
skipping unflattening of disabled nodes. This is part of kernel
tinification efforts.
- Final piece of removing storing the full path for every DT node.
The prerequisite conversion of printk's to use device_node format
specifier happened in 4.14.
- Sync with current upstream dtc. This brings additional checks to
dtb compiling.
- Binding doc tree wide removal of leading 0s from examples
- RTC binding documentation adding missing devices and some
consolidation of duplicated bindings
- Vendor prefix documentation for nutsboard, Silicon Storage
Technology, shimafuji, Tecon Microprocessor Technologies, DH
electronics GmbH, Opal Kelly, and Next Thing"
* tag 'devicetree-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits)
dt-bindings: usb: add #phy-cells to usb-nop-xceiv
dt-bindings: Remove leading zeros from bindings notation
kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.lib
MIPS: dts: remove bogus bcm96358nb4ser.dtb from dtb-y entry
kbuild: clean up *.dtb and *.dtb.S patterns from top-level Makefile
.gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore
.gitignore: sort normal pattern rules alphabetically
dt-bindings: add vendor prefix for Next Thing Co.
scripts/dtc: Update to upstream version v1.4.5-6-gc1e55a5513e9
of: dynamic: fix memory leak related to properties of __of_node_dup
of: overlay: make pr_err() string unique
of: overlay: pr_err from return NOTIFY_OK to overlay apply/remove
of: overlay: remove unneeded check for NULL kbasename()
of: overlay: remove a dependency on device node full_name
of: overlay: simplify applying symbols from an overlay
of: overlay: avoid race condition between applying multiple overlays
of: overlay: loosen overly strict phandle clash check
of: overlay: expand check of whether overlay changeset can be removed
of: overlay: detect cases where device tree may become corrupt
of: overlay: minor restructuring
...
- Introduce host claiming by context to support blkmq
- Preparations for enabling CQE (eMMC CMDQ) requests
- Re-factorizations to prepare for blkmq support
- Re-factorizations to prepare for CQE support
- Fix signal voltage switch for SD cards without power cycle
- Convert RPMB to a character device
- Export eMMC revision via sysfs
- Support eMMC DT binding for fixed driver type
- Document mmc_regulator_get_supply() API
MMC host:
- omap_hsmmc: Updated regulator management for PBIAS
- sdhci-omap: Add new OMAP SDHCI driver
- meson-mx-sdio: New driver for the Amlogic Meson8 and Meson8b SoCs
- sdhci-pci: Add support for Intel CDF
- sdhci-acpi: Fix voltage switch for some Intel host controllers
- sdhci-msm: Enable delay circuit calibration clocks
- sdhci-msm: Manage power IRQ properly
- mediatek: Add support of mt2701/mt2712
- mediatek: Updates management of clocks and tunings
- mediatek: Upgrade eMMC HS400 support
- rtsx_pci: Update tuning for gen3 PCI-Express
- renesas_sdhi: Support R-Car Gen[123] fallback compatibility strings
- Catch all errors when getting regulators
- Various additional improvements and cleanups
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Merge tag 'mmc-v4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Introduce host claiming by context to support blkmq
- Preparations for enabling CQE (eMMC CMDQ) requests
- Re-factorizations to prepare for blkmq support
- Re-factorizations to prepare for CQE support
- Fix signal voltage switch for SD cards without power cycle
- Convert RPMB to a character device
- Export eMMC revision via sysfs
- Support eMMC DT binding for fixed driver type
- Document mmc_regulator_get_supply() API
MMC host:
- omap_hsmmc: Updated regulator management for PBIAS
- sdhci-omap: Add new OMAP SDHCI driver
- meson-mx-sdio: New driver for the Amlogic Meson8 and Meson8b SoCs
- sdhci-pci: Add support for Intel CDF
- sdhci-acpi: Fix voltage switch for some Intel host controllers
- sdhci-msm: Enable delay circuit calibration clocks
- sdhci-msm: Manage power IRQ properly
- mediatek: Add support of mt2701/mt2712
- mediatek: Updates management of clocks and tunings
- mediatek: Upgrade eMMC HS400 support
- rtsx_pci: Update tuning for gen3 PCI-Express
- renesas_sdhi: Support R-Car Gen[123] fallback compatibility strings
- Catch all errors when getting regulators
- Various additional improvements and cleanups"
* tag 'mmc-v4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (91 commits)
sdhci-fujitsu: add support for setting the CMD_DAT_DELAY attribute
dt-bindings: sdhci-fujitsu: document cmd-dat-delay property
mmc: tmio: Replace msleep() of 20ms or less with usleep_range()
mmc: dw_mmc: Convert timers to use timer_setup()
mmc: dw_mmc: Cleanup the DTO timer like the CTO one
mmc: vub300: Use common code in __download_offload_pseudocode()
mmc: tmio: Use common error handling code in tmio_mmc_host_probe()
mmc: Convert timers to use timer_setup()
mmc: sdhci-acpi: Fix voltage switch for some Intel host controllers
mmc: sdhci-acpi: Let devices define their own private data
mmc: mediatek: perfer to use rise edge latching for cmd line
mmc: mediatek: improve eMMC hs400 mode read performance
mmc: mediatek: add latch-ck support
mmc: mediatek: add support of source_cg clock
mmc: mediatek: add stop_clk fix and enhance_rx support
mmc: mediatek: add busy_check support
mmc: mediatek: add async fifo and data tune support
mmc: mediatek: add pad_tune0 support
mmc: mediatek: make hs400_tune_response only for mt8173
arm64: dts: mt8173: remove "mediatek, mt8135-mmc" from mmc nodes
...
If CONFIG_OF_ALL_DTBS is enabled, "make ARCH=arm64 dtbs" compiles each
DTB twice; one from arch/arm64/boot/dts/*/Makefile and the other from
the dtb-$(CONFIG_OF_ALL_DTBS) line in arch/arm64/boot/dts/Makefile.
It could be a race problem when building DTBS in parallel.
Another minor issue is CONFIG_OF_ALL_DTBS covers only *.dts in vendor
sub-directories, so this broke when Broadcom added one more hierarchy
in arch/arm64/boot/dts/broadcom/<soc>/.
One idea to fix the issues in a clean way is to move DTB handling
to Kbuild core scripts. Makefile.dtbinst already recognizes dtb-y
natively, so it should not hurt to do so.
Add $(dtb-y) to extra-y, and $(dtb-) as well if CONFIG_OF_ALL_DTBS is
enabled. All clutter things in Makefiles go away.
As a bonus clean-up, I also removed dts-dirs. Just use subdir-y
directly to traverse sub-directories.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
[robh: corrected BUILTIN_DTB to CONFIG_BUILTIN_DTB]
Signed-off-by: Rob Herring <robh@kernel.org>
We need to add "clean-files" in Makfiles to clean up DT blobs, but we
often miss to do so.
Since there are no source files that end with .dtb or .dtb.S, so we
can clean-up those files from the top-level Makefile.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Most of DT files are compiled under arch/*/boot/dts/, but we have some
other directories, like drivers/of/unittest-data/. We often miss to
add gitignore patterns per directory. Since there are no source files
that end with .dtb or .dtb.S, we can ignore the patterns globally.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Rob Herring <robh@kernel.org>
and efuses on rk3368.
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Merge tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts64 updates for 4.15 part2" from Heiko Stübner:
Support for the RGA (raster graphics accelerator) on rk3399
and efuses on rk3368.
* tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add efuse for RK3368 SoCs
arm64: dts: rockchip: add RGA device node for RK3399
clk: rockchip: add more rk3188 graphics clock ids
clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs
