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arm64: dts: exynos: Add MSCL power domain to Exynos 5433 SoC

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This patch adds support for MSCL power domain to Exynos 5433 SoCs, which
contains following devices: a clock controller, JPEG codec device and its
SYSMMU.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Marek Szyprowski 2017-11-29 12:26:35 +01:00 committed by Krzysztof Kozlowski
parent 9715ed87c9
commit e45dda53d3
1 changed files with 10 additions and 0 deletions
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10
arch/arm64/boot/dts/exynos/exynos5433.dtsi
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@ -476,6 +476,7 @@ cmu_mscl: clock-controller@105d0000 {
clocks = <&xxti>,
<&cmu_top CLK_SCLK_JPEG_MSCL>,
<&cmu_top CLK_ACLK_MSCL_400>;
power-domains = <&pd_mscl>;
};
cmu_mfc: clock-controller@15280000 {
@ -552,6 +553,13 @@ pd_gscl: power-domain@105c4000 {
label = "GSCL";
};
pd_mscl: power-domain@105c4040 {
compatible = "samsung,exynos5433-pd";
reg = <0x105c4040 0x20>;
#power-domain-cells = <0>;
label = "MSCL";
};
pd_disp: power-domain@105c4080 {
compatible = "samsung,exynos5433-pd";
reg = <0x105c4080 0x20>;
@ -971,6 +979,7 @@ jpeg: codec@15020000 {
<&cmu_mscl CLK_ACLK_XIU_MSCLX>,
<&cmu_mscl CLK_SCLK_JPEG>;
iommus = <&sysmmu_jpeg>;
power-domains = <&pd_mscl>;
};
mfc: codec@152E0000 {
@ -1070,6 +1079,7 @@ sysmmu_jpeg: sysmmu@15060000 {
clocks = <&cmu_mscl CLK_PCLK_SMMU_JPEG>,
<&cmu_mscl CLK_ACLK_SMMU_JPEG>;
#iommu-cells = <0>;
power-domains = <&pd_mscl>;
};
sysmmu_mfc_0: sysmmu@15200000 {