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arm64: dts: hi3660: improve pmu description
cortex-a73 pmu driver is supported now. hi3660 is 4*a73 + 4*a53, so it should use "cortex-a73-pmu" and "cortex-a53-pmu" instead of "armpmu-v3", then we can use the a73 and a53 events in perf tool directly. Signed-off-by: Xu YiPing <xuyiping@hisilicon.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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@ -203,21 +203,25 @@ gic: interrupt-controller@e82b0000 {
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IRQ_TYPE_LEVEL_HIGH)>;
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};
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pmu {
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compatible = "arm,armv8-pmuv3";
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a53-pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu0>,
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<&cpu1>,
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<&cpu2>,
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<&cpu3>,
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<&cpu4>,
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<&cpu3>;
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};
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a73-pmu {
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compatible = "arm,cortex-a73-pmu";
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu4>,
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<&cpu5>,
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<&cpu6>,
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<&cpu7>;
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