Commit Graph

223783 Commits

Author SHA1 Message Date
Kukjin Kim
854bf596b3 Merge branch 'next-s3c24xx' into for-next 2011-01-06 18:44:09 +09:00
Abhilash Kesavan
13d27f05d7 ARM: S3C24XX: Add support UART3 for S3C2443 and S3C2416
Both S3C2443 and S3C2416 support 4 UART channels, this patch adds support
for the missing uart channel.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-06 18:43:32 +09:00
Yauhen Kharuzhy
f1930a2983 ARM: SAMSUNG: Don't export __init functions to modules
There are few functions marked as __init, but exported to modules in
devices declaration files.

s3c_nand_set_platdata() and s3c24xx_ts_set_platdata() are used only by
boards init code now, so remove EXPORT_SYMBOL() for them.

Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-06 14:09:19 +09:00
Yauhen Kharuzhy
0536d0d087 ARM: S3C2443: Implement GPIO pull-up/down configuration methods
S3C2443 has two-bits pull-up/pull-down configuration fields in GPIO
registers, but values are differ from other SoCs with two-bits
configuration. gpio-cfg-helpers.h already has prototypes for
s3c2443-style pull-up/down methods, so implement them.

Signed-off-by: Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-06 14:09:19 +09:00
Yauhen Kharuzhy
479c4f4aba ARM: S3C2416: Add support of SD/MMC card detect on SMDK2416
Enable card detect by GPIO pin on hsmmc1 device (SD0 on SMDK2416 board)
and enable card polling on hsmmc0 (SD1).

Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-06 14:09:19 +09:00
Yauhen Kharuzhy
c29cfa6d3e ARM: S3C2416: Add platform helpers for setup SDHCI
Samsung S3C2416 has two SDHCI controllers compatible with other
Samsung's SoCs (S3C64XX, S5PC100 etc...).

Add required platform setup code that the devices can be used with
sdhci-s3c driver.

Signed-off-by: Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
[kgene.kim@samsung.com: change to __raw_{readl,writel} from {readl,writel}]
[kgene.kim@samsung.com: build error fixes]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-06 14:09:18 +09:00
Yauhen Kharuzhy
95d6791b4f ARM: S3C24XX: Add address map and clock definitions for HSMMC0
Define maps for HSMMC devices.

S3C2443 has one HSMMC device with base address 0x4A800000.
S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000.

So suppose that S3C2443 has only HSMMC1.

Define clock for hsmmc0 device and register it.

Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-06 14:09:18 +09:00
Kukjin Kim
ab10f1dd91 Merge branch 'dev/cleanup-clocks' into for-next 2011-01-05 09:39:23 +09:00
Kukjin Kim
957c461e82 ARM: S5PV310: Tidy init+disable clock usage and s3c24xx_register_clocks cleanup
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using and cleanups
the return of s3c24xx_register_clocks() because it includes it.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-04 18:27:44 +09:00
Kukjin Kim
3c0fa64715 ARM: S5PV210: Tidy init+disable clock usage and s3c24xx_register_clocks cleanup
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using and cleanups
the return of s3c24xx_register_clocks() because it includes it.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-04 18:27:43 +09:00
Kukjin Kim
96ee39c445 ARM: S5PC100: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-04 18:27:43 +09:00
Kukjin Kim
1526631d02 ARM: S5P6450: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-04 18:27:43 +09:00
Kukjin Kim
e89c5d07cd ARM: S5P6442: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-04 18:27:43 +09:00
Kukjin Kim
9f6bb3f567 ARM: S5P6440: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-04 18:27:43 +09:00
Kukjin Kim
cdb216de6e ARM: S3C64XX: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-04 18:27:18 +09:00
Kukjin Kim
f56d463423 Merge branch 'next-s3c64xx' into for-next 2011-01-03 19:36:39 +09:00
Jassi Brar
d03e119c08 ARM: S3C64XX: Clear DMA_HALT upon start
The stop function sets the DMA_HALT bit, which prevents
the DMA transfer to resume after stop, for example during
audio PAUSE/PLAY cycle. Clear the HALT bit during start.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-03 19:36:25 +09:00
Kukjin Kim
f651ef6575 Merge branch 'next-samsung-irq_data' into for-next 2011-01-03 19:20:21 +09:00
Lennert Buytenhek
04ea1cc8ab ARM: SAMSUNG: some GENERIC_HARDIRQS_NO_DEPRECATED build fixes
When GENERIC_HARDIRQS_NO_DEPRECATED is enabled, a number of struct
irq_desc members stop being directly accessible, and need to be
accessed via the irq_data struct instead -- this patch fixes up the
plat-samsung sites that still access those members directly.

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-03 19:20:06 +09:00
Lennert Buytenhek
bb0b237467 ARM: S5P: irq_data conversion
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-03 19:18:16 +09:00
Lennert Buytenhek
57436c2db4 ARM: S3C24XX: irq_data conversion
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
[kgene.kim@samsung.com: coding-style fixes]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-03 19:15:54 +09:00
Kukjin Kim
c6906c3e29 Merge branch 'next-s5pv310' into for-next
Conflicts:
	arch/arm/mach-s5pv310/Makefile
2011-01-03 18:59:54 +09:00
Kukjin Kim
8267e2e0fb Merge branch 'dev/s5pv310-cpufreq' into next-s5pv310 2011-01-03 18:58:50 +09:00
Kukjin Kim
285dee7ff4 Merge branch 'next-s5pv310' into for-next
Conflicts:
	arch/arm/mach-s5pv310/Kconfig
	arch/arm/mach-s5pv310/Makefile
	arch/arm/mach-s5pv310/mach-smdkc210.c
	arch/arm/mach-s5pv310/mach-smdkv310.c
	arch/arm/plat-samsung/include/plat/devs.h
2010-12-31 10:52:05 +09:00
Kukjin Kim
fa353e9f40 Merge branch 'dev/s5pv310-irq' into next-s5pv310 2010-12-31 08:01:08 +09:00
Kukjin Kim
0ae9a22b45 Merge branch 'next-s5pv210' into for-next-new
Conflicts:
	arch/arm/mach-s5pv210/mach-smdkv210.c
2010-12-30 10:52:32 +09:00
Kukjin Kim
5ed76f3d98 Merge branch 'next-s5p64x0' into for-next-new 2010-12-30 10:44:53 +09:00
Kukjin Kim
724c35cf53 Merge branch 'next-s5p' into for-next-new 2010-12-30 10:44:13 +09:00
Kukjin Kim
57ca515149 Merge branch 'next-samsung' into for-next-new 2010-12-30 10:43:56 +09:00
Kukjin Kim
e641d15869 Merge branch 'next-samsung-asoc2' into for-next-new 2010-12-30 10:42:24 +09:00
Sylwester Nawrocki
3bbef1b912 ARM: S5P: Add platform support for MIPI CSIS devices
There may be up to two MIPI CSI slave interfaces depending on the SoC version.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:49 +09:00
Sylwester Nawrocki
7db8cb2ad5 ARM: S5PV310: Add resource definitions for MIPI CSIS
Add IRQ and register base address definitions for MIPI CSI slave devices.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:49 +09:00
Sylwester Nawrocki
5905bbfa5b ARM: S5PV210: Add resource definitions for MIPI CSIS
Naming changed for consistency with s5pv310 where there are two instances
of the device.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:49 +09:00
Thomas Abraham
9b580cdb1c ARM: S5PV210: Add DM9000 support on SMDKV210
This patch adds DM9000 Ethernet Controller device support for SMDKV210.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Thomas Abraham
81f9becd6a ARM: S5PV210: Add SROM controller clock
This patch adds the SROM controller clock to the list of clocks to be enabled at
boot time. It is required to be enabled at boot time since the modules connected
over the SROM interface such as the Ethernet controller need an operational SROM.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Thomas Abraham
be297f0374 ARM: S5P: Move SROM controller IO mapping to plat-s5p for S5P SoCs
This patch modifies the following.

1. Moves the SROM controller mapping from S5PV210 specific code to
   S5P common code. The SROM controller mapping can be used for all
   S5P SoCs.

2. Define the SROM controller physical address for S5P64X0, S5P6442,
   S5PC100, S5PV210 and S5PV310.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Thomas Abraham
8233ab6aec ARM: S5P: Add SROM bank 4 and 5 register offsets
Some of the S5P platforms like S5PC100 and S5PV210 include SROM banks
4 and 5 in addition to SROM banks 0 to 3. This patch adds register
offsets for SROM bank 4 and 5.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Thomas Abraham
abc6c36022 ARM: S5P: Add SROM control register shift macros for other banks.
This patch adds shift macros for the SROM Bus width and control
register to represent the shift count for the 5th and 6th SROM
banks.  Some of the S5P SOCs have them.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Kukjin Kim
8cf460a5d7 ARM: S5P: Move the SROM register definitions to plat-s5p
The SROM register difinitions of S5PV310/S5PC210 (mach/regs-srom.h)
can be used to other S5P SoCs such as S5PV210/S5PC110. So moved into
plat/regs-srom.h of plat-s5p directory.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Abhilash Kesavan
9af7d94f29 ARM: S5P6440: Change the name for MMC Special Clock
Change the name of mmc spcial clock from mmc_bus to sclk_mmc to be
in line with the naming across the S5P SoCs

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
[kgene.kim@samsung.com: minor edit of title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Abhilash Kesavan
f85cbea94c ARM: S5P64X0: Change GPIOlib initialization to core_initcall
This patch changes the gpiolib initialization from arch_initcall
to core_initcall will allow us to make use of gpio functions in
smdk64x0_machine_init function.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Atul Dahiya
232d10061c ARM: S5P64X0: Add clock support for RTC
This patch adds RTC clock for S5P6450.

Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Kukjin Kim
5b1bab2e9e ARM: S5P64X0: Rename GPIOlib file to gpiolib.c
This patch renames S5P64X0 GPIOlib file according to other S5P SoCs.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Kukjin Kim
bb1d7002bb ARM: S5P64X0: Cleanup S5P64X0 GPIOlib adding 2bit chips
This patch changes S5P6440 and S5P6450 GPIOlib adding 2bit chips.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Kukjin Kim
4603089d7c ARM: SAMSUNG: Cleanup GPIOlib adding 2bit chips
This patch adds samsung_gpiolib_add_2bit_chips() for cleanup regarding
GPIOlib adding 2bit chips.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Kukjin Kim
f50266d313 ARM: S5P64X0: Add GPIOlib support for S5P6450
Already can support S5P6440 GPIOlib but S5P6450. This patch changes regarding
S5P6440 GPIO definitions so that can be used it from S5P6450 and adds S5P6450
GPIO chips.

Tested-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:27 +09:00
Thomas Abraham
8f49720d5a ARM: S5PV210: Add frame buffer display support for SMDKV210
Enable frame buffer display support for SMDKV210 board.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Jonghun Han <jonghun.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:13 +09:00
Kyungmin Park
a8928ce7e0 ARM: S5PV310: Universal SDHCI devices support
Universal (C210) board has 3 SDHCI devices.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor edit of title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:03 +09:00
Changhwan Youn
d6d8b48199 ARM: S5PV310: Add support Power Domain
This patch adds support Power Domain for S5PV310 and S5PC210.

Signed-off-by: Changhwan Youn <chaos.youn at samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:02 +09:00
Changhwan Youn
a50eb1c768 ARM: S5PV310: Set bit 22 in the PL310 (cache controller) AuxCtlr register
This patch is applied according to the commit 1a8e41cd67
(ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr register).

Actually, S5PV310 has same cache controller(PL310).

Following is from Catalin Marinas' commit.

Clearing bit 22 in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming Normal
Shared Non-cacheable reads into Cacheable no-allocate reads.

Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Cc: <stable@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:02 +09:00