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ARM: S5P6442: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -340,7 +340,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void)
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clk_pclkd1.rate = pclkd1;
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}
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static struct clk init_clocks_disable[] = {
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static struct clk init_clocks_off[] = {
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{
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.name = "pdma",
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.id = -1,
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@ -408,23 +408,13 @@ static struct clk *clks[] __initdata = {
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void __init s5p6442_register_clocks(void)
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{
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struct clk *clkptr;
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int i, ret;
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s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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clkptr = init_clocks_disable;
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for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) {
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ret = s3c24xx_register_clock(clkptr);
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if (ret < 0) {
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printk(KERN_ERR "Fail to register clock %s (%d)\n",
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clkptr->name, ret);
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} else
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(clkptr->enable)(clkptr, 0);
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}
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_pwmclk_init();
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}
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