Commit Graph

67397 Commits

Author SHA1 Message Date
Jonathan Marek
7e9d4cdd65 drm/msm/dpu: move some sspp caps to dpu_caps
This isn't something that ever changes between planes, so move it to
dpu_caps struct. Making this change will allow more re-use in the
"SSPP sub blocks config" part of the catalog, in particular when adding
support for SM8150 and SM8250 which have different max_linewidth.

This also sets max_hdeci_exp/max_vdeci_exp to 0 for sc7180, as decimation
is not supported on the newest DPU versions. (note that decimation is not
implemented, so this changes nothing)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:16 -07:00
Jonathan Marek
544d8b9615 drm/msm/dpu: update UBWC config for sm8150 and sm8250
Update the UBWC registers to the right values for sm8150 and sm8250.

This removes broken dpu_hw_reset_ubwc, which doesn't work because the
"force blk offset to zero to access beginning of register region" hack is
copied from downstream, where mapped region starts 0x1000 below what is
used in the upstream driver.

Also simplifies the overly complicated change that was introduced in
e4f9bbe9f8 to work around dpu_hw_reset_ubwc being broken.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:16 -07:00
Jonathan Marek
de321dcc23 drm/msm/dpu: use right setup_blend_config for sm8150 and sm8250
All DPU versions starting from 4.0 use the sdm845 version, so check for
that instead of checking each version individually. This chooses the right
function for sm8150 and sm8250.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:16 -07:00
Jonathan Marek
d0bac4e9cd drm/msm/a6xx: set ubwc config for A640 and A650
This is required for A640 and A650 to be able to share UBWC-compressed
images with other HW such as display, which expect this configuration.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:16 -07:00
Rob Clark
b5e02e117b drm/msm/adreno: un-open-code some packets
Small cleanup, lets not open-code bits/bitfields that are properly
defined in the rnndb xml (and therefore have builders in the generated
headers)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:16 -07:00
Rob Clark
c28c82e9db drm/msm: sync generated headers
We haven't sync'd for a while.. pull in updates to get definitions for
some fields in pkt7 payloads.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:16 -07:00
Jonathan Marek
51dd427192 drm/msm/a6xx: add build_bw_table for A640/A650
This sets up bw tables for A640/A650 similar to A618/A630, 0 DDR bandwidth
vote, and the CNOC vote. A640 has the same CNOC addresses as A630 and was
working, but this is required for A650 to work.

Eventually the bw table should be filled by querying the interconnect
driver for each BW in the dts, but use these dummy tables for now.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:16 -07:00
Jonathan Marek
142639a52a drm/msm/a6xx: fix crashstate capture for A650
A650 has a separate RSCC region, so dump RSCC registers separately, reading
them from the RSCC base. Without this change a GPU hang will cause a system
reset if CONFIG_DEV_COREDUMP is enabled.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:16 -07:00
Eric Anholt
62a35e81c2 drm/msm: Quiet error during failure in optional resource mappings.
We don't expect to find vbif_nrt or regdma on sdm845, but were clogging
up dmesg with errors about it.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
Eric Anholt
ecf9cd4899 drm/msm: Garbage collect unused resource _len fields.
Nothing was using the lengths of these ioremaps.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
Rob Clark
b8afe9f87c drm/msm/dpu: fix/enable 6bpc dither with split-lm
If split-lm is used (for ex, on sdm845), we can have multiple ping-
pongs, but only a single phys encoder.  We need to configure dithering
on each of them.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Reviewed-by: Kalyan Thota <kalyan_t@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
Akhil P Oommen
57c0bd517c drm: msm: a6xx: fix gpu failure after system resume
On targets where GMU is available, GMU takes over the ownership of GX GDSC
during its initialization. So, move the refcount-get on GX PD before we
initialize the GMU. This ensures that nobody can collapse the GX GDSC
once GMU owns the GX GDSC. This patch fixes some GMU OOB errors seen
during GPU wake up during a system resume.

Reported-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
Rajendra Nayak
32d3e0fecc drm/msm: dsi: Use OPP API to set clk/perf state
On SDM845 and SC7180 DSI needs to express a performance state
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.

dev_pm_opp_set_rate() is designed to be equivalent to clk_set_rate()
for devices without an OPP table, hence the change works fine
on devices/platforms which only need to set a clock rate.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
Rajendra Nayak
b0530eb119 drm/msm/dpu: Use OPP API to set clk/perf state
On some qualcomm platforms DPU needs to express a performance state
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
Rob Clark
5e16372b59 drm/msm: ratelimit crtc event overflow error
This can happen a lot when things go pear shaped.  Lets not flood dmesg
when this happens.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
Sharat Masetty
1f60d11423 drm: msm: a6xx: send opp instead of a frequency
This patch changes the plumbing to send the devfreq recommended opp rather
than the frequency. Also consolidate and rearrange the code in a6xx to set
the GPU frequency and the icc vote in preparation for the upcoming
changes for GPU->DDR scaling votes.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
Akhil P Oommen
3cbdc8d8b7 drm/msm: Fix a null pointer access in msm_gem_shrinker_count()
Adding an msm_gem_object object to the inactive_list before completing
its initialization is a bad idea because shrinker may pick it up from the
inactive_list. Fix this by making sure that the initialization is complete
before moving the msm_obj object to the inactive list.

This patch fixes the below error:
[10027.553044] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000068
[10027.573305] Mem abort info:
[10027.590160]   ESR = 0x96000006
[10027.597905]   EC = 0x25: DABT (current EL), IL = 32 bits
[10027.614430]   SET = 0, FnV = 0
[10027.624427]   EA = 0, S1PTW = 0
[10027.632722] Data abort info:
[10027.638039]   ISV = 0, ISS = 0x00000006
[10027.647459]   CM = 0, WnR = 0
[10027.654345] user pgtable: 4k pages, 39-bit VAs, pgdp=00000001e3a6a000
[10027.672681] [0000000000000068] pgd=0000000198c31003, pud=0000000198c31003, pmd=0000000000000000
[10027.693900] Internal error: Oops: 96000006 [#1] PREEMPT SMP
[10027.738261] CPU: 3 PID: 214 Comm: kswapd0 Tainted: G S                5.4.40 #1
[10027.745766] Hardware name: Qualcomm Technologies, Inc. SC7180 IDP (DT)
[10027.752472] pstate: 80c00009 (Nzcv daif +PAN +UAO)
[10027.757409] pc : mutex_is_locked+0x14/0x2c
[10027.761626] lr : msm_gem_shrinker_count+0x70/0xec
[10027.766454] sp : ffffffc011323ad0
[10027.769867] x29: ffffffc011323ad0 x28: ffffffe677e4b878
[10027.775324] x27: 0000000000000cc0 x26: 0000000000000000
[10027.780783] x25: ffffff817114a708 x24: 0000000000000008
[10027.786242] x23: ffffff8023ab7170 x22: 0000000000000001
[10027.791701] x21: ffffff817114a080 x20: 0000000000000119
[10027.797160] x19: 0000000000000068 x18: 00000000000003bc
[10027.802621] x17: 0000000004a34210 x16: 00000000000000c0
[10027.808083] x15: 0000000000000000 x14: 0000000000000000
[10027.813542] x13: ffffffe677e0a3c0 x12: 0000000000000000
[10027.819000] x11: 0000000000000000 x10: ffffff8174b94340
[10027.824461] x9 : 0000000000000000 x8 : 0000000000000000
[10027.829919] x7 : 00000000000001fc x6 : ffffffc011323c88
[10027.835373] x5 : 0000000000000001 x4 : ffffffc011323d80
[10027.840832] x3 : ffffffff0477b348 x2 : 0000000000000000
[10027.846290] x1 : ffffffc011323b68 x0 : 0000000000000068
[10027.851748] Call trace:
[10027.854264]  mutex_is_locked+0x14/0x2c
[10027.858121]  msm_gem_shrinker_count+0x70/0xec
[10027.862603]  shrink_slab+0xc0/0x4b4
[10027.866187]  shrink_node+0x4a8/0x818
[10027.869860]  kswapd+0x624/0x890
[10027.873097]  kthread+0x11c/0x12c
[10027.876424]  ret_from_fork+0x10/0x18
[10027.880102] Code: f9000bf3 910003fd aa0003f3 d503201f (f9400268)
[10027.886362] ---[ end trace df5849a1a3543251 ]---
[10027.891518] Kernel panic - not syncing: Fatal exception

Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
Kalyan Thota
3c128638a0 drm/msm/dpu: add support for dither block in display
This change enables dither block for primary interface
in display.

Enabled for 6bpc in the current version.

Changes in v1:
 - Remove redundant error checks (Rob).

Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Kristian H. Kristensen <hoegsberg@google.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
Rob Clark
520c651f3b drm/msm/adreno: fix gpu probe if no interconnect-names
If there is no interconnect-names, but there is an interconnects
property, then of_icc_get(dev, "gfx-mem"); would return an error
rather than NULL.

Also, if there is no interconnect-names property, there will never
be a ocmem path.  But of_icc_get(dev, "ocmem") would return -EINVAL
instead of -ENODATA.  Just don't bother trying in this case.

v2: explicity check for interconnect-names property

Fixes: 08af4769c7 ("drm/msm: handle for EPROBE_DEFER for of_icc_get")
Fixes: 00bb9243d3 ("drm/msm/gpu: add support for ocmem interconnect path")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:45:56 -07:00
Dave Airlie
418eda8f3f Merge tag 'drm-intel-next-2020-07-15' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
drm/i915 features for v5.9, batch #2

Highlights:
- Very early DG1 enabling (Abdiel, Lucas, Anusha)

Gem/GT:
- Fix spinlock recursion on signaling a signaled request (Chris)
- Perf: Use GTT when saving/restoring engine GPR (Umesh Nerlige Ramappa)

- SSEU refactoring, debugfs move under gt/ (Daniele, Venkata Sandeep Dhanalakota)
- Various GT refactoring and cleanup, preparation for future changes (Daniele)
- Adjust HuC state accordingly after GuC fetch error (Michał Winiarski)
- UC debugfs updates (Michał Winiarski)
- Only revoke the GGTT mmappings on aperture detiling changes (Chris)
- Only revoke mmap handlers if active (Chris)
- Split the context's obj:vma lut into its own mutex (Chris)
- Various memory, mmap and performance optimisations (Chris)
- Improve system stability in case of false CS events (Chris)
- Various refactorings and cleanup (Chris)
- Always reset the engine on execlist failures (Chris)
- Trace placement of timeline HWSP (Chris)
- Update dma-attributes for our sg DMA (Chris)

Display:
- TGL CDCLK workaround tweaks to unbreak 8K display support (Stanislav)
- A number of FBC fixes, along with i865 FBC enabling (Ville)
- Validate MST modes against PBN limits (Lyude, Shawn Lee)
- Do not access non-existing swizzle registers (Lucas)
- Revert GEN11+ HBR3 rate fix that caused issues on TGL (Matt Atwood)
- Update TGL+ combo phy initialization to match spec update (José)
- Fix HDCP Content Protection property state machine (Anshuman)
- Fix HDCP revoked keys handling (Ram)
- Improve DDI BUF status checks and waits (Manasi)
- Various SDVO+HDMI+DVI fixes around colorimetry, clocking, pixel repeat etc. (Ville)
- DP voltage swing function refactoring (José)
- WARN if max vswing/pre-emphasis violates the DP spec (Ville)

Other:
- Add new EHL PCI IDs (José)
- Unify struct intel_digital_port variable naming (Lucas)
- Various taint updates to aid debugging and improve CI (Michał Winiarski)
- Straggler conversions to new mmio register accessors (Daniele)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87a70029vz.fsf@intel.com
2020-07-31 14:42:37 +10:00
Kalyan Thota
7b149f2bbf drm/msm/dpu: enumerate second cursor pipe for external interface
Setup an RGB HW pipe as cursor which can be used on
secondary interface.

For SC7180 2 HW pipes are enumerated as cursors
1 - primary interface
2 - secondary interface

Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-30 13:44:53 -07:00
Kalyan Thota
ca8199f134 drm/msm/dpu: ensure device suspend happens during PM sleep
"The PM core always increments the runtime usage counter
before calling the ->suspend() callback and decrements it
after calling the ->resume() callback"

DPU and DSI are managed as runtime devices. When
suspend is triggered, PM core adds a refcount on all the
devices and calls device suspend, since usage count is
already incremented, runtime suspend was not getting called
and it kept the clocks on which resulted in target not
entering into XO shutdown.

Add changes to force suspend on runtime devices during pm sleep.

Changes in v1:
 - Remove unnecessary checks in the function
    _dpu_kms_disable_dpu (Rob Clark).

Changes in v2:
 - Avoid using suspend_late to reset the usagecount
   as suspend_late might not be called during suspend
   call failures (Doug).

Changes in v3:
 - Use force suspend instead of managing device usage_count
   via runtime put and get API's to trigger callbacks (Doug).

Changes in v4:
 - Check the return values of pm_runtime_force_suspend and
   pm_runtime_force_resume API's and pass appropriately (Doug).

Changes in v5:
 - With v4 patch, test cycle has uncovered issues in device resume.

   On bubs: cmd tx failures were seen as SW is sending panel off
   commands when the dsi resources are turned off.

   Upon suspend, DRM driver will issue a NULL composition to the
   dpu, followed by turning off all the HW blocks.

   v5 changes will serialize the NULL commit and resource unwinding
   by handling them under PM prepare and PM complete phases there by
   ensuring that clks are on when panel off commands are being
   processed.

Changes in v6:
- Use drm_mode_config_helper_suspend/resume() instead of legacy API
  drm_atomic_helper_suspend/resume() (Doug).

  Trigger runtime callbacks from the suspend/resume call to turn
  off the resources.

Changes in v7:
- Add "__maybe_unused" to the functions to avoid compilation
  failures. Cleanup unnecessary configs (Doug).

Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-30 13:44:52 -07:00
Jonathan Marek
08af4769c7 drm/msm: handle for EPROBE_DEFER for of_icc_get
Check for errors instead of silently not using icc if the msm driver
probes before the interconnect driver.

Allow ENODATA for ocmem path, as it is optional and this error
is returned when "gfx-mem" path is provided but not "ocmem".

Because msm_gpu_cleanup assumes msm_gpu_init has been called, the icc path
init needs to be after msm_gpu_init for the error path to work.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-30 13:44:52 -07:00
Jonathan Marek
0ded520b18 drm/msm: reset devfreq freq_table/max_state before devfreq_add_device
These never get set back to 0 when probing fails, so an attempt to probe
again results in broken behavior. Fix the problem by setting thse to zero
before they are used.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-30 13:44:52 -07:00
Jonathan Marek
17e822f759 drm/msm: fix unbalanced pm_runtime_enable in adreno_gpu_{init, cleanup}
adreno_gpu_init calls pm_runtime_enable, so adreno_gpu_cleanup needs to
call pm_runtime_disable.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-30 13:44:52 -07:00
Dave Airlie
5de5b6ecf9 drm/ttm/nouveau: don't call tt destroy callback on alloc failure.
This is confusing, and from my reading of all the drivers only
nouveau got this right.

Just make the API act under driver control of it's own allocation
failing, and don't call destroy, if the page table fails to
create there is nothing to cleanup here.

(I'm willing to believe I've missed something here, so please
review deeply).

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200728041736.20689-1-airlied@gmail.com
2020-07-29 10:06:38 +10:00
Dave Airlie
ec731e516a drm/ttm: ttm_bo_swapout_all doesn't use it's argument.
Just drop the argument from this.

This does ask the question if this is the function vmwgfx
should be using or should it be doing an evict all like
the other drivers.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Zack Rusin <zackr@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200728034254.20114-1-airlied@gmail.com
2020-07-29 10:01:23 +10:00
Dave Airlie
08bb88cfc4 drm/ttm: make ttm_tt unbind function return void.
The return value just led to BUG_ON, I think if a driver wants
to BUG_ON here it can do it itself. (don't BUG_ON).

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200728040003.20398-1-airlied@gmail.com
2020-07-29 09:43:06 +10:00
Dave Airlie
92be423922 Merge tag 'amd-drm-next-5.9-2020-07-24' of git://people.freedesktop.org/~agd5f/linux into drm-next
amd-drm-next-5.9-2020-07-24:

amdgpu:
- Misc sienna cichlid fixes
- Final bits of swSMU cleanup
- Misc display fixes
- Misc VCN fixes
- Eeprom i2c cleanup
- Drop amd vrr_range debugfs in favor of core drm

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200724205712.3913-1-alexander.deucher@amd.com
2020-07-27 12:32:13 +10:00
Lyude Paul
0059a9081a drm/nouveau/kms/nv50-: Fix CRC-related compile errors with debugfs disabled
Looks like I made the mistake of forgetting to check whether or not this
would build without CONFIG_DEBUG_FS, as the Kbuild bot reported some
issues building with tegra_defconfig:

In file included from drivers/gpu/drm/nouveau/nouveau_display.c:47:
./drivers/gpu/drm/nouveau/dispnv50/crc.h: In function
‘nv50_head_crc_late_register’:
./drivers/gpu/drm/nouveau/dispnv50/crc.h:106:47: error: parameter name
omitted
  106 | static inline int nv50_head_crc_late_register(struct nv50_head *) {}
      |                                               ^~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h:106:54: warning: no return
statement in function returning non-void [-Wreturn-type]
  106 | static inline int nv50_head_crc_late_register(struct nv50_head *) {}
      |                                                      ^~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h: In function
‘nv50_crc_handle_vblank’:
./drivers/gpu/drm/nouveau/dispnv50/crc.h:108:57: warning: ‘return’ with
a value, in function returning void [-Wreturn-type]
  108 | nv50_crc_handle_vblank(struct nv50_head *head) { return 0; }
      |                                                         ^
./drivers/gpu/drm/nouveau/dispnv50/crc.h:108:1: note: declared here
  108 | nv50_crc_handle_vblank(struct nv50_head *head) { return 0; }
      | ^~~~~~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h: In function
‘nv50_crc_atomic_check’:
./drivers/gpu/drm/nouveau/dispnv50/crc.h:111:23: error: parameter name
omitted
  111 | nv50_crc_atomic_check(struct nv50_head *, struct nv50_head_atom *,
      |                       ^~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h:111:43: error: parameter name
omitted
  111 | nv50_crc_atomic_check(struct nv50_head *, struct nv50_head_atom *,
      |                                           ^~~~~~~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h:112:9: error: parameter name
omitted
  112 |         struct nv50_head_atom *) {}
      |         ^~~~~~~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h:112:16: warning: no return
statement in function returning non-void [-Wreturn-type]
  112 |         struct nv50_head_atom *) {}
      |                ^~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h: In function
‘nv50_crc_atomic_stop_reporting’:
./drivers/gpu/drm/nouveau/dispnv50/crc.h:114:32: error: parameter name
omitted
  114 | nv50_crc_atomic_stop_reporting(struct drm_atomic_state *) {}
      |                                ^~~~~~~~~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h: In function
‘nv50_crc_atomic_prepare_notifier_contexts’:
./drivers/gpu/drm/nouveau/dispnv50/crc.h:116:43: error: parameter name
omitted
  116 | nv50_crc_atomic_prepare_notifier_contexts(struct drm_atomic_state *) {}
      |                                           ^~~~~~~~~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h: In function
‘nv50_crc_atomic_start_reporting’:
./drivers/gpu/drm/nouveau/dispnv50/crc.h:118:33: error: parameter name
omitted
  118 | nv50_crc_atomic_start_reporting(struct drm_atomic_state *) {}
      |                                 ^~~~~~~~~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h: In function
‘nv50_crc_atomic_set’:
./drivers/gpu/drm/nouveau/dispnv50/crc.h:120:21: error: parameter name
omitted
  120 | nv50_crc_atomic_set(struct nv50_head *, struct nv50_head_atom *) {}
      |                     ^~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h:120:41: error: parameter name
omitted
  120 | nv50_crc_atomic_set(struct nv50_head *, struct nv50_head_atom *) {}
      |                                         ^~~~~~~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/nouveau/dispnv50/crc.h: In function
‘nv50_crc_atomic_clr’:
./drivers/gpu/drm/nouveau/dispnv50/crc.h:122:21: error: parameter name
omitted
  122 | nv50_crc_atomic_clr(struct nv50_head *) {}
      |                     ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/nouveau/nouveau_display.c: In function
‘nouveau_framebuffer_new’:
drivers/gpu/drm/nouveau/nouveau_display.c:286:15: warning: variable
‘width’ set but not used [-Wunused-but-set-variable]
  286 |  unsigned int width, height, i;
      |               ^~~~~

So, fix the inline function declarations we use in
drm/drivers/gpu/drm/nouveau/dispnv50/crc.h when CONFIG_DEBUG_FS is
enabled.

Fixes: 12885ecbfe ("drm/nouveau/kms/nvd9-: Add CRC support")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24 18:51:05 +10:00
Ben Skeggs
2bd43e0ad0 drm/nouveau/fence: use NVIDIA's headers for read()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:04 +10:00
Ben Skeggs
40f1171e7c drm/nouveau/fence: use NVIDIA's headers for sync()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:04 +10:00
Ben Skeggs
60cdadace3 drm/nouveau/fence: use NVIDIA's headers for emit()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:04 +10:00
Ben Skeggs
c47fceca2e drm/nouveau/svm: use NVIDIA's headers for migrate_clear()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:04 +10:00
Ben Skeggs
66c3bdd4e7 drm/nouveau/svm: use NVIDIA's headers for migrate_copy()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:04 +10:00
Ben Skeggs
6c75137274 drm/nouveau/bo: use NVIDIA's headers for move move()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:04 +10:00
Ben Skeggs
e767835a52 drm/nouveau/bo: use NVIDIA's headers for move init()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:04 +10:00
Ben Skeggs
a38f83d901 drm/nouveau/fbcon/nv50-: use NVIDIA's headers for fillrect()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:04 +10:00
Ben Skeggs
95b1469e5c drm/nouveau/fbcon/nv50-: use NVIDIA's headers for copyarea()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:03 +10:00
Ben Skeggs
c7acff9894 drm/nouveau/fbcon/nv50-: use NVIDIA's headers for imageblit()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:03 +10:00
Ben Skeggs
5755b1eac0 drm/nouveau/fbcon/nv50-: use NVIDIA's headers for accel_init()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:03 +10:00
Ben Skeggs
1fad04ceef drm/nouveau/kms/nv50-: use NVIDIA's headers for core crc_set_ctx()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:03 +10:00
Ben Skeggs
6162638e19 drm/nouveau/kms/nv50-: use NVIDIA's headers for core crc_set_src()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:03 +10:00
Ben Skeggs
c854bf9464 drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_or()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:03 +10:00
Ben Skeggs
29ace860ec drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_procamp()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:03 +10:00
Ben Skeggs
f801efb127 drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_dither()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:03 +10:00
Ben Skeggs
35cefc538b drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_ovly()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:02 +10:00
Ben Skeggs
2aa934ca04 drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_base()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:02 +10:00
Ben Skeggs
916722fce5 drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_curs_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:02 +10:00
Ben Skeggs
ed0b86a90b drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_curs_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:02 +10:00
Ben Skeggs
dbb23f544e drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_core_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:02 +10:00
Ben Skeggs
1302634f79 drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_core_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:02 +10:00
Ben Skeggs
a66a096d78 drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_olut_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:02 +10:00
Ben Skeggs
a41ef363f5 drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_olut_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:02 +10:00
Ben Skeggs
c4c751885e drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_mode()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:01 +10:00
Ben Skeggs
fb3939e232 drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_view()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:01 +10:00
Ben Skeggs
ca31b0c01a drm/nouveau/kms/nv50-: use NVIDIA's headers for core or_get_caps()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:01 +10:00
Ben Skeggs
344c2e5a47 drm/nouveau/kms/nv50-: use NVIDIA's headers for core or_ctrl()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:01 +10:00
Ben Skeggs
8e650ecbcd drm/nouveau/kms/nv50-: use NVIDIA's headers for core wndw_owner()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:01 +10:00
Ben Skeggs
2806280a0c drm/nouveau/kms/nv50-: use NVIDIA's headers for core update()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:01 +10:00
Ben Skeggs
4daef27cb8 drm/nouveau/kms/nv50-: use NVIDIA's headers for core ntfy_wait_done()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:01 +10:00
Ben Skeggs
d8b24526ef drm/nouveau/kms/nv50-: use NVIDIA's headers for core caps_init()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:01 +10:00
Ben Skeggs
38a323b007 drm/nouveau/kms/nv50-: use NVIDIA's headers for core ntfy_init()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
b11d8ca151 drm/nouveau/kms/nv50-: use NVIDIA's headers for core init()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
9f7ffb49ee drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw update()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
fbc318bdbb drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw blend_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
5329dbd4a3 drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw scale_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
1070832b1e drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw image_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
f844eb485e drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw image_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
66f7b7bddf drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw xlut_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
6833d2a0c7 drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw xlut_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
2740edb3c6 drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw csc_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:59 +10:00
Ben Skeggs
84e1d06b06 drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw csc_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:59 +10:00
Ben Skeggs
75bd8304e6 drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw ntfy_wait_begun()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:59 +10:00
Ben Skeggs
9562e564ab drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw ntfy_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:59 +10:00
Ben Skeggs
d4793bc39f drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw ntfy_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:59 +10:00
Ben Skeggs
0ecaefc144 drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw ntfy_reset()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:59 +10:00
Ben Skeggs
941522b7fe drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw sema_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:59 +10:00
Ben Skeggs
fccc858003 drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw sema_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:58 +10:00
Ben Skeggs
852dfbde91 drm/nouveau/kms/nv50-: use NVIDIA's headers for wimm update()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:58 +10:00
Ben Skeggs
937014086a drm/nouveau/kms/nv50-: use NVIDIA's headers for wimm point()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:58 +10:00
Ben Skeggs
2a0d40bbd6 drm/nouveau/kms/nv50-: use NVIDIA's headers for wimm space()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:58 +10:00
Ben Skeggs
2f5bfd1c0a drm/nouveau/fence: convert sync() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:58 +10:00
Ben Skeggs
7aa638cfdb drm/nouveau/fence: convert emit() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:58 +10:00
Ben Skeggs
183b70bbdf drm/nouveau/gem: convert indirect pushbufs to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:58 +10:00
Ben Skeggs
cd346a89d2 drm/nouveau/chan: convert nvsw init to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:58 +10:00
Ben Skeggs
0d2bdf2b0a drm/nouveau: convert nvsw init to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:57 +10:00
Ben Skeggs
2bf00037c4 drm/nouveau/kms/nv04-: no need for multiple nvsw objects
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:57 +10:00
Ben Skeggs
c548b25cab drm/nouveau/kms/nv04: convert page_flip() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:57 +10:00
Ben Skeggs
105f756c50 drm/nouveau/kms/nv04: convert page_flip_emit() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:57 +10:00
Ben Skeggs
44517aa8d7 drm/nouveau/svm: convert migrate_clear to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:57 +10:00
Ben Skeggs
71e741ad12 drm/nouveau/svm: convert migrate_copy to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:57 +10:00
Ben Skeggs
fe4249afd6 drm/nouveau/bo: convert move move() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:57 +10:00
Ben Skeggs
01c43a66eb drm/nouveau/bo: convert move init() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:57 +10:00
Ben Skeggs
8b9d5d63a7 drm/nouveau/bo: split buffer move functions into their own source files
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:56 +10:00
Ben Skeggs
a535aa6775 drm/nouveau/fbcon: convert copyarea() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:56 +10:00
Ben Skeggs
9ec525729f drm/nouveau/fbcon: convert fillrect() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:56 +10:00
Ben Skeggs
1d04a64a0a drm/nouveau/fbcon: convert imageblit() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:56 +10:00
Ben Skeggs
d9a91300ae drm/nouveau/fbcon: convert accel_init() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:56 +10:00
Ben Skeggs
fdb06e2b2a drm/nouveau: interop with new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:56 +10:00