mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/nouveau/bo: use NVIDIA's headers for move init()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
parent
a38f83d901
commit
e767835a52
45
drivers/gpu/drm/nouveau/include/nvhw/class/cl0039.h
Normal file
45
drivers/gpu/drm/nouveau/include/nvhw/class/cl0039.h
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@ -0,0 +1,45 @@
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/*
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* Copyright (c) 2001-2001, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _cl0039_h_
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#define _cl0039_h_
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/* dma method offsets, fields, and values */
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#define NV039_SET_OBJECT (0x00000000)
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#define NV039_NO_OPERATION (0x00000100)
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#define NV039_SET_CONTEXT_DMA_NOTIFIES (0x00000180)
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#define NV039_SET_CONTEXT_DMA_BUFFER_IN (0x00000184)
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#define NV039_SET_CONTEXT_DMA_BUFFER_OUT (0x00000188)
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#define NV039_OFFSET_IN (0x0000030C)
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#define NV039_OFFSET_OUT (0x00000310)
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#define NV039_PITCH_IN (0x00000314)
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#define NV039_PITCH_OUT (0x00000318)
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#define NV039_LINE_LENGTH_IN (0x0000031C)
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#define NV039_LINE_COUNT (0x00000320)
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#define NV039_FORMAT (0x00000324)
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#define NV039_FORMAT_IN 7:0
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#define NV039_FORMAT_OUT 31:8
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#define NV039_BUFFER_NOTIFY (0x00000328)
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#define NV039_BUFFER_NOTIFY_WRITE_ONLY (0x00000000)
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#define NV039_BUFFER_NOTIFY_WRITE_THEN_AWAKEN (0x00000001)
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#endif /* _cl0039_h_ */
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153
drivers/gpu/drm/nouveau/include/nvhw/class/cl5039.h
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153
drivers/gpu/drm/nouveau/include/nvhw/class/cl5039.h
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@ -0,0 +1,153 @@
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/*
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* Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _cl_nv50_memory_to_memory_format_h_
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#define _cl_nv50_memory_to_memory_format_h_
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#define NV5039_SET_OBJECT 0x0000
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#define NV5039_SET_OBJECT_POINTER 15:0
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#define NV5039_NO_OPERATION 0x0100
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#define NV5039_NO_OPERATION_V 31:0
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#define NV5039_SET_CONTEXT_DMA_NOTIFY 0x0180
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#define NV5039_SET_CONTEXT_DMA_NOTIFY_HANDLE 31:0
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#define NV5039_SET_CONTEXT_DMA_BUFFER_IN 0x0184
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#define NV5039_SET_CONTEXT_DMA_BUFFER_IN_HANDLE 31:0
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#define NV5039_SET_CONTEXT_DMA_BUFFER_OUT 0x0188
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#define NV5039_SET_CONTEXT_DMA_BUFFER_OUT_HANDLE 31:0
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#define NV5039_SET_SRC_MEMORY_LAYOUT 0x0200
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#define NV5039_SET_SRC_MEMORY_LAYOUT_V 0:0
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#define NV5039_SET_SRC_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000
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#define NV5039_SET_SRC_MEMORY_LAYOUT_V_PITCH 0x00000001
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#define NV5039_SET_SRC_BLOCK_SIZE 0x0204
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#define NV5039_SET_SRC_BLOCK_SIZE_WIDTH 3:0
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#define NV5039_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000
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#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT 7:4
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#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000
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#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001
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#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002
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#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003
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#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004
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#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005
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#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH 11:8
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#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000
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#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001
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#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002
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#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003
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#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004
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#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005
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#define NV5039_SET_SRC_WIDTH 0x0208
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#define NV5039_SET_SRC_WIDTH_V 31:0
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#define NV5039_SET_SRC_HEIGHT 0x020c
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#define NV5039_SET_SRC_HEIGHT_V 31:0
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#define NV5039_SET_SRC_DEPTH 0x0210
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#define NV5039_SET_SRC_DEPTH_V 31:0
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#define NV5039_SET_SRC_LAYER 0x0214
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#define NV5039_SET_SRC_LAYER_V 31:0
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#define NV5039_SET_SRC_ORIGIN 0x0218
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#define NV5039_SET_SRC_ORIGIN_X 15:0
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#define NV5039_SET_SRC_ORIGIN_Y 31:16
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#define NV5039_SET_DST_MEMORY_LAYOUT 0x021c
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#define NV5039_SET_DST_MEMORY_LAYOUT_V 0:0
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#define NV5039_SET_DST_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000
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#define NV5039_SET_DST_MEMORY_LAYOUT_V_PITCH 0x00000001
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#define NV5039_SET_DST_BLOCK_SIZE 0x0220
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#define NV5039_SET_DST_BLOCK_SIZE_WIDTH 3:0
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#define NV5039_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000
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#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT 7:4
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#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000
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#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001
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#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002
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#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003
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#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004
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#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005
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#define NV5039_SET_DST_BLOCK_SIZE_DEPTH 11:8
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#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000
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#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001
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#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002
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#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003
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#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004
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#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005
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#define NV5039_SET_DST_WIDTH 0x0224
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#define NV5039_SET_DST_WIDTH_V 31:0
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#define NV5039_SET_DST_HEIGHT 0x0228
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#define NV5039_SET_DST_HEIGHT_V 31:0
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#define NV5039_SET_DST_DEPTH 0x022c
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#define NV5039_SET_DST_DEPTH_V 31:0
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#define NV5039_SET_DST_LAYER 0x0230
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#define NV5039_SET_DST_LAYER_V 31:0
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#define NV5039_SET_DST_ORIGIN 0x0234
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#define NV5039_SET_DST_ORIGIN_X 15:0
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#define NV5039_SET_DST_ORIGIN_Y 31:16
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#define NV5039_OFFSET_IN_UPPER 0x0238
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#define NV5039_OFFSET_IN_UPPER_VALUE 7:0
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#define NV5039_OFFSET_OUT_UPPER 0x023c
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#define NV5039_OFFSET_OUT_UPPER_VALUE 7:0
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#define NV5039_OFFSET_IN 0x030c
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#define NV5039_OFFSET_IN_VALUE 31:0
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#define NV5039_OFFSET_OUT 0x0310
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#define NV5039_OFFSET_OUT_VALUE 31:0
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#define NV5039_PITCH_IN 0x0314
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#define NV5039_PITCH_IN_VALUE 31:0
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#define NV5039_PITCH_OUT 0x0318
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#define NV5039_PITCH_OUT_VALUE 31:0
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#define NV5039_LINE_LENGTH_IN 0x031c
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#define NV5039_LINE_LENGTH_IN_VALUE 31:0
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#define NV5039_LINE_COUNT 0x0320
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#define NV5039_LINE_COUNT_VALUE 31:0
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#define NV5039_FORMAT 0x0324
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#define NV5039_FORMAT_IN 7:0
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#define NV5039_FORMAT_IN_ONE 0x00000001
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#define NV5039_FORMAT_OUT 15:8
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#define NV5039_FORMAT_OUT_ONE 0x00000001
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#define NV5039_BUFFER_NOTIFY 0x0328
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#define NV5039_BUFFER_NOTIFY_TYPE 31:0
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#define NV5039_BUFFER_NOTIFY_TYPE_WRITE_ONLY 0x00000000
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#define NV5039_BUFFER_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001
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#endif /* _cl_nv50_memory_to_memory_format_h_ */
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74
drivers/gpu/drm/nouveau/include/nvhw/class/cl9039.h
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74
drivers/gpu/drm/nouveau/include/nvhw/class/cl9039.h
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@ -0,0 +1,74 @@
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/*
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* Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _cl_fermi_memory_to_memory_format_a_h_
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#define _cl_fermi_memory_to_memory_format_a_h_
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#define NV9039_SET_OBJECT 0x0000
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#define NV9039_SET_OBJECT_CLASS_ID 15:0
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#define NV9039_SET_OBJECT_ENGINE_ID 20:16
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#define NV9039_OFFSET_OUT_UPPER 0x0238
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#define NV9039_OFFSET_OUT_UPPER_VALUE 7:0
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#define NV9039_OFFSET_OUT 0x023c
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#define NV9039_OFFSET_OUT_VALUE 31:0
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#define NV9039_LAUNCH_DMA 0x0300
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#define NV9039_LAUNCH_DMA_SRC_INLINE 0:0
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#define NV9039_LAUNCH_DMA_SRC_INLINE_FALSE 0x00000000
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#define NV9039_LAUNCH_DMA_SRC_INLINE_TRUE 0x00000001
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#define NV9039_LAUNCH_DMA_SRC_MEMORY_LAYOUT 4:4
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#define NV9039_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000
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#define NV9039_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH 0x00000001
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#define NV9039_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8
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#define NV9039_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000
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#define NV9039_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001
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#define NV9039_LAUNCH_DMA_COMPLETION_TYPE 13:12
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#define NV9039_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000
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#define NV9039_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001
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#define NV9039_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002
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#define NV9039_LAUNCH_DMA_INTERRUPT_TYPE 17:16
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#define NV9039_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000
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#define NV9039_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001
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#define NV9039_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 20:20
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#define NV9039_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000
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#define NV9039_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001
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#define NV9039_OFFSET_IN_UPPER 0x030c
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#define NV9039_OFFSET_IN_UPPER_VALUE 7:0
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#define NV9039_OFFSET_IN 0x0310
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#define NV9039_OFFSET_IN_VALUE 31:0
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#define NV9039_PITCH_IN 0x0314
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#define NV9039_PITCH_IN_VALUE 31:0
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#define NV9039_PITCH_OUT 0x0318
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#define NV9039_PITCH_OUT_VALUE 31:0
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#define NV9039_LINE_LENGTH_IN 0x031c
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#define NV9039_LINE_LENGTH_IN_VALUE 31:0
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#define NV9039_LINE_COUNT 0x0320
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#define NV9039_LINE_COUNT_VALUE 31:0
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#endif /* _cl_fermi_memory_to_memory_format_a_h_ */
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@ -32,6 +32,8 @@
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#include <nvif/push006c.h>
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#include <nvhw/class/cl0039.h>
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static inline uint32_t
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nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,
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struct nouveau_channel *chan, struct ttm_mem_reg *reg)
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@ -94,7 +96,7 @@ nv04_bo_move_init(struct nouveau_channel *chan, u32 handle)
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if (ret)
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return ret;
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PUSH_NVSQ(push, NV039, 0x0000, handle);
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PUSH_NVSQ(push, NV039, 0x0180, chan->drm->ntfy.handle);
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PUSH_MTHD(push, NV039, SET_OBJECT, handle);
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PUSH_MTHD(push, NV039, SET_CONTEXT_DMA_NOTIFIES, chan->drm->ntfy.handle);
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return 0;
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}
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@ -33,6 +33,8 @@
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#include <nvif/push206e.h>
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#include <nvhw/class/cl5039.h>
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int
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nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
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struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
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@ -111,9 +113,9 @@ nv50_bo_move_init(struct nouveau_channel *chan, u32 handle)
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if (ret)
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return ret;
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PUSH_NVSQ(push, NV5039, 0x0000, handle);
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PUSH_NVSQ(push, NV5039, 0x0180, chan->drm->ntfy.handle,
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0x0184, chan->vram.handle,
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0x0188, chan->vram.handle);
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PUSH_MTHD(push, NV5039, SET_OBJECT, handle);
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PUSH_MTHD(push, NV5039, SET_CONTEXT_DMA_NOTIFY, chan->drm->ntfy.handle,
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SET_CONTEXT_DMA_BUFFER_IN, chan->vram.handle,
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SET_CONTEXT_DMA_BUFFER_OUT, chan->vram.handle);
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return 0;
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}
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@ -32,6 +32,8 @@
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#include <nvif/push906f.h>
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#include <nvhw/class/cl9039.h>
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int
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nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
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struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
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@ -79,6 +81,6 @@ nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle)
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if (ret)
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return ret;
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PUSH_NVSQ(push, NV9039, 0x0000, handle);
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PUSH_MTHD(push, NV9039, SET_OBJECT, handle);
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return 0;
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}
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