Sort subnodes of the root node alphanumerically.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Judging by "R-Car-Gen3-rev0.80" IPMMU IMSSTR register documentation
for [R-Car V3M] the DS1 bit field should be bit 0.
Update the ipmmu-main property to make it match the data sheet.
Fixes: ce3b52a159 ("arm64: dts: renesas: r8a77970: Add IPMMU device nodes")
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds USB 3.0 peripheral node for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds USB 3.0 host node for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds HS-USB node for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds USB-DMAC nodes for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds USB 2.0 host (EHCI/OHCI) nodes for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds usb3_phy node for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch add usb2_phy nodes for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This is the usual set of changes for device trees, with over 700
non-merged changesets. There is an ongoing set of dtc warning fixes and
the usual bugfixes, cleanups and added device support.
The most interesting bit as usual is support for new machines listed
below:
- The Allwinner H6 makes its debut with the Pine-H64 board, and we get
two new machines based on its older siblings: the H5 based OrangePi
Zero+ and the A64 based Teres-I Laptop from Olimex. On the 32-bit side,
we add The Olimex som204 based on Allwinner A20, and the Banana Pi M2
Zero development board (based on H2).
- NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
development board and p2888 CPU module.
- The Nuvoton npcm750 is a BMC that was newly added, for now we only
support running on the evaluation board.
- STmicroelectronics stm32 gains support for the stm32mp157c and two
evaluation boards.
- The Toradex Colibri board family grows a few members based on the
i.MX6ULL variant.
- The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6
family of chips.
- The Phytec phyBOARD Mira is a family of industrial boards based on
i.MX6. For now, four models get added.
- TI am335x based PDU-001 is an industrial embedded machine used for
traffic monitoring
- The Aspeed platform now supports running on the BMC on the Qualcomm
Centriq 2400 server
- Samsung Exynos4 based Galaxy S3 is a family of mobile phones Qualcomm
msm8974 based Galaxy S5 is a rather different phone made by the same
company.
- The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
for the various boards made by Xilinx themselves, as well as the
Digilent Zybo Z7.
- The ARM Versatile family now supports the "IB2" interface board.
- The Renesas H2 based "Stout" and the H3 based Salvator-X are more
evaluation boards named after a kind of beer, as most of them are.
The r8a77980 (V3H) based "Condor" apparently doesn't follow that
tradition. ;-)
- ROC-RK3328-CC is a simple developement board from the Libre Computer
Project, based on the Rockchips RK3328 SoC
- Haiku is another development board plus Qseven module based on Rockchips
RK3368 and made by Theobroma Systems.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaxjFeAAoJEGCrR//JCVInw2gQALS/sK83IJE0Ngw98Cko8fqn
NnbaLaZybajRCdZfXFrIgyL1YijsK4eeniA6zXvFixctlx0FcH2Ep1merbFa52Il
bZKDOeCr6JfSggk2pZvnC7efwAsc5qMmSGU7KgvUV9vgAXTXANdTlVttoBrZldvI
baR5W34BjcXRvA14FyxUPiQgGiCft3rE2ZJA9CqJQ9W44vxnTpbcYpimwya8LWss
hhbJ8P73HhVsKlwS4QXajpLJSo52VdhGDZCd/MwH1yWjzgQZ7O2ijSFz3jYmvdZf
1guE1FhcpHX8/0j1v5OqfEFAjaFUl+Fef11McUlGe4lVM2C47kuNEil//cb4pJ2j
ipQ0qR26GkoBmoxSlt0cI9yUtSemTWzZZSLeTPNQGytb7hRNdR22xwf2vr9Eh6dB
PMG2G0VXVp5Xuif+3iDLxFKiPsBsN49RGtqOj6p9eZhbTIRjgQ5671T3Kla0KRLH
CFlWyYYrRqtUVeM3XSXmNQb9pyuCDqOlLyVngDbCuz4HIly3I2kgSYLTCFZx5FfT
kkVbNy+cO/TOkX8w1P8XiRDGQ16YHQ5kjvy1mUPiPEnf70L2gD8HXWeVX1J2SXzF
OoeNJTzON0cpvtUaM/4hsASi5mHz8rv8CTH8HUviRlXvSH/7JqlM2XqhWSVJ+gYZ
S7/RgDEviOzsHBf/EMUN
=7rHo
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"This is the usual set of changes for device trees, with over 700
non-merged changesets. There is an ongoing set of dtc warning fixes
and the usual bugfixes, cleanups and added device support.
The most interesting bit as usual is support for new machines listed
below:
- The Allwinner H6 makes its debut with the Pine-H64 board, and we
get two new machines based on its older siblings: the H5 based
OrangePi Zero+ and the A64 based Teres-I Laptop from Olimex. On the
32-bit side, we add The Olimex som204 based on Allwinner A20, and
the Banana Pi M2 Zero development board (based on H2).
- NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
development board and p2888 CPU module.
- The Nuvoton npcm750 is a BMC that was newly added, for now we only
support running on the evaluation board.
- STmicroelectronics stm32 gains support for the stm32mp157c and two
evaluation boards.
- The Toradex Colibri board family grows a few members based on the
i.MX6ULL variant.
- The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6 family
of chips.
- The Phytec phyBOARD Mira is a family of industrial boards based on
i.MX6. For now, four models get added.
- TI am335x based PDU-001 is an industrial embedded machine used for
traffic monitoring
- The Aspeed platform now supports running on the BMC on the Qualcomm
Centriq 2400 server
- Samsung Exynos4 based Galaxy S3 is a family of mobile phones
Qualcomm msm8974 based Galaxy S5 is a rather different phone made
by the same company.
- The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
for the various boards made by Xilinx themselves, as well as the
Digilent Zybo Z7.
- The ARM Versatile family now supports the "IB2" interface board.
- The Renesas H2 based "Stout" and the H3 based Salvator-X are more
evaluation boards named after a kind of beer, as most of them are.
The r8a77980 (V3H) based "Condor" apparently doesn't follow that
tradition. ;-)
- ROC-RK3328-CC is a simple developement board from the Libre
Computer Project, based on the Rockchips RK3328 SoC
- Haiku is another development board plus Qseven module based on
Rockchips RK3368 and made by Theobroma Systems"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (701 commits)
arm: dts: modify Nuvoton NPCM7xx device tree structure
arm: dts: modify Makefile NPCM750 configuration name
arm: dts: modify clock binding in NPCM750 device tree
arm: dts: modify timer register size in NPCM750 device tree
arm: dts: modify UART compatible name in NPCM750 device tree
arm: dts: add watchdog device to NPCM750 device tree
arm64: dts: uniphier: add ethernet node for PXs3
ARM: dts: uniphier: add pinctrl groups of ethernet for second instance
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0+/MIT
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0
arm: dts: armada-385-turris-omnia: use SPDX-License-Identifier
arm: dts: armada-385-db-ap: use SPDX-License-Identifier
arm: dts: armada-388-rd: use SPDX-License-Identifier
arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-Identifier
arm: dts: armada-xp-db-dxbc2: use SPDX-License-Identifier
arm: dts: armada-370-db: use SPDX-License-Identifier
arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada based board
arm: dts: armada-xp-98dx: use SPDX-License-Identifier for prestara 98d SoCs
arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCs
...
- Export host capabilities through debugfs
- Export card RCA register via sysfs
- Improve card initializing sequence while enabling 4-bit bus
- Export a function to enable/disable wakeup for card detect IRQ
MMC host:
- dw_mmc: Add support for new hi3798cv200 variant
- dw_mmc: Remove support for some deprecated DT properties
- mediatek: Add support for new variant used on MT7622 SoC
- sdhci: Improve wakeup support for SDIO IRQs
- sdhci: Improve wakeup support for card detect IRQs
- sdhci-omap: Add tuning support
- sdhci_omap: Add UHS-I mode support
- sunxi: Prepare for runtime PM support via a few re-factorings
- tmio: deprecate "toshiba,mmc-wrprotect-disable" DT property
- tmio/renesas_sdhi: Consolidate code supporting write protect
- tmio: Improve DMA vs PIO handling
- tmio: Add support for IP-builtin card detection logic
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaw0MuAAoJEP4mhCVzWIwpW78P/2N2qPt21OfvnIbSexY1nyPd
5+rjScgy+oTUnNxITA9LOnM4P6Wg/9PgvhjUdNdHzd5ZaXIchw372+Xu6hZHdujI
vBfnpsI/xtyL1TQ6nvJc9b+Sp4W4LL2MlCqxi+btAKLvTAU3NNm7uJRRP6xRNDd5
8wcsCoIN4C3k5hmh5++DDLCfuzpwmbC1cEbGtL/QEV9xeCY5+fJq4Qpq14L2TJ0g
LeDls3X4HAJa3SsgSGOdNr8rttKUSS+j7i1XsShHMyq89DD21PJ8fvMhdzlXJub9
A4PatcOXALS/Xd2YVjeLHrRRlTitssD+Sllt46NsB4eJJOO+DempecY+i0WoW60y
p9IUSSX86yokGoyweiL2GI0Ja1Bg8xgdzTGVbfZ6w6UKHjQAcItnojyMghDM5+zt
VjDIU59rzm+BEDqcktsbGgLPjOZ0ZWgJPPp2NPkechxsojvCJ9Smm6yPjzaUnZ60
U9PxsYbs4NB+nE9iKDioyA1ABP0N+BloUkTf/cVHdPBBPMmOyI7jYEDS7mqollZU
bQCFx+BqcQMbnvI/TZxNDTr4HsiyiXJa0GTCB77sge8tZdcUTjUsWyhc+BYpIqgA
68/dlwTcawSXDliup5XxtYcAjGugtHbPnS/39uBXvscqWVej1WI5RTyzKdC/hnos
BP5uz0K1Wic1Dl+jqlWc
=2Pd6
-----END PGP SIGNATURE-----
Merge tag 'mmc-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Export host capabilities through debugfs
- Export card RCA register via sysfs
- Improve card initializing sequence while enabling 4-bit bus
- Export a function to enable/disable wakeup for card detect IRQ
MMC host:
- dw_mmc: Add support for new hi3798cv200 variant
- dw_mmc: Remove support for some deprecated DT properties
- mediatek: Add support for new variant used on MT7622 SoC
- sdhci: Improve wakeup support for SDIO IRQs
- sdhci: Improve wakeup support for card detect IRQs
- sdhci-omap: Add tuning support
- sdhci_omap: Add UHS-I mode support
- sunxi: Prepare for runtime PM support via a few re-factorings
- tmio: deprecate "toshiba,mmc-wrprotect-disable" DT property
- tmio/renesas_sdhi: Consolidate code supporting write protect
- tmio: Improve DMA vs PIO handling
- tmio: Add support for IP-builtin card detection logic"
* tag 'mmc-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (55 commits)
mmc: renesas_sdhi: replace EXT_ACC with HOST_MODE
mmc: update sdio_claim_irq documentation
mmc: Export host capabilities to debugfs.
mmc: core: Disable HPI for certain Micron (Numonyx) eMMC cards
mmc: block: fix updating ext_csd caches on ioctl call
mmc: sunxi: Set our device drvdata earlier
mmc: sunxi: Move the reset deassertion before enabling the clocks
mmc: sunxi: Move resources management to separate functions
mmc: dw_mmc: add support for hi3798cv200 specific extensions of dw-mshc
dt-bindings: mmc: add bindings for hi3798cv200-dw-mshc
mmc: core: Export card RCA register via sysfs
mmc: renesas_sdhi: fix WP detection
mmc: core: Use memdup_user() rather than duplicating its implementation
mmc: dw_mmc-rockchip: correct property names in debug
mmc: sd: Remove redundant err assignment from mmc_read_switch
mmc: sdio: Check the return value of sdio_enable_4bit_bus
mmc: core: Don't try UHS-I mode if 4-bit mode isn't supported
arm64: dts: hi3660: remove 'num-slots' property for dwmmc
ARM: dts: lpc18xx: remove 'num-slots' property for dwmmc
arm64: dts: stratix10: remove 'num-slots' property for dwmmc
...
- add syscon property to sound nodes
- add more ethernet pin groups
- add ethernet support for PXs3 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaum/TAAoJED2LAQed4NsG6awP/AnSPRIV7tCdbB2P4m3WdIh8
TU3FCW5kZ4XzyIys/Kp5WMVjc0iPmTaZlxXRtz2jZC6zRAibNvqJmR3ebLG8aWqe
3Hncqr3ZyhuqjSUsAE0wQ2dKR0lgQp48PY9b3Aiy0T0R2IavGZNfGkw89FiBEvb1
yas7T/UyrONxw9EDfNFVKdKuCKRVKTGgWEJHWKzCrpz5SChJhUGKvFFPm4kC5K9Z
1RMRYacXB20DRxB8zO6Xgl+EPGsclRf+B5gAp+Up9ssOCzWrIpxO+BrW416nt1Ao
BMcUDKRi499lhCHlsMWLt1mWxb8JadSJalsPcc8MsoOBq95mt09OeuRiFvNeTZHd
pnX3la6ntnIIbVYkEEWNZsNXBxOxeEqOcYXgEybm+mru4n+EJttzZaNotBuYwyd4
2HzcceB6w1dzM4vgxvu1EE4Nu2lgglVIf4cv1kA6SYItg17EPjI/sSJcA5vQBKsF
2+3tZNKyQHjtgzy+QZlSZ7AlexpZwJkes1vltJJnfYJTr55kzeRd0vj0B1qIX4Ka
4D6AoPWbHWXIrUqGRnvlBuVvzRBXnuct8i7zBhXhn0eUYdm1E3igkQOdWpoUAlPh
xSHv9aocFn/GJpKY3JDI3UmvUeRcy5m9QviQ0Q7MIeeAit4jyD0OKE9+wJEJHzvf
othbtLBhqWu1dniwvCes
=5fxa
-----END PGP SIGNATURE-----
Merge tag 'uniphier-dt-v4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
Pull "UniPhier ARM SoC DT updates for v4.17 (2nd)" from Masahiro Yamada:
- add syscon property to sound nodes
- add more ethernet pin groups
- add ethernet support for PXs3 SoC
* tag 'uniphier-dt-v4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: add ethernet node for PXs3
ARM: dts: uniphier: add pinctrl groups of ethernet for second instance
ARM: dts: uniphier: add syscon property for UniPhier sound system
arm64: dts: uniphier: add syscon property for UniPhier sound system
minor additions like pins for 2ch i2s0 and the cif test clocks as well
as a default rate for ACLK_VIO that should be 400MHz according to the TRM.
The rk3328 got uart dmas fixed - a non-critical fix, as nobody was using
that so far.
New boards are the rk3328-based roc-rk3328-cc, the rk3368-based Lion-SOM
+ baseborad from Theobroma Systems and a standalone variant of the Sapphire
board, as a lot of people where using that without the Exkavator baseboard.
Sapphire also saw a lot of small cleanups of things that are not part
of the actual Sapphire board, but the baseboard instead. The rk3399-puma
board got i2s and tsadc support and Gru got its DP node enabled.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlqpTQoQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgZ0uCACl6GsROypjpCGLtCsxlaAXdjk0EuBI3rzy
wW2AkmeJQHvMPYIAodVUTqEJW7w2M4V0LbF1YOzebSyLMckejKy2jQGNcjQeQ//p
QAIilflqxqYHTzx9Abv1EpX9uYVsLA46TUnInHAlo+SyDcDAx5/D37oASS+EvlKS
AHniQE5XfH/zf/0ASRqyzKXI+rxhovinUCeVxsJmWS5+jUchUy/PTgx3OBnTahd+
JYjEOygTfPJoVXI3LBsQhuZdGZAVoCrDETsur8tMBBHwUHDQxy2rpLwzqv72C+SR
kdO93Xgjz1+mML3qivJPKYPlc4OabFKgP9BzMnBsALJPXykX7cQw
=Ay+8
-----END PGP SIGNATURE-----
Merge tag 'v4.17-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts64 changes for 4.17" from Heiko Stübner:
The rk3399 gained support its Cadence displayport controller and some
minor additions like pins for 2ch i2s0 and the cif test clocks as well
as a default rate for ACLK_VIO that should be 400MHz according to the TRM.
The rk3328 got uart dmas fixed - a non-critical fix, as nobody was using
that so far.
New boards are the rk3328-based roc-rk3328-cc, the rk3368-based Lion-SOM
+ baseborad from Theobroma Systems and a standalone variant of the Sapphire
board, as a lot of people where using that without the Exkavator baseboard.
Sapphire also saw a lot of small cleanups of things that are not part
of the actual Sapphire board, but the baseboard instead. The rk3399-puma
board got i2s and tsadc support and Gru got its DP node enabled.
* tag 'v4.17-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: remove keep-power-in-suspend from sdhci of rk3399-sapphire
arm64: dts: rockchip: assign clock rate for ACLK_VIO on rk3399
arm64: dts: rockchip: add a standalone version of the rk3399 sapphire
arm64: dts: rockchip: move rk3399-sapphire pwr_btn to daughterboard
arm64: dts: rockchip: move rk3399-sapphire i2s2 to daughterboard
arm64: dts: rockchip: move rk3399-sapphire sdio to excavator baseboard
arm64: dts: rockchip: enable I2S codec on rk3399-puma-haikou
arm64: dts: rockchip: move i2s0 node from baseboard to SoM on rk3399-puma
arm64: dts: rockchip: vdd_log on rk3399-sapphire is not an i2c slave
arm64: dts: rockchip: add Haikou baseboard with RK3368-uQ7 SoM
arm64: dts: rockchip: add RK3368-uQ7 (Lion) SoM
dt-bindings: add RK3368-uQ7 SoM and EVK base board
arm64: dts: rockchip: Fix RK3328 UART DMAs
arm64: dts: rockchip: enable DP for rk3399-gru
arm64: dts: rockchip: add cdn-dp node for rk3399.
arm64: dts: rockchip: add i2s0-2ch-bus pins on rk3399
arm64: dts: rockchip: enable tsadc on rk3399-puma
arm64: dts: rockchip: add roc-rk3328-cc board
arm64: dts: rockchip: Add cif test clocks for rk3399
Add nodes of the AVE ethernet controller for PXs3 and the boards.
This SoC has two controllers.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
- It reverts a couple of patches that "fix" DTC warnings on IFC memory
controller in a wrong way. We will start over agagin to address the
DTC warnings later.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJauf8KAAoJEFBXWFqHsHzO6fcIALbh/wNyaCDbKN7ra1CDh38B
jzCIF8BzxCyhn+2j++8/UVUec9TVF+QYVy39rz0La3ikXCSECwyKwV7rGY5kRZSa
//HhBiShB/u0Qik7leXflxLLZFz5XlUgZ3RG2Qx7nkZkSvsLX6k3c4HdPIKzoOe1
oexR8bOLwshQjgDfNTZMr9KTI/V6ur0lRiolagB8zWjO8e448m8d7YkIeyYB6D7R
PomjtDd3EoJ+fXAmVd1RtY1mhgzhoiS8hhIBFLLTE+Srwoxe+2DUfr5skxqNRAEs
hbgBHHPyZoFt63gl87rohig6qPL26y9n63dE5N/o4iPn0YJDvMUmV9ZBybtoTY4=
=pGg0
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "Freescale arm64 device tree fixups for 4.17" from Shawn Guo:
- It reverts a couple of patches that "fix" DTC warnings on IFC memory
controller in a wrong way. We will start over agagin to address the
DTC warnings later.
* tag 'imx-dt64-4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
Revert "dt-bindings: ifc: Fix the unit address format in the examples"
Revert "arm64: dts: fsl: fix ifc simple-bus unit address format warnings"
Here is our usual bunch of changes to the common DTSI shared between arm
and arm64, and their associated device trees.
Even though the diffstat is quite big, it's been mostly just cleanups. The
big feature is that the HDMI is now suported on H3 and H5 boards.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAlqzy3UACgkQ0rTAlCFN
r3RGXA/9GeVE6R7XQGJX5240cqfLg2HNDBMU5RmRege++kY8wzaoJvnyh2CbQXX5
GJMOs3IEQuXfss7zX7uH9ZCm/b6ibves76gJE140+ZkX4N9DvZdJFaT0K83gYVAL
6Zjt8fo7TAJXuF6SqLkTmG5W4Gs9vQ/n1ui8iM9zptphvm++W/knCht42wiZprHv
+Z7HI5ITw/JGR2gGLD/MPkuCBy1VUmmg4LciVRTbrZ1aNNYirXosGep+TM91dwvh
Dhg3K4fRass47woiyHk+CXhhqgM7xGrShKpX1DGzaQmzUhwQyUiFW0VLyPiWGuy+
QrqCeA1X4XNwCH0v2JxxLQO3Wxu1hV9ZTYdruQM6vJ2QZSwURqr6KNzstAXc9H1b
akcdbjGw25EJpP1s1rAqCJDdiFv1wo3q7nZELK3G6E89uurRn2bjbpIvFduL43Gs
pYaZULcBvPRE7j4JZBrqdQg2EqAzGKLTkO574IiP97EQIUV9GfupHMJt8an38Jtg
AWBYGGIa8UKRWRroAxJOTx7s4sVzNhxzWwNxUfzGd0PZ+/jtJZ8klbrZ62ZIKHgv
yNYXXdQ56QC2JClB9fU+8Qe//ZCn94JyXXH7Ms4hf1cPaKQC6o1KOdVAHhiiwMwZ
SW8ixLZ/1bgvyvHvv73MEkGOtinmLMqFATBzj4qd0oIfzH3oCU8=
=hXvM
-----END PGP SIGNATURE-----
Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Pull "Allwinner H3/H5 changes for 4.17" from Maxime Ripard:
Here is our usual bunch of changes to the common DTSI shared between arm
and arm64, and their associated device trees.
Even though the diffstat is quite big, it's been mostly just cleanups. The
big feature is that the HDMI is now suported on H3 and H5 boards.
* tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus
ARM: dts: sun8i-h3: Add Mali node
ARM64: dts: sun50i: h5: Enable HDMI output on H5 boards
ARM: dts: sun8i: h3: Enable HDMI output on H3 boards
ARM: dts: sunxi: h3/h5: Add HDMI pipeline
ARM: dts: sun8i: h2-plus: remove unnecessary mmc1_pins node
ARM: dts: sunxi: h3-h5: rename mmc0_pins_a and mmc1_pins_a
ARM: dts: sunxi: h3-h5: Move pinctrl of mmc1 from dts to dtsi
ARM: dts: sunxi: h3-h5: Move pinctrl of mmc0 from dts to dtsi
ARM: dts: sunxi: h3-h5: remove mmc0 card detection pin from pinctrl
ARM: dts: sun8i: h2+: add support for Banana Pi M2 Zero board
ARM: dts: sunxi: Switch MMC nodes away from cd-inverted property
ARM: dts: nanopi-neo-air: Add WiFi / eMMC
We've had for this release a pretty good progress on the arm64 front as
well:
- The A64 now has SPDIF support
- The H6 is now supported (even though at an early stage)
- The TERES-I laptop from Olimex has seen some early support as well
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAlqzxaMACgkQ0rTAlCFN
r3Tx9Q//f6XbZmxth22iPgQmmdt9BN6J4s4euL0NdfqUiJusw9sz00EmnEjplyHo
erRnkYGmsx1/lyxgTRc+ueb6CoknusIQKaUz4IoQHuLc1Di4yB7HSkv32WKi6FPJ
iL1eIbHHiDs1Z0dAKa8hhaA7iD/SimXGLzXySIGa2nVU7XS/e/5tk4pVul6/d4/S
z1HkxRASidw91lRdx2t/mbs07uYC+TqPCCG+QN2m8mGenQo+6d6L7yl4rUpezXrM
Z+mVHgB7Hi4921d7ydgEX4STtsKaERq4WjA/hCQgFYjzgbvkqVJ/zqZGAnoAlkc3
gW/JgRXFn2eGxS/EkgGD+F8HR74aHtPkOG/LYcUOge7Oejbp/SVNPalD51/UodfR
Q/dU7lDjCWBKvjCPLY/X+pBfLpkW079d7daa2523nHTYQWLPwJlufOBT2RNAf19b
BCeh3gLEX48oCuGCTBMqJhnNbak6eDktsO14zj0gTxrX0kMsRw9PyvGyaStDL8YG
y8T9kWCjXqXrP/aSzzAegyt0j+8/uPKUF6ZgudZUrdBJTn10dgskkBrAYTFGouAC
Ga0oI5rr8r9zvUPoLgiT0pF4Zam3iXhhA+frEa48170mIOQfVQP1jENO2QsrPWpd
kImVbI/Mn7G9xUKcy8STtP0DbnEOT0tXz20bx1kdlcsfGAhvhc4=
=wSKq
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt64-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Pull "Allwinner arm64 DT changes for 4.17" from Maxime Ripard:
We've had for this release a pretty good progress on the arm64 front as
well:
- The A64 now has SPDIF support
- The H6 is now supported (even though at an early stage)
- The TERES-I laptop from Olimex has seen some early support as well
* tag 'sunxi-dt64-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: a64: Add support for TERES-I laptop
arm64: dts: allwinner: a64: add simplefb for A64 SoC
arm64: dts: allwinner: a64: Add watchdog
arm64: dts: allwinner: a64: Add i2c0 pins
arm64: allwinner: h6: add support for Pine H64 board
arm64: allwinner: h6: add the basical Allwinner H6 DTSI file
arm64: dts: sunxi: Switch MMC nodes away from cd-inverted property
arm64: dts: allwinner: a64: Add DAI nodes
arm64: dts: allwinner: a64: Add SPDIF to the Pine64
arm64: dts: allwinner: a64: Add SPDIF to the A64
arm64: dts: allwinner: a64: Add the SPDIF block and pin
The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
gpio-fan cooling device is found by referring to the
"gpio-fan,speed-map" instead.
Remove the unused properties from the gpio-fan node.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
a CPU cooling device is found by referring to the cpufreq table instead.
Remove the unused properties from the CPU nodes.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add registers clock for all the peripheral nodes that had been yet
converted for CP110 (Armada 7K/8K)
- Document URL for schematic for the EspressoBin (Armada 3720)
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWq/qJAAKCRALBhiOFHI7
1fG4AJ9sIUoukzIpcerurjS2ycxKHRRMzgCffTzrL1NpcFVahmKpWH0ZVQJTzgc=
=DTZp
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.17-2' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt64 for 4.17 (part 2)" from Gregory CLEMENT:
- Add registers clock for all the peripheral nodes that had been yet
converted for CP110 (Armada 7K/8K)
- Document URL for schematic for the EspressoBin (Armada 3720)
* tag 'mvebu-dt64-4.17-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: armada-3720-espressobin: Document URL for schematic
ARM64: dts: marvell: armada-cp110: Add registers clock for the PCIe nodes
ARM64: dts: marvell: armada-cp110: Add registers clock for the NAND node
ARM64: dts: marvell: armada-cp110: Add registers clock for the crypto node
ARM64: dts: marvell: armada-cp110: Add registers clock for the trng node
ARM64: dts: marvell: armada-cp110: Add registers clock for XOR engine nodes
ARM64: dts: marvell: armada-cp110: Add registers clock for USB host nodes
* R-Car Gen3 boards and SoCs
- Make phy-mode of EtherAVB a board-specific property.
The SoC DTs file now uses "rgmii" and boards override this with
"rgmii-txid" as appropriate. Previously "rgmii-txid" was used
in SoC DTs but this did not describe that more sophiticated
functionality is a board rather than SoC property.
* Condor board with R-Car V3H (r8a77980) SoC
- Initial upstream support
* Condor board with R-Car V3H (r8a77980) SoC
- Initial upstream support
* R-Car D3 (r8a77995)
- Add I2C nodes and then describing the PCA9654 I/O expander connected to
the I2C0 bus.
* Eagle board with R-Car V3M (r8a77970) SoC
- Enable PFC support for configuring SCIF0 pins
This uses PFC support added to the V3M DT
- Describe EtherAVB PHY IRQ
This uses support for GPIO added to the V3M DT
- Enable I2C0 support
Sergei Shtylyov says "The I2C0 bus is populated by ON Semiconductor
PCA9653 I/O expander and Analog Devices ADV7511W HDMI transmitter (but
we're only describing the former chip now)."
* R-Car V3M (r8a77970) SoCs
- Add PFC support
- Describe GPIO devices
- Describe I2C devices
- Srt subnodes of root node alphabetically to eas future maintence overhead
* Draak board with R-Car D3 (r8a77995) SoC
- Enable SDHI2
Wolfram Sang says "The single SDHI controller is connected to eMMC."
- Enable DU
Kieran Bingham says "Enable the DU, providing only the VGA output for
now."
* R-Car D3 (r8a77995) and V3M (r8a77970) SoCs
- Move nodes which have no reg property out of bus
By deffinition the bus only has hardware with an address on the bus
- Remove non-existing STBE region from EtherAVB
Stream Buffer for EtherAVB-IF (STBE) is not present on these SoCs
* R-Car D3 (r8a77995) SoC
- Add FCPV, VSP and DU support
Kieran Bingham says "The r8a77995-d3 platform supports 3 VSP instances.
One VSPBS can be used as a dual-input image blender, while two VSPD
instances can be utilised as part of a display (DU) pipeline.
Add support for these, along with their required FCPV nodes."
* Salvator-X and Salvator-XS boards with R-Car Gen3 SoCs
- Add GPIO extender
This is a basis for follow-up work to configure the GPIOs of the extender
* Salvator-X and Salvator-XS board with R-Car M3-N (r8a77965) SoC
- Initial upstream support
* R-Car H3 (r8a7795) and M3-W (r8a7796) SoCs
- Add OPPs table for cpu devices
This, along with recently upstreamed Z and Z2 clock support allows
use of CPUFreq with both A57 and A53 CPUs.
- Add thermal cooling management
Allows the use of CPUFreq as a cooling device on A57 CPUs
- Correct register size of thermal node
Niklas Söderlund says "To be able to read fused calibration values from
hardware the size of the register resource of TSC1 needs to be
incremented to cover one more register which holds the information if
the calibration values have been fused or not.
Instead of increasing TSC1 size to the value from the datasheet update
all TSC's size to the smallest granularity of the address decoder
circuitry"
- Fix register mappings on VSPs
Kieran Bingham says "The VSPD includes a CLUT on RPF2. Ensure that the
register space is mapped correctly to support this."
* R-Car H3 (r8a7795) SoC
- Move SCIF node into alphabetical order to ease future maintenance overhead
- Add IPMMU-PV1 device node
This resolves an oversight when IPMMU nodes were added to the H3 DT.
All IPMMU devices should now be described in DT.
- Add missing SYS-DMAC2 dmas
Geert Uytterhoeven says "On R-Car H3, on-chip peripheral modules that
can make use of DMA are wired to either SYS-DMAC0 only, or to both
SYS-DMAC1 and SYS-DMAC2.
Add the missing DMA properties pointing to SYS-DMAC2 for HSCIF[0-2],
SCIF[0125], and I2C[0-2]. These were initially left out because early
firmware versions prohibited using SYS-DMAC2. This restriction has
been lifted in IPL and Secure Monitor Rev1.0.6 (released on Feb 25,
2016)."
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlqrw1cACgkQ189kaWo3
T75rUw/+LR1H1BeU8TpNeSsq6rb2jD4lJhGfj8UQP5mo2ycRzYfMiZSJgNqsiAd+
C1XgKsEPRCCXhEt52H2cKUocYfGbYrDiUXmy3lHEPHwYENj2+QSjObkZvcLtH3rX
6H6quvBMRbKigBKM2A+6CEG1z/zcGCA25KbLvEqJylADKugldkXn/ao/1yoSmbnX
bqWDZmJ2tPfqFrmp8EVKfW75INLkJUTgzMWAdmUmABdWkLXWEBaGfCIcabwPxeNJ
RJ9jG9P4CVuVhqR85Pii9XbInhYbbVmqkQRwP5jspSULBIxc1LKFLWJeWNfYjE2R
9FkW2EHEKzwK24bg+/rCtjFoM/Uk7E9OwS75IGqQ+QXVTzLmjQAI5vEifVZyaBzU
ei9eh52Q53yG4GEuknEtZe5chVUdoKGxU2KP5D5/OzCcXjrSymHT5eK+t2Anr/vn
ATon2o9RXw9hzy9AeglYl1wA07Vh+VaeEUYp2klYIjm6gSB8e333YghgrI2KdTK3
pTAgwmjDZRZzq4/mC7nr6LI6i0RS9Drf7uzSpYKGSKwnuTAgH3IdkYhRzRA+aY1u
cRXTfWfMJvaE15C7JfhqbduC3DGBVfl5E8kgbPJK8d29DA6m5tB4L5zZ2J2N7q8X
J3jKJSZUYZqDyGzTCd2pJfDzofcsrRyWTvDv1YfobQzeibRJqG8=
=wu1f
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Renesas ARM64 Based SoC DT Updates for v4.17" from Simon Horman:
* R-Car Gen3 boards and SoCs
- Make phy-mode of EtherAVB a board-specific property.
The SoC DTs file now uses "rgmii" and boards override this with
"rgmii-txid" as appropriate. Previously "rgmii-txid" was used
in SoC DTs but this did not describe that more sophiticated
functionality is a board rather than SoC property.
* Condor board with R-Car V3H (r8a77980) SoC
- Initial upstream support
* Condor board with R-Car V3H (r8a77980) SoC
- Initial upstream support
* R-Car D3 (r8a77995)
- Add I2C nodes and then describing the PCA9654 I/O expander connected to
the I2C0 bus.
* Eagle board with R-Car V3M (r8a77970) SoC
- Enable PFC support for configuring SCIF0 pins
This uses PFC support added to the V3M DT
- Describe EtherAVB PHY IRQ
This uses support for GPIO added to the V3M DT
- Enable I2C0 support
Sergei Shtylyov says "The I2C0 bus is populated by ON Semiconductor
PCA9653 I/O expander and Analog Devices ADV7511W HDMI transmitter (but
we're only describing the former chip now)."
* R-Car V3M (r8a77970) SoCs
- Add PFC support
- Describe GPIO devices
- Describe I2C devices
- Srt subnodes of root node alphabetically to eas future maintence overhead
* Draak board with R-Car D3 (r8a77995) SoC
- Enable SDHI2
Wolfram Sang says "The single SDHI controller is connected to eMMC."
- Enable DU
Kieran Bingham says "Enable the DU, providing only the VGA output for
now."
* R-Car D3 (r8a77995) and V3M (r8a77970) SoCs
- Move nodes which have no reg property out of bus
By deffinition the bus only has hardware with an address on the bus
- Remove non-existing STBE region from EtherAVB
Stream Buffer for EtherAVB-IF (STBE) is not present on these SoCs
* R-Car D3 (r8a77995) SoC
- Add FCPV, VSP and DU support
Kieran Bingham says "The r8a77995-d3 platform supports 3 VSP instances.
One VSPBS can be used as a dual-input image blender, while two VSPD
instances can be utilised as part of a display (DU) pipeline.
Add support for these, along with their required FCPV nodes."
* Salvator-X and Salvator-XS boards with R-Car Gen3 SoCs
- Add GPIO extender
This is a basis for follow-up work to configure the GPIOs of the extender
* Salvator-X and Salvator-XS board with R-Car M3-N (r8a77965) SoC
- Initial upstream support
* R-Car H3 (r8a7795) and M3-W (r8a7796) SoCs
- Add OPPs table for cpu devices
This, along with recently upstreamed Z and Z2 clock support allows
use of CPUFreq with both A57 and A53 CPUs.
- Add thermal cooling management
Allows the use of CPUFreq as a cooling device on A57 CPUs
- Correct register size of thermal node
Niklas Söderlund says "To be able to read fused calibration values from
hardware the size of the register resource of TSC1 needs to be
incremented to cover one more register which holds the information if
the calibration values have been fused or not.
Instead of increasing TSC1 size to the value from the datasheet update
all TSC's size to the smallest granularity of the address decoder
circuitry"
- Fix register mappings on VSPs
Kieran Bingham says "The VSPD includes a CLUT on RPF2. Ensure that the
register space is mapped correctly to support this."
* R-Car H3 (r8a7795) SoC
- Move SCIF node into alphabetical order to ease future maintenance overhead
- Add IPMMU-PV1 device node
This resolves an oversight when IPMMU nodes were added to the H3 DT.
All IPMMU devices should now be described in DT.
- Add missing SYS-DMAC2 dmas
Geert Uytterhoeven says "On R-Car H3, on-chip peripheral modules that
can make use of DMA are wired to either SYS-DMAC0 only, or to both
SYS-DMAC1 and SYS-DMAC2.
Add the missing DMA properties pointing to SYS-DMAC2 for HSCIF[0-2],
SCIF[0125], and I2C[0-2]. These were initially left out because early
firmware versions prohibited using SYS-DMAC2. This restriction has
been lifted in IPL and Secure Monitor Rev1.0.6 (released on Feb 25,
2016)."
* tag 'renesas-arm64-dt-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (69 commits)
arm64: dts: renesas: v3msk: add SCIF0 pins
arm64: dts: renesas: r8a7795: Add missing SYS-DMAC2 dmas
arm64: dts: renesas: r8a7795: Add IPMMU-PV1 device node
arm64: dts: renesas: r8a77970: sort subnodes of root node alphabetically
arm64: dts: renesas: eagle: add I2C0 support
arm64: dts: renesas: r8a77970: add I2C support
arm64: dts: renesas: r8a77965-salvator-xs: Add SoC name to file header
arm64: dts: renesas: r8a77965: Add EtherAVB device node
arm64: dts: renesas: r8a77970: Set EtherAVB phy mode to "rgmii"
arm64: dts: renesas: r8a77995: Set EtherAVB phy mode to "rgmii"
arm64: dts: renesas: r8a7795: Set EtherAVB phy mode to "rgmii"
arm64: dts: renesas: r8a7796: Set EtherAVB phy mode to "rgmii"
arm64: dts: renesas: v3msk: Override EtherAVB phy-mode
arm64: dts: renesas: eagle: Override EtherAVB phy-mode
arm64: dts: renesas: draak: Override EtherAVB phy-mode
arm64: dts: renesas: ulcb: Override EtherAVB phy-mode
arm64: dts: renesas: salvator-common: Override EtherAVB phy-mode
arm64: dts: renesas: r8a77965: Add INTC-EX device node
arm64: dts: renesas: r8a77965: Add IIC-DVFS device node
arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-N
...
Adds initial support for the P2972-0000 development board based on
Tegra194 and enables the AHCI controller on Jetson TX1.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlqr0SYTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUryD/0fakVwRpCnyRwlfe6hF2MJmpUPu8Ft
K3VMcL+JW3fDpxS6NYfw7xaI0YiqXlmL/V/hDwmcI5LQVN/TmRxBg3811xxVYQy3
d6nnDvZPru8wLMooereHZjSdY/1yRx/DjzS2RHd622ZwV7FR/7KzsBOEELooNlKG
c6HK/evO8Wr1QC1nsQnrCOtQm6cuw5nVTOSxh3tzHjsx/YEqZrqalTjD0temyvA4
vk/HrBwXQWS/3a7n6avCGxh3MW4K8zYgYw6E7w4GW3umeKu3kVht8LodqYl5B3Az
8cXmd5cWDgyR8A5O0OOX/7EAUBg/D2RxbUUCwThgh/NCbrm+LCeE7xNM39eBuIJW
GLwsdsAih3svPIMYDF7IgEMlJ1+X8IE+AtDmBLbta0fsNljAsK30v/96/+llL579
S4sg3iphpe4Lzd7y0mLM8m5wRNCjaG/DbDYj+Xx0towtIm+UU6hf/G+MEUMTpC4W
+ucGYzACguFOQNEPRvLptJxqqcEGz3Do3GaSpzdieWpibTm91Gfw/IfqdY8KYKy5
DYKMCVo7iYSs0SbvRg7T0nMYF2OnIHDWVFYP26bK3OaQtWaU7mdaA99Q5V7GNQvH
pklUJvjV5igWQ2J56QHD0C642C133kPvcKWu2638GeVtUsL/PF+HHhZaKhODODN7
F/jibSvkt2wTxg==
=u8uZ
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.17-arm64-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "arm64: tegra: Device tree changes for v4.17-rc1" from Thierry Reding:
Adds initial support for the P2972-0000 development board based on
Tegra194 and enables the AHCI controller on Jetson TX1.
* tag 'tegra-for-4.17-arm64-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Enable AHCI on Jetson TX1
arm64: tegra: Add SATA node for Tegra210
arm64: tegra: Add device tree for the Tegra194 P2972-0000 board
arm64: tegra: Add Tegra194 chip device tree
This reverts commit f81d7af795.
As explained by Rob Herring:
"This "fix" is wrong. Memory controllers with chip selects should have
the chip select in the unit-address. The correct fix here is you should
drop "simple-bus"."
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds syscon property for specifying soc-glue core into
device-tree of LD11/LD20 SoC.
Currently, soc-glue core is used for changing the state of S/PDIF
signal output pin to signal output state or Hi-Z state.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The Xunlong Orange Pi Zero Plus is single board computer.
- H5 Quad-core 64-bit Cortex-A53
- 512MB DDR3
- microSD slot
- Debug TTL UART
- 1000M/100M/10M Ethernet RJ45
- Realtek RTL8189FTV
- Spi flash (2MB)
- One USB 2.0 HOST, One USB 2.0 OTG
This is based on a patch from armbian:
https://github.com/armbian/build/blob/master/patch/kernel/sunxi-next/sunxi-add-orangepi-zero-plus.patch
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
efuse is one time programmable, so it is safer to deny write request
to this memory, unless the user is savvy enough to remove the read-only
flag from DTB
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Mali-450 IP can run up to 744MHz, bump the frequency using
the GP0 PLL clock.
Cc: Michal Lazo <michal.lazo@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The TERES-I is an open hardware laptop built by Olimex using the
Allwinner A64 SoC.
Add the board specific .dts file, which includes the A64 .dtsi and
enables the peripherals that we support so far.
Signed-off-by: Harald Geyer <harald@ccbib.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The A64 SoC features two display pipelines, one has a LCD output, the
other has a HDMI output.
Add support for simplefb for the LCD output. Tested on Teres I.
This patch was inspired by work of Icenowy Zheng.
Signed-off-by: Harald Geyer <harald@ccbib.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add a watchdog node for the A64, automatically enabled on all boards.
Since the device is compatible with an existing driver, we only reserve
a new compatible string to be used together with the fall back.
Tested on Olimex Teres-I.
Signed-off-by: Harald Geyer <harald@ccbib.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add the proper pin group node to reference in board files.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Harald Geyer <harald@ccbib.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Pine H64 is an Allwinner H6-based SBC from Pine64, with the following
features:
- 1GiB/2GiB/4GiB LPDDR3 DRAM (in 4GiB situation only 3GiB is
accessible)
- AXP805 PMIC
- Raspberry-Pi-compatible GPIO header, "Euler" GPIO header (not
compatible with the "Euler" on Pine A64) and "Expansion" pin header
- 2 USB 2.0 ports and 1 USB 3.0 ports
- Audio jack
- MicroSD slot and eMMC module slot
- on-board SPI NOR flash
- 1Gbps Ethernet port (via RTL8211E PHY)
- HDMI port
Adds initial support for it, including the UART on the Expansion pin
header.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Allwinner H6 is a new SoC with Cortex-A53 cores from Allwinner, with its
memory map fully reworked and some high-speed peripherals (PCIe, USB
3.0) introduced.
This commit adds the basical DTSI file of it, including the clock
support and UART support.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The schematic of the espressobin is publicly available, add a comment
where to find it.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the PCIe host
controller used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "PCI: armada8k: Fix clock resource by adding
a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the NAND controller
used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "mtd: nand: marvell: Fix clock resource by adding
a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the safexcel EIP97
used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "crypto: inside-secure - fix clock resource by
adding a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the harware RNG
used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "hwrng: omap - Fix clock resource by adding a
register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the XOR engine
controller used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "dmaengine: mv_xor_v2: Fix clock resource by
adding a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the USB host
controller used on Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "usb: host: xhci-plat: Fix clock resource by
adding a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pull "Freescale arm64 device tree updates for 4.17" from Shawn Guo:
- Move cpu_thermal device out of bus node to fix DTC simple_bus_reg
warning seen with W=1 switch.
- Fix IFC child nodes' unit-address to eliminate DTC simple_bus_reg
warnings.
- Add a dummy size memory 'reg' property for LS1046A device tree to
avoid unit_address_vs_reg DTC warning, and the real size will be
filled by bootloader.
- Update ls208xa-qds board device tree to fix unit_address_vs_reg
warnings with DSPI device.
- Add idle-states for LS1012A and LS1043A, and correct
arm,psci-suspend-param setting for already added idle-states.
- DPAA QBMan portal and watchdog device addition.
* tag 'imx-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: ifc: Fix the unit address format in the examples
arm64: dts: ls1046a: add a dummy memory 'reg' property
arm64: dts: fsl: fix ifc simple-bus unit address format warnings
arm64: dts: fsl: update the cpu idle node
arm64: dts: ls1043a: add cpu idle support
arm64: dts: ls1012a: add cpu idle support
arm64: dts: ls208xa-qds: Fix the 'reg' property
arm64: dts: ls208xa-qds: Pass unit name to dspi child nodes
arm64: dts: ls208xa: Move cpu_thermal out of bus node
arm64: dts: ls1088a: Move cpu_thermal out of bus node
arm64: dts: ls1046a: Move cpu_thermal out of bus node
arm64: dts: ls1043a: Move cpu_thermal out of bus node
arm64: dts: ls1012a: Move cpu_thermal out of bus node
arm64: dts: Add DPAA QBMan portal 9
arm64: dts: ls1088a: add DT node of watchdog
According to Documentation/process/license-rules.rst, move the SPDX
License Identifier to the very top of the file. I used C++ comment
style not only for the SPDX line but for the entire block because
this seems Linus' preference [1]. I also dropped the parentheses to
follow the examples in that document.
[1] https://lkml.org/lkml/2017/11/25/133
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
