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ARM64: dts: marvell: armada-cp110: Add registers clock for the trng node
This extra clock is needed to access the registers of the harware RNG used on CP110 component of the Armada 7K/8K SoCs. This follow the changes already made in the binding documentation (as well as in the driver): "hwrng: omap - Fix clock resource by adding a register clock" Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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@ -375,7 +375,9 @@ CP110_LABEL(trng): trng@760000 {
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"inside-secure,safexcel-eip76";
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reg = <0x760000 0x7d>;
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interrupts = <ICU_GRP_NSR 95 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&CP110_LABEL(clk) 1 25>;
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clock-names = "core", "reg";
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clocks = <&CP110_LABEL(clk) 1 25>,
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<&CP110_LABEL(clk) 1 17>;
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status = "okay";
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};
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