A few more fixes and cleanups for 4.6:
- DCE code cleanups
- HDP flush/invalidation fixes
- GPUVM fixes
- switch to drm_vblank_[on|off]
- PX fixes
- misc bug fixes
* 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux: (50 commits)
drm/amdgpu: split pipeline sync out of SDMA vm_flush() as well
drm/amdgpu: Revert "add mutex for ba_va->valids/invalids"
drm/amdgpu: Revert "add lock for interval tree in vm"
drm/amdgpu: Revert "add spin lock to protect freed list in vm (v3)"
drm/amdgpu: reserve the PD during unmap and remove
drm/amdgpu: Fix two bugs in amdgpu_vm_bo_split_mapping
drm/radeon: Don't drop DP 2.7 Ghz link setup on some cards.
MAINTAINERS: update radeon entry to include amdgpu as well
drm/amdgpu: disable runtime pm on PX laptops without dGPU power control
drm/radeon: disable runtime pm on PX laptops without dGPU power control
drm/amd/amdgpu: Fix indentation in do_set_base() (DCEv8)
drm/amd/amdgpu: make afmt_init cleanup if alloc fails (DCEv8)
drm/amd/amdgpu: Move config init flag to bottom of sw_init (DCEv8)
drm/amd/amdgpu: Don't proceed into audio_fini if audio is disabled (DCEv8)
drm/amd/amdgpu: Fix identation in do_set_base() (DCEv10)
drm/amd/amdgpu: Make afmt_init cleanup if alloc fails (DCEv10)
drm/amd/amdgpu: Move initialized flag to bottom of sw_init (DCEv10)
drm/amd/amdgpu: Don't proceed in audio_fini if disabled (DCEv10)
drm/amd/amdgpu: Fix indentation in dce_v11_0_crtc_do_set_base()
drm/amd/amdgpu: Make afmt_init() cleanup if alloc fails (DCEv11)
...
Set the UVD and VCE DPM flags otherwise UVD and VCE DPM won't get enabled.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Cc: stable@vger.kernel.org
Drop local versions of these macros.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Drop local versions of these macros.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
To replace the duplicated versions of this in all asic
variants.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
this do not mean driver error.
Change-Id: If2080eb4b79fc6389280b7c75cb7998d77090739
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
If we don't disable it when vce is not in use, we use extra power
if vce pg is disabled.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This is needed to init the dynamic states without a display. To be
used in the next commit.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
The event_data passed from pem_fini was not cleared upon initialization.
This caused NULL checks to pass and cast_const_phw_tonga_power_state to
attempt to dereference an invalid pointer. Clear the event_data in
pem_init and pem_fini before calling pem_handle_event.
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Bradley Pankow <btpankow@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
In case CONFIG_DRM_AMD_POWERPLAY is defined and amdgpu.powerplay=0.
some functions in powrplay can also be called by DAL. and the input parameter is *adev.
if just check point not NULL was not enough and will lead to NULL point error.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Use min required system clock calculated by dal
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
amd_pp_dal_clock_info to amd_pp_simple_clock_info.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
These add the interfaces for manual clock control.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
These add the interfaces for manual clock control.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The new sysfs interfaces:
pp_num_states: Read-only, return the number of all pp states, 0 if powerplay is not available.
pp_cur_state: Read-only, return the index number of current pp state.
pp_force_state: Read-write, to write a power state index will switch to selected state forcedly and
enable forced state mode, disable forced state mode. such as "echo >...".
pp_table: Read-write, binary output, to be used to read or write the dpm table, the maximum
file size is 4KB of page size.
pp_dpm_sclk: Read-write, reading will return a dpm levels list, to write an index number will force
powerplay to set the corresponding dpm level.
pp_dpm_mclk: same as sclk.
pp_dpm_pcie: same as sclk.
And add new setting "manual" to the existing interface power_dpm_force_performance_level.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
We recently redid the indenting, but missed these two if statements.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Enable vce and uvd pg based on single set of pg flags.
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Enable vce and uvd pg based on single set of pg flags.
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fix firmware init on Stoney when powerplay is enabled.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Makes it clear to the user which power management path is in
use.
v2: make consistent with dpm
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
A few more misc things for radeon and amdgpu for 4.5:
- TTM fixes for imported buffers
- amdgpu fixes to avoid -ENOMEM in CS ioctl
- CZ UVD and VCE clock force options for debugging video issues
- A couple of ACP prerequisites
- Misc fixes
* 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux:
drm/amdgpu: validate duplicates first
drm/amdgpu: move VM page tables to the LRU end on CS v2
drm/ttm: add ttm_bo_move_to_lru_tail function v2
drm/ttm: fix adding foreign BOs to the swap LRU
drm/ttm: fix adding foreign BOs to the LRU during init v2
drm/radeon: use kobj_to_dev()
drm/amdgpu: use kobj_to_dev()
drm/amdgpu/cz: force vce clocks when sclks are forced
drm/amdgpu/cz: force uvd clocks when sclks are forced
drm/amdgpu/cz: add code to enable forcing VCE clocks
drm/amdgpu/cz: add code to enable forcing UVD clocks
drm/amdgpu: fix lost sync_to if scheduler is enabled.
drm/amd/powerplay: fix static checker warning for return meaningless value.
drm/amdgpu: add irq domain support
drm/amdgpu/cgs: add an interface to access PCI resources
The return value should be either negative or zero, no positive.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Fixes: 1e4854e96c ("drm/amdgpu/powerplay: implement thermal control for tonga.")
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Dave Airlie <airlied@redhat.com>
v2: AGD: rebase on upstream
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
In case CONFIG_DRM_AMD_POWERPLAY is defined and amdgpu.powerplay=0.
some functions in powrplay can also be called by DAL. and the input parameter is *adev.
if just check point not NULL was not enough and will lead to NULL point error.
V2: AGD: rebase on upstream
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1. return -1 instead of -ENOMEM
2. The struct type mismatch warnings.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
v2: AGD: rebase on upstream
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
&& was used instead of ||.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The cast to uint8_t happens before the right shift so this always sets
.m3arb to zero. The cast is actually a no-op so we can remove it.
Fixes: 3bace35914 ('drm/amd/powerplay: add hardware manager sub-component')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This test was reversed so it would end up leading to a NULL dereference.
Fixes: 4630f0faae ('drm/amd/powerplay: add Carrizo smu support')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The newly added code for Fiji creates a correct compiler warning
about invalid use of the do_div macro:
In file included from powerplay/hwmgr/ppatomctrl.c:31:0:
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppevvmath.h: In function 'fDivide':
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppevvmath.h:382:89: warning: comparison of distinct pointer types lacks a cast
do_div(longlongX, longlongY); /*Q(32,32) divided by Q(16,16) = Q(16,16) Back to original format */
do_div() divides an unsigned 64-bit number by an unsigned 32-bit number.
The code instead wants to divide two signed 64-bit numbers, which is done
using the div64_s64 function.
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 770911a3cf ("drm/amd/powerplay: add/update headers for Fiji SMU and DPM")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[airlied: fixup build problems on arm - added errno.h include]
* 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux: (152 commits)
amd/powerplay: fix copy paste typo in hardwaremanager.c
amd/powerplay: disable powerplay by default initially
amd/powerplay: don't enable ucode fan control if vbios has no fan table
drm/amd/powerplay: show gpu load when print gpu performance for Cz. (v2)
drm/amd/powerplay: check whether need to enable thermal control. (v2)
drm/amd/powerplay: add point check to avoid NULL point hang.
drm/amdgpu/powerplay: Program a calculated value as Deep Sleep clock.
drm/amd/powerplay: Don't return an error if fan table is missing
drm/powerplay/hwmgr: log errors in tonga_hwmgr_backend_init
drm/powerplay: add debugging output to processpptables.c
drm/powerplay: add debugging output to tonga_processpptables.c
amd/powerplay: Add structures required to report configuration change
amd/powerplay: Fix get dal power level
amd\powerplay Implement get dal power level
drm/amd/powerplay: display gpu load when print performance for tonga.
drm/amdgpu/powerplay: enable sysfs and debugfs interfaces late
drm/amd/powerplay: move shared function of vi to hwmgr. (v2)
drm/amd/powerplay: check whether enable dpm in powerplay.
drm/amd/powerplay: fix bug that dpm funcs in debugfs/sysfs missing.
drm/amd/powerplay: fix boolreturn.cocci warnings
...
Some systems have a single fan controlled by ACPI or some other
method.
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Show GPU load in in the debugfs output.
v2: integrate Tom's optimization
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
In I+A platform(skylake), it is controlled by intel.
v2: integrate Tom's fix
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppatomctrl.c:475:10-11: WARNING: return of 0/1 in function 'atomctrl_lookup_gpio_pin' with return type bool
Return statements in functions returning bool should use
true/false instead of 1/0.
Generated by: scripts/coccinelle/misc/boolreturn.cocci
CC: yanyang1 <young.yang@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
- The macro is silent by default.
- Use the macro to print Display Configuration - related changes.
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Rather than hardcode it.
v2: integrate spc fix from Rex
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rather than hardcode it.
v2: integrate spc fix from Rex
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
These will be used by multiple powerplay drivers and
other IP modules.
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Better handle power state changes.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Implement the new callbacks for tonga.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Interface between hwmgr and eventmgr.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
This adds the interface needed to expose powerplay fan control to sysfs
via hwmon.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Implement thermal and fan control for tonga.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Add thermal handling to the event manager.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Redefine interrupt callback function in accordance with cgs.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Add the interface for fan and thermal control.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Implement clock and power gating support for tonga. On Tonga
this is handles by the SMU rather than direct register settings
in the driver.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Add callbacks interface for clock and powergating.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Interface for clock and power gating handling.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Implement displaygap programming for tonga. This is
required for properly mclk switching.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Add support for display configuration changes to the event manager.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This allows the eventmgr to properly update the displaygap on
certain power events.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Displaygap support is required for proper mclk switching.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This enabled DPM support for Fiji. DPM is dynamic
clock and voltage scaling.
v2: rename fiji_hwmgr_early_init to fiji_hwmgr_init
v3: (agd) fold in endian fix, additional function addition
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Add support for the SMU manager for Fiji. This handles the
firmware loading for other IP blocks (GFX, SDMA, etc.).
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Add some new functions to support Fiji. Split out
from the previous patch.
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
This implements DPM for tonga. DPM handles dynamic
clock and voltage scaling.
v2: merge all the patches related with tonga dpm
v3: merge dpm force level fix, cgs display fix, spelling fix
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
The SMU manager handles firmware loading for other IP
blocks (GFX, SDMA, etc.). This implements it for Tonga.
v3: delete peci sub-module
v2: use cgs interface directly
Signed-off-by: Young Yang <Young.Yang@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
These headers provide the SMU interface used by the driver.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Move smu7.h, smu7_discrete.h and smu7_fusion.h from amdgpu to powerplay.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
This is the common interface for interacting with the powerplay
module.
v2: squash in fixes
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
The event manager handles power related driver events.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This adds clock and powergating support for CZ.
v2: squash in fixes
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This patch enables basic DPM support for Carrizo.
DPM handles dynamic clock and voltage scaling.
v3: delete peci sub-module
v2: use cgs interface directly
correct define SMU_EnabledFeatureScoreboard_SclkDpmOn
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This implements the SMU firmware manager interface for CZ.
Some header files are moved from amdgpu folder to powerplay as well.
v3: delete peci sub-module.
v2: use cgs interface directly
add load_mec_firmware function
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
The hwmgr handles all hardware related calls, including clock/power
gating control, DPM, read and parse PPTable, etc.
v5: squash in fixes
v4: implement acpi's atcs function use cgs interface
v3: fix code style error and add big-endian mode support.
v2: use cgs interface directly in hwmgr sub-module
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
The SMUMGR is one sub-component of powerplay for SMU firmware support.
The SMU handles firmware loading for other IP blocks (GFX, SDMA, etc.)
on VI parts. The adds the core powerplay infrastructure to handle that.
v3: direct use printk in powerplay module.
v2: direct use cgs_read/write_register functions in smu-modules
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu_pp_ip_funcs is introduced to handle the two code paths,
the legacy one and the new powerplay implementation.
CONFIG_DRM_AMD_POWERPLAY kernel configuration option is
introduced for the powerplay component.
v4: squash in fixes
v3: register debugfs file when powerplay module enable
v2: add amdgpu_ucode_init_bo in hw init when amdgpu_powerplay enable.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
