Commit Graph

932754 Commits

Author SHA1 Message Date
Colin Ian King
3d7b0ca530 phy: qualcomm: fix setting of tx_deamp_3_5db when device property read fails
Currently when reading of the device property for "qcom,tx-deamp_3_5db"
fails the default is being assigned incorrectly to phy_dwc3->rx_eq. This
looks like a copy-n-paste error and in fact should be assigning the
default instead to phy_dwc3->tx_deamp_3_5db

Addresses-Coverity: ("Copy-paste error")
Fixes: ef19b117b8 ("phy: qualcomm: add qcom ipq806x dwc usb phy driver")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20200721150613.416876-1-colin.king@canonical.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-21 23:11:48 +05:30
Álvaro Fernández Rojas
783f6d3dcf phy: bcm63xx-usbh: Add BCM63xx USBH driver
Add BCM63xx USBH PHY driver for BMIPS.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Simon Arlott <simon@octiron.net>
Link: https://lore.kernel.org/r/20200720131209.1236590-3-noltari@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-21 22:59:58 +05:30
Álvaro Fernández Rojas
9600041210 dt-bindings: phy: add bcm63xx-usbh bindings
Document BCM63xx USBH PHY bindings.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200720131209.1236590-2-noltari@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-21 22:59:58 +05:30
Russell King
1dea06cd64 phy: armada-38x: fix NETA lockup when repeatedly switching speeds
The mvneta hardware appears to lock up in various random ways when
repeatedly switching speeds between 1G and 2.5G, which involves
reprogramming the COMPHY.  It is not entirely clear why this happens,
but best guess is that reprogramming the COMPHY glitches mvneta clocks
causing the hardware to fail.  It seems that rebooting resolves the
failure, but not down/up cycling the interface alone.

Various other approaches have been tried, such as trying to cleanly
power down the COMPHY and then take it back through the power up
initialisation, but this does not seem to help.

It was finally noticed that u-boot's last step when configuring a
COMPHY for "SGMII" mode was to poke at a register described as
"GBE_CONFIGURATION_REG", which is undocumented in any external
documentation.  All that we have is the fact that u-boot sets a bit
corresponding to the "SGMII" lane at the end of COMPHY initialisation.

Experimentation shows that if we clear this bit prior to changing the
speed, and then set it afterwards, mvneta does not suffer this problem
on the SolidRun Clearfog when switching speeds between 1G and 2.5G.

This problem was found while script-testing phylink.

This fix also requires the corresponding change to DT to be effective.
See "ARM: dts: armada-38x: fix NETA lockup when repeatedly switching
speeds".

Fixes: 14dc100b44 ("phy: armada38x: add common phy support")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/E1jxtRj-0003Tz-CG@rmk-PC.armlinux.org.uk
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-21 22:57:46 +05:30
Russell King
6c89533dee dt: update Marvell Armada 38x COMPHY binding
Update the Marvell Armada 38x COMPHY binding with an additional
optional register pair describing the location of an undocumented
system register controlling something to do with the Gigabit Ethernet
and COMPHY.  There is one bit for each COMPHY lane that may be using
the serdes, but exactly what this register does is completely unknown.

This register only appears to exist on Armada 38x devices, and not
other SoCs using the NETA ethernet block, so it seems logical that it
should be part of the COMPHY.

This is also how u-boot groups this register; it is dealt with as part
of the COMPHY initialisation there.

However, at the end of the day, due to the undocumented nature of this
register, we can only guess.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/E1jxtRZ-0003Ta-4h@rmk-PC.armlinux.org.uk
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-21 22:57:46 +05:30
Gustavo A. R. Silva
e9f84ec63c phy: samsung-ufs: Fix IS_ERR argument
Fix IS_ERR argument in samsung_ufs_phy_symbol_clk_init(). The proper
argument to be passed to IS_ERR() is phy->rx1_symbol_clk.

This bug was detected with the help of Coccinelle.

Fixes: bca21e9304 ("phy: samsung-ufs: add UFS PHY driver for samsung SoC")
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20200720132718.GA13413@embeddedor
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-21 16:09:11 +05:30
Lad Prabhakar
f13b89900d dt-bindings: phy: renesas,usb3-phy: Add r8a774e1 support
Document RZ/G2H (R8A774E1) SoC bindings.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594919915-5225-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-20 12:04:59 +05:30
Lad Prabhakar
f199d6a296 dt-bindings: phy: renesas,usb2-phy: Add r8a774e1 support
Document SoC specific bindings for RZ/G2H (r8a774e1) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594919915-5225-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-20 12:04:59 +05:30
Yoshihiro Shimoda
b59aeb1a59 phy: renesas: rcar-gen3-usb2: exit if request_irq() failed
To avoid unexpected behaviors, it's better to exit if request_irq()
failed.

Suggested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594986297-12434-3-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-20 12:03:44 +05:30
Yoshihiro Shimoda
08b0ad375c phy: renesas: rcar-gen3-usb2: move irq registration to init
If CONFIG_DEBUG_SHIRQ was enabled, r8a77951-salvator-xs could boot
correctly. If we appended "earlycon keep_bootcon" to the kernel
command like, we could get kernel log like below.

    SError Interrupt on CPU0, code 0xbf000002 -- SError
    CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.8.0-rc3-salvator-x-00505-g6c843129e6faaf01 #785
    Hardware name: Renesas Salvator-X 2nd version board based on r8a77951 (DT)
    pstate: 60400085 (nZCv daIf +PAN -UAO BTYPE=--)
    pc : rcar_gen3_phy_usb2_irq+0x14/0x54
    lr : free_irq+0xf4/0x27c

This means free_irq() calls the interrupt handler while PM runtime
is not getting if DEBUG_SHIRQ is enabled and rcar_gen3_phy_usb2_probe()
failed. To fix the issue, move the irq registration place to
rcar_gen3_phy_usb2_init() which is ready to handle the interrupts.

Note that after the commit 549b6b55b0 ("phy: renesas: rcar-gen3-usb2:
enable/disable independent irqs") which is merged into v5.2, since this
driver creates multiple phy instances, needs to check whether one of
phy instances is initialized. However, if we backport this patch to v5.1
or less, we don't need to check it because such kernel have single
phy instance.

Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: 9f391c574e ("phy: rcar-gen3-usb2: add runtime ID/VBUS pin detection")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594986297-12434-2-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-20 12:03:44 +05:30
Ansuel Smith
dc171790c7 devicetree: bindings: phy: Document ipq806x dwc3 qcom phy
Document dwc3 qcom phy hs and ss phy bindings needed to correctly
inizialize and use usb on ipq806x SoC.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200717131635.11076-2-ansuelsmth@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-20 11:54:03 +05:30
Ansuel Smith
ef19b117b8 phy: qualcomm: add qcom ipq806x dwc usb phy driver
This has lost in the original push for the dwc3 qcom driver.
This is needed for ipq806x SoC as without this the usb ports
doesn't work at all.

Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/20200717131635.11076-1-ansuelsmth@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-20 11:54:03 +05:30
Vinod Koul
6cd84cfc8e Merge branch 'fixes' into next 2020-07-17 13:45:53 +05:30
Alim Akhtar
bca21e9304 phy: samsung-ufs: add UFS PHY driver for samsung SoC
This patch introduces Samsung UFS PHY driver. This driver
supports to deal with phy calibration and power control
according to UFS host driver's behavior.

[Robot: -Wmissing-prototypes and -Wsometimes-uninitialized]
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Kiwoong Kim <kwmad.kim@samsung.com>
Signed-off-by: Seungwon Jeon <essuuj@gmail.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Tested-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Link: https://lore.kernel.org/r/20200716192217.35740-2-alim.akhtar@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-17 13:35:30 +05:30
Alim Akhtar
170ba9c23f dt-bindings: phy: Document Samsung UFS PHY bindings
This patch documents Samsung UFS PHY device tree bindings

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Link: https://lore.kernel.org/r/20200716192217.35740-1-alim.akhtar@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-17 13:35:30 +05:30
Vinod Koul
8b34a2895b phy: sun4i-usb: explicitly include gpio/consumer.h
Driver uses GPIO functions but doesn't include the header explcitly. Add
that to fix build errors when GPIOLIB is disabled.

drivers/phy/allwinner/phy-sun4i-usb.c:367:11: error: implicit
declaration of function ‘gpiod_get_value_cansleep’; did you mean
‘gpio_get_value_cansleep’? [-Werror=implicit-function-declaration]
drivers/phy/allwinner/phy-sun4i-usb.c:707:22: error: implicit
declaration of function ‘devm_gpiod_get_optional’; did you mean
‘devm_clk_get_optional’? [-Werror=implicit-function-declaration]
drivers/phy/allwinner/phy-sun4i-usb.c:708:11: error: ‘GPIOD_IN’
undeclared (first use in this function); did you mean ‘GPIOF_IN’?
drivers/phy/allwinner/phy-sun4i-usb.c:815:21: error: implicit
declaration of function ‘gpiod_to_irq’; did you mean ‘gpio_to_irq’?
[-Werror=implicit-function-declaration]

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Link: https://lore.kernel.org/r/20200716062427.71763-1-vkoul@kernel.org
2020-07-17 12:03:11 +05:30
Vinod Koul
0ff35966d1 phy: stm32: use NULL instead of zero
devm_clk_get() and devm_reset_control_get() expect a const char *id for
the last arg, but a value of zero was provided. This results in below
sparse warning:

drivers/phy/st/phy-stm32-usbphyc.c:330:42: warning: Using plain integer as NULL pointer
drivers/phy/st/phy-stm32-usbphyc.c:343:52: warning: Using plain integer as NULL pointer

Instead of zero, use NULL

Reviewed-by: Amelie Delaunay <amelie.delaunay@st.com>
Link: https://lore.kernel.org/r/20200708132809.265967-6-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 12:15:46 +05:30
Vinod Koul
0672fb0d42 phy: exynos5-usbdrd: use correct format for structure description
We get warning with W=1 build:
drivers/phy/samsung/phy-exynos5-usbdrd.c:211: warning: Function
parameter or member 'phys' not described in 'exynos5_usbdrd_phy'
drivers/phy/samsung/phy-exynos5-usbdrd.c:211: warning: Function
parameter or member 'vbus' not described in 'exynos5_usbdrd_phy'
drivers/phy/samsung/phy-exynos5-usbdrd.c:211: warning: Function
parameter or member 'vbus_boost' not described in 'exynos5_usbdrd_phy'

These members are provided with description but format is not quite
right resulting in above warnings

Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200708132809.265967-5-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 12:14:58 +05:30
Vinod Koul
72fbf95f36 phy: rockchip-typec: use correct format for structure description
We get warning with W=1 build:
drivers/phy/rockchip/phy-rockchip-typec.c:360: warning: cannot
understand function prototype: 'struct rockchip_usb3phy_port_cfg '

The 'struct rockchip_usb3phy_port_cfg ' is commented properly but uses
wrong format, so fix that up

Link: https://lore.kernel.org/r/20200708132809.265967-4-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 12:14:54 +05:30
Vinod Koul
f0c47c7458 phy: xgene: remove unsigned integer comparison with less than zero
We get warning with W=1 build:
drivers/phy/phy-xgene.c: In function ‘xgene_phy_xlate’:
drivers/phy/phy-xgene.c:1618:20: warning: comparison of unsigned
expression in ‘< 0’ is always false [-Wtype-limits]
 1618 |  if (args->args[0] < MODE_SATA || args->args[0] >= MODE_MAX) |

args is uint32_t so can never be less than zero, so remove this check

Link: https://lore.kernel.org/r/20200708132809.265967-3-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 12:14:51 +05:30
Vinod Koul
c988b7c5fc phy: mapphone-mdm6600: Add missing description for some structure fields
We get warning with W=1 build:
drivers/phy/motorola/phy-mapphone-mdm6600.c:185: warning: Function
parameter or member 'val' not described in 'phy_mdm6600_cmd'
drivers/phy/motorola/phy-mapphone-mdm6600.c:200: warning: Function
parameter or member 'work' not described in 'phy_mdm6600_status'

Fix that by adding description for 'val' and 'work'

Link: https://lore.kernel.org/r/20200708132809.265967-2-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 12:14:46 +05:30
Vinod Koul
901e0a8f14 phy-mvebu-a3700-utmi: correct typo in struct mvebu_a3700_utmi comments
We get warning with W=1 build:
drivers/phy/marvell/phy-mvebu-a3700-utmi.c:84: warning: Function
parameter or member 'usb_misc' not described in 'mvebu_a3700_utmi'

Fix that by correcting the typo usb_mis

Link: https://lore.kernel.org/r/20200708132809.265967-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 12:14:37 +05:30
Marek Szyprowski
dcbabfeb17 phy: exynos5-usbdrd: Calibrating makes sense only for USB2.0 PHY
PHY calibration is needed only for USB2.0 (UTMI) PHY, so skip calling
calibration code when phy_calibrate() is called for USB3.0 (PIPE3) PHY.

Fixes: d8c80bb3b5 ("phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200708133800.3336-1-m.szyprowski@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 10:43:09 +05:30
Kunihiko Hayashi
03815930c1 dt-bindings: phy: uniphier: Fix incorrect clocks and clock-names for PXs3 usb3-hsphy
The usb3-hsphy for PXs3 SoC needs to accept 3 clocks like usb3-ssphy.

Fixes: 134ab2845a ("dt-bindings: phy: Convert UniPhier USB3-PHY conroller to json-schema")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1594198664-29381-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 10:42:02 +05:30
Tiezhu Yang
010f0dff9f phy: allwinner: Make PHY_SUN6I_MIPI_DPHY depend on COMMON_CLK
When CONFIG_ARCH_SUNXI is not set but CONFIG_COMPILE_TEST=y,
CONFIG_HAVE_CLK=y, CONFIG_HAVE_LEGACY_CLK=y, there exists
the following build errors with CONFIG_PHY_SUN6I_MIPI_DPHY=y:

drivers/phy/allwinner/phy-sun6i-mipi-dphy.o: In function `sun6i_dphy_init':
phy-sun6i-mipi-dphy.c:(.text+0x320): undefined reference to `clk_set_rate_exclusive'
drivers/phy/allwinner/phy-sun6i-mipi-dphy.o: In function `sun6i_dphy_exit':
phy-sun6i-mipi-dphy.c:(.text+0x2c8): undefined reference to `clk_rate_exclusive_put'

clk_set_rate_exclusive() and clk_rate_exclusive_put() are defined
in drivers/clk/clk.c, this file is built under CONFIG_COMMON_CLK,
so in order to build drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
successful used with various configs, CONFIG_PHY_SUN6I_MIPI_DPHY
should depend on CONFIG_COMMON_CLK.

Fixes: 133552bf03 ("phy: Remove CONFIG_ARCH_* check for related subdir in Makefile")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Link: https://lore.kernel.org/r/1594113746-25393-1-git-send-email-yangtiezhu@loongson.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 10:40:53 +05:30
Peter Chen
270ff6048f phy: cadence: salvo: fix wrong bit definition
It fixes RX detect wakeup using USB3 device, otherwise, the USB3
device can't wakeup USB PHY when the PHY is in 32Khz clock.

Fixes: 50d35aa8c1 ("phy: cadence: salvo: add salvo phy driver")
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Link: https://lore.kernel.org/r/20200703064600.14181-1-peter.chen@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 10:39:44 +05:30
Rikard Falkeborn
82c8d38699 phy: allwinner: phy-sun6i-mipi-dphy: Constify structs
sun6i_dphy_ops and sun6i_dphy_regmap_config are not modified so make them
const structs to allow the compiler to put them in read-only memory.

Before:
   text    data     bss     dec     hex filename
   4407    1944      64    6415    190f drivers/phy/allwinner/phy-sun6i-mipi-dphy.o

After:
   text    data     bss     dec     hex filename
   4835    1496      64    6395    18fb drivers/phy/allwinner/phy-sun6i-mipi-dphy.o

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200629195727.9717-1-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-08 16:46:08 +05:30
Vinod Koul
3cc4502ce8 phy: ti-pipe3: remove set but unused variable
ti_pipe3_power_on() sets variable 'ret' but never uses it, so remove it.

drivers/phy/ti/phy-ti-pipe3.c:340:6: warning: variable ‘ret’ set but not
used [-Wunused-but-set-variable]

Link: https://lore.kernel.org/r/20200629145010.122675-4-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-08 16:40:28 +05:30
Vinod Koul
3b0163bb34 phy: ti: dm816x: remove set but unused variable
dm816x_usb_phy_init() sets variable 'error' but never uses it, so remove
it.

drivers/phy/ti/phy-dm816x-usb.c:85:6: warning: variable ‘error’ set but
not used [-Wunused-but-set-variable]

Link: https://lore.kernel.org/r/20200629145010.122675-3-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-08 16:40:24 +05:30
Vinod Koul
aad075c155 phy: core: Document function args
Some function arguments are missing from documentation prompting
validation kernel doc script to complain:

drivers/phy/phy-core.c:1078: warning: Function parameter or member
'children' not described in '__devm_of_phy_provider_register'
drivers/phy/phy-core.c:1125: warning: Function parameter or member
'phy_provider' not described in 'devm_of_phy_provider_unregister'

Add the documentation for these

Link: https://lore.kernel.org/r/20200629145010.122675-2-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-08 16:40:21 +05:30
Vinod Koul
b555f35f2f phy: core: fix code style in devm_of_phy_provider_unregister
Documentation/process/coding-style.rst says:
"functions: they have the opening brace at the beginning of the next
line"

devm_of_phy_provider_unregister() function has opening brace at same
line, so fix it up.

Link: https://lore.kernel.org/r/20200629145010.122675-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-08 16:40:13 +05:30
Vinod Koul
02dca8c981 phy: qcom: remove ufs qmp phy driver
The UFS specific QMP PHY driver started off supporting the 14nm and
20nm hardware. With the 20nm support marked broken for a long time and
the 14nm support added to the common QMP PHY, this driver has not been
used in a while. So delete it

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200629145452.123035-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-08 16:37:05 +05:30
Tobias Klauser
1c59c2d95d phy: zynqmp: Fix unused-function compiler warning
Mark xpsgtr_suspend and xpsgtr_resume as __maybe_unused to fix the
following compiler warning when building with !CONFIG_PM_SLEEP:

drivers/phy/xilinx/phy-zynqmp.c:830:12: warning: ‘xpsgtr_resume’ defined but not used [-Wunused-function]
  830 | static int xpsgtr_resume(struct device *dev)
      |            ^~~~~~~~~~~~~
drivers/phy/xilinx/phy-zynqmp.c:819:12: warning: ‘xpsgtr_suspend’ defined but not used [-Wunused-function]
  819 | static int xpsgtr_suspend(struct device *dev)
      |            ^~~~~~~~~~~~~~

Also drop the existing #ifdef CONFIG_PM so the functions are always
compile-checked regardless of CONFIG_PM and/or CONFIG_PM_SLEEP being
set.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Link: https://lore.kernel.org/r/20200701141017.26931-1-tklauser@distanz.ch
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-01 20:35:29 +05:30
Laurent Pinchart
574ba36678 dt-bindings: phy: zynqmp-psgtr: Fix example's numbers of cells in reg
The DT examples are by default compiled in a parent that has
 #address-cells and #size-cells both set to 1. Fix the example
accordingly, even if it doesn't match the actual hardware, as this is
the recommended practice for DT bindings examples.

Fixes: cea0f76a48 ("dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY")
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200701134853.30656-1-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-01 19:36:57 +05:30
Anurag Kumar Vulisha
4a33bea003 phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver
Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the
high speed peripherals such as USB, SATA, PCIE, Display Port and
Ethernet SGMII can rely on any of the four GT lanes for PHY layer. This
patch adds driver for that ZynqMP GT core.

Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-29 18:48:00 +05:30
Anurag Kumar Vulisha
cea0f76a48 dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY
Add DT bindings for the Xilinx ZynqMP PHY. ZynqMP SoCs have a High Speed
Processing System Gigabit Transceiver which provides PHY capabilities to
USB, SATA, PCIE, Display Port and Ehernet SGMII controllers.

Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200629120054.29338-2-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-29 18:48:00 +05:30
Wesley Cheng
dcbec04650 phy: qcom-snps: Add a set mode callback
The set mode handler is used to keep track of the current role of the
device.  This is used for enabling certain resources within the PHY
depending on if the device is behaving as a host or device.

Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
Link: https://lore.kernel.org/r/20200625195444.15130-3-wcheng@codeaurora.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-29 15:15:56 +05:30
Wesley Cheng
0d75f508a9 phy: qcom-snps: Add runtime suspend and resume handlers
Allow for the PHY to be put into a powered down state when possible.
Add the required suspend and resume callbacks, which will determine
what resources can be turned off depending on the cable status.

Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
Link: https://lore.kernel.org/r/20200625195444.15130-2-wcheng@codeaurora.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-29 15:15:52 +05:30
Jonathan Marek
90b65347cf phy: qcom-qmp: Add QMP V4 USB3 PHY support for sm8250
Add both the DP and UNI PHY for primary/secondary usb controllers.

The tables are very similar to sm8150 (serdes_tbl is identical), but there
are some differences.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200524021416.17049-4-jonathan@marek.ca
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-29 15:11:33 +05:30
Jonathan Marek
7b675ba1d2 phy: qcom-qmp: Add QMP V4 USB3 UNIPHY
Add support for the USB3 PHY used by the secondary usb controller on sm8150

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200524021416.17049-3-jonathan@marek.ca
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-29 15:11:33 +05:30
Jonathan Marek
5dcbc71126 phy: qcom-qmp: Allow different values for second lane
The primary USB PHY on sm8250 sets some values differently for the second
lane. This makes it possible to represent that.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200524021416.17049-2-jonathan@marek.ca
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-29 15:11:33 +05:30
Colin Ian King
38b1927e5b phy: sun4i-usb: fix dereference of pointer phy0 before it is null checked
Currently pointer phy0 is being dereferenced via the assignment of
phy on the call to phy_get_drvdata before phy0 is null checked, this
can lead to a null pointer dereference. Fix this by performing the
null check on phy0 before the call to phy_get_drvdata. Also replace
the phy0 == NULL check with the more usual !phy0 idiom.

Addresses-Coverity: ("Dereference before null check")
Fixes: e6f32efb1b ("phy: sun4i-usb: Make sure to disable PHY0 passby for peripheral mode")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20200625124428.83564-1-colin.king@canonical.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-25 18:25:37 +05:30
Sivaprakash Murugesan
1d99d491dc phy: qcom-qusb2: Add ipq8074 device compatible
Add ipq8074 qusb2 device compatible for high speed usb support.

Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Tested-by: Sricharan R <sricharan@codeaurora.org>
Reviewed-by: Sricharan R <sricharan@codeaurora.org>
Link: https://lore.kernel.org/r/1591625479-4483-5-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 22:48:00 +05:30
Sivaprakash Murugesan
507156f5a9 phy: qcom-qmp: Add USB QMP PHY support for IPQ8074
Add QMP USB PHY found in IPQ8074

Co-developed-by: Balaji Prakash J <bjagadee@codeaurora.org>
Signed-off-by: Balaji Prakash J <bjagadee@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Tested-by: Sricharan R <sricharan@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1591625479-4483-4-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 22:48:00 +05:30
Sivaprakash Murugesan
ba971c2ff5 dt-bindings: phy: qcom,qusb2: Add ipq8074 device compatible
Add ipq8074 compatible in QUSB2 PHY for high speed USB support.

Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Tested-by: Sricharan R <sricharan@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1591625479-4483-3-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 22:47:59 +05:30
Sivaprakash Murugesan
066571516b dt-bindings: phy: qcom,qmp: Add ipq8074 usb dt bindings
Add ipq8074 qmp phy device compatible for super speed usb support.

Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Tested-by: Sricharan R <sricharan@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1591625479-4483-2-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 22:47:59 +05:30
Krzysztof Kozlowski
c233a2edf8 phy: exynos: Rename Exynos to lowercase
Fix up inconsistent usage of upper and lowercase letters in "Exynos"
name.

"EXYNOS" is not an abbreviation but a regular trademarked name.
Therefore it should be written with lowercase letters starting with
capital letter.

The lowercase "Exynos" name is promoted by its manufacturer Samsung
Electronics Co., Ltd., in advertisement materials and on website.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Link: https://lore.kernel.org/r/20200617152803.17941-1-krzk@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 22:44:19 +05:30
Tiezhu Yang
133552bf03 phy: Remove CONFIG_ARCH_* check for related subdir in Makefile
If CONFIG_ARCH_ROCKCHIP is not set but COMPILE_TEST is set, the file in
the subdir rockchip can not be built due to CONFIG_ARCH_ROCKCHIP check
in drivers/phy/Makefile.

Since the related configs in drivers/phy/rockchip/Kconfig depend on
ARCH_ROCKCHIP, so remove CONFIG_ARCH_ROCKCHIP check for subdir rockchip
in drivers/phy/Makefile.

The other CONFIG_ARCH_* about allwinner, amlogic, mediatek, renesas and
tegra have the same situation, so remove them too.

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/1590412138-13903-2-git-send-email-yangtiezhu@loongson.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 18:29:22 +05:30
Tiezhu Yang
fdc355a03d phy: rockchip: Fix return value of inno_dsidphy_probe()
When call function devm_platform_ioremap_resource(), we should use IS_ERR()
to check the return value and return PTR_ERR() if failed.

Fixes: b7535a3bc0 ("phy/rockchip: Add support for Innosilicon MIPI/LVDS/TTL PHY")
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/1590412138-13903-1-git-send-email-yangtiezhu@loongson.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 18:29:09 +05:30
Rikard Falkeborn
5a72122dcf phy: ti: j721e-wiz: Constify structs
clk_div_table and wiz_regmap_config are not modified and can therefore
be made const to allow the compiler to put them in read-only memory.

Before:
   text    data     bss     dec     hex filename
  20265    7044      64   27373    6aed drivers/phy/ti/phy-j721e-wiz.o

After:
   text    data     bss     dec     hex filename
  20649    6660      64   27373    6aed drivers/phy/ti/phy-j721e-wiz.o

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200524095516.25227-3-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24 18:26:39 +05:30