Commit Graph

15450 Commits

Author SHA1 Message Date
Hans Verkuil
7f2b7ceeb4 ARM: tegra: Add CEC support for Tegra124
Add support for the Tegra CEC IP to the Tegra124 DTSI and link it to the
HDMI controller via phandle.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-10-19 11:45:14 +02:00
Jagan Teki
f6ffcaa6f6 ARM: dts: rockchip: Add io domains for rk3288-vyasa
Add io domains supported by rk3288-vyasa board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-18 12:51:03 +02:00
Fabrizio Castro
b6d3b64944 ARM: dts: r8a7743: Add xhci support to SoC dtsi
Add node for xhci. Boards DT files will enable it if needed.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-18 07:21:36 +02:00
Chen-Yu Tsai
234d260c1f ARM: dts: sun4i: Enable HDMI support on some A10 devices
Various A10-based development boards have standard HDMI connectors
wired to the dedicated HDMI pins on the SoC.

Enable the display pipeline and HDMI output on boards I have or have
access to schematics:

  - Cubieboard
  - Olimex A10-OLinuXino-LIME

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-18 09:39:53 +08:00
Chen-Yu Tsai
59268ffe87 ARM: dts: sun7i: Enable HDMI support on some A20 devices
All the A20 devices I own have standard HDMI connectors wired
to the dedicated HDMI pins on the SoC:

  - Bananapi M1+
  - Cubieboard 2
  - Cubietruck
  - Lamobo R1 (or Bananapi R1)

Development boards from Olimex also have standard HDMI connectors.
Schematics for them are publicly available. Enable HDMI on them as
well.

  - Olimex A20-OLinuXino-LIME
  - Olimex A20-OLinuXino-LIME2
  - Olimex A20-OLinuXino-MICRO

Enable the display pipeline and HDMI output for them.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Priit Laes <plaes@plaes.org> # Cubietruck, A20-OLinuXino-MICRO
Tested-by: Olliver Schinagl <oliver@schinagl.nl> # A20-OLinuXino-LIME2
Tested-by: Jonathan Liu <net147@gmail.com> # A20-OLinuXino-LIME
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-18 09:39:01 +08:00
Jonathan Liu
5b92b29bed ARM: dts: sun7i: Add device nodes for display pipelines
The A20 has two interconnected display pipelines, mirroring the A10.

Add all the device nodes for them, including the downstream HDMI
controller that we already support.

Signed-off-by: Jonathan Liu <net147@gmail.com>
[wens@csie.org: Squashed in HDMI and provided commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-18 09:38:47 +08:00
Chen-Yu Tsai
0df4cf33a5 ARM: dts: sun4i: Add device nodes for display pipelines
The A10 has two interconnected display pipelines, much like the A31,
but without the DRCs between the backend and TCONs.

Add all the device nodes for them, including the downstream HDMI
controller that we already support.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-18 09:38:13 +08:00
Icenowy Zheng
cfe8be2340 ARM: dts: sun8i: r40: add watchdog device node
The R40 SoC has a watchdog like the one on A20, in the timer memory zone
(which is also the same on A20).

Add the device tree node for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-10-18 09:37:01 +08:00
Jagan Teki
4ed1bc3915 ARM: dts: rockchip: Add usb otg for rk3288-vyasa
Add usb otg support for rk3288-vyasa, board support usb1 otg
power through otg_vbus_drv and naming conversion followed
as per schematic.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17 21:16:39 +02:00
Jagan Teki
ba736024a4 ARM: dts: rockchip: Add usb host for rk3288-vyasa
Add usb host support for rk3288-vyasa, board support hub power
through phy_pwr_en and usb2 host power through usb2_pwr_en and
naming conversion followed as per schematic.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17 21:16:08 +02:00
Jagan Teki
c09cd25370 ARM: dts: rockchip: Add gmac support for rk3288-vyasa board
Add the external clock-reference, enable the gmac node
and define the phy-related pin settings.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17 21:13:16 +02:00
Jagan Teki
8f6fc8245c ARM: dts: rockchip: Add regulators for rk3288-vyasa
Add supporting regulators for rk3288-vyasa board, dc12_vbat is
parent regulatorand followed regulators as are child regulators.
regulator naming conversion followed as per schematic for better
readability and easy for identification.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17 21:11:09 +02:00
Jagan Teki
32739f1536 ARM: dts: rockchip: Use vmmc-supply from PMIC on rk3288-vyasa
rk808, SWITCH_REG1 has configured for sdmmc regulator as vcc_sd,
so use the same by renaming vcc33_sd to vcc_sd(as per schematic)
and drop explicit regulator definition from root.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17 21:09:51 +02:00
Jagan Teki
598ed15fd7 ARM: dts: rockchip: Remove vdd_log from rk808, DCDC_REG1 on rk3288-vyasa
vdd_log, never used on DCDC_REG1 of rk808 from latest schematic so
remove the same and update the regulator-name as 'vdd_arm' to sync
with existing rk3288 board dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17 21:06:24 +02:00
Rocky Hao
115cca31c1 ARM: dts: rockchip: enable tsadc module on RV1108 evaluation board
Enable tsadc module on RV1108 evaluation board

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17 20:58:46 +02:00
Rocky Hao
f6d3f1e8eb ARM: dts: rockchip: add thermal nodes for RV1108 SoC
Add thermal zone and dynamic CPU power coefficients for RV1108

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17 20:57:44 +02:00
Rocky Hao
fb03abbc27 ARM: dts: rockchip: add tsadc node for RV1108 SoC
Add tsadc needed main information for RV1108 SoC.
750000Hz is the max clock rate supported by tsadc module.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17 20:53:29 +02:00
Jacob Chen
faf15c0b75 ARM: dts: rockchip: add RGA device node for RK3288
This patch add the RGA dt config of rk3288 SoC.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17 20:26:00 +02:00
Pierre-Yves MORDRET
4bd93eb39d ARM: dts: stm32: Add MDMA support for STM32H743 SoC
This patch adds MDMA support for STM32H743 SoC.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 18:22:17 +02:00
Amelie Delaunay
cae2ada3a7 ARM: dts: stm32: Enable USB FS on stm32f746-disco
This patch enables USB FS on stm32f746-disco (Host mode) with 5V VBUS
enable.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 18:14:24 +02:00
Amelie Delaunay
07b6b2eebe ARM: dts: stm32: Add USB FS support for STM32F746 MCU
This patch adds the USB pins and nodes for USB FS core on STM32F746 SoC.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 18:14:12 +02:00
Amelie Delaunay
f08da327d4 ARM: dts: stm32: Enable USB HS on stm32f746-disco
This patch enables USB HS on stm32f746-disco (Host mode).

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 14:15:21 +02:00
Amelie Delaunay
d3e745dcfb ARM: dts: stm32: Enable USB HS on stm32746g-eval
This patch enables USB HS on stm32746g-eval (Host mode).

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 14:15:08 +02:00
Amelie Delaunay
ec1e5a97ea ARM: dts: stm32: Add USB HS support for STM32F746 MCU
This patch adds the USB pins and nodes for USB HS core on STM32F746 SoC.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 14:14:26 +02:00
Alexandre Torgue
162d58c26d ARM: dts: stm32: change pinctrl bindings definition
Initially each pin was declared in "include/dt-bindings/stm32<SOC>-pinfunc.h"
and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX).
Since this approach was approved, the number of supported MCU has
increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new
file in "include/dt-bindings" each time a new STM32 SOC arrives I propose
a new approach which consist to use a macro to define pin muxing in device
tree. All STM32 will use the common macro to define pinmux. Furthermore, it
will make STM32 maintenance and integration of new SOC easier .

Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
2017-10-16 14:01:25 +02:00
Gabriel Fernandez
6d3b3745c5 ARM: dts: stm32: Enable STM32H743 clock driver
This patch enables clock driver for STM32H743 soc.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 14:01:21 +02:00
Gabriel Fernandez
d69455cda1 ARM: dts: stm32: fix hse clock frequency on STM32H743 Eval board
Fix HSE frequency to 25Mhz for STM32H743 Eval Board

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 14:01:16 +02:00
Benjamin Gaignard
9bd7b77af8 ARM: dts: stm32: add Timers driver for stm32f746 MCU
Add Timers and it sub-nodes into DT for stm32f746 family.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 14:01:04 +02:00
Pierre-Yves MORDRET
e40992cb22 ARM: dts: stm32: Add DMAMUX support for STM32H743 SoC
This patch adds DMAMUX support for STM32H743 SoC.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 14:00:53 +02:00
Fabrice Gasnier
74f4c3228a ARM: dts: stm32: Add lptimer definitions to stm32h743
Add lptimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 14:00:50 +02:00
Fabrice Gasnier
846f2f1c3d ARM: dts: stm32: add vrefbuf to stm32h743
Add STM32H743 VREFBUF (Voltage Reference Buffer) definition.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 14:00:41 +02:00
Pierre-Yves MORDRET
d0b9a8c517 ARM: dts: stm32: Add I2C1 support for STM32F746 eval board
This patch adds I2C1 support for STM32F746 eval board

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16 13:59:55 +02:00
Geert Uytterhoeven
f20d89ac0f ARM: dts: r7s72100: Add clock for CA9 CPU core
Improve hardware description by adding a clock property to the device
node corresponding to the CA9 CPU core.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:52:23 +02:00
Geert Uytterhoeven
e5042d0b97 ARM: dts: sh73a0: Add clocks for CA9 CPU cores
Improve hardware description by adding clocks properties to the device
nodes corresponding to the CA9 CPU cores.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:43:49 +02:00
Geert Uytterhoeven
5614e69269 ARM: dts: r8a7794: Add missing clock for secondary CA7 CPU core
Currently only the primary CPU in the CA7 cluster has a clocks property,
while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:43:35 +02:00
Geert Uytterhoeven
f359fd3bba ARM: dts: r8a7793: Add missing clock for secondary CA15 CPU core
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:43:06 +02:00
Geert Uytterhoeven
8684a24caa ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU core
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:42:55 +02:00
Geert Uytterhoeven
60b672fe7e ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU core
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:41:41 +02:00
Geert Uytterhoeven
aea0089ae8 ARM: dts: r8a7790: Add clocks for CA7 CPU cores
Currently only the CPU cores in the CA15 cluster have clocks properties.
Add the missing clocks properties for the CPU cores in the CA7 cluster
to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:41:11 +02:00
Geert Uytterhoeven
aa4c2fdf49 ARM: dts: r8a7790: Add missing clocks for secondary CA15 CPU cores
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU cores are driven by the same clock.
Add the missing clocks properties to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:39:31 +02:00
Geert Uytterhoeven
fa9f95a3d1 ARM: dts: r8a7779: Add clocks for CA9 CPU cores
Improve hardware description by adding clocks properties to the device
nodes corresponding to the CA9 CPU cores.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:38:21 +02:00
Geert Uytterhoeven
d3e865a35a ARM: dts: r8a7778: Add clock for CA9 CPU core
Improve hardware description by adding a clock property to the device
node corresponding to the CA9 CPU core.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:37:21 +02:00
Geert Uytterhoeven
a60ddf507d ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU core
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:37:10 +02:00
Geert Uytterhoeven
a7869a5bc8 ARM: dts: r8a73a4: Add clock for CA15 CPU0 core
Improve hardware description by adding a clocks property to the device
node corresponding to the primary CA15 CPU core, which is for now the
only one described.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:36:18 +02:00
Simon Horman
7ee06c8a0b ARM: dts: r8a7794: Use R-Car GPIO Gen2 fallback compat string
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7794 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 09:23:09 +02:00
Simon Horman
c37417dca0 ARM: dts: r8a7793: Use R-Car GPIO Gen2 fallback compat string
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7793 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 09:22:19 +02:00
Simon Horman
7f4a16c414 ARM: dts: r8a7792: Use R-Car GPIO Gen2 fallback compat string
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7792 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 09:21:39 +02:00
Simon Horman
7140383d59 ARM: dts: r8a7791: Use R-Car GPIO Gen2 fallback compat string
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7791 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 09:21:34 +02:00
Simon Horman
26742a192c ARM: dts: r8a7790: Use R-Car GPIO Gen2 fallback compat string
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7790 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 09:21:32 +02:00
Simon Horman
936e7d7472 ARM: dts: r8a7743: Use R-Car GPIO Gen2 fallback compat string
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7743 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 09:21:30 +02:00
Simon Horman
88cb141b84 ARM: dts: r8a7779: Use R-Car GPIO Gen1 fallback compat string
Use newly added R-Car GPIO Gen1 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in DT of r8a7779 SoC.

As the driver does not match on "renesas,gpio-r8a7779" there
are some run-time considerations for this patch:

* When a resulting DTB is used with kernels newer than v4.14 this should
  not have any run-time effect as renesas,rcar-gen1-gpio is matched by the
  driver since commit dbd1dad2ab ("gpio: rcar: add gen[123] fallback
  compatibility strings")

* However, when used with older kernels GPIO will be disabled as
  no compat string match will be made by the driver.

The regression documented above for the new DTB with old kernel case
is acceptable in my opinion.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 09:19:59 +02:00
Simon Horman
9b43ba66f1 ARM: dts: r8a7778: Use R-Car GPIO Gen1 fallback compat string
Use newly added R-Car GPIO Gen1 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in DT of r8a7778 SoC.

As the driver does not match on "renesas,gpio-r8a7778" there
are some run-time considerations for this patch:

* When a resulting DTB is used with kernels newer than v4.14 this should
  not have any run-time effect as renesas,rcar-gen1-gpio is matched by the
  driver since commit dbd1dad2ab ("gpio: rcar: add gen[123] fallback
  compatibility strings")

* However, when used with older kernels GPIO will be disabled as
  no compat string match will be made by the driver.

The regression documented above for the new DTB with old kernel case
is acceptable in my opinion.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 09:19:53 +02:00
Masahiro Yamada
1658b84de4 ARM: dts: uniphier: fix W=2 build warnings
Fix warnings like follows:

Warning (node_name_chars_strict): Character '_' not recommended in ...

Commit 8654cb8d03 ("dtc: update warning settings for new bus and
node/property name checks") says these checks are a bit subjective,
but Rob also says to not add new W=2 warnings.

The exising warnings should be fixed in order to catch new ones
easily.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-10-15 21:10:11 +09:00
Kunihiko Hayashi
fbd8d5832e ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for PXs2
Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC.
The thermal monitor node is included in sysctrl. Since the efuse might not
have a calibrated value of thermal monitor, this patch gives the default
value for PXs2.

Furthermore, add cpuN labels for reference in cooling-device property.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-10-15 17:35:26 +09:00
Michael Trimarchi
345b40f1e5 ARM: dts: rockchip: Enable thermal on rk3288-vyasa board
Enable thermal on rk3288-vyasa board, TSHUT is high active.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-14 21:10:31 +02:00
Andrey Smirnov
1c86c9dd82 ARM: dts: imx7d: Invert legacy PCI irq mapping
According to i.MX7D reference manual (Rev. 0.1, table 7-1, page 1221)
legacy PCI interrupt mapping is as follows:

 - PCIE INT A is IRQ 122
 - PCIE INT B is IRQ 123
 - PCIE INT C is IRQ 124
 - PCIE INT D is IRQ 125

Invert the mapping information in corresponding DT node to reflect
that.

Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Fixes: a816d5750e ("ARM: dts: imx7d: Add node for PCIe controller")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-14 23:32:51 +08:00
Lothar Waßmann
0d7b6f280b ARM: dts: imx28-tx28: remove the regulators bus
It is not recommended to place the regulator nodes inside 'simple-bus',
so adjust them accordingly.

The motivation for rearranging this is to make it easier to add new
regulator nodes in the future.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-14 23:08:11 +08:00
Lothar Waßmann
a408079fd9 ARM: dts: imx28-tx28: Relicense the TX28 dts file under GPLv2/X11
The current GPL only licensing on the dts file makes it very
impractical for other software components licensed under another
license.

In order to make it easier for them to reuse our device trees,
relicense our dts files first under a GPL/X11 dual-license.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-14 23:07:56 +08:00
Tony Lindgren
1ff516a4ba ARM: dts: Fix typo for omap4 mcasp rx path
As reported by Peter Ujfalusi <peter.ujfalusi@ti.com>, the rx path on macsp
is disabled and only tx is usable if the davinci-mcasp driver is updated for
it.

Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-13 09:43:22 -07:00
Marco Franchi
f7059428ec ARM: dts: imx51: Fix inconsistent display port names
Contrary to later i.MX SoCs, the parallel display interface pad groups on
i.MX51 are called DISP1 and DISP2 in the Reference Manual, not DISP0 and
DISP1.

Fix this inconsistence by changing the DISP names in the i.mx51 dts.

Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 15:58:42 +08:00
Marco Franchi
792d4edda0 ARM: dts: imx: Fix incorrect display nodes notation
The following build warnings are seen with W=1:

Warning (unit_address_vs_reg): Node /display@di0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /display@di1 has a unit name, but no reg property

Fix all these warnings by changing 'display@diX' to 'dispX'.

Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 15:58:24 +08:00
Chen-Yu Tsai
c6ec770c82 ARM: dts: sun5i: reference-design-tablet: Enable AXP209 AC and battery
The reference design tablet has the DC jack wired to AXP209's ACIN.
As a tablet, it also has an internal LiPo battery, wired to the PMIC's
battery charger.

Enable both.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13 09:23:47 +02:00
Maxime Ripard
333bf2e65a ARM: dts: sun9i: Change node names to remove underscores
Some boards have had node names with underscores. Remove them in favour of
hyphens in order to reduce the DTC warnings.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13 09:21:54 +02:00
Maxime Ripard
00a7088f9a ARM: dts: sun9i: Change node names to remove underscores
Some node names in the A80 DTSI still have underscores in them. Remove them
in favour of hyphens to remove DTC warnings.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13 09:21:53 +02:00
Maxime Ripard
012d5f389c ARM: dts: sun4i: Remove underscores from nodes names
Some GPIO pinctrl nodes cannot be easily removed, because they would also
change the pin configuration, for example to add a pull resistor or change
the current delivered by the pin.

Those nodes still have underscores and unit-addresses in their node names
in our DTs, so adjust their name to remove the warnings. Use that occasion
to also fix some poorly chosen node-names.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13 09:21:53 +02:00
Maxime Ripard
bca0d7d9ff ARM: dts: sun4i: Provide default muxing for relevant controllers
The I2C's, MMC0 and EMAC controllers have only one muxing option in the
SoC. In such a case, we can just move the muxing into the DTSI, and remove
it from the DTS.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13 09:21:52 +02:00
Maxime Ripard
e53bd7618d ARM: dts: sun4i: Change pinctrl nodes to avoid warning
All our pinctrl nodes were using a node name convention with a unit-address
to differentiate the different muxing options. However, since those nodes
didn't have a reg property, they were generating warnings in DTC.

In order to accomodate for this, convert the old nodes to the syntax we've
been using for the new SoCs, including removing the letter suffix of the
node labels to the bank of those pins to make things more readable.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13 09:21:52 +02:00
Fabio Estevam
4a5b479b1f ARM: dts: imx25-pdk: Add touchscreen support
Add support for the built-in touchscreen controller present on MX25.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 14:47:39 +08:00
Marco Franchi
df5cc9d0b4 ARM: dts: imx6qdl: Remove leading zeroes from unit addresses
The following build warnings are seen with W=1:

Warning (simple_bus_reg): Node /soc/sram@00900000 simple-bus unit
address format error, expected "900000"
Warning (simple_bus_reg): Node /soc/aips-bus@02000000 simple-bus unit
address format error, expected "2000000"
Warning (simple_bus_reg): Node /soc/aips-bus@02000000/pxp@020f0000
simple-bus unit address format error, expected "20f0000"
(...)

Remove the leading zeroes from unit addresses to fix the warnings.

Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 11:44:12 +08:00
Marco Franchi
efb9adb274 ARM: dts: imx6ul: Remove leading zeroes from unit addresses
The following build warnings are seen with W=1:

Warning (unit_address_format): Node /interrupt-controller@00a01000 unit
name should not have leading 0s
Warning (simple_bus_reg): Node /soc/sram@00900000 simple-bus unit address
format error, expected "900000"
Warning (simple_bus_reg): Node /soc/dma-apbh@01804000 simple-bus unit
address format error, expected "1804000"
(...)

Remove the leading zeroes from unit addresses to fix the warnings.

Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 11:43:56 +08:00
Christopher Spinrath
3d208992d9 ARM: dts: imx6q-utilite-pro: add HDMI CEC pinctrl
On the Utilite Pro the CEC line is wired up to the HDMI connector.
Add the required pinctrl setting.

Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 11:38:30 +08:00
Fabio Estevam
12ce81e948 ARM: dts: imx6qdl-sabresd: Add CEC support
HDMI_TX_CEC_LINE pin is used for CEC, so pass it in the device tree.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 11:19:02 +08:00
Fabio Estevam
46c7ec9fc7 ARM: dts: imx6qdl-sabresd: Use the 'vpcie-supply' property
Since commit c26ebe98a1 ("PCI: imx6: Add regulator support"), it is
possible to pass the 'vpcie-supply' property to describe the PCIE supply.

This way we can remove the 'regulator-always-on' property from the
regulator and have a better device tree description.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 11:16:38 +08:00
Jagan Teki
0ec7a7d337 ARM: dts: imx6qdl-icore-rqs: Add CAN nodes
Add support for can1 and can2 nodes on Engicam i.CoreM6 RQS
QDL module boards.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 11:04:09 +08:00
Jagan Teki
c983a9137e ARM: dts: imx6dl-icore: Add touchscreen node
max11801 touchscreen on Engicam iCoreM6 DualLite/Solo module is
connected via i2c1, so add max11801: touchscreen@48 on i2c1.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 11:04:04 +08:00
Jagan Teki
b5307edb16 ARM: dts: imx6qdl-icore-rqs: Switch to use simple-audio-card
This patch replace fsl,imx-audio-sgtl5000 and use simple-audio-card
for Engicam i.CoreM6 RQS QDL platform boards.

This patch also fix, pinctrl_adumux.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 11:03:59 +08:00
Jagan Teki
4f0c2c754e ARM: dts: imx6qdl-icore-rqs: Move Sound nodes to dtsi
imx6q, imx6dl icore-rqs modules share common sound nodes,
so move the sound nodes from imx6q-icore-rqs into dtsi so-that
both can share the common node details.

And also replace codec: sgtl5000@0a => sgtl5000: codec@a
on imx6q-icore-rqs.dts to [label:] node-name[@unit-address]
according to devicetree specification from ePAPER v1.1

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 11:03:53 +08:00
Jagan Teki
bf04a32b43 ARM: dts: imx6qdl-icore: Add Sound card support
Linux Sound card now uses generic simple-audio-card, so add
the same along with related audmux and codec(via u2c3) for
i.CoreM6 QDL module boards.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-13 11:03:39 +08:00
Florian Fainelli
bc79cce741 ARM: dts: Hurricane 2: Add basic support for Ubiquiti UniFi Switch 8
Add basic board support for the Ubiquiti UniFi Switch 8 port model. This
is a small home and office use managed switch based on the BCM53342
switching control SoC.

Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-12 11:31:24 -07:00
Florian Fainelli
b9099ec754 ARM: dts: Add Broadcom Hurricane 2 DTS include file
Describe the Broadcom Hurricane 2 SoC comprised of a Cortex-A9 CPU
complex along with standard iProc peripherals:

* timers
* SPI controller
* NAND controller
* a single AMAC (Ethernet MAC controller)
* dual PCIe controllers

The design is largely similar to existing iProc-based SoCs such as
Northstar Plus.

Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-12 11:30:52 -07:00
Jacopo Mondi
1126e108a3 ARM: dts: gr-peach: Enable ostm0 and ostm1 timers
Enable ostm0 and ostm1 timers to be used as clock source and clockevent
source. The timers provides greater accuracy than the already enabled
mtu2 one.

With these enabled:

clocksource: ostm: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 57352151442 ns
sched_clock: 32 bits at 33MHz, resolution 30ns, wraps every 64440619504ns
ostm: used for clocksource
ostm: used for clock events

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Suggested-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 13:51:25 +02:00
Jacopo Mondi
349adfbf27 ARM: dts: gr-peach: Add ETHER pin group
Add pin configuration subnode for ETHER pin group.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 13:49:02 +02:00
Biju Das
e0a10e7b07 ARM: dts: r8a7743: Enable DMA for HSUSB
This patch adds DMA properties to the HSUSB node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 13:46:18 +02:00
Biju Das
310861003a ARM: dts: r8a7743: Add USB-DMAC device nodes
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 13:46:03 +02:00
Biju Das
405b580227 ARM: dts: iwg20d-q7: Enable HS-USB
Enable HS-USB device for the iWave G20D-Q7 carrier board based on
RZ/G1M.
Also disable the host mode support on usb otg port by default to avoid
pin conflicts.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 13:45:49 +02:00
Biju Das
4b4a3b1c33 ARM: dts: r8a7743: Add HS-USB device node
Define the R8A7743 generic part of the HS-USB device node. It is up to the
board file to enable the device.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 13:45:20 +02:00
Nicolas Pitre
ee3eaee6a1 ARM: 8704/1: semihosting: use proper instruction on v7m processors
The svc instruction doesn't exist on v7m processors. Semihosting ops are
invoked with the bkpt instruction instead.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-10-12 11:28:29 +01:00
Biju Das
aea3c9d972 ARM: dts: iwg22d-sodimm: Enable USB PHY
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 12:15:01 +02:00
Biju Das
bc058f6f03 ARM: dts: iwg22d-sodimm: Enable internal PCI
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
attached to them.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 12:14:48 +02:00
Biju Das
c3e35873e3 ARM: dts: r8a7745: Link PCI USB devices to USB PHY
Describe the PCI USB devices that are behind the PCI bridges, adding
necessary links to the USB PHY device.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 12:14:38 +02:00
Biju Das
237173a4bb ARM: dts: r8a7745: Add USB PHY DT support
Define the r8a7745 generic part of the USB PHY device node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 12:14:24 +02:00
Biju Das
ab290a3292 ARM: dts: r8a7745: Add internal PCI bridge nodes
Add device nodes for the r8a7745 internal PCI bridge devices.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 12:13:56 +02:00
Dietmar Eggemann
5bdc81259b ARM: dts: r8a7790: add cpu capacity-dmips-mhz information
The following 'capacity-dmips-mhz' dt property values are used:

Cortex-A15: 1024, Cortex-A7: 539

They have been derived form the cpu_efficiency values:

Cortex-A15: 3891, Cortex-A7: 2048

by scaling them so that the Cortex-A15s (big cores) use 1024.

The cpu_efficiency values were originally derived from the "Big.LITTLE
Processing with ARM Cortex™-A15 & Cortex-A7" white paper
(http://www.cl.cam.ac.uk/~rdm34/big.LITTLE.pdf). Table 1 lists 1.9x
(3891/2048) as the Cortex-A15 vs Cortex-A7 performance ratio for the
Dhrystone benchmark.

The following platform is affected once cpu-invariant accounting
support is re-connected to the task scheduler:

r8a7790-lager

Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 12:13:19 +02:00
Martin Blumenstingl
88b1b18ffe ARM: dts: meson: add the SDIO MMC controller
Meson6, Meson8 and Meson8b are using the same MMC controller IP. This
adds the MMC controller node to meson.dtsi so it can be used by all
SoCs.

The controller itself is a bit special, because it has multiple slots.
Each slot is accessed through a sub-node of the controller. However,
currently the driver for this hardware only supports one slot.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-11 17:18:25 -07:00
Jerome Brunet
677c432c94 ARM: dts: meson8: remove gpio offset
Remove pin offset on the AO controller. meson pinctrl no longer has
this quirk

Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-11 17:12:02 -07:00
Luca Weiss
e8c4c6eeaa ARM: dts: msm8974-FP2: Add USB node
This introduces the usb node which can be used e.g. for USB_ETH

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 15:52:49 -05:00
Luca Weiss
329d8f2207 ARM: dts: msm8974-FP2: Add sdhci1 node
This introduces the eMMC sdhci node and its pinctrl state

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 15:52:49 -05:00
Luca Weiss
4423798666 ARM: dts: msm8974-FP2: Add regulator nodes for FP2
The voltages are pulled from the vendor source tree.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 15:52:48 -05:00
Luca Weiss
a7adc50f0d ARM: dts: msm8974-FP2: Introduce gpio-keys nodes
This introduces the gpio-keys nodes for keys of the FP2 and the
associated pinctrl state.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 15:52:48 -05:00
Luca Weiss
1548a21458 ARM: dts: qcom: Add initial DTS file for Fairphone 2 phone
This DTS has support for the Fairphone 2 (codenamed FP2).
This first version of the DTS supports just the serial console via the
MSM UART pins.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 15:52:36 -05:00
Linus Walleij
0adb92437c ARM: dts: qcom: add MSM8660 GSBI6 and GSBI7
This adds the GSBI6 and GSBI7 IO blocks to the MSM8660 DTSI file.
On the APQ8060 DragonBoard, GSBI6 DM is used for Bluetooth UART,
and GSBI7 I2C is used for FM radio I2C.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 15:52:35 -05:00
Bjorn Andersson
ab80661883 ARM: dts: qcom: msm8974: Add Sony Xperia Z2 Tablet
This adds a basic DTS file for the Sony Xperia Z2 Tablet, containing
definitions for regulators, eMMC/SD-card, USB, WiFi, Touchscreen,
charger, backlight, coincell and buttons.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 15:52:35 -05:00
Srinivas Kandagatla
fb83f20143 ARM: dts: qcom-apq8064: disable gsbi6 i2c by default at soc dtsi
This patch marks gsbi i2c node at soc level dtsi, so that kernel
would not assume that its enabled and result in pin conflicts on
some boards like IFC6410 which do use these pins for uart.

Without this patch we see below pin conflict:
apq8064-pinctrl 800000.pinctrl: pin GPIO_16 already requested by
 16540000.serial; cannot claim for 16580000.i2c
apq8064-pinctrl 800000.pinctrl: pin-16 (16580000.i2c) status -22
apq8064-pinctrl 800000.pinctrl: could not request pin 16 (GPIO_16)
 from group gpio16  on device 800000.pinctrl
i2c_qup 16580000.i2c: Error applying setting, reverse things back
i2c_qup: probe of 16580000.i2c failed with error -22

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 15:52:34 -05:00
Andy Gross
3191b5b332 ARM: dts: qcom-apq8064: Fix dsi and hdmi phy cells
This patch adds the necessary #phy-cells property to the DSI and HDMI
phys.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
2017-10-11 15:52:28 -05:00
Lars Poeschel
aefe3babab ARM: dts: omap3: Replace deprecated mcp prefix
The devicetree prefix mcp is deprecated in favour of microchip. Thus
this replaces mcp with microchip for the mcp23017 gpio expander chip.

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 08:47:31 -07:00
Ravikumar Kattekola
03f1191241 ARM: dts: dra7-evm: Move pcie RC node to common file
Move the pcie_rc node to common file so that it can be
used by dra76-evm as well.

Signed-off-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 08:43:56 -07:00
Ravikumar Kattekola
d4b8a2e0ae ARM: dts: omap5: Increase max-voltage of pbias regulator
As per recent TRM, PBIAS cell on omap5 devices supports
3.3v and not 3.0v as documented earlier.

Update PBIAS regulator max voltage to match this.

Document reference:
SWPU249AF - OMAP543x Technical reference manual August 2016

Signed-off-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 08:43:02 -07:00
Ravikumar Kattekola
fa40d42053 ARM: dts: dra7: Increase max-voltage of pbias regulator
As per recent TRM, PBIAS cell on dra7 devices supports
3.3v and not 3.0v as documented earlier.

Update PBIAS regulator max voltage to match this.

Document reference:
SPRUI30C – DRA75x, DRA74x Technical reference manual- November 2016

Tested on:
DRA75x PG 2.0 REV H EVM

Signed-off-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 08:42:58 -07:00
Chen-Yu Tsai
8b1447aed5 ARM: dts: sun6i: Enable HDMI support on some A31/A31s devices
All the A31/A31s devices I own have some kind of HDMI connector wired
to the dedicated HDMI pins on the SoC:

  - A31 Hummingbird (standard HDMI connector, display already enabled)
  - Sinlinx SinA31s (standard HDMI connector)
  - MSI Primo81 tablet (micro HDMI connector)

Enable the display pipeline (if needed) and HDMI output for them.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-11 20:08:11 +08:00
Chen-Yu Tsai
026b89cec3 ARM: dts: sun6i: Add device node for HDMI controller
Now that we support the HDMI controller on the A31 SoC, we can add it
to the device tree.

This adds a device node for the HDMI controller, and the of_graph nodes
connecting it to the 2 TCONs.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-11 20:08:03 +08:00
Tony Lindgren
160ec89ac3 ARM: dts: Configure SmartReflex only to idle the interconnect target module
The TRM has marked dra7 SmartReflex as reserved and we should not
touch those registers as pointed out by Nishanth Menon <nm@ti.com>.
We do still want to idle the related interconnect target modules on
init though.

Let's do this by only configuring the generic interconnect target modules
and not add the child SmartReflex devices.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-10 14:15:04 -07:00
Tony Lindgren
d23a163ebe ARM: dts: Add nodes for missing omap4 interconnect target modules
On omap4 we are missing dts nodes for several interconnect target
modules that we are idling on init. This currently works with the
legacy platform data still around.

To fix this, let's add the interconnect target modules so we can
idle the unused interconnect target module on init.

Also note that adding the interconnect target module node does not
necessarily mean that there is a driver available for the child IP
block, or that the child IP block is even functional.

In the SGX case, the PowerVR driver is closed source. And McASP on
omap4 has at least the TX path disabled and is not supported by the
davinci-mcasp driver. For AESS there is old Android 3.4 kernel
driver available.

For smarflex, we are still probing with platform data and the
driver needs more work before we can add the device ip child nodes.

And finally, we're not yet using the interconnet ranges. I will
be posting separate patches for those later on.

Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Nishanth Menon <nm@ti.com>
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sakari Ailus <sakari.ailus@iki.fi>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-10 14:14:50 -07:00
Murali Karicheri
1efed4072c ARM: dts: keystone-k2g-evm: add bindings for SPI NOR flash
K2G EVM has n25q128a13 SPI NOR flash on SPI1. Enable SPI1 in the DT
node as well as add a subnode for the SPI NOR.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-10-10 09:42:56 -07:00
Vitaly Andrianov
729ce96967 ARM: dts: keystone-k2g: Add SPI nodes
Add nodes for the various SPI instances.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-10-10 09:42:49 -07:00
Vignesh R
e1471fe61a ARM: dts: keystone-k2g-evm: Enable PWM ECAP0
Enable PWM ECAP0 which will be used for display backlight.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-10-10 09:42:41 -07:00
Vignesh R
a9ccafd0a3 ARM: dts: keystone-k2g: Add ECAP PWM DT nodes
Add DT nodes for PWM ECAP IP present on 66AK2G SoC.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-10-10 09:42:37 -07:00
Roger Quadros
cfc8e42c41 ARM: dts: k2g-evm: Enable USB 0 and 1
Enable USB 0 which will be used as a host port and USB 1 which will be
used in peripheral mode.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-10-10 09:42:27 -07:00
Vitaly Andrianov
252402aa37 ARM: dts: k2g: Add USB instances
Add nodes for both USB instances supported by 66AK2G.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-10-10 09:41:21 -07:00
Murali Karicheri
07bdfc24cb ARM: dts: keystone-k2g-evm: Add I2C EEPROM DT entry
K2G EVM has an onboard I2C EEPROM connected to I2C0. This patch adds
the necessary DT entry for the AT24CM01 EEPROM.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-10-10 09:41:21 -07:00
Vitaly Andrianov
d0dfe5defd ARM: dts: keystone-k2g: Add I2C nodes
Add nodes for the various I2C instances.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-10-10 09:41:20 -07:00
Peter Ujfalusi
55fe38f0c0 ARM: dts: keystone-k2g: Add McASP nodes
Add three McASP nodes present on 66AK2G device.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-10-10 09:41:20 -07:00
Nicolas Ferre
854106bc62 ARM: dts: at91: at91sam9x5ek: use DMA for USART0
Use DMA for USART0 (which is used as ttyS1) as we have enough channels and to
show how to specify DMA use with serial nodes.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:20 +02:00
Nicolas Ferre
66156ea9e9 ARM: dts: at91: at91sam9x25ek: add pwm0
Add the PWM0 interface and one output of channel 0 (on PC10) on this headless
board. The output conflicts with LCD and ISI, so only enable it for this
particular board of the series (ISI is enabled on at91sam9g25ek, as an example
but we can do the other way around).

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:20 +02:00
Nicolas Ferre
e5f0472f7a ARM: dts: at91: at91sam9x25ek: add CAN1 interface
As the CAN1 interface is not multiplexed with other peripherals on this
board, enable it so that it can be tested more easily.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:20 +02:00
Nicolas Ferre
a317e514ae ARM: dts: at91: sama5d2_xplained: remove pull-up on SD/MMC lines
As the board have the proper pull-ups soldered on the data and CMD
lines we don't need them specified in the PADs. So remove the
"bias-pull-up" property and set "bias-disable".
This will also save some power.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:20 +02:00
Claudiu Beznea
0036d85b5b ARM: dts: at91: sama5d2_xplained: add pinmuxing for pwm0
Add pin muxing for pwm0 and set it as disabled since it is in conflict
with pins for leds.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:19 +02:00
Ludovic Desroches
be6d90b132 ARM: dts: at91: sama5d2_xplained: set PB_USER as wakeup source
Set the PB_USER button as a wakeup source to resume from ulp0 mode.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:19 +02:00
Nicolas Ferre
06530725e1 ARM: dts: at91: sama5d27_som1_ek: remove pull-up on SD/MMC lines
As the board have the proper pull-ups soldered on the data
and CMD lines we don't need them specified in the PADs. So remove
the "bias-pull-up" property and set "bias-disable".

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:19 +02:00
Nicolas Ferre
ffbc890ee5 ARM: dts: at91: sama5d27_som1_ek: remove not connected CAN0
CAN0 is not connected on the sama5d27_som1_ek board, so remove
it from DT.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:19 +02:00
Claudiu Beznea
17b035dcc8 ARM: dts: at91: sama5d27_som1_ek: add pinmuxing for pwm0
Add pin muxing for pwm0 and set it as disabled since it is in conflict
with the pins for leds.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:19 +02:00
Ludovic Desroches
55f4286b48 ARM: dts: at91: sama5d27_som1_ek: add aliases for i2c
Add aliases for i2c devices to not rely on probe order for i2c device
numbering.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[claudiu.beznea@microchip.com: remove i2c0, change subject]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:19 +02:00
Ludovic Desroches
6011143681 ARM: dts: at91: sama5d27_som1_ek: set USER button as a wakeup source
Set the USER button as a wakeup source to allow wakeup from ULP0.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:19 +02:00
Ludovic Desroches
550b209f6d ARM: dts: at91: sama5d27_som1_ek: update serial aliases
Overwrite sama5d2.dtsi aliases node to match the at91-sama5d27_som1_ek
board configuration. ttyS0 stands for DBGU, ttyS1 for the mikro BUS 1
serial lines and ttyS2 for the mikro BUS 2 serial lines.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:19 +02:00
Claudiu Beznea
64f7691509 ARM: dts: at91: sama5d27_som1_ek: enable i2c2
Enable i2c.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:19 +02:00
Claudiu Beznea
8bf456076c ARM: dts: at91: sama5d27_som1_ek: add disabled status
Add disabled statuses for all devices and for those those which pins
are in conflict with other devices add a comment in the DT file to specify
this.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-10 15:26:19 +02:00
Heiko Stuebner
0133c4928c ARM: dts: rockchip: fix mali400 ppmmu interrupt names
The interrupts were wrongly named as ppXmmu while the binding
specifies them as ppmmuX.
Fix that for the recently added Utgard mali nodes on Rockchip socs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-10 11:04:33 +02:00
Dan Haab
7030ea600d ARM: dts: BCM53573: Add DT for Luxul XAP-1440
This is BCM53573 WiSoC based outdoor access point with an extra BCM43217
chipset used for 2.4 GHz.

Signed-off-by: Dan Haab <dhaab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-09 12:45:47 -07:00
Dan Haab
0aa052ce1c ARM: dts: BCM53573: Add DT for Luxul XAP-810
This is BCM53573 WiSoC based access point with an extra BCM43217 chipset
used for 2.4 GHz.

Signed-off-by: Dan Haab <dhaab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-09 12:45:19 -07:00
Dan Haab
65f78c4c41 ARM: dts: BCM5301X: Add DT for Luxul ABR-4500
This is BCM47094 (AKA BCM4709C0) based router with rear-facing ports
board design.

Signed-off-by: Dan Haab <dhaab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-09 12:44:50 -07:00
Dan Haab
1f4b0d5596 ARM: dts: BCM5301X: Add DT for Luxul XBR-4500
This is BCM47094 (AKA BCM4709C0) based router with ports-on-the-front
board design.

Signed-off-by: Dan Haab <dhaab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-09 12:44:27 -07:00
Maciej Purski
5fb9ae8883 ARM: dts: exynos: Add HDMI and Sil9234 to Trats2 board
Add HDMI and Sil9234 MHL converter to Trats2 board.
Following in SoC devices have been enabled:
- HDMI (HDMI signal encoder),
- Mixer (video buffer scanout device),
- I2C_5 bus (used for HDMI DDC)
- I2C_8 bus (used for HDMI_PHY control).

Based on previous work by:
Tomasz Stanislawski <t.stanislaws@samsung.com>

Signed-off-by: Maciej Purski <m.purski@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-10-09 19:50:19 +02:00
Alexandre Belloni
adea291718 ARM: dts: at91: usb_a9g20: fix rtc node
The rv3029 compatible is missing its vendor string, add it.
Also fix the node name to be a proper generic name.

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-09 16:32:20 +02:00
Romain Izard
9b50e1abcc ARM: dts: at91: sama5d2 Xplained: Describe the SD card power supply
As the SAMA5D2 SDHCI controller works with an external power supply,
describe the power supply for the SD card slot. This makes it possible
to use mmc power sequences, in the case of external SDIO modules.

Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-09 16:32:20 +02:00
Wenyou Yang
ff7b582a94 ARM: dts: at91: sama5d2_xplained: Add charger node
Add the charger device node as a sub-device of act8945a mfd, move
the charger's properties in the node, and replace the
"active-semi,irq_gpios" with the "interrupts" property to denote
the act8945a charger's irq.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-10-09 16:32:19 +02:00
Eugen Hristev
27d90f46f2 ARM: dts: at91: sama5d2: add ADC hw trigger edge type
Added ADTRG edge type property as interrupt edge type value

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2017-10-09 15:34:22 +02:00
Eugen Hristev
84c70b2395 ARM: dts: at91: sama5d2_xplained: enable ADTRG pin
Enable pinctrl for ADTRG pin (PD31) for ADC hardware trigger support.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2017-10-09 15:33:53 +02:00
Maxime Ripard
86f8b2d359 ARM: dts: sun4i: Change LRADC node names to avoid warnings
One of the usage of the LRADC is to implement buttons. The bindings define
that we should have one subnode per button, with their associated voltage
as a property.

However, there was no reg property but we still used the voltage associated
to the button as the unit-address, which eventually generated warnings in
DTC.

Rename the node names to avoid those warnings.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-09 10:52:12 +02:00
Maxime Ripard
6ab3cf0415 ARM: dts: sun4i: Remove skeleton and memory to avoid warnings
Using skeleton.dtsi will create a memory node that will generate a warning
in DTC. However, that node will be created by the bootloader, so we can
just remove it entirely in order to remove that warning.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-09 10:50:26 +02:00
Maxime Ripard
f42ff29980 ARM: dts: sun4i: Remove gpio-keys warnings
Some gpio-keys definitions in our DTs were having buttons defined with a
unit-address and that would generate a DTC warning.

Change the buttons node names to remove the warnings.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-09 10:49:35 +02:00
Ludovic Desroches
2f61929eb1 ARM: dts: at91: at91-sama5d27_som1: fix PHY ID
The PHY ID is incorrect. It leads to troubles when resuming from standby
or mem power states.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Fixes: af690fa37e ("ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support")
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2017-10-09 10:08:25 +02:00
Fabrizio Castro
2ee18841ff ARM: dts: iwg20d-q7-dbcm-ca: Add device trees for camera DB
This patch adds a .dtsi that describes the camera daughter board
and a .dts to describe the HW made of iWave's RZ/G1M SoM, iWave's
RZ/G1M/G1N Qseven carrier board, and the camera daughter board.
The camera daughter board .dtsi adds support for ttySC[14].

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-09 09:29:34 +02:00
Fabrizio Castro
4f0b2563c4 ARM: dts: iwg20d-q7: Rework DT architecture
Since the same carrier board may host RZ/G1M and RZ/G1N based
Systems on Module, the DT architecture for iwg20d-q7 needs
better decoupling. This patch provides:
* iwg20d-q7-common.dtsi - its purpose is to define the carrier
  board definitions, and its content is basically the same
  as the previous version of r8a7743-iwg20d-q7.dts, only it
  has no reference to the SoM .dtsi, and that's why the
  filename doesn't mention the SoC name any more.
* r8a7743-iwg20d-q7.dts - its new purpose is to put together
  the SoM .dtsi (r8a7743-iwg20m.dtsi) and the carrier board
  .dtsi defined by this very patch, along with "model" and
  "compatible" properties.
The final DT architecture to describe the board is now:
r8a7743-iwg20d-q7.dts           # Carrier Board + SoM
├── r8a7743-iwg20m.dtsi         # SoM
│   └── r8a7743.dtsi            # SoC
└── iwg20d-q7-common.dtsi       # Carrier Board
and maximizes the reuse of the definitions for the carrier board
and for the SoM.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-09 09:28:43 +02:00
Greg Kroah-Hartman
9424e8b1fe Merge 4.14-rc4 into tty-next
We want the tty/serial fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-09 09:05:05 +02:00
Rafał Miłecki
2460266f21 ARM: dts: BCM5301X: Specify USB ports for USB LED of Luxul XWR-1200
This info can be used by operating system to setup LED behavior.

Reported-by: Dan Haab <dhaab@luxul.com>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-06 16:18:22 -07:00
Linus Lüssing
b9b4bf504c ARM: dts: meson8b: add reserved memory zone to fix silent freezes
So far, the stress-ng tool for instance quickly resulted in a silent
freeze of the system with no prior notice on a serial console when
running its filesystem or memory stressor classes.

Even with a panic-on-OOM and reboot-on-panic (vm.panic_on_oom=1,
kernel.panic=10) configured, the system would neither reboot nor
would the OOM killer get any chance to otherwise do its job.

The Amlogic reference source code uses a 2MB PHYS_OFFSET. With these 2MB
reserved via DT, stress-ng was able to run on an Odroid C1+ just fine for
several hours, the OOM killer was able to kill processes again and if
configured would successfully trigger a reboot of the system.

Fixes: 4a69fcd3a1 ("ARM: meson: Add DTS for Odroid-C1 and Tronfy MXQ boards")
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-06 15:58:39 -07:00
Martin Blumenstingl
bd835d53f5 ARM: dts: meson: add SoC information nodes
The SoC type and version information is encoded in different register
blocks.
The SoC type information is part of the "assist" registers.
The misc version information is part of the "bootrom" registers.
On Meson8, Meson8b and Meson8m2 there is additionally information about
the minor version. This information is stored in the "analog top"
registers.

Add the nodes for these register blocks so we can decode the SoC type
and version information.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-06 15:37:01 -07:00
Emiliano Ingrassia
291f45dd6d ARM: dts: meson: fixing USB support on Meson6, Meson8 and Meson8b
This patch fixes the Meson6, Meson8 and Meson8b USB controllers dts nodes
which interrupts are level type instead of edge type.
This avoids errors like "usb 1-1-port1: cannot reset (err = -110)" and
similars on Odroid-C1+ board.

Fixes: e29b1cf874 ("ARM: dts: meson: add USB support on Meson8 and Meson8b")

Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Linus Lüssing <linus.luessing@c0d3.blue>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-06 15:24:17 -07:00
Emiliano Ingrassia
2eb79a4d15 ARM: dts: meson: enabling the USB Host controller on Odroid-C1/C1+ board
This patch enables the USB Host controller (USB1) and the relative USB2 PHY
on Odroid-C1/C1+ board.

Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Linus Lüssing <linus.luessing@c0d3.blue>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-06 15:20:13 -07:00
Florian Fainelli
3bda685e0e This pull request adds the Pi 3's built in bluetooth device so that it
can be probed automatically without userspace hciattach calls.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE/JuuFDWp9/ZkuCBXtdYpNtH8nugFAlnX+4gACgkQtdYpNtH8
 nuhW/RAAo5fx6LZyY8YDS5In3VQuUuyHHOOXUfJfiFpY3v99a5iCF8xHSinCIX2f
 5J/aSMPFVeSEzXavMqIk63YQM2iOukV10iB2eEpaOMk7z7bxfXnIzolCXBzQEjHy
 d0tFvcAwEmAfg8BAv6qAJ+USOaRGWGcCM8iQ+7YRw9dMnIHyHvSnqqhrr/yIuwfO
 dehhBhWXS6EICV6SZxQK5uGAEgp/93oT86EoGDyHmCEh5PTbOdMk1VGywcuOUdMW
 7b9iEzkGSOyRqlBlAnyW4GzWZEcwO3dLSvOW7fc9UMoEp4ZrQ0PrzmaObpAXgr0P
 ijSkTQNL0QF8uYpxPleV1XytnLMB8xDVtmTMBZDFL865vJRnTL+e+9vVT3LbdN+K
 YiLGIjYupSSObSVT+/fcbWVF60gP0b/7vvgCX6KLXXg8AnQf0q7yUogAsoNe1Ka1
 9pAGGBgzYu/zq1/GRYW9ALM+9OF1srI5Xu0zBJxiplb1YGvpXhjA8Cet4R7tFp81
 gS5S/pv3x+I1XwSpEbTly33rtY0Qrz8Y/X5H8CczNs+NhVqVncSJVSgsOIcg5/1a
 d8vGC+KZ0HSGkiRAfDWSlLc84xm6KfJeU1NvVnGqSGxGGT6lKU5ceDOFEYh14QWk
 z2JYPUpn1D6xoMFFRyEhf6YaAiDsvn0nQc5+XdXq5CJ8E4t1A9M=
 =FCYe
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJZ2AENAAoJEIfQlpxEBwcEfEoQAJQ0zreR3MK9XcTHEUbPw5QO
 NOIr2sFGjkisYZG9oBNm+FQHtGuMx6KRC+Ov5H5lJChdvzhHupWyu/K3dr/9oExu
 W2XBmRDCsfp8hjf8tU8QpifqD5QrxtaCI/YGVdo5lyrQpQ8yvPQg3VEtuCpSFosz
 YZWTP+vDgJasifCJqHFbg8eMpXN4WcFnXD1I/kdqH1cCf8XNnrId1CV6mBsoCNke
 wRVEZqbXm8HeD2Z/vUtyG6PFeXqPkag2kpxqqik1lvOIQFIwG6Z7RMBBKIXOUK62
 3vJ612FomwkYvRLdWObiPmbnuKa3jps+mCs8kcQUSjoy2uLZ8+q2Eaj8FEKejozD
 dlAzpwgpycmTc/sUaFBKBIh+OQWteGteieM3JLcw5wSGwUlScpc124Uieg7raOYK
 s8u8qVq28Ezi4TTEDYQDTaRwoCnSIS6Xmxqi45xdKJiTlkux7aMVKJMzDJBDeFY/
 DbhiiV4QejEOvD0UUQKJXZKHKBu52HDEk6mvvcXlfeVngDjZSo562WJbD/iqiWrd
 Nx3X4YFDzUmONwYpjqoEKVh2hwGcJbswQFqbRquJDLUPHBoJklEzsDWYpE4B5XZo
 2LwHB80GmvuyxSn3g6L4CYu4+GTkNNG4zQe0YGFuwyAlNRUssou0KdkWw4S34Ewz
 yW06qD17B8AquOq4v4bK
 =3p0u
 -----END PGP SIGNATURE-----

Merge tag 'bcm2835-dt-next-2017-10-06' into devicetree/next

This pull request adds the Pi 3's built in bluetooth device so that it
can be probed automatically without userspace hciattach calls.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-06 15:17:39 -07:00
Florian Fainelli
2e7a84aadd This pull request brings in a fix for default serial console setup on
RPi3, so it now comes up with no config.txt/cmdline.txt settings in
 the firmware.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE/JuuFDWp9/ZkuCBXtdYpNtH8nugFAlnX+yoACgkQtdYpNtH8
 nui1EA/+I731RqdL+jbZdsw3/f0QWZeIL9iUvQmdi0XYpqd7PjK/CptDadY4vmwS
 XNqcfI9B6HAa7pj3skP5zOFkrdp/h4pfIvQ2IcsXEUTd0O0C82aI7R+CaaY9WC++
 p6xlowYggSiw86Mkr/5Azbg/+zU6ZQWKnNeI+gpKGe84Ze5+r91zYjgz4t86+sVJ
 2m2E06rBQsYvIS/YA+otfmDIIiUcC/2ads11WmC6Cufx8bOxEdOrLaoiwUwHHYRY
 SRCyupkkDggUVZUTTFp1DNRfXbfiMBJuEKOMCulhVIXPEKGWYorg5ywdk3TodyFl
 /G05HigHCLsb9S8QOajRFzp/mgzXU0WxdkEmAlaTspKU4MGdQ24WdcG5HYxJPovE
 acdsvPjmDdPTb3+mRhvbMgcdmkkT5+KHYmjlV51CHyn9wB0gH9uhoYj+orz1ksTb
 fx/0pzkGOqMW4gJ+/0aJPjQ4H1QTTbPSiKgm1dvwsivSXOJuabPrsCRP99xaZ0UY
 Utns2Ok3uL4MT0mRjO6cWOcU9eo+ZgaXFYTFgcgFvZ7lAAJpX0FGOTQyKngg0gjZ
 5J5Lu8C56COe5PAwakgsvhgXQpVOYC1DsGmhY4VxJI9aIz62FW8WgrtvDA36cuS6
 3pwrf7I2uMJKZDAMy4OeXV1OBm+DQXgaR2tari3lSrJFZyweKnE=
 =5wQi
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJZ2AD3AAoJEIfQlpxEBwcEeLEQAL+3RPM4igNyJlYV8m2s5UmA
 xYj3ek3FMTo23AZHA5Vs5o3EPliMyAcwak1yEPfYRIVOmjr0MJ0Eo/goFcj/XQzX
 8X5Du0MqahrgEyYN7IN1y9dAdcEH4XOaV4MAtzH58GGPr56FsekpER3iSmpti7y2
 5im/UnYvYUkjhbp8DcOBhigN8XhygOwApRWVREPxGCIoNaXaj+zI2ntz3X1/GMhI
 ufASi/VPu9dVa95VR10MBpC2Dbrm050gVQKSNcOjvgy950Djjft+XeIe41ge2zUH
 XMIVMpNT+ybgdME6DBbEc4nNfhcZMhDtsibd7P6GNEM2vsg27xkPoBy2GXPrn0IP
 HDb0lbMvEhiqgbuBiKe1djkgOMma9JtuvhgNmRxOh2uOH41RtF9bP+ny52gpEf0g
 N4FRoqCdfhXhgWobg/msvx3tnoDjKpneHNukXKpl7fAGhiY/Uj8mtKKJBcJiKwkO
 PgO/JPQHPPWA7BouP5wgKNuGVp3isM5UxGdSPRV6EL6uNYVBNAJOU2uOcIpia5G6
 Jy2j8ry4qYsH+nBj3QuM16DjKHm9GVPVnMAQkLRC4hObiY54d0PHGsj3gpDS967j
 M8A+pvNPS3RzAoc8gX+t8/63cGy+/j5STkgF5UPxxqzzfwJyaNaSj5xs8Ww3Ao7f
 cWnuHctDP974RwxrXddJ
 =pMRq
 -----END PGP SIGNATURE-----

Merge tag 'bcm2835-dt-fixes-2017-10-06' into devicetree/next

This pull request brings in a fix for default serial console setup on
RPi3, so it now comes up with no config.txt/cmdline.txt settings in
the firmware.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-06 15:17:19 -07:00
Loic Poulain
fd3372db18 ARM: dts: bcm2837-rpi-3-b: Add bcm43438 serial slave
Add BCM43438 (bluetooth) as a slave device of uart0 (pl011/ttyAMA0).
This allows to automatically insert the bcm43438 to the bluetooth
subsystem instead of relying on userspace helpers (hciattach).

Overwrite chosen/stdout-path to use 8250 aux uart as console.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Loic Poulain <loic.poulain@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2017-10-06 13:07:21 -07:00
Loic Poulain
f08f58a2bf ARM: dts: bcm283x: Fix console path on RPi3
Contrary to other RPi devices, RPi3 uses uart0 to communicate with
the BCM43438 bluetooth controller. uart1 is then used for the console.
Today, the console configuration is inherited from the bcm283x dtsi
(bootargs) which is not the correct one for the RPi3. This leads to
routing issue and confuses the Bluetooth controller with unexpected
data.

This patch introduces chosen/stdout path to configure console to uart0
on bcm283x family and overwrite it to uart1 in the RPi3 dts.

Create serial0/1 aliases referring to uart0 and uart1 paths.
Remove unneeded earlyprintk.

Fixes: 4188ea2aeb ("ARM: bcm283x: Define UART pinmuxing on board level")
Signed-off-by: Loic Poulain <loic.poulain@gmail.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-10-06 13:04:56 -07:00
Geert Uytterhoeven
8b40ea1923 ARM: dts: r8a7794: Use generic node name for VSP1 nodes
Use the preferred generic node name instead of the specific name.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-06 11:25:10 +02:00
Geert Uytterhoeven
2ea2e06cda ARM: dts: r8a7792: Use generic node name for VSP1 nodes
Use the preferred generic node name instead of the specific name.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-06 11:23:50 +02:00
Geert Uytterhoeven
18e5500c15 ARM: dts: r8a7791: Use generic node name for VSP1 nodes
Use the preferred generic node name instead of the specific name.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-06 11:22:49 +02:00
Geert Uytterhoeven
9f77b48019 ARM: dts: r8a7790: Use generic node name for VSP1 nodes
Use the preferred generic node name instead of the specific name.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-06 11:22:20 +02:00
Maxime Ripard
eb2d0fab0a ARM: dts: sun9i: cubieboard4: Remove card detect pull-up
The board has an external pull-up on the card-detect signal, so there's no
need to add another one.

This also removes a DTC warning.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:41:52 +02:00
Maxime Ripard
da0eb2f2e8 ARM: dts: sun9i: optimus: Remove card detect pull-up
The board has an external pull-up on the card-detect signal, so there's no
need to add another one.

This also removes a DTC warning.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:41:37 +02:00
Maxime Ripard
d177864f47 ARM: dts: sun9i: Rename pinctrl nodes to avoid warnings
Our pinctrl node names were containing unit-adresses without a reg
property, resulting in a warning. Change the names for our new convention.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:41:22 +02:00
Maxime Ripard
1848f3f444 ARM: dts: sun9i: Remove GPIO pinctrl nodes to avoid warnings
The A80 boards still define some GPIO pinctrl nodes that are not really
useful, and redundant with the muxing already happening on gpio_request.

Let's remove those nodes. This will also remove DTC warnings.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:41:03 +02:00
Maxime Ripard
98dc89db89 ARM: dts: sun9i: Remove skeleton to avoid warnings
Using skeleton.dtsi will create a memory node that will generate a warning
in DTC. However, that node will be created by the bootloader, so we can
just remove it entirely in order to remove that warning.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:40:42 +02:00
Maxime Ripard
75539f68a4 ARM: dts: sun4i: Remove all useless pinctrl nodes
The gpio pinctrl nodes are redundant and as such useless most of the times.
Since they will also generate warnings in DTC, we can simply remove most of
them.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:40:04 +02:00
Maxime Ripard
124d19dcc8 ARM: dts: sun4i: Rename thermal nodes to avoid warnings
The thermal-zone subnodes we defined for the A10 have underscores in them
that will generate DTC warnings. Change those underscores for hyphens.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:39:35 +02:00
Maxime Ripard
39f8a71b6e ARM: dts: sun4i: Remove SoC node unit-name to avoid warnings
Our main node for all the in-SoC controllers used to have a unit name. The
unit-name, in addition to being actually false, would not match any reg
property, which generates a warning.

Remove it in order to remove those warnings.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:39:16 +02:00
Maxime Ripard
5c58319f84 ARM: dts: sun4i: Change clock node names to avoid warnings
Our oscillators clock names have a unit address, but no reg property, which
generates a warning in DTC. Change these names to remove those unit
addresses.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:27:57 +02:00
Maxime Ripard
71299dd440 ARM: dts: sun4i: Change framebuffer node names to avoid warnings
The simple-framebuffer nodes have a unit address, but no reg property which
generates a warning when compiling it with DTC.

Change the simple-framebuffer node names so that there is no warnings on
this anymore.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:27:41 +02:00
Maxime Ripard
5474466ce3 ARM: dts: axp209: Rename usb_power_supply node to avoid warnings
The USB power supply node in the AXP209 DTSI is using underscores in its
node name, which is generating a warning. Change those underscores for
hyphens.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:27:23 +02:00
Maxime Ripard
5841f6c055 ARM: dts: sunxi: Remove leading zeros from unit-addresses
Most of our device trees have had leading zeros for padding as part of
the nodes unit-addresses.

Remove all these useless zeros that generate warnings

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:26:55 +02:00
Icenowy Zheng
23edc168bd ARM: dts: sun8i: Add board dts file for Banana Pi M2 Berry
The Banana Pi M2 Ultra is an SBC based on the Allwinner V40 SoC (same as
the R40 SoC). The form factor is similar to the Raspberry Pi series.

It features:

- X-Powers AXP221s PMIC connected to i2c0
- 1GiB DDR3 DRAM
- microSD slot
- MicroUSB Type-B port for power and connected to usb0
- HDMI output
- MIPI DSI connector
- 4 USB Type-A ports (connected to the usb1 controller via a hub)
- gigabit ethernet with Realtek RTL8211E transceiver
- WiFi/Bluetooth with AP6212 module, with external antenna connector
- SATA and power connectors for native SATA support
- camera sensor connector
- audio out headphone jack
- red and green LEDs
- debug UART pins
- Raspberry Pi B+ compatible GPIO header
- power and reset buttons

This patch adds a dts file that enables UART, MMC and PMIC support.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:18:59 +02:00
Chen-Yu Tsai
da7ac948fa ARM: dts: sun8i: Add board dts file for Banana Pi M2 Ultra
The Banana Pi M2 Ultra is an SBC based on the Allwinner R40 SoC. The
form factor and position of various connectors, leds and buttons is
similar to the Banana Pi M1+, Banana Pi M3, and is exactly the same
as the latest Banana Pi M64.

It features:

  - X-Powers AXP221s PMIC connected to i2c0
  - 2 GB DDR3 DRAM
  - 8 GB eMMC
  - micro SD card slot
  - DC power jack
  - HDMI output
  - MIPI DSI connector
  - 2x USB 2.0 hosts
  - 1x USB 2.0 OTG
  - gigabit ethernet with Realtek RTL8211E transceiver
  - WiFi/Bluetooth with AP6212 chip, with external antenna connector
  - SATA and power connectors for native SATA support
  - camera sensor connector
  - consumer IR receiver
  - audio out headphone jack
  - onboard microphone
  - red, green, and blue LEDs
  - debug UART pins
  - Li-Po battery connector
  - Raspberry Pi B+ compatible GPIO header
  - power, reset, and boot control buttons

This patch adds a dts file that enables UART, MMC and PMIC support.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:18:45 +02:00
Chen-Yu Tsai
195a59ab5b ARM: dts: sun8i: Add basic dtsi file for Allwinner R40
The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
The R40 is a smaller chip than the A20, but features the same set
of programmable pins, with a couple extra pins and some new pin
functions. The chip features 4 Cortex-A7 cores and a Mali-400 MP2
GPU. It retains most if not all features from the A20, while adding
some new features, such as MIPI DSI output, or updating various
hardware blocks, such as DE 2.0.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06 10:18:09 +02:00
Pierre-Yves MORDRET
0e813df73f ARM: dts: stm32: Add I2C1 support for STM32F746 SoC
This patch adds I2C1 support for STM32F746 SoC.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-05 11:52:14 +02:00
Jacopo Mondi
62cea6d2c6 ARM: dts: gr-peach: Enable MTU2 timer pulse unit
MTU2 multi-function/multi-channel timer/counter is not enabled for
GR-Peach board. The timer is used as clock event source to schedule
wake-ups, and without this enabled all sleeps not performed through busy
waiting hang the board.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-05 11:26:08 +02:00
Jacopo Mondi
4f049e09d8 ARM: dts: gr-peach: Fix 'leds' node name indent
Fix 'leds' node name indent as it was wrongly aligned.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-05 11:25:39 +02:00
Joel Stanley
27b5e338d2 ARM: dts: aspeed-romulus: Enable VUART
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 16:30:13 +10:30
Joel Stanley
efd56ec7a8 ARM: dts: aspeed-palmetto: Enable VUART
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 16:30:13 +10:30
Joel Stanley
eb746e5342 ARM: dts: aspeed: Enable watchdog two
The second watchdog is left running by u-boot in the common
configurations of the firmware shipped on ASPEED boards. Ensure a driver
is loaded so the system can succcessfully boot.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 16:30:12 +10:30
Joel Stanley
424bd7e6c5 ARM: dts: aspeed: Remove undocumented wdt properties
The watchdog bindings do not describe an interrupt property nor clock
phandle, and the upstream driver never had code to use them. Drop them
from the device tree.

Also rename the node from wdt the more commonly used watchdog.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 16:30:12 +10:30
Joel Stanley
a19331ca51 ARM: dts: aspeed: Clean up UART nodes
- Shorten size of reg property so it covers only the implemented
 registers

 - Add VUART compatible, and change node name to serial@

 - Remove outdated current-speed property. Different bootloaders use
 different speeds, so this is no longer helpful

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 16:30:12 +10:30
Joel Stanley
db4d6d9d80 ARM: dts: aspeed: Correctly order UART nodes
Order them all by address.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 15:06:32 +10:30
Joel Stanley
0bae390414 ARM: dts: aspeed: Add aliases for UARTs
Existing userspace expects the console (UART5) to be at /dev/ttyS4.  To
ensure the UARTs show up where users expect them, we give them fixed
aliases starting at 0.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 15:06:30 +10:30
Joel Stanley
e6aa3ef8da ARM: dts: aspeed-ast2500: Add I2C devices
Enable the buses that are in use and the devices that are attached.
Currently that includes temperature measurement and EEPROM.

Reviewed-by: Brendan Higgins <brendanhiggins@google.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 15:06:27 +10:30
Joel Stanley
2dfa70571e ARM: dts: aspeed-palmetto: Add I2C devices
Enable the buses that are in use and the devices that are attached.
Currently that includes the battery backed RTC, temperature measurement
and EEPROM.

Some of these buses are for hotplugged cards, such as PCIe cards.
Others do not yet have upstream drivers, so there are no devices
attached.

Reviewed-by: Brendan Higgins <brendanhiggins@google.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 15:06:24 +10:30
Joel Stanley
11520916c8 ARM: dts: aspeed-romulus: Add I2C devices
Enable the buses that are in use and the devices that are attached.
Currently that is just the battery backed RTC.

Some of these buses are for hotplugged cards, such as PCIe cards. Others
do not yet have upstream drivers, so there are no devices attached.

Reviewed-by: Brendan Higgins <brendanhiggins@google.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 15:06:18 +10:30
Joel Stanley
ef85637836 ARM: dts: aspeed: Add I2C buses
Now with an upstream i2c bus driver, we can add  the 14 i2c buses that
exist in ASPEED G4 and G5 generation SoCs.

It also adds aliases for the 14 built-in I2C busses to ensure userspace
sees the numbering staring from zero and counting up.

Acked-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 15:06:16 +10:30
Joel Stanley
29b246400c ARM: dts: aspeed: Reorder ADC node
We try to keep the nodes in address order. The ADC node was out of
place.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 15:06:13 +10:30
Andrew Jeffery
cd7df3f7ad ARM: dts: aspeed: Move pinctrl subnodes to improve readability
Moving the subnodes out of the pinctrl node declaration to a reference
allows easier access to the remaining parts of the devicetree.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Xo Wang <xow@google.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-10-05 15:06:10 +10:30
Olof Johansson
08f8c8808c STM32 fixes for v4.14:
---------------------
 
 -Fix STMPE1600 bindings for stm32429i-eval board
 -Use right compatible for stm32f469 pinctrl. It implies to use
 pinctrl dedicated files for F4 SoCs.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZ1OdsAAoJEH+ayWryHnCFpcUP/1wHNjXxCFRw8m7W0AMMSWJv
 274s7nnv7mrpCZ5iiqJz6JU3lORMjj/NchMzhgBLvWozYKH95NjyBWsAHyMimE+h
 1SLGeEKKCcSngwXGwthm8FJ5sDlw76loZp2BoUmjNhupJ6sxmiNs1JGxNgw9i0Zl
 HfkiumukP9SfUHDMsG432DriP1YXWtv7fz0XOKlRO78qzRUX3o3o0Ex7TF6hV/mN
 znWy6g/jXF7w56qo9fJvVKE1US6NfI1n/qZP8NJ7uvrXX3usd4yEjKSSswEmQDH4
 ZufEDNGZV1WlpfK1NUBPfHCS5FrGXpltB6G68ng+TyF3XwFChnIfGVX7OD9zM8IU
 /1xPyFetxmqnc3dasG+llR1AmG67Y9oVe09j6CiFlmoFjox7nyuPuuvVkeIpXt2E
 YP/4uzs4E99j+uf+O+jjly4MnFa3tv3fUZQtozEqU61lUGozVa2v2WqiOgZAoYB/
 B7qdDtoXCcaVRhZsBbkJRz2PBrE7f4lBjA7vtE5jb5Xcegdnh1UdiykG2u6n8INQ
 XhzY1867rjsa+7nb6JCUSZUQPs9t53aOz3uPVAPRz19M4IOXAgeU8l3ieAsxlwiU
 /JqvfzvlO1necxtOtkQX+qmvhaZxui8LIPQmOCe9AaqAU2//jJaxQ48P6LdvSTGG
 kvcwXZJUA16bYfwVPsug
 =C7yt
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-fixes-for-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into fixes

STM32 fixes for v4.14:
---------------------

-Fix STMPE1600 bindings for stm32429i-eval board
-Use right compatible for stm32f469 pinctrl. It implies to use
pinctrl dedicated files for F4 SoCs.

* tag 'stm32-dt-fixes-for-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: use right pinctrl compatible for stm32f469
  ARM: dts: stm32: Fix STMPE1600 binding on stm32429i-eval board

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-10-04 10:31:00 -07:00
Alexandre Torgue
2aaae13a9d ARM: dts: stm32: use right pinctrl compatible for stm32f469
Currently, same stm32f429-pinctrl driver is used for stm32f429 and
stm32f469. As pin map is different between those 2 MCUs,
a stm32f469-pinctrl driver has been recently added.
This patch
 -allows to use stm32f469-pinctrl driver for stm32f469 boards
 -reworks stm32 devicetree files to fit with stm32f429 / stm32f469

In the same time it fixes an issue when only MACH_STM32F469 flag is
selected in menuconfig.

Fixes: d28bcd53fa ("ARM: stm32: Introduce MACH_STM32F469 flag")
Reported-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-04 15:34:48 +02:00
Alexandre Torgue
4edd8121e5 ARM: dts: stm32: Fix STMPE1600 binding on stm32429i-eval board
To declare gpio interrupt line for STMPE1600, 2 possibilities are offered:
-use gpio binding (and then the gpiolib interface inside driver)
-use interrupt binding as each gpio-controller are also interrupt controller
 on stm32f429.

In STMPE 1600 node both (gpio and interrupt) bindings are defined.
This patch fixes this issue and use only interrupt binding.

Fixes: c04b2e72af ("ARM: dts: stm32: Enable STMPE1600 gpio expander of STM32F429-EVAL board")
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-04 11:42:00 +02:00